diff options
author | obrien <obrien@FreeBSD.org> | 2002-07-05 20:16:34 +0000 |
---|---|---|
committer | obrien <obrien@FreeBSD.org> | 2002-07-05 20:16:34 +0000 |
commit | 5bbed9e6b0ec2fe158136f658b45d0dbaa4fcfad (patch) | |
tree | 85bcd3d0bd356eb6756659cd6b173976fef5bfe0 /contrib/binutils/include | |
parent | 9568924023a1e322c446870c4a4dd514800517c3 (diff) | |
parent | f3c54bd2c1850601b80aa0558b8843517125f50f (diff) | |
download | FreeBSD-src-5bbed9e6b0ec2fe158136f658b45d0dbaa4fcfad.zip FreeBSD-src-5bbed9e6b0ec2fe158136f658b45d0dbaa4fcfad.tar.gz |
This commit was generated by cvs2svn to compensate for changes in r99461,
which included commits to RCS files with non-trunk default branches.
Diffstat (limited to 'contrib/binutils/include')
-rw-r--r-- | contrib/binutils/include/elf/ChangeLog | 6 | ||||
-rw-r--r-- | contrib/binutils/include/elf/dwarf2.h | 1 | ||||
-rw-r--r-- | contrib/binutils/include/opcode/ChangeLog | 7 | ||||
-rw-r--r-- | contrib/binutils/include/opcode/i386.h | 6 | ||||
-rw-r--r-- | contrib/binutils/include/opcode/s390.h | 130 |
5 files changed, 150 insertions, 0 deletions
diff --git a/contrib/binutils/include/elf/ChangeLog b/contrib/binutils/include/elf/ChangeLog index e70f7fd..20e8096 100644 --- a/contrib/binutils/include/elf/ChangeLog +++ b/contrib/binutils/include/elf/ChangeLog @@ -1,3 +1,9 @@ +2002-04-2 Alan Modra <amodra@bigpond.net.au> + + Merge from mainline. + 2002-04-24 Elena Zannoni <ezannoni@redhat.com> + * dwarf2.h: Add DW_AT_GNU_vector. + 2002-02-13 Matt Fredette <fredette@netbsd.org> * m68k.h (EF_M68000): Define. diff --git a/contrib/binutils/include/elf/dwarf2.h b/contrib/binutils/include/elf/dwarf2.h index 53eb655..750a720 100644 --- a/contrib/binutils/include/elf/dwarf2.h +++ b/contrib/binutils/include/elf/dwarf2.h @@ -328,6 +328,7 @@ enum dwarf_attribute DW_AT_src_coords = 0x2104, DW_AT_body_begin = 0x2105, DW_AT_body_end = 0x2106, + DW_AT_GNU_vector = 0x2107, /* VMS Extensions. */ DW_AT_VMS_rtnbeg_pd_address = 0x2201 }; diff --git a/contrib/binutils/include/opcode/ChangeLog b/contrib/binutils/include/opcode/ChangeLog index 9d143c7..d7b0582 100644 --- a/contrib/binutils/include/opcode/ChangeLog +++ b/contrib/binutils/include/opcode/ChangeLog @@ -1,3 +1,10 @@ +2002-04-27 Alan Modra <amodra@bigpond.net.au> + + Merge from mainline + 2002-04-11 Alan Modra <amodra@bigpond.net.au> + * i386.h: Add intel mode cmpsd and movsd. + Put them before SSE2 insns, so that rep prefix works. + 2002-02-25 Alan Modra <amodra@bigpond.net.au> * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define. diff --git a/contrib/binutils/include/opcode/i386.h b/contrib/binutils/include/opcode/i386.h index 43d7208..0171f62 100644 --- a/contrib/binutils/include/opcode/i386.h +++ b/contrib/binutils/include/opcode/i386.h @@ -1231,6 +1231,9 @@ static const template i386_optab[] = { {"cmpunordpd",2, 0x660fc2, 3, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LLongMem, RegXMM, 0 } }, {"cmpunordsd",2, 0xf20fc2, 3, CpuSSE2, FP|Modrm|ImmExt,{ RegXMM|LongMem, RegXMM, 0 } }, {"cmppd", 3, 0x660fc2, X, CpuSSE2, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } }, +/* Intel mode string compare. */ +{"cmpsd", 0, 0xa7, X, 0, NoSuf|Size32|IsString, { 0, 0, 0} }, +{"cmpsd", 2, 0xa7, X, 0, NoSuf|Size32|IsString, { AnyMem, AnyMem|EsSeg, 0} }, {"cmpsd", 3, 0xf20fc2, X, CpuSSE2, FP|Modrm, { Imm8, RegXMM|LongMem, RegXMM } }, {"comisd", 2, 0x660f2f, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } }, {"cvtpi2pd", 2, 0x660f2a, X, CpuSSE2, FP|Modrm, { RegMMX|LLongMem, RegXMM, 0 } }, @@ -1249,6 +1252,9 @@ static const template i386_optab[] = { {"movlpd", 2, 0x660f13, X, CpuSSE2, FP|Modrm, { RegXMM, LLongMem, 0 } }, {"movmskpd", 2, 0x660f50, X, CpuSSE2, lq_Suf|IgnoreSize|Modrm, { RegXMM|InvMem, Reg32|Reg64, 0 } }, {"movntpd", 2, 0x660f2b, X, CpuSSE2, FP|Modrm, { RegXMM, LLongMem, 0 } }, +/* Intel mode string move. */ +{"movsd", 0, 0xa5, X, 0, NoSuf|Size32|IsString, { 0, 0, 0} }, +{"movsd", 2, 0xa5, X, 0, NoSuf|Size32|IsString, { AnyMem, AnyMem|EsSeg, 0} }, {"movsd", 2, 0xf20f10, X, CpuSSE2, FP|Modrm, { RegXMM|LongMem, RegXMM, 0 } }, {"movsd", 2, 0xf20f11, X, CpuSSE2, FP|Modrm, { RegXMM, RegXMM|LongMem, 0 } }, {"movupd", 2, 0x660f10, X, CpuSSE2, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, diff --git a/contrib/binutils/include/opcode/s390.h b/contrib/binutils/include/opcode/s390.h new file mode 100644 index 0000000..1a42be6 --- /dev/null +++ b/contrib/binutils/include/opcode/s390.h @@ -0,0 +1,130 @@ +/* s390.h -- Header file for S390 opcode table + Copyright 2000, 2001 Free Software Foundation, Inc. + Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com). + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA + 02111-1307, USA. */ + +#ifndef S390_H +#define S390_H + +/* List of instruction sets variations. */ + +enum s390_opcode_arch_val + { + S390_OPCODE_ESA = 0, + S390_OPCODE_ESAME + }; + +/* The opcode table is an array of struct s390_opcode. */ + +struct s390_opcode + { + /* The opcode name. */ + const char * name; + + /* The opcode itself. Those bits which will be filled in with + operands are zeroes. */ + unsigned char opcode[6]; + + /* The opcode mask. This is used by the disassembler. This is a + mask containing ones indicating those bits which must match the + opcode field, and zeroes indicating those bits which need not + match (and are presumably filled in by operands). */ + unsigned char mask[6]; + + /* The opcode length in bytes. */ + int oplen; + + /* An array of operand codes. Each code is an index into the + operand table. They appear in the order which the operands must + appear in assembly code, and are terminated by a zero. */ + unsigned char operands[6]; + + /* Bitmask of architectures this opcode is available for. */ + unsigned int architecture; + }; + +/* The table itself is sorted by major opcode number, and is otherwise + in the order in which the disassembler should consider + instructions. */ +extern const struct s390_opcode s390_opcodes[]; +extern const int s390_num_opcodes; + +/* A opcode format table for the .insn pseudo mnemonic. */ +extern const struct s390_opcode s390_opformats[]; +extern const int s390_num_opformats; + +/* Values defined for the flags field of a struct powerpc_opcode. */ + +/* The operands table is an array of struct s390_operand. */ + +struct s390_operand + { + /* The number of bits in the operand. */ + int bits; + + /* How far the operand is left shifted in the instruction. */ + int shift; + + /* One bit syntax flags. */ + unsigned long flags; + }; + +/* Elements in the table are retrieved by indexing with values from + the operands field of the powerpc_opcodes table. */ + +extern const struct s390_operand s390_operands[]; + +/* Values defined for the flags field of a struct s390_operand. */ + +/* This operand names a register. The disassembler uses this to print + register names with a leading 'r'. */ +#define S390_OPERAND_GPR 0x1 + +/* This operand names a floating point register. The disassembler + prints these with a leading 'f'. */ +#define S390_OPERAND_FPR 0x2 + +/* This operand names an access register. The disassembler + prints these with a leading 'a'. */ +#define S390_OPERAND_AR 0x4 + +/* This operand names a control register. The disassembler + prints these with a leading 'c'. */ +#define S390_OPERAND_CR 0x8 + +/* This operand is a displacement. */ +#define S390_OPERAND_DISP 0x10 + +/* This operand names a base register. */ +#define S390_OPERAND_BASE 0x20 + +/* This operand names an index register, it can be skipped. */ +#define S390_OPERAND_INDEX 0x40 + +/* This operand is a relative branch displacement. The disassembler + prints these symbolically if possible. */ +#define S390_OPERAND_PCREL 0x80 + +/* This operand takes signed values. */ +#define S390_OPERAND_SIGNED 0x100 + +/* This operand is a length. */ +#define S390_OPERAND_LENGTH 0x200 + +#endif /* S390_H */ |