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author | gonzo <gonzo@FreeBSD.org> | 2015-01-29 01:59:42 +0000 |
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committer | gonzo <gonzo@FreeBSD.org> | 2015-01-29 01:59:42 +0000 |
commit | fdcbb5500ac5346de0a4a652f68b90c1d34b4a34 (patch) | |
tree | 19fb8abe265ec2518c76c935c149ef47653b6ffa | |
parent | 9608c0caa102cc9adf5fccb20be5c26a8911b654 (diff) | |
download | FreeBSD-src-fdcbb5500ac5346de0a4a652f68b90c1d34b4a34.zip FreeBSD-src-fdcbb5500ac5346de0a4a652f68b90c1d34b4a34.tar.gz |
Set LCDC clock frequency to 2*148500 KHz
Minimum LCDC is 2 so clock freq shouild be 2*max_pixel_clock. Maximum pixel
clock for HDMI is 148500 (1920x1080). But AM335x can not run in this mode
due to bandwidth and clock limitations
-rw-r--r-- | sys/arm/ti/am335x/am335x_prcm.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/sys/arm/ti/am335x/am335x_prcm.c b/sys/arm/ti/am335x/am335x_prcm.c index e42d71f..65b7ba2 100644 --- a/sys/arm/ti/am335x/am335x_prcm.c +++ b/sys/arm/ti/am335x/am335x_prcm.c @@ -729,10 +729,10 @@ am335x_clk_lcdc_activate(struct ti_clock_dev *clkdev) DELAY(10); /* - * For now set frequency to 5xSYSFREQ - * More flexible control might be required + * For now set frequency to 99*SYSFREQ/8 which is twice as + * HDMI 1080p pixel clock (minimum LCDC freq divisor is 2) */ - prcm_write_4(CM_WKUP_CM_CLKSEL_DPLL_DISP, (5 << 8) | 0); + prcm_write_4(CM_WKUP_CM_CLKSEL_DPLL_DISP, (99 << 8) | 8); /* Locked mode */ prcm_write_4(CM_WKUP_CM_CLKMODE_DPLL_DISP, 0x7); |