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| author | tychon <tychon@FreeBSD.org> | 2015-03-06 02:05:45 +0000 |
|---|---|---|
| committer | tychon <tychon@FreeBSD.org> | 2015-03-06 02:05:45 +0000 |
| commit | eedd9cfb168e66c70a752c1c3711f7a2e8d47e6c (patch) | |
| tree | bc897a7649522aaded67d9f58c32172c00970ef1 | |
| parent | 20f0285d8c6f5dd82394ce588da8f7e1fcd23265 (diff) | |
| download | FreeBSD-src-eedd9cfb168e66c70a752c1c3711f7a2e8d47e6c.zip FreeBSD-src-eedd9cfb168e66c70a752c1c3711f7a2e8d47e6c.tar.gz | |
When ICW1 is issued the edge sense circuit is reset which means that
following an initialization a low-to-high transistion is necesary to
generate an interrupt.
Reviewed by: neel
| -rw-r--r-- | sys/amd64/vmm/io/vatpic.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/amd64/vmm/io/vatpic.c b/sys/amd64/vmm/io/vatpic.c index 328c35f..0df6e7c 100644 --- a/sys/amd64/vmm/io/vatpic.c +++ b/sys/amd64/vmm/io/vatpic.c @@ -275,6 +275,7 @@ vatpic_icw1(struct vatpic *vatpic, struct atpic *atpic, uint8_t val) atpic->ready = false; atpic->icw_num = 1; + atpic->request = 0; atpic->mask = 0; atpic->lowprio = 7; atpic->rd_cmd_reg = 0; |
