Be slightly more paranoid with the TX DMA buffer maximum threshold.

Specifically - never jack the TX FIFO threshold up to the absolute
maximum; always leave enough space for two DMA transactions to
appear.

This is a paranoia from the Linux ath9k driver.  It can't hurt.

Obtained from:	Linux ath9k

2 files changed, 23 insertions, 2 deletions

diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c b/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
index 6dc5a61..c26ca4b 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
@@ -244,9 +244,23 @@ ar5416InitState(struct ath_hal_5416 *ahp5416, uint16_t devid, HAL_SOFTC sc,
 	/* Set overridable ANI methods */
 	AH5212(ah)->ah_aniControl = ar5416AniControl;
 
-	/* Default FIFO Trigger levels */
+	/*
+	 * Default FIFO Trigger levels
+	 *
+	 * These define how filled the TX FIFO needs to be before
+	 * the baseband begins to be given some data.
+	 *
+	 * To be paranoid, we ensure that the TX trigger level always
+	 * has at least enough space for two TX DMA to occur.
+	 * The TX DMA size is currently hard-coded to AR_TXCFG_DMASZ_128B.
+	 * That means we need to leave at least 256 bytes available in
+	 * the TX DMA FIFO.
+	 */
 #define	AR_FTRIG_512B	0x00000080 // 5 bits total
-	/* AR9285/AR9271 need to use half the TX FIFOs */
+	/*
+	 * AR9285/AR9271 have half the size TX FIFO compared to
+	 * other devices
+	 */
 	if (AR_SREV_KITE(ah) || AR_SREV_9271(ah)) {
 		AH5212(ah)->ah_txTrigLev = (AR_FTRIG_256B >> AR_FTRIG_S);
 		AH5212(ah)->ah_maxTxTrigLev = ((2048 / 64) - 1);
@@ -255,6 +269,9 @@ ar5416InitState(struct ath_hal_5416 *ahp5416, uint16_t devid, HAL_SOFTC sc,
 		AH5212(ah)->ah_maxTxTrigLev = ((4096 / 64) - 1);
 	}
 #undef	AR_FTRIG_512B
+
+	/* And now leave some headspace - 256 bytes */
+	AH5212(ah)->ah_maxTxTrigLev -= 4;
 }
 
 uint32_t
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c b/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
index 51ac0a1..75df5e9 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
@@ -570,6 +570,10 @@ ar5416InitDMA(struct ath_hal *ah)
 	/*
 	 * let mac dma writes be in 128 byte chunks
 	 */
+	/*
+	 * XXX If you change this, you must change the headroom
+	 * assigned in ah_maxTxTrigLev - see ar5416InitState().
+	 */
 	OS_REG_WRITE(ah, AR_RXCFG, 
 		(OS_REG_READ(ah, AR_RXCFG) & ~AR_RXCFG_DMASZ_MASK) | AR_RXCFG_DMASZ_128B);