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authormjacob <mjacob@FreeBSD.org>2006-01-21 00:29:52 +0000
committermjacob <mjacob@FreeBSD.org>2006-01-21 00:29:52 +0000
commitdc2480a66b5624b9a4debf76a49c40bde5ebf763 (patch)
tree74d6d47f42f432e006f77e625247309b073c4aa1
parentc89e14c0d60b05df8ae6983c34dbc9973e0d5ec9 (diff)
downloadFreeBSD-src-dc2480a66b5624b9a4debf76a49c40bde5ebf763.zip
FreeBSD-src-dc2480a66b5624b9a4debf76a49c40bde5ebf763.tar.gz
Rev MPI spec to 1.05.09 level in preparation for SAS support.
MFC after: 1 month
Diffstat
-rw-r--r--sys/dev/mpt/mpilib/mpi.h133
-rw-r--r--sys/dev/mpt/mpilib/mpi_cnfg.h1235
-rw-r--r--sys/dev/mpt/mpilib/mpi_fc.h12
-rw-r--r--sys/dev/mpt/mpilib/mpi_inb.h250
-rw-r--r--sys/dev/mpt/mpilib/mpi_init.h262
-rw-r--r--sys/dev/mpt/mpilib/mpi_ioc.h261
-rw-r--r--sys/dev/mpt/mpilib/mpi_lan.h10
-rw-r--r--sys/dev/mpt/mpilib/mpi_log_fc.h117
-rw-r--r--sys/dev/mpt/mpilib/mpi_log_sas.h181
-rw-r--r--sys/dev/mpt/mpilib/mpi_raid.h21
-rw-r--r--sys/dev/mpt/mpilib/mpi_sas.h276
-rw-r--r--sys/dev/mpt/mpilib/mpi_targ.h232
-rw-r--r--sys/dev/mpt/mpilib/mpi_tool.h380
-rw-r--r--sys/dev/mpt/mpilib/mpi_type.h10
-rw-r--r--sys/dev/mpt/mpt_debug.c23
15 files changed, 3260 insertions, 143 deletions
diff --git a/sys/dev/mpt/mpilib/mpi.h b/sys/dev/mpt/mpilib/mpi.h
index 3b3f6e9..8e8b9ae 100644
--- a/sys/dev/mpt/mpilib/mpi.h
+++ b/sys/dev/mpt/mpilib/mpi.h
@@ -29,12 +29,11 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
* OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- *
- * Name: MPI.H
+ * Name: mpi.h
* Title: MPI Message independent structures and definitions
* Creation Date: July 27, 2000
*
- * MPI.H Version: 01.02.11
+ * mpi.h Version: 01.05.09
*
* Version History
* ---------------
@@ -81,6 +80,28 @@
* 04-01-03 01.02.09 New IOCStatus code: MPI_IOCSTATUS_FC_EXCHANGE_CANCELED
* 06-26-03 01.02.10 Bumped MPI_HEADER_VERSION_UNIT value.
* 01-16-04 01.02.11 Added define for MPI_IOCLOGINFO_TYPE_SHIFT.
+ * 04-29-04 01.02.12 Added function codes for MPI_FUNCTION_DIAG_BUFFER_POST
+ * and MPI_FUNCTION_DIAG_RELEASE.
+ * Added MPI_IOCSTATUS_DIAGNOSTIC_RELEASED define.
+ * Bumped MPI_HEADER_VERSION_UNIT value.
+ * 05-11-04 01.03.01 Bumped MPI_VERSION_MINOR for MPI v1.3.
+ * Added codes for Inband.
+ * 08-19-04 01.05.01 Added defines for Host Buffer Access Control doorbell.
+ * Added define for offset of High Priority Request Queue.
+ * Added new function codes and new IOCStatus codes.
+ * Added a IOCLogInfo type of SAS.
+ * 12-07-04 01.05.02 Bumped MPI_HEADER_VERSION_UNIT.
+ * 12-09-04 01.05.03 Bumped MPI_HEADER_VERSION_UNIT.
+ * 01-15-05 01.05.04 Bumped MPI_HEADER_VERSION_UNIT.
+ * 02-09-05 01.05.05 Bumped MPI_HEADER_VERSION_UNIT.
+ * 02-22-05 01.05.06 Bumped MPI_HEADER_VERSION_UNIT.
+ * 03-11-05 01.05.07 Removed function codes for SCSI IO 32 and
+ * TargetAssistExtended requests.
+ * Removed EEDP IOCStatus codes.
+ * 06-24-05 01.05.08 Added function codes for SCSI IO 32 and
+ * TargetAssistExtended requests.
+ * Added EEDP IOCStatus codes.
+ * 08-03-05 01.05.09 Bumped MPI_HEADER_VERSION_UNIT.
* --------------------------------------------------------------------------
*/
@@ -95,7 +116,7 @@
*****************************************************************************/
#define MPI_VERSION_MAJOR (0x01)
-#define MPI_VERSION_MINOR (0x02)
+#define MPI_VERSION_MINOR (0x05)
#define MPI_VERSION_MAJOR_MASK (0xFF00)
#define MPI_VERSION_MAJOR_SHIFT (8)
#define MPI_VERSION_MINOR_MASK (0x00FF)
@@ -106,10 +127,12 @@
#define MPI_VERSION_01_00 (0x0100)
#define MPI_VERSION_01_01 (0x0101)
#define MPI_VERSION_01_02 (0x0102)
+#define MPI_VERSION_01_03 (0x0103)
+#define MPI_VERSION_01_05 (0x0105)
/* Note: The major versions of 0xe0 through 0xff are reserved */
/* versioning for this MPI header set */
-#define MPI_HEADER_VERSION_UNIT (0x0D)
+#define MPI_HEADER_VERSION_UNIT (0x0B)
#define MPI_HEADER_VERSION_DEV (0x00)
#define MPI_HEADER_VERSION_UNIT_MASK (0xFF00)
#define MPI_HEADER_VERSION_UNIT_SHIFT (8)
@@ -149,7 +172,11 @@
*
*****************************************************************************/
-/* S y s t e m D o o r b e l l */
+/*
+ * Defines for working with the System Doorbell register.
+ * Values for doorbell function codes are included in the section that defines
+ * all the function codes (further on in this file).
+ */
#define MPI_DOORBELL_OFFSET (0x00000000)
#define MPI_DOORBELL_ACTIVE (0x08000000) /* DoorbellUsed */
#define MPI_DOORBELL_USED (MPI_DOORBELL_ACTIVE)
@@ -161,6 +188,13 @@
#define MPI_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
#define MPI_DOORBELL_ADD_DWORDS_SHIFT (16)
#define MPI_DOORBELL_DATA_MASK (0x0000FFFF)
+#define MPI_DOORBELL_FUNCTION_SPECIFIC_MASK (0x0000FFFF)
+
+/* values for Host Buffer Access Control doorbell function */
+#define MPI_DB_HPBAC_VALUE_MASK (0x0000F000)
+#define MPI_DB_HPBAC_ENABLE_ACCESS (0x01)
+#define MPI_DB_HPBAC_DISABLE_ACCESS (0x02)
+#define MPI_DB_HPBAC_FREE_BUFFER (0x03)
#define MPI_WRITE_SEQUENCE_OFFSET (0x00000004)
@@ -204,6 +238,8 @@
#define MPI_REPLY_POST_FIFO_OFFSET (0x00000044)
#define MPI_REPLY_FREE_FIFO_OFFSET (0x00000044)
+#define MPI_HI_PRI_REQUEST_QUEUE_OFFSET (0x00000048)
+
/*****************************************************************************
@@ -263,10 +299,6 @@
#define MPI_FUNCTION_TARGET_ASSIST (0x0B)
#define MPI_FUNCTION_TARGET_STATUS_SEND (0x0C)
#define MPI_FUNCTION_TARGET_MODE_ABORT (0x0D)
-#define MPI_FUNCTION_TARGET_FC_BUF_POST_LINK_SRVC (0x0E) /* obsolete name */
-#define MPI_FUNCTION_TARGET_FC_RSP_LINK_SRVC (0x0F) /* obsolete name */
-#define MPI_FUNCTION_TARGET_FC_EX_SEND_LINK_SRVC (0x10) /* obsolete name */
-#define MPI_FUNCTION_TARGET_FC_ABORT (0x11) /* obsolete name */
#define MPI_FUNCTION_FC_LINK_SRVC_BUF_POST (0x0E)
#define MPI_FUNCTION_FC_LINK_SRVC_RSP (0x0F)
#define MPI_FUNCTION_FC_EX_LINK_SRVC_SEND (0x10)
@@ -284,15 +316,51 @@
#define MPI_FUNCTION_MAILBOX (0x19)
+#define MPI_FUNCTION_SMP_PASSTHROUGH (0x1A)
+#define MPI_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B)
+#define MPI_FUNCTION_SATA_PASSTHROUGH (0x1C)
+
+#define MPI_FUNCTION_DIAG_BUFFER_POST (0x1D)
+#define MPI_FUNCTION_DIAG_RELEASE (0x1E)
+
+#define MPI_FUNCTION_SCSI_IO_32 (0x1F)
+
#define MPI_FUNCTION_LAN_SEND (0x20)
#define MPI_FUNCTION_LAN_RECEIVE (0x21)
#define MPI_FUNCTION_LAN_RESET (0x22)
+#define MPI_FUNCTION_TARGET_ASSIST_EXTENDED (0x23)
+#define MPI_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24)
+#define MPI_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25)
+
+#define MPI_FUNCTION_INBAND_BUFFER_POST (0x28)
+#define MPI_FUNCTION_INBAND_SEND (0x29)
+#define MPI_FUNCTION_INBAND_RSP (0x2A)
+#define MPI_FUNCTION_INBAND_ABORT (0x2B)
+
#define MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
#define MPI_FUNCTION_IO_UNIT_RESET (0x41)
#define MPI_FUNCTION_HANDSHAKE (0x42)
#define MPI_FUNCTION_REPLY_FRAME_REMOVAL (0x43)
+#define MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL (0x44)
+
+/* standard version format */
+typedef struct _MPI_VERSION_STRUCT
+{
+ U8 Dev; /* 00h */
+ U8 Unit; /* 01h */
+ U8 Minor; /* 02h */
+ U8 Major; /* 03h */
+} MPI_VERSION_STRUCT, MPI_POINTER PTR_MPI_VERSION_STRUCT,
+ MpiVersionStruct_t, MPI_POINTER pMpiVersionStruct;
+
+typedef union _MPI_VERSION_FORMAT
+{
+ MPI_VERSION_STRUCT Struct;
+ U32 Word;
+} MPI_VERSION_FORMAT, MPI_POINTER PTR_MPI_VERSION_FORMAT,
+ MpiVersionFormat_t, MPI_POINTER pMpiVersionFormat_t;
/*****************************************************************************
@@ -327,8 +395,8 @@ typedef struct _SGE_SIMPLE_UNION
U32 Address32;
U64 Address64;
}u;
-} SGESimpleUnion_t, MPI_POINTER pSGESimpleUnion_t,
- SGE_SIMPLE_UNION, MPI_POINTER PTR_SGE_SIMPLE_UNION;
+} SGE_SIMPLE_UNION, MPI_POINTER PTR_SGE_SIMPLE_UNION,
+ SGESimpleUnion_t, MPI_POINTER pSGESimpleUnion_t;
/****************************************************************************/
/* Chain element structures */
@@ -615,6 +683,7 @@ typedef struct _MSG_DEFAULT_REPLY
#define MPI_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006)
#define MPI_IOCSTATUS_INVALID_FIELD (0x0007)
#define MPI_IOCSTATUS_INVALID_STATE (0x0008)
+#define MPI_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009)
/****************************************************************************/
/* Config IOCStatus values */
@@ -646,21 +715,33 @@ typedef struct _MSG_DEFAULT_REPLY
#define MPI_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
/****************************************************************************/
-/* SCSI (SPI & FCP) target values */
+/* For use by SCSI Initiator and SCSI Target end-to-end data protection */
+/****************************************************************************/
+
+#define MPI_IOCSTATUS_EEDP_GUARD_ERROR (0x004D)
+#define MPI_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E)
+#define MPI_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F)
+
+
+/****************************************************************************/
+/* SCSI Target values */
/****************************************************************************/
#define MPI_IOCSTATUS_TARGET_PRIORITY_IO (0x0060)
#define MPI_IOCSTATUS_TARGET_INVALID_PORT (0x0061)
-#define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX (0x0062) /* obsolete */
+#define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX (0x0062) /* obsolete name */
#define MPI_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062)
#define MPI_IOCSTATUS_TARGET_ABORTED (0x0063)
#define MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
#define MPI_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
#define MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
#define MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT (0x006B)
+#define MPI_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D)
+#define MPI_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E)
+#define MPI_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F)
/****************************************************************************/
-/* Additional FCP target values */
+/* Additional FCP target values (obsolete) */
/****************************************************************************/
#define MPI_IOCSTATUS_TARGET_FC_ABORTED (0x0066) /* obsolete */
@@ -691,6 +772,26 @@ typedef struct _MSG_DEFAULT_REPLY
#define MPI_IOCSTATUS_LAN_PARTIAL_PACKET (0x0086)
#define MPI_IOCSTATUS_LAN_CANCELED (0x0087)
+/****************************************************************************/
+/* Serial Attached SCSI values */
+/****************************************************************************/
+
+#define MPI_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090)
+#define MPI_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091)
+
+/****************************************************************************/
+/* Inband values */
+/****************************************************************************/
+
+#define MPI_IOCSTATUS_INBAND_ABORTED (0x0098)
+#define MPI_IOCSTATUS_INBAND_NO_CONNECTION (0x0099)
+
+/****************************************************************************/
+/* Diagnostic Tools values */
+/****************************************************************************/
+
+#define MPI_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0)
+
/****************************************************************************/
/* IOCStatus flag to indicate that log info is available */
@@ -708,6 +809,8 @@ typedef struct _MSG_DEFAULT_REPLY
#define MPI_IOCLOGINFO_TYPE_NONE (0x0)
#define MPI_IOCLOGINFO_TYPE_SCSI (0x1)
#define MPI_IOCLOGINFO_TYPE_FC (0x2)
+#define MPI_IOCLOGINFO_TYPE_SAS (0x3)
+#define MPI_IOCLOGINFO_TYPE_ISCSI (0x4)
#define MPI_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF)
diff --git a/sys/dev/mpt/mpilib/mpi_cnfg.h b/sys/dev/mpt/mpilib/mpi_cnfg.h
index 7ab0a9f..f1b3b9a 100644
--- a/sys/dev/mpt/mpilib/mpi_cnfg.h
+++ b/sys/dev/mpt/mpilib/mpi_cnfg.h
@@ -29,12 +29,11 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
* OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- *
- * Name: MPI_CNFG.H
+ * Name: mpi_cnfg.h
* Title: MPI Config message, structures, and Pages
* Creation Date: July 27, 2000
*
- * MPI_CNFG.H Version: 01.02.13
+ * mpi_cnfg.h Version: 01.05.10
*
* Version History
* ---------------
@@ -179,6 +178,113 @@
* MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK.
* Added new fields to the substructures of
* CONFIG_PAGE_FC_PORT_10.
+ * 04-29-04 01.02.14 Added define for IDP bit for CONFIG_PAGE_SCSI_PORT_0,
+ * CONFIG_PAGE_SCSI_DEVICE_0, and
+ * CONFIG_PAGE_SCSI_DEVICE_1. Also bumped Page Version for
+ * these pages.
+ * 05-11-04 01.03.01 Added structure for CONFIG_PAGE_INBAND_0.
+ * 08-19-04 01.05.01 Modified MSG_CONFIG request to support extended config
+ * pages.
+ * Added a new structure for extended config page header.
+ * Added new extended config pages types and structures for
+ * SAS IO Unit, SAS Expander, SAS Device, and SAS PHY.
+ * Replaced a reserved byte in CONFIG_PAGE_MANUFACTURING_4
+ * to add a Flags field.
+ * Two new Manufacturing config pages (5 and 6).
+ * Two new bits defined for IO Unit Page 1 Flags field.
+ * Modified CONFIG_PAGE_IO_UNIT_2 to add three new fields
+ * to specify the BIOS boot device.
+ * Four new Flags bits defined for IO Unit Page 2.
+ * Added IO Unit Page 4.
+ * Added EEDP Flags settings to IOC Page 1.
+ * Added new BIOS Page 1 config page.
+ * 10-05-04 01.05.02 Added define for
+ * MPI_IOCPAGE1_INITIATOR_CONTEXT_REPLY_DISABLE.
+ * Added new Flags field to CONFIG_PAGE_MANUFACTURING_5 and
+ * associated defines.
+ * Added more defines for SAS IO Unit Page 0
+ * DiscoveryStatus field.
+ * Added define for MPI_SAS_IOUNIT0_DS_SUBTRACTIVE_LINK
+ * and MPI_SAS_IOUNIT0_DS_TABLE_LINK.
+ * Added defines for Physical Mapping Modes to SAS IO Unit
+ * Page 2.
+ * Added define for
+ * MPI_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH.
+ * 10-27-04 01.05.03 Added defines for new SAS PHY page addressing mode.
+ * Added defines for MaxTargetSpinUp to BIOS Page 1.
+ * Added 5 new ControlFlags defines for SAS IO Unit
+ * Page 1.
+ * Added MaxNumPhysicalMappedIDs field to SAS IO Unit
+ * Page 2.
+ * Added AccessStatus field to SAS Device Page 0 and added
+ * new Flags bits for supported SATA features.
+ * 12-07-04 01.05.04 Added config page structures for BIOS Page 2, RAID
+ * Volume Page 1, and RAID Physical Disk Page 1.
+ * Replaced IO Unit Page 1 BootTargetID,BootBus, and
+ * BootAdapterNum with reserved field.
+ * Added DataScrubRate and ResyncRate to RAID Volume
+ * Page 0.
+ * Added MPI_SAS_IOUNIT2_FLAGS_RESERVE_ID_0_FOR_BOOT
+ * define.
+ * 12-09-04 01.05.05 Added Target Mode Large CDB Enable to FC Port Page 1
+ * Flags field.
+ * Added Auto Port Config flag define for SAS IOUNIT
+ * Page 1 ControlFlags.
+ * Added Disabled bad Phy define to Expander Page 1
+ * Discovery Info field.
+ * Added SAS/SATA device support to SAS IOUnit Page 1
+ * ControlFlags.
+ * Added Unsupported device to SAS Dev Page 0 Flags field
+ * Added disable use SATA Hash Address for SAS IOUNIT
+ * page 1 in ControlFields.
+ * 01-15-05 01.05.06 Added defaults for data scrub rate and resync rate to
+ * Manufacturing Page 4.
+ * Added new defines for BIOS Page 1 IOCSettings field.
+ * Added ExtDiskIdentifier field to RAID Physical Disk
+ * Page 0.
+ * Added new defines for SAS IO Unit Page 1 ControlFlags
+ * and to SAS Device Page 0 Flags to control SATA devices.
+ * Added defines and structures for the new Log Page 0, a
+ * new type of configuration page.
+ * 02-09-05 01.05.07 Added InactiveStatus field to RAID Volume Page 0.
+ * Added WWID field to RAID Volume Page 1.
+ * Added PhysicalPort field to SAS Expander pages 0 and 1.
+ * 03-11-05 01.05.08 Removed the EEDP flags from IOC Page 1.
+ * Added Enclosure/Slot boot device format to BIOS Page 2.
+ * New status value for RAID Volume Page 0 VolumeStatus
+ * (VolumeState subfield).
+ * New value for RAID Physical Page 0 InactiveStatus.
+ * Added Inactive Volume Member flag RAID Physical Disk
+ * Page 0 PhysDiskStatus field.
+ * New physical mapping mode in SAS IO Unit Page 2.
+ * Added CONFIG_PAGE_SAS_ENCLOSURE_0.
+ * Added Slot and Enclosure fields to SAS Device Page 0.
+ * 06-24-05 01.05.09 Added EEDP defines to IOC Page 1.
+ * Added more RAID type defines to IOC Page 2.
+ * Added Port Enable Delay settings to BIOS Page 1.
+ * Added Bad Block Table Full define to RAID Volume Page 0.
+ * Added Previous State defines to RAID Physical Disk
+ * Page 0.
+ * Added Max Sata Targets define for DiscoveryStatus field
+ * of SAS IO Unit Page 0.
+ * Added Device Self Test to Control Flags of SAS IO Unit
+ * Page 1.
+ * Added Direct Attach Starting Slot Number define for SAS
+ * IO Unit Page 2.
+ * Added new fields in SAS Device Page 2 for enclosure
+ * mapping.
+ * Added OwnerDevHandle and Flags field to SAS PHY Page 0.
+ * Added IOC GPIO Flags define to SAS Enclosure Page 0.
+ * Fixed the value for MPI_SAS_IOUNIT1_CONTROL_DEV_SATA_SUPPORT.
+ * 08-03-05 01.05.10 Removed ISDataScrubRate and ISResyncRate from
+ * Manufacturing Page 4.
+ * Added MPI_IOUNITPAGE1_SATA_WRITE_CACHE_DISABLE bit.
+ * Added NumDevsPerEnclosure field to SAS IO Unit page 2.
+ * Added MPI_SAS_IOUNIT2_FLAGS_HOST_ASSIGNED_PHYS_MAP
+ * define.
+ * Added EnclosureHandle field to SAS Expander page 0.
+ * Removed redundant NumTableEntriesProg field from SAS
+ * Expander Page 1.
* --------------------------------------------------------------------------
*/
@@ -210,6 +316,19 @@ typedef union _CONFIG_PAGE_HEADER_UNION
} ConfigPageHeaderUnion, MPI_POINTER pConfigPageHeaderUnion,
CONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION;
+typedef struct _CONFIG_EXTENDED_PAGE_HEADER
+{
+ U8 PageVersion; /* 00h */
+ U8 Reserved1; /* 01h */
+ U8 PageNumber; /* 02h */
+ U8 PageType; /* 03h */
+ U16 ExtPageLength; /* 04h */
+ U8 ExtPageType; /* 06h */
+ U8 Reserved2; /* 07h */
+} CONFIG_EXTENDED_PAGE_HEADER, MPI_POINTER PTR_CONFIG_EXTENDED_PAGE_HEADER,
+ ConfigExtendedPageHeader_t, MPI_POINTER pConfigExtendedPageHeader_t;
+
+
/****************************************************************************
* PageType field values
@@ -231,20 +350,42 @@ typedef union _CONFIG_PAGE_HEADER_UNION
#define MPI_CONFIG_PAGETYPE_RAID_VOLUME (0x08)
#define MPI_CONFIG_PAGETYPE_MANUFACTURING (0x09)
#define MPI_CONFIG_PAGETYPE_RAID_PHYSDISK (0x0A)
+#define MPI_CONFIG_PAGETYPE_INBAND (0x0B)
+#define MPI_CONFIG_PAGETYPE_EXTENDED (0x0F)
#define MPI_CONFIG_PAGETYPE_MASK (0x0F)
#define MPI_CONFIG_TYPENUM_MASK (0x0FFF)
/****************************************************************************
+* ExtPageType field values
+****************************************************************************/
+#define MPI_CONFIG_EXTPAGETYPE_SAS_IO_UNIT (0x10)
+#define MPI_CONFIG_EXTPAGETYPE_SAS_EXPANDER (0x11)
+#define MPI_CONFIG_EXTPAGETYPE_SAS_DEVICE (0x12)
+#define MPI_CONFIG_EXTPAGETYPE_SAS_PHY (0x13)
+#define MPI_CONFIG_EXTPAGETYPE_LOG (0x14)
+#define MPI_CONFIG_EXTPAGETYPE_ENCLOSURE (0x15)
+
+
+/****************************************************************************
* PageAddress field values
****************************************************************************/
#define MPI_SCSI_PORT_PGAD_PORT_MASK (0x000000FF)
+#define MPI_SCSI_DEVICE_FORM_MASK (0xF0000000)
+#define MPI_SCSI_DEVICE_FORM_BUS_TID (0x00000000)
#define MPI_SCSI_DEVICE_TARGET_ID_MASK (0x000000FF)
#define MPI_SCSI_DEVICE_TARGET_ID_SHIFT (0)
#define MPI_SCSI_DEVICE_BUS_MASK (0x0000FF00)
#define MPI_SCSI_DEVICE_BUS_SHIFT (8)
+#define MPI_SCSI_DEVICE_FORM_TARGET_MODE (0x10000000)
+#define MPI_SCSI_DEVICE_TM_RESPOND_ID_MASK (0x000000FF)
+#define MPI_SCSI_DEVICE_TM_RESPOND_ID_SHIFT (0)
+#define MPI_SCSI_DEVICE_TM_BUS_MASK (0x0000FF00)
+#define MPI_SCSI_DEVICE_TM_BUS_SHIFT (8)
+#define MPI_SCSI_DEVICE_TM_INIT_ID_MASK (0x00FF0000)
+#define MPI_SCSI_DEVICE_TM_INIT_ID_SHIFT (16)
#define MPI_FC_PORT_PGAD_PORT_MASK (0xF0000000)
#define MPI_FC_PORT_PGAD_PORT_SHIFT (28)
@@ -270,6 +411,52 @@ typedef union _CONFIG_PAGE_HEADER_UNION
#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF)
#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_SHIFT (0)
+#define MPI_SAS_EXPAND_PGAD_FORM_MASK (0xF0000000)
+#define MPI_SAS_EXPAND_PGAD_FORM_SHIFT (28)
+#define MPI_SAS_EXPAND_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
+#define MPI_SAS_EXPAND_PGAD_FORM_HANDLE_PHY_NUM (0x00000001)
+#define MPI_SAS_EXPAND_PGAD_FORM_HANDLE (0x00000002)
+#define MPI_SAS_EXPAND_PGAD_GNH_MASK_HANDLE (0x0000FFFF)
+#define MPI_SAS_EXPAND_PGAD_GNH_SHIFT_HANDLE (0)
+#define MPI_SAS_EXPAND_PGAD_HPN_MASK_PHY (0x00FF0000)
+#define MPI_SAS_EXPAND_PGAD_HPN_SHIFT_PHY (16)
+#define MPI_SAS_EXPAND_PGAD_HPN_MASK_HANDLE (0x0000FFFF)
+#define MPI_SAS_EXPAND_PGAD_HPN_SHIFT_HANDLE (0)
+#define MPI_SAS_EXPAND_PGAD_H_MASK_HANDLE (0x0000FFFF)
+#define MPI_SAS_EXPAND_PGAD_H_SHIFT_HANDLE (0)
+
+#define MPI_SAS_DEVICE_PGAD_FORM_MASK (0xF0000000)
+#define MPI_SAS_DEVICE_PGAD_FORM_SHIFT (28)
+#define MPI_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
+#define MPI_SAS_DEVICE_PGAD_FORM_BUS_TARGET_ID (0x00000001)
+#define MPI_SAS_DEVICE_PGAD_FORM_HANDLE (0x00000002)
+#define MPI_SAS_DEVICE_PGAD_GNH_HANDLE_MASK (0x0000FFFF)
+#define MPI_SAS_DEVICE_PGAD_GNH_HANDLE_SHIFT (0)
+#define MPI_SAS_DEVICE_PGAD_BT_BUS_MASK (0x0000FF00)
+#define MPI_SAS_DEVICE_PGAD_BT_BUS_SHIFT (8)
+#define MPI_SAS_DEVICE_PGAD_BT_TID_MASK (0x000000FF)
+#define MPI_SAS_DEVICE_PGAD_BT_TID_SHIFT (0)
+#define MPI_SAS_DEVICE_PGAD_H_HANDLE_MASK (0x0000FFFF)
+#define MPI_SAS_DEVICE_PGAD_H_HANDLE_SHIFT (0)
+
+#define MPI_SAS_PHY_PGAD_FORM_MASK (0xF0000000)
+#define MPI_SAS_PHY_PGAD_FORM_SHIFT (28)
+#define MPI_SAS_PHY_PGAD_FORM_PHY_NUMBER (0x0)
+#define MPI_SAS_PHY_PGAD_FORM_PHY_TBL_INDEX (0x1)
+#define MPI_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x000000FF)
+#define MPI_SAS_PHY_PGAD_PHY_NUMBER_SHIFT (0)
+#define MPI_SAS_PHY_PGAD_PHY_TBL_INDEX_MASK (0x0000FFFF)
+#define MPI_SAS_PHY_PGAD_PHY_TBL_INDEX_SHIFT (0)
+
+#define MPI_SAS_ENCLOS_PGAD_FORM_MASK (0xF0000000)
+#define MPI_SAS_ENCLOS_PGAD_FORM_SHIFT (28)
+#define MPI_SAS_ENCLOS_PGAD_FORM_GET_NEXT_HANDLE (0x00000000)
+#define MPI_SAS_ENCLOS_PGAD_FORM_HANDLE (0x00000001)
+#define MPI_SAS_ENCLOS_PGAD_GNH_HANDLE_MASK (0x0000FFFF)
+#define MPI_SAS_ENCLOS_PGAD_GNH_HANDLE_SHIFT (0)
+#define MPI_SAS_ENCLOS_PGAD_H_HANDLE_MASK (0x0000FFFF)
+#define MPI_SAS_ENCLOS_PGAD_H_HANDLE_SHIFT (0)
+
/****************************************************************************
@@ -281,7 +468,8 @@ typedef struct _MSG_CONFIG
U8 Reserved; /* 01h */
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
- U8 Reserved1[3]; /* 04h */
+ U16 ExtPageLength; /* 04h */
+ U8 ExtPageType; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 Reserved2[8]; /* 0Ch */
@@ -311,7 +499,8 @@ typedef struct _MSG_CONFIG_REPLY
U8 Reserved; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
- U8 Reserved1[3]; /* 04h */
+ U16 ExtPageLength; /* 04h */
+ U8 ExtPageType; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U8 Reserved2[2]; /* 0Ch */
@@ -333,29 +522,31 @@ typedef struct _MSG_CONFIG_REPLY
* Manufacturing Config pages
****************************************************************************/
#define MPI_MANUFACTPAGE_VENDORID_LSILOGIC (0x1000)
-#define MPI_MANUFACTPAGE_VENDORID_TREBIA (0x1783)
-
+/* Fibre Channel */
#define MPI_MANUFACTPAGE_DEVICEID_FC909 (0x0621)
#define MPI_MANUFACTPAGE_DEVICEID_FC919 (0x0624)
#define MPI_MANUFACTPAGE_DEVICEID_FC929 (0x0622)
#define MPI_MANUFACTPAGE_DEVICEID_FC919X (0x0628)
#define MPI_MANUFACTPAGE_DEVICEID_FC929X (0x0626)
-
+#define MPI_MANUFACTPAGE_DEVICEID_FC939X (0x0642)
+#define MPI_MANUFACTPAGE_DEVICEID_FC949X (0x0640)
+#define MPI_MANUFACTPAGE_DEVICEID_FC949ES (0x0646)
+/* SCSI */
#define MPI_MANUFACTPAGE_DEVID_53C1030 (0x0030)
#define MPI_MANUFACTPAGE_DEVID_53C1030ZC (0x0031)
#define MPI_MANUFACTPAGE_DEVID_1030_53C1035 (0x0032)
#define MPI_MANUFACTPAGE_DEVID_1030ZC_53C1035 (0x0033)
#define MPI_MANUFACTPAGE_DEVID_53C1035 (0x0040)
#define MPI_MANUFACTPAGE_DEVID_53C1035ZC (0x0041)
-
-#define MPI_MANUFACTPAGE_DEVID_SA2010 (0x0804)
-#define MPI_MANUFACTPAGE_DEVID_SA2010ZC (0x0805)
-#define MPI_MANUFACTPAGE_DEVID_SA2020 (0x0806)
-#define MPI_MANUFACTPAGE_DEVID_SA2020ZC (0x0807)
-
-#define MPI_MANUFACTPAGE_DEVID_SNP1000 (0x0010)
-#define MPI_MANUFACTPAGE_DEVID_SNP500 (0x0020)
-
+/* SAS */
+#define MPI_MANUFACTPAGE_DEVID_SAS1064 (0x0050)
+#define MPI_MANUFACTPAGE_DEVID_SAS1064A (0x005C)
+#define MPI_MANUFACTPAGE_DEVID_SAS1064E (0x0056)
+#define MPI_MANUFACTPAGE_DEVID_SAS1066 (0x005E)
+#define MPI_MANUFACTPAGE_DEVID_SAS1066E (0x005A)
+#define MPI_MANUFACTPAGE_DEVID_SAS1068 (0x0054)
+#define MPI_MANUFACTPAGE_DEVID_SAS1068E (0x0058)
+#define MPI_MANUFACTPAGE_DEVID_SAS1078 (0x0060)
typedef struct _CONFIG_PAGE_MANUFACTURING_0
@@ -439,16 +630,56 @@ typedef struct _CONFIG_PAGE_MANUFACTURING_4
U8 InfoOffset1; /* 0Ah */
U8 InfoSize1; /* 0Bh */
U8 InquirySize; /* 0Ch */
- U8 Reserved2; /* 0Dh */
- U16 Reserved3; /* 0Eh */
+ U8 Flags; /* 0Dh */
+ U16 Reserved2; /* 0Eh */
U8 InquiryData[56]; /* 10h */
U32 ISVolumeSettings; /* 48h */
U32 IMEVolumeSettings; /* 4Ch */
U32 IMVolumeSettings; /* 50h */
+ U32 Reserved3; /* 54h */
+ U32 Reserved4; /* 58h */
+ U32 Reserved5; /* 5Ch */
+ U8 IMEDataScrubRate; /* 60h */
+ U8 IMEResyncRate; /* 61h */
+ U16 Reserved6; /* 62h */
+ U8 IMDataScrubRate; /* 64h */
+ U8 IMResyncRate; /* 65h */
+ U16 Reserved7; /* 66h */
+ U32 Reserved8; /* 68h */
+ U32 Reserved9; /* 6Ch */
} CONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4,
ManufacturingPage4_t, MPI_POINTER pManufacturingPage4_t;
-#define MPI_MANUFACTURING4_PAGEVERSION (0x00)
+#define MPI_MANUFACTURING4_PAGEVERSION (0x02)
+
+/* defines for the Flags field */
+#define MPI_MANPAGE4_IR_NO_MIX_SAS_SATA (0x01)
+
+
+typedef struct _CONFIG_PAGE_MANUFACTURING_5
+{
+ CONFIG_PAGE_HEADER Header; /* 00h */
+ U64 BaseWWID; /* 04h */
+ U8 Flags; /* 0Ch */
+ U8 Reserved1; /* 0Dh */
+ U16 Reserved2; /* 0Eh */
+} CONFIG_PAGE_MANUFACTURING_5, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_5,
+ ManufacturingPage5_t, MPI_POINTER pManufacturingPage5_t;
+
+#define MPI_MANUFACTURING5_PAGEVERSION (0x01)
+
+/* defines for the Flags field */
+#define MPI_MANPAGE5_TWO_WWID_PER_PHY (0x01)
+
+
+typedef struct _CONFIG_PAGE_MANUFACTURING_6
+{
+ CONFIG_PAGE_HEADER Header; /* 00h */
+ U32 ProductSpecificInfo;/* 04h */
+} CONFIG_PAGE_MANUFACTURING_6, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_6,
+ ManufacturingPage6_t, MPI_POINTER pManufacturingPage6_t;
+
+#define MPI_MANUFACTURING6_PAGEVERSION (0x00)
/****************************************************************************
@@ -472,18 +703,19 @@ typedef struct _CONFIG_PAGE_IO_UNIT_1
} CONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1,
IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t;
-#define MPI_IOUNITPAGE1_PAGEVERSION (0x00)
+#define MPI_IOUNITPAGE1_PAGEVERSION (0x02)
/* IO Unit Page 1 Flags defines */
-
#define MPI_IOUNITPAGE1_MULTI_FUNCTION (0x00000000)
#define MPI_IOUNITPAGE1_SINGLE_FUNCTION (0x00000001)
#define MPI_IOUNITPAGE1_MULTI_PATHING (0x00000002)
#define MPI_IOUNITPAGE1_SINGLE_PATHING (0x00000000)
#define MPI_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID (0x00000004)
+#define MPI_IOUNITPAGE1_DISABLE_QUEUE_FULL_HANDLING (0x00000020)
#define MPI_IOUNITPAGE1_DISABLE_IR (0x00000040)
#define MPI_IOUNITPAGE1_FORCE_32 (0x00000080)
-
+#define MPI_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE (0x00000100)
+#define MPI_IOUNITPAGE1_SATA_WRITE_CACHE_DISABLE (0x00000200)
typedef struct _MPI_ADAPTER_INFO
{
@@ -502,16 +734,22 @@ typedef struct _CONFIG_PAGE_IO_UNIT_2
U32 Flags; /* 04h */
U32 BiosVersion; /* 08h */
MPI_ADAPTER_INFO AdapterOrder[4]; /* 0Ch */
+ U32 Reserved1; /* 1Ch */
} CONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2,
IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t;
-#define MPI_IOUNITPAGE2_PAGEVERSION (0x00)
+#define MPI_IOUNITPAGE2_PAGEVERSION (0x02)
#define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR (0x00000002)
#define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE (0x00000004)
#define MPI_IOUNITPAGE2_FLAGS_COLOR_VIDEO_DISABLE (0x00000008)
#define MPI_IOUNITPAGE2_FLAGS_DONT_HOOK_INT_40 (0x00000010)
+#define MPI_IOUNITPAGE2_FLAGS_DEV_LIST_DISPLAY_MASK (0x000000E0)
+#define MPI_IOUNITPAGE2_FLAGS_INSTALLED_DEV_DISPLAY (0x00000000)
+#define MPI_IOUNITPAGE2_FLAGS_ADAPTER_DISPLAY (0x00000020)
+#define MPI_IOUNITPAGE2_FLAGS_ADAPTER_DEV_DISPLAY (0x00000040)
+
/*
* Host code (drivers, BIOS, utilities, etc.) should leave this define set to
@@ -539,6 +777,17 @@ typedef struct _CONFIG_PAGE_IO_UNIT_3
#define MPI_IOUNITPAGE3_GPIO_SETTING_ON (0x01)
+typedef struct _CONFIG_PAGE_IO_UNIT_4
+{
+ CONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Reserved1; /* 04h */
+ SGE_SIMPLE_UNION FWImageSGE; /* 08h */
+} CONFIG_PAGE_IO_UNIT_4, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_4,
+ IOUnitPage4_t, MPI_POINTER pIOUnitPage4_t;
+
+#define MPI_IOUNITPAGE4_PAGEVERSION (0x00)
+
+
/****************************************************************************
* IOC Config Pages
****************************************************************************/
@@ -572,8 +821,14 @@ typedef struct _CONFIG_PAGE_IOC_1
} CONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1,
IOCPage1_t, MPI_POINTER pIOCPage1_t;
-#define MPI_IOCPAGE1_PAGEVERSION (0x01)
+#define MPI_IOCPAGE1_PAGEVERSION (0x03)
+/* defines for the Flags field */
+#define MPI_IOCPAGE1_EEDP_MODE_MASK (0x07000000)
+#define MPI_IOCPAGE1_EEDP_MODE_OFF (0x00000000)
+#define MPI_IOCPAGE1_EEDP_MODE_T10 (0x01000000)
+#define MPI_IOCPAGE1_EEDP_MODE_LSI_1 (0x02000000)
+#define MPI_IOCPAGE1_INITIATOR_CONTEXT_REPLY_DISABLE (0x00000010)
#define MPI_IOCPAGE1_REPLY_COALESCING (0x00000001)
#define MPI_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF)
@@ -596,6 +851,11 @@ typedef struct _CONFIG_PAGE_IOC_2_RAID_VOL
#define MPI_RAID_VOL_TYPE_IS (0x00)
#define MPI_RAID_VOL_TYPE_IME (0x01)
#define MPI_RAID_VOL_TYPE_IM (0x02)
+#define MPI_RAID_VOL_TYPE_RAID_5 (0x03)
+#define MPI_RAID_VOL_TYPE_RAID_6 (0x04)
+#define MPI_RAID_VOL_TYPE_RAID_10 (0x05)
+#define MPI_RAID_VOL_TYPE_RAID_50 (0x06)
+#define MPI_RAID_VOL_TYPE_UNKNOWN (0xFF)
/* IOC Page 2 Volume Flags values */
@@ -621,13 +881,17 @@ typedef struct _CONFIG_PAGE_IOC_2
} CONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2,
IOCPage2_t, MPI_POINTER pIOCPage2_t;
-#define MPI_IOCPAGE2_PAGEVERSION (0x02)
+#define MPI_IOCPAGE2_PAGEVERSION (0x03)
/* IOC Page 2 Capabilities flags */
#define MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT (0x00000001)
#define MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT (0x00000002)
#define MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT (0x00000004)
+#define MPI_IOCPAGE2_CAP_FLAGS_RAID_5_SUPPORT (0x00000008)
+#define MPI_IOCPAGE2_CAP_FLAGS_RAID_6_SUPPORT (0x00000010)
+#define MPI_IOCPAGE2_CAP_FLAGS_RAID_10_SUPPORT (0x00000020)
+#define MPI_IOCPAGE2_CAP_FLAGS_RAID_50_SUPPORT (0x00000040)
#define MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT (0x20000000)
#define MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT (0x40000000)
#define MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT (0x80000000)
@@ -726,6 +990,252 @@ typedef struct _CONFIG_PAGE_IOC_5
#define MPI_IOCPAGE5_PAGEVERSION (0x00)
+/****************************************************************************
+* BIOS Config Pages
+****************************************************************************/
+
+typedef struct _CONFIG_PAGE_BIOS_1
+{
+ CONFIG_PAGE_HEADER Header; /* 00h */
+ U32 BiosOptions; /* 04h */
+ U32 IOCSettings; /* 08h */
+ U32 Reserved1; /* 0Ch */
+ U32 DeviceSettings; /* 10h */
+ U16 NumberOfDevices; /* 14h */
+ U16 Reserved2; /* 16h */
+ U16 IOTimeoutBlockDevicesNonRM; /* 18h */
+ U16 IOTimeoutSequential; /* 1Ah */
+ U16 IOTimeoutOther; /* 1Ch */
+ U16 IOTimeoutBlockDevicesRM; /* 1Eh */
+} CONFIG_PAGE_BIOS_1, MPI_POINTER PTR_CONFIG_PAGE_BIOS_1,
+ BIOSPage1_t, MPI_POINTER pBIOSPage1_t;
+
+#define MPI_BIOSPAGE1_PAGEVERSION (0x02)
+
+/* values for the BiosOptions field */
+#define MPI_BIOSPAGE1_OPTIONS_SPI_ENABLE (0x00000400)
+#define MPI_BIOSPAGE1_OPTIONS_FC_ENABLE (0x00000200)
+#define MPI_BIOSPAGE1_OPTIONS_SAS_ENABLE (0x00000100)
+#define MPI_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001)
+
+/* values for the IOCSettings field */
+#define MPI_BIOSPAGE1_IOCSET_MASK_PORT_ENABLE_DELAY (0x00F00000)
+#define MPI_BIOSPAGE1_IOCSET_SHIFT_PORT_ENABLE_DELAY (20)
+#define MPI_BIOSPAGE1_IOCSET_MASK_BOOT_PREFERENCE (0x00030000)
+#define MPI_BIOSPAGE1_IOCSET_ENCLOSURE_SLOT_BOOT (0x00000000)
+#define MPI_BIOSPAGE1_IOCSET_SAS_ADDRESS_BOOT (0x00010000)
+
+#define MPI_BIOSPAGE1_IOCSET_MASK_MAX_TARGET_SPIN_UP (0x0000F000)
+#define MPI_BIOSPAGE1_IOCSET_SHIFT_MAX_TARGET_SPIN_UP (12)
+
+#define MPI_BIOSPAGE1_IOCSET_MASK_SPINUP_DELAY (0x00000F00)
+#define MPI_BIOSPAGE1_IOCSET_SHIFT_SPINUP_DELAY (8)
+
+#define MPI_BIOSPAGE1_IOCSET_MASK_RM_SETTING (0x000000C0)
+#define MPI_BIOSPAGE1_IOCSET_NONE_RM_SETTING (0x00000000)
+#define MPI_BIOSPAGE1_IOCSET_BOOT_RM_SETTING (0x00000040)
+#define MPI_BIOSPAGE1_IOCSET_MEDIA_RM_SETTING (0x00000080)
+
+#define MPI_BIOSPAGE1_IOCSET_MASK_ADAPTER_SUPPORT (0x00000030)
+#define MPI_BIOSPAGE1_IOCSET_NO_SUPPORT (0x00000000)
+#define MPI_BIOSPAGE1_IOCSET_BIOS_SUPPORT (0x00000010)
+#define MPI_BIOSPAGE1_IOCSET_OS_SUPPORT (0x00000020)
+#define MPI_BIOSPAGE1_IOCSET_ALL_SUPPORT (0x00000030)
+
+#define MPI_BIOSPAGE1_IOCSET_ALTERNATE_CHS (0x00000008)
+
+/* values for the DeviceSettings field */
+#define MPI_BIOSPAGE1_DEVSET_DISABLE_SEQ_LUN (0x00000008)
+#define MPI_BIOSPAGE1_DEVSET_DISABLE_RM_LUN (0x00000004)
+#define MPI_BIOSPAGE1_DEVSET_DISABLE_NON_RM_LUN (0x00000002)
+#define MPI_BIOSPAGE1_DEVSET_DISABLE_OTHER_LUN (0x00000001)
+
+typedef struct _MPI_BOOT_DEVICE_ADAPTER_ORDER
+{
+ U32 Reserved1; /* 00h */
+ U32 Reserved2; /* 04h */
+ U32 Reserved3; /* 08h */
+ U32 Reserved4; /* 0Ch */
+ U32 Reserved5; /* 10h */
+ U32 Reserved6; /* 14h */
+ U32 Reserved7; /* 18h */
+ U32 Reserved8; /* 1Ch */
+ U32 Reserved9; /* 20h */
+ U32 Reserved10; /* 24h */
+ U32 Reserved11; /* 28h */
+ U32 Reserved12; /* 2Ch */
+ U32 Reserved13; /* 30h */
+ U32 Reserved14; /* 34h */
+ U32 Reserved15; /* 38h */
+ U32 Reserved16; /* 3Ch */
+ U32 Reserved17; /* 40h */
+} MPI_BOOT_DEVICE_ADAPTER_ORDER, MPI_POINTER PTR_MPI_BOOT_DEVICE_ADAPTER_ORDER;
+
+typedef struct _MPI_BOOT_DEVICE_ADAPTER_NUMBER
+{
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U8 AdapterNumber; /* 02h */
+ U8 Reserved1; /* 03h */
+ U32 Reserved2; /* 04h */
+ U32 Reserved3; /* 08h */
+ U32 Reserved4; /* 0Ch */
+ U8 LUN[8]; /* 10h */
+ U32 Reserved5; /* 18h */
+ U32 Reserved6; /* 1Ch */
+ U32 Reserved7; /* 20h */
+ U32 Reserved8; /* 24h */
+ U32 Reserved9; /* 28h */
+ U32 Reserved10; /* 2Ch */
+ U32 Reserved11; /* 30h */
+ U32 Reserved12; /* 34h */
+ U32 Reserved13; /* 38h */
+ U32 Reserved14; /* 3Ch */
+ U32 Reserved15; /* 40h */
+} MPI_BOOT_DEVICE_ADAPTER_NUMBER, MPI_POINTER PTR_MPI_BOOT_DEVICE_ADAPTER_NUMBER;
+
+typedef struct _MPI_BOOT_DEVICE_PCI_ADDRESS
+{
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U16 PCIAddress; /* 02h */
+ U32 Reserved1; /* 04h */
+ U32 Reserved2; /* 08h */
+ U32 Reserved3; /* 0Ch */
+ U8 LUN[8]; /* 10h */
+ U32 Reserved4; /* 18h */
+ U32 Reserved5; /* 1Ch */
+ U32 Reserved6; /* 20h */
+ U32 Reserved7; /* 24h */
+ U32 Reserved8; /* 28h */
+ U32 Reserved9; /* 2Ch */
+ U32 Reserved10; /* 30h */
+ U32 Reserved11; /* 34h */
+ U32 Reserved12; /* 38h */
+ U32 Reserved13; /* 3Ch */
+ U32 Reserved14; /* 40h */
+} MPI_BOOT_DEVICE_PCI_ADDRESS, MPI_POINTER PTR_MPI_BOOT_DEVICE_PCI_ADDRESS;
+
+typedef struct _MPI_BOOT_DEVICE_SLOT_NUMBER
+{
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U8 PCISlotNumber; /* 02h */
+ U8 Reserved1; /* 03h */
+ U32 Reserved2; /* 04h */
+ U32 Reserved3; /* 08h */
+ U32 Reserved4; /* 0Ch */
+ U8 LUN[8]; /* 10h */
+ U32 Reserved5; /* 18h */
+ U32 Reserved6; /* 1Ch */
+ U32 Reserved7; /* 20h */
+ U32 Reserved8; /* 24h */
+ U32 Reserved9; /* 28h */
+ U32 Reserved10; /* 2Ch */
+ U32 Reserved11; /* 30h */
+ U32 Reserved12; /* 34h */
+ U32 Reserved13; /* 38h */
+ U32 Reserved14; /* 3Ch */
+ U32 Reserved15; /* 40h */
+} MPI_BOOT_DEVICE_PCI_SLOT_NUMBER, MPI_POINTER PTR_MPI_BOOT_DEVICE_PCI_SLOT_NUMBER;
+
+typedef struct _MPI_BOOT_DEVICE_FC_WWN
+{
+ U64 WWPN; /* 00h */
+ U32 Reserved1; /* 08h */
+ U32 Reserved2; /* 0Ch */
+ U8 LUN[8]; /* 10h */
+ U32 Reserved3; /* 18h */
+ U32 Reserved4; /* 1Ch */
+ U32 Reserved5; /* 20h */
+ U32 Reserved6; /* 24h */
+ U32 Reserved7; /* 28h */
+ U32 Reserved8; /* 2Ch */
+ U32 Reserved9; /* 30h */
+ U32 Reserved10; /* 34h */
+ U32 Reserved11; /* 38h */
+ U32 Reserved12; /* 3Ch */
+ U32 Reserved13; /* 40h */
+} MPI_BOOT_DEVICE_FC_WWN, MPI_POINTER PTR_MPI_BOOT_DEVICE_FC_WWN;
+
+typedef struct _MPI_BOOT_DEVICE_SAS_WWN
+{
+ U64 SASAddress; /* 00h */
+ U32 Reserved1; /* 08h */
+ U32 Reserved2; /* 0Ch */
+ U8 LUN[8]; /* 10h */
+ U32 Reserved3; /* 18h */
+ U32 Reserved4; /* 1Ch */
+ U32 Reserved5; /* 20h */
+ U32 Reserved6; /* 24h */
+ U32 Reserved7; /* 28h */
+ U32 Reserved8; /* 2Ch */
+ U32 Reserved9; /* 30h */
+ U32 Reserved10; /* 34h */
+ U32 Reserved11; /* 38h */
+ U32 Reserved12; /* 3Ch */
+ U32 Reserved13; /* 40h */
+} MPI_BOOT_DEVICE_SAS_WWN, MPI_POINTER PTR_MPI_BOOT_DEVICE_SAS_WWN;
+
+typedef struct _MPI_BOOT_DEVICE_ENCLOSURE_SLOT
+{
+ U64 EnclosureLogicalID; /* 00h */
+ U32 Reserved1; /* 08h */
+ U32 Reserved2; /* 0Ch */
+ U8 LUN[8]; /* 10h */
+ U16 SlotNumber; /* 18h */
+ U16 Reserved3; /* 1Ah */
+ U32 Reserved4; /* 1Ch */
+ U32 Reserved5; /* 20h */
+ U32 Reserved6; /* 24h */
+ U32 Reserved7; /* 28h */
+ U32 Reserved8; /* 2Ch */
+ U32 Reserved9; /* 30h */
+ U32 Reserved10; /* 34h */
+ U32 Reserved11; /* 38h */
+ U32 Reserved12; /* 3Ch */
+ U32 Reserved13; /* 40h */
+} MPI_BOOT_DEVICE_ENCLOSURE_SLOT,
+ MPI_POINTER PTR_MPI_BOOT_DEVICE_ENCLOSURE_SLOT;
+
+typedef union _MPI_BIOSPAGE2_BOOT_DEVICE
+{
+ MPI_BOOT_DEVICE_ADAPTER_ORDER AdapterOrder;
+ MPI_BOOT_DEVICE_ADAPTER_NUMBER AdapterNumber;
+ MPI_BOOT_DEVICE_PCI_ADDRESS PCIAddress;
+ MPI_BOOT_DEVICE_PCI_SLOT_NUMBER PCISlotNumber;
+ MPI_BOOT_DEVICE_FC_WWN FcWwn;
+ MPI_BOOT_DEVICE_SAS_WWN SasWwn;
+ MPI_BOOT_DEVICE_ENCLOSURE_SLOT EnclosureSlot;
+} MPI_BIOSPAGE2_BOOT_DEVICE, MPI_POINTER PTR_MPI_BIOSPAGE2_BOOT_DEVICE;
+
+typedef struct _CONFIG_PAGE_BIOS_2
+{
+ CONFIG_PAGE_HEADER Header; /* 00h */
+ U32 Reserved1; /* 04h */
+ U32 Reserved2; /* 08h */
+ U32 Reserved3; /* 0Ch */
+ U32 Reserved4; /* 10h */
+ U32 Reserved5; /* 14h */
+ U32 Reserved6; /* 18h */
+ U8 BootDeviceForm; /* 1Ch */
+ U8 Reserved7; /* 1Dh */
+ U16 Reserved8; /* 1Eh */
+ MPI_BIOSPAGE2_BOOT_DEVICE BootDevice; /* 20h */
+} CONFIG_PAGE_BIOS_2, MPI_POINTER PTR_CONFIG_PAGE_BIOS_2,
+ BIOSPage2_t, MPI_POINTER pBIOSPage2_t;
+
+#define MPI_BIOSPAGE2_PAGEVERSION (0x01)
+
+#define MPI_BIOSPAGE2_FORM_MASK (0x0F)
+#define MPI_BIOSPAGE2_FORM_ADAPTER_ORDER (0x00)
+#define MPI_BIOSPAGE2_FORM_ADAPTER_NUMBER (0x01)
+#define MPI_BIOSPAGE2_FORM_PCI_ADDRESS (0x02)
+#define MPI_BIOSPAGE2_FORM_PCI_SLOT_NUMBER (0x03)
+#define MPI_BIOSPAGE2_FORM_FC_WWN (0x04)
+#define MPI_BIOSPAGE2_FORM_SAS_WWN (0x05)
+#define MPI_BIOSPAGE2_FORM_ENCLOSURE_SLOT (0x06)
+
/****************************************************************************
* SCSI Port Config Pages
@@ -739,13 +1249,34 @@ typedef struct _CONFIG_PAGE_SCSI_PORT_0
} CONFIG_PAGE_SCSI_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_0,
SCSIPortPage0_t, MPI_POINTER pSCSIPortPage0_t;
-#define MPI_SCSIPORTPAGE0_PAGEVERSION (0x01)
+#define MPI_SCSIPORTPAGE0_PAGEVERSION (0x02)
#define MPI_SCSIPORTPAGE0_CAP_IU (0x00000001)
#define MPI_SCSIPORTPAGE0_CAP_DT (0x00000002)
#define MPI_SCSIPORTPAGE0_CAP_QAS (0x00000004)
#define MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK (0x0000FF00)
+#define MPI_SCSIPORTPAGE0_SYNC_ASYNC (0x00)
+#define MPI_SCSIPORTPAGE0_SYNC_5 (0x32)
+#define MPI_SCSIPORTPAGE0_SYNC_10 (0x19)
+#define MPI_SCSIPORTPAGE0_SYNC_20 (0x0C)
+#define MPI_SCSIPORTPAGE0_SYNC_33_33 (0x0B)
+#define MPI_SCSIPORTPAGE0_SYNC_40 (0x0A)
+#define MPI_SCSIPORTPAGE0_SYNC_80 (0x09)
+#define MPI_SCSIPORTPAGE0_SYNC_160 (0x08)
+#define MPI_SCSIPORTPAGE0_SYNC_UNKNOWN (0xFF)
+
+#define MPI_SCSIPORTPAGE0_CAP_SHIFT_MIN_SYNC_PERIOD (8)
+#define MPI_SCSIPORTPAGE0_CAP_GET_MIN_SYNC_PERIOD(Cap) \
+ ( ((Cap) & MPI_SCSIPORTPAGE0_CAP_MASK_MIN_SYNC_PERIOD) \
+ >> MPI_SCSIPORTPAGE0_CAP_SHIFT_MIN_SYNC_PERIOD \
+ )
#define MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK (0x00FF0000)
+#define MPI_SCSIPORTPAGE0_CAP_SHIFT_MAX_SYNC_OFFSET (16)
+#define MPI_SCSIPORTPAGE0_CAP_GET_MAX_SYNC_OFFSET(Cap) \
+ ( ((Cap) & MPI_SCSIPORTPAGE0_CAP_MASK_MAX_SYNC_OFFSET) \
+ >> MPI_SCSIPORTPAGE0_CAP_SHIFT_MAX_SYNC_OFFSET \
+ )
+#define MPI_SCSIPORTPAGE0_CAP_IDP (0x08000000)
#define MPI_SCSIPORTPAGE0_CAP_WIDE (0x20000000)
#define MPI_SCSIPORTPAGE0_CAP_AIP (0x80000000)
@@ -775,6 +1306,7 @@ typedef struct _CONFIG_PAGE_SCSI_PORT_1
/* Configuration values */
#define MPI_SCSIPORTPAGE1_CFG_PORT_SCSI_ID_MASK (0x000000FF)
#define MPI_SCSIPORTPAGE1_CFG_PORT_RESPONSE_ID_MASK (0xFFFF0000)
+#define MPI_SCSIPORTPAGE1_CFG_SHIFT_PORT_RESPONSE_ID (16)
/* TargetConfig values */
#define MPI_SCSIPORTPAGE1_TARGCONFIG_TARG_ONLY (0x01)
@@ -811,6 +1343,7 @@ typedef struct _CONFIG_PAGE_SCSI_PORT_2
#define MPI_SCSIPORTPAGE2_PORT_FLAGS_BASIC_DV_ONLY (0x00000020)
#define MPI_SCSIPORTPAGE2_PORT_FLAGS_OFF_DV (0x00000060)
+
/* PortSettings values */
#define MPI_SCSIPORTPAGE2_PORT_HOST_ID_MASK (0x0000000F)
#define MPI_SCSIPORTPAGE2_PORT_MASK_INIT_HBA (0x00000030)
@@ -819,7 +1352,11 @@ typedef struct _CONFIG_PAGE_SCSI_PORT_2
#define MPI_SCSIPORTPAGE2_PORT_OS_INIT_HBA (0x00000020)
#define MPI_SCSIPORTPAGE2_PORT_BIOS_OS_INIT_HBA (0x00000030)
#define MPI_SCSIPORTPAGE2_PORT_REMOVABLE_MEDIA (0x000000C0)
+#define MPI_SCSIPORTPAGE2_PORT_RM_NONE (0x00000000)
+#define MPI_SCSIPORTPAGE2_PORT_RM_BOOT_ONLY (0x00000040)
+#define MPI_SCSIPORTPAGE2_PORT_RM_WITH_MEDIA (0x00000080)
#define MPI_SCSIPORTPAGE2_PORT_SPINUP_DELAY_MASK (0x00000F00)
+#define MPI_SCSIPORTPAGE2_PORT_SHIFT_SPINUP_DELAY (8)
#define MPI_SCSIPORTPAGE2_PORT_MASK_NEGO_MASTER_SETTINGS (0x00003000)
#define MPI_SCSIPORTPAGE2_PORT_NEGO_MASTER_SETTINGS (0x00000000)
#define MPI_SCSIPORTPAGE2_PORT_NONE_MASTER_SETTINGS (0x00001000)
@@ -845,7 +1382,7 @@ typedef struct _CONFIG_PAGE_SCSI_DEVICE_0
} CONFIG_PAGE_SCSI_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_0,
SCSIDevicePage0_t, MPI_POINTER pSCSIDevicePage0_t;
-#define MPI_SCSIDEVPAGE0_PAGEVERSION (0x03)
+#define MPI_SCSIDEVPAGE0_PAGEVERSION (0x04)
#define MPI_SCSIDEVPAGE0_NP_IU (0x00000001)
#define MPI_SCSIDEVPAGE0_NP_DT (0x00000002)
@@ -856,7 +1393,10 @@ typedef struct _CONFIG_PAGE_SCSI_DEVICE_0
#define MPI_SCSIDEVPAGE0_NP_RTI (0x00000040)
#define MPI_SCSIDEVPAGE0_NP_PCOMP_EN (0x00000080)
#define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_PERIOD_MASK (0x0000FF00)
+#define MPI_SCSIDEVPAGE0_NP_SHIFT_SYNC_PERIOD (8)
#define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_OFFSET_MASK (0x00FF0000)
+#define MPI_SCSIDEVPAGE0_NP_SHIFT_SYNC_OFFSET (16)
+#define MPI_SCSIDEVPAGE0_NP_IDP (0x08000000)
#define MPI_SCSIDEVPAGE0_NP_WIDE (0x20000000)
#define MPI_SCSIDEVPAGE0_NP_AIP (0x80000000)
@@ -875,7 +1415,7 @@ typedef struct _CONFIG_PAGE_SCSI_DEVICE_1
} CONFIG_PAGE_SCSI_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_1,
SCSIDevicePage1_t, MPI_POINTER pSCSIDevicePage1_t;
-#define MPI_SCSIDEVPAGE1_PAGEVERSION (0x04)
+#define MPI_SCSIDEVPAGE1_PAGEVERSION (0x05)
#define MPI_SCSIDEVPAGE1_RP_IU (0x00000001)
#define MPI_SCSIDEVPAGE1_RP_DT (0x00000002)
@@ -886,7 +1426,10 @@ typedef struct _CONFIG_PAGE_SCSI_DEVICE_1
#define MPI_SCSIDEVPAGE1_RP_RTI (0x00000040)
#define MPI_SCSIDEVPAGE1_RP_PCOMP_EN (0x00000080)
#define MPI_SCSIDEVPAGE1_RP_MIN_SYNC_PERIOD_MASK (0x0000FF00)
+#define MPI_SCSIDEVPAGE1_RP_SHIFT_MIN_SYNC_PERIOD (8)
#define MPI_SCSIDEVPAGE1_RP_MAX_SYNC_OFFSET_MASK (0x00FF0000)
+#define MPI_SCSIDEVPAGE1_RP_SHIFT_MAX_SYNC_OFFSET (16)
+#define MPI_SCSIDEVPAGE1_RP_IDP (0x08000000)
#define MPI_SCSIDEVPAGE1_RP_WIDE (0x20000000)
#define MPI_SCSIDEVPAGE1_RP_AIP (0x80000000)
@@ -1032,13 +1575,18 @@ typedef struct _CONFIG_PAGE_FC_PORT_0
#define MPI_FCPORTPAGE0_SUPPORT_CLASS_2 (0x00000002)
#define MPI_FCPORTPAGE0_SUPPORT_CLASS_3 (0x00000004)
+#define MPI_FCPORTPAGE0_SUPPORT_SPEED_UKNOWN (0x00000000) /* (SNIA)HBA_PORTSPEED_UNKNOWN 0 Unknown - transceiver incapable of reporting */
#define MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED (0x00000001) /* (SNIA)HBA_PORTSPEED_1GBIT 1 1 GBit/sec */
#define MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED (0x00000002) /* (SNIA)HBA_PORTSPEED_2GBIT 2 2 GBit/sec */
#define MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED (0x00000004) /* (SNIA)HBA_PORTSPEED_10GBIT 4 10 GBit/sec */
+#define MPI_FCPORTPAGE0_SUPPORT_4GBIT_SPEED (0x00000008) /* (SNIA)HBA_PORTSPEED_4GBIT 8 4 GBit/sec */
+#define MPI_FCPORTPAGE0_CURRENT_SPEED_UKNOWN MPI_FCPORTPAGE0_SUPPORT_SPEED_UKNOWN
#define MPI_FCPORTPAGE0_CURRENT_SPEED_1GBIT MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED
#define MPI_FCPORTPAGE0_CURRENT_SPEED_2GBIT MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED
#define MPI_FCPORTPAGE0_CURRENT_SPEED_10GBIT MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED
+#define MPI_FCPORTPAGE0_CURRENT_SPEED_4GBIT MPI_FCPORTPAGE0_SUPPORT_4GBIT_SPEED
+#define MPI_FCPORTPAGE0_CURRENT_SPEED_NOT_NEGOTIATED (0x00008000) /* (SNIA)HBA_PORTSPEED_NOT_NEGOTIATED (1<<15) Speed not established */
typedef struct _CONFIG_PAGE_FC_PORT_1
@@ -1067,6 +1615,7 @@ typedef struct _CONFIG_PAGE_FC_PORT_1
#define MPI_FCPORTPAGE1_FLAGS_TARGET_MODE_OXID (0x00800000)
#define MPI_FCPORTPAGE1_FLAGS_PORT_OFFLINE (0x00400000)
#define MPI_FCPORTPAGE1_FLAGS_SOFT_ALPA_FALLBACK (0x00200000)
+#define MPI_FCPORTPAGE1_FLAGS_TARGET_LARGE_CDB_ENABLE (0x00000080)
#define MPI_FCPORTPAGE1_FLAGS_MASK_RR_TOV_UNITS (0x00000070)
#define MPI_FCPORTPAGE1_FLAGS_SUPPRESS_PROT_REG (0x00000008)
#define MPI_FCPORTPAGE1_FLAGS_PLOGI_ON_LOGO (0x00000004)
@@ -1476,15 +2025,16 @@ typedef struct _RAID_VOL0_STATUS
RaidVol0Status_t, MPI_POINTER pRaidVol0Status_t;
/* RAID Volume Page 0 VolumeStatus defines */
-
#define MPI_RAIDVOL0_STATUS_FLAG_ENABLED (0x01)
#define MPI_RAIDVOL0_STATUS_FLAG_QUIESCED (0x02)
#define MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS (0x04)
#define MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE (0x08)
+#define MPI_RAIDVOL0_STATUS_FLAG_BAD_BLOCK_TABLE_FULL (0x10)
#define MPI_RAIDVOL0_STATUS_STATE_OPTIMAL (0x00)
#define MPI_RAIDVOL0_STATUS_STATE_DEGRADED (0x01)
#define MPI_RAIDVOL0_STATUS_STATE_FAILED (0x02)
+#define MPI_RAIDVOL0_STATUS_STATE_MISSING (0x03)
typedef struct _RAID_VOL0_SETTINGS
{
@@ -1495,11 +2045,11 @@ typedef struct _RAID_VOL0_SETTINGS
RaidVol0Settings, MPI_POINTER pRaidVol0Settings;
/* RAID Volume Page 0 VolumeSettings defines */
-
#define MPI_RAIDVOL0_SETTING_WRITE_CACHING_ENABLE (0x0001)
#define MPI_RAIDVOL0_SETTING_OFFLINE_ON_SMART (0x0002)
#define MPI_RAIDVOL0_SETTING_AUTO_CONFIGURE (0x0004)
#define MPI_RAIDVOL0_SETTING_PRIORITY_RESYNC (0x0008)
+#define MPI_RAIDVOL0_SETTING_FAST_DATA_SCRUBBING_0102 (0x0020) /* obsolete */
#define MPI_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX (0x0010)
#define MPI_RAIDVOL0_SETTING_USE_DEFAULTS (0x8000)
@@ -1543,7 +2093,34 @@ typedef struct _CONFIG_PAGE_RAID_VOL_0
} CONFIG_PAGE_RAID_VOL_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_0,
RaidVolumePage0_t, MPI_POINTER pRaidVolumePage0_t;
-#define MPI_RAIDVOLPAGE0_PAGEVERSION (0x01)
+#define MPI_RAIDVOLPAGE0_PAGEVERSION (0x05)
+
+/* values for RAID Volume Page 0 InactiveStatus field */
+#define MPI_RAIDVOLPAGE0_UNKNOWN_INACTIVE (0x00)
+#define MPI_RAIDVOLPAGE0_STALE_METADATA_INACTIVE (0x01)
+#define MPI_RAIDVOLPAGE0_FOREIGN_VOLUME_INACTIVE (0x02)
+#define MPI_RAIDVOLPAGE0_INSUFFICIENT_RESOURCE_INACTIVE (0x03)
+#define MPI_RAIDVOLPAGE0_CLONE_VOLUME_INACTIVE (0x04)
+#define MPI_RAIDVOLPAGE0_INSUFFICIENT_METADATA_INACTIVE (0x05)
+#define MPI_RAIDVOLPAGE0_PREVIOUSLY_DELETED (0x06)
+
+
+typedef struct _CONFIG_PAGE_RAID_VOL_1
+{
+ CONFIG_PAGE_HEADER Header; /* 00h */
+ U8 VolumeID; /* 01h */
+ U8 VolumeBus; /* 02h */
+ U8 VolumeIOC; /* 03h */
+ U8 Reserved0; /* 04h */
+ U8 GUID[24]; /* 05h */
+ U8 Name[32]; /* 20h */
+ U64 WWID; /* 40h */
+ U32 Reserved1; /* 48h */
+ U32 Reserved2; /* 4Ch */
+} CONFIG_PAGE_RAID_VOL_1, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_1,
+ RaidVolumePage1_t, MPI_POINTER pRaidVolumePage1_t;
+
+#define MPI_RAIDVOLPAGE1_PAGEVERSION (0x01)
/****************************************************************************
@@ -1594,6 +2171,9 @@ typedef struct _RAID_PHYS_DISK0_STATUS
#define MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC (0x01)
#define MPI_PHYSDISK0_STATUS_FLAG_QUIESCED (0x02)
+#define MPI_PHYSDISK0_STATUS_FLAG_INACTIVE_VOLUME (0x04)
+#define MPI_PHYSDISK0_STATUS_FLAG_OPTIMAL_PREVIOUS (0x00)
+#define MPI_PHYSDISK0_STATUS_FLAG_NOT_OPTIMAL_PREVIOUS (0x08)
#define MPI_PHYSDISK0_STATUS_ONLINE (0x00)
#define MPI_PHYSDISK0_STATUS_MISSING (0x01)
@@ -1613,8 +2193,7 @@ typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_0
U8 PhysDiskNum; /* 07h */
RAID_PHYS_DISK0_SETTINGS PhysDiskSettings; /* 08h */
U32 Reserved1; /* 0Ch */
- U32 Reserved2; /* 10h */
- U32 Reserved3; /* 14h */
+ U8 ExtDiskIdentifier[8]; /* 10h */
U8 DiskIdentifier[16]; /* 18h */
RAID_PHYS_DISK0_INQUIRY_DATA InquiryData; /* 28h */
RAID_PHYS_DISK0_STATUS PhysDiskStatus; /* 64h */
@@ -1623,7 +2202,38 @@ typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_0
} CONFIG_PAGE_RAID_PHYS_DISK_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_0,
RaidPhysDiskPage0_t, MPI_POINTER pRaidPhysDiskPage0_t;
-#define MPI_RAIDPHYSDISKPAGE0_PAGEVERSION (0x00)
+#define MPI_RAIDPHYSDISKPAGE0_PAGEVERSION (0x02)
+
+
+typedef struct _RAID_PHYS_DISK1_PATH
+{
+ U8 PhysDiskID; /* 00h */
+ U8 PhysDiskBus; /* 01h */
+ U16 Reserved1; /* 02h */
+ U64 WWID; /* 04h */
+ U64 OwnerWWID; /* 0Ch */
+ U8 OwnerIdentifier; /* 14h */
+ U8 Reserved2; /* 15h */
+ U16 Flags; /* 16h */
+} RAID_PHYS_DISK1_PATH, MPI_POINTER PTR_RAID_PHYS_DISK1_PATH,
+ RaidPhysDisk1Path_t, MPI_POINTER pRaidPhysDisk1Path_t;
+
+/* RAID Physical Disk Page 1 Flags field defines */
+#define MPI_RAID_PHYSDISK1_FLAG_BROKEN (0x0002)
+#define MPI_RAID_PHYSDISK1_FLAG_INVALID (0x0001)
+
+typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_1
+{
+ CONFIG_PAGE_HEADER Header; /* 00h */
+ U8 NumPhysDiskPaths; /* 04h */
+ U8 PhysDiskNum; /* 05h */
+ U16 Reserved2; /* 06h */
+ U32 Reserved1; /* 08h */
+ RAID_PHYS_DISK1_PATH Path[1]; /* 0Ch */
+} CONFIG_PAGE_RAID_PHYS_DISK_1, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_1,
+ RaidPhysDiskPage1_t, MPI_POINTER pRaidPhysDiskPage1_t;
+
+#define MPI_RAIDPHYSDISKPAGE1_PAGEVERSION (0x00)
/****************************************************************************
@@ -1669,5 +2279,560 @@ typedef struct _CONFIG_PAGE_LAN_1
#define MPI_LAN_PAGE1_DEV_STATE_RESET (0x00)
#define MPI_LAN_PAGE1_DEV_STATE_OPERATIONAL (0x01)
+
+/****************************************************************************
+* Inband Config Pages
+****************************************************************************/
+
+typedef struct _CONFIG_PAGE_INBAND_0
+{
+ CONFIG_PAGE_HEADER Header; /* 00h */
+ MPI_VERSION_FORMAT InbandVersion; /* 04h */
+ U16 MaximumBuffers; /* 08h */
+ U16 Reserved1; /* 0Ah */
+} CONFIG_PAGE_INBAND_0, MPI_POINTER PTR_CONFIG_PAGE_INBAND_0,
+ InbandPage0_t, MPI_POINTER pInbandPage0_t;
+
+#define MPI_INBAND_PAGEVERSION (0x00)
+
+
+
+/****************************************************************************
+* SAS IO Unit Config Pages
+****************************************************************************/
+
+typedef struct _MPI_SAS_IO_UNIT0_PHY_DATA
+{
+ U8 Port; /* 00h */
+ U8 PortFlags; /* 01h */
+ U8 PhyFlags; /* 02h */
+ U8 NegotiatedLinkRate; /* 03h */
+ U32 ControllerPhyDeviceInfo;/* 04h */
+ U16 AttachedDeviceHandle; /* 08h */
+ U16 ControllerDevHandle; /* 0Ah */
+ U32 DiscoveryStatus; /* 0Ch */
+} MPI_SAS_IO_UNIT0_PHY_DATA, MPI_POINTER PTR_MPI_SAS_IO_UNIT0_PHY_DATA,
+ SasIOUnit0PhyData, MPI_POINTER pSasIOUnit0PhyData;
+
+/*
+ * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
+ * one and check Header.PageLength at runtime.
+ */
+#ifndef MPI_SAS_IOUNIT0_PHY_MAX
+#define MPI_SAS_IOUNIT0_PHY_MAX (1)
+#endif
+
+typedef struct _CONFIG_PAGE_SAS_IO_UNIT_0
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U32 Reserved1; /* 08h */
+ U8 NumPhys; /* 0Ch */
+ U8 Reserved2; /* 0Dh */
+ U16 Reserved3; /* 0Eh */
+ MPI_SAS_IO_UNIT0_PHY_DATA PhyData[MPI_SAS_IOUNIT0_PHY_MAX]; /* 10h */
+} CONFIG_PAGE_SAS_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_0,
+ SasIOUnitPage0_t, MPI_POINTER pSasIOUnitPage0_t;
+
+#define MPI_SASIOUNITPAGE0_PAGEVERSION (0x03)
+
+/* values for SAS IO Unit Page 0 PortFlags */
+#define MPI_SAS_IOUNIT0_PORT_FLAGS_DISCOVERY_IN_PROGRESS (0x08)
+#define MPI_SAS_IOUNIT0_PORT_FLAGS_0_TARGET_IOC_NUM (0x00)
+#define MPI_SAS_IOUNIT0_PORT_FLAGS_1_TARGET_IOC_NUM (0x04)
+#define MPI_SAS_IOUNIT0_PORT_FLAGS_AUTO_PORT_CONFIG (0x01)
+
+/* values for SAS IO Unit Page 0 PhyFlags */
+#define MPI_SAS_IOUNIT0_PHY_FLAGS_PHY_DISABLED (0x04)
+#define MPI_SAS_IOUNIT0_PHY_FLAGS_TX_INVERT (0x02)
+#define MPI_SAS_IOUNIT0_PHY_FLAGS_RX_INVERT (0x01)
+
+/* values for SAS IO Unit Page 0 NegotiatedLinkRate */
+#define MPI_SAS_IOUNIT0_RATE_UNKNOWN (0x00)
+#define MPI_SAS_IOUNIT0_RATE_PHY_DISABLED (0x01)
+#define MPI_SAS_IOUNIT0_RATE_FAILED_SPEED_NEGOTIATION (0x02)
+#define MPI_SAS_IOUNIT0_RATE_SATA_OOB_COMPLETE (0x03)
+#define MPI_SAS_IOUNIT0_RATE_1_5 (0x08)
+#define MPI_SAS_IOUNIT0_RATE_3_0 (0x09)
+
+/* see mpi_sas.h for values for SAS IO Unit Page 0 ControllerPhyDeviceInfo values */
+
+/* values for SAS IO Unit Page 0 DiscoveryStatus */
+#define MPI_SAS_IOUNIT0_DS_LOOP_DETECTED (0x00000001)
+#define MPI_SAS_IOUNIT0_DS_UNADDRESSABLE_DEVICE (0x00000002)
+#define MPI_SAS_IOUNIT0_DS_MULTIPLE_PORTS (0x00000004)
+#define MPI_SAS_IOUNIT0_DS_EXPANDER_ERR (0x00000008)
+#define MPI_SAS_IOUNIT0_DS_SMP_TIMEOUT (0x00000010)
+#define MPI_SAS_IOUNIT0_DS_OUT_ROUTE_ENTRIES (0x00000020)
+#define MPI_SAS_IOUNIT0_DS_INDEX_NOT_EXIST (0x00000040)
+#define MPI_SAS_IOUNIT0_DS_SMP_FUNCTION_FAILED (0x00000080)
+#define MPI_SAS_IOUNIT0_DS_SMP_CRC_ERROR (0x00000100)
+#define MPI_SAS_IOUNIT0_DS_SUBTRACTIVE_LINK (0x00000200)
+#define MPI_SAS_IOUNIT0_DS_TABLE_LINK (0x00000400)
+#define MPI_SAS_IOUNIT0_DS_UNSUPPORTED_DEVICE (0x00000800)
+#define MPI_SAS_IOUNIT0_DS_MAX_SATA_TARGETS (0x00001000)
+
+
+typedef struct _MPI_SAS_IO_UNIT1_PHY_DATA
+{
+ U8 Port; /* 00h */
+ U8 PortFlags; /* 01h */
+ U8 PhyFlags; /* 02h */
+ U8 MaxMinLinkRate; /* 03h */
+ U32 ControllerPhyDeviceInfo;/* 04h */
+ U32 Reserved1; /* 08h */
+} MPI_SAS_IO_UNIT1_PHY_DATA, MPI_POINTER PTR_MPI_SAS_IO_UNIT1_PHY_DATA,
+ SasIOUnit1PhyData, MPI_POINTER pSasIOUnit1PhyData;
+
+/*
+ * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
+ * one and check Header.PageLength at runtime.
+ */
+#ifndef MPI_SAS_IOUNIT1_PHY_MAX
+#define MPI_SAS_IOUNIT1_PHY_MAX (1)
+#endif
+
+typedef struct _CONFIG_PAGE_SAS_IO_UNIT_1
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U16 ControlFlags; /* 08h */
+ U16 MaxNumSATATargets; /* 0Ah */
+ U32 Reserved1; /* 0Ch */
+ U8 NumPhys; /* 10h */
+ U8 SATAMaxQDepth; /* 11h */
+ U16 Reserved2; /* 12h */
+ MPI_SAS_IO_UNIT1_PHY_DATA PhyData[MPI_SAS_IOUNIT1_PHY_MAX]; /* 14h */
+} CONFIG_PAGE_SAS_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_1,
+ SasIOUnitPage1_t, MPI_POINTER pSasIOUnitPage1_t;
+
+#define MPI_SASIOUNITPAGE1_PAGEVERSION (0x04)
+
+/* values for SAS IO Unit Page 1 ControlFlags */
+#define MPI_SAS_IOUNIT1_CONTROL_DEVICE_SELF_TEST (0x8000)
+#define MPI_SAS_IOUNIT1_CONTROL_SATA_3_0_MAX (0x4000)
+#define MPI_SAS_IOUNIT1_CONTROL_SATA_1_5_MAX (0x2000)
+#define MPI_SAS_IOUNIT1_CONTROL_SATA_SW_PRESERVE (0x1000)
+#define MPI_SAS_IOUNIT1_CONTROL_DISABLE_SAS_HASH (0x0800)
+
+#define MPI_SAS_IOUNIT1_CONTROL_MASK_DEV_SUPPORT (0x0600)
+#define MPI_SAS_IOUNIT1_CONTROL_SHIFT_DEV_SUPPORT (9)
+#define MPI_SAS_IOUNIT1_CONTROL_DEV_SUPPORT_BOTH (0x00)
+#define MPI_SAS_IOUNIT1_CONTROL_DEV_SAS_SUPPORT (0x01)
+#define MPI_SAS_IOUNIT1_CONTROL_DEV_SATA_SUPPORT (0x02)
+
+#define MPI_SAS_IOUNIT1_CONTROL_SATA_48BIT_LBA_REQUIRED (0x0080)
+#define MPI_SAS_IOUNIT1_CONTROL_SATA_SMART_REQUIRED (0x0040)
+#define MPI_SAS_IOUNIT1_CONTROL_SATA_NCQ_REQUIRED (0x0020)
+#define MPI_SAS_IOUNIT1_CONTROL_SATA_FUA_REQUIRED (0x0010)
+#define MPI_SAS_IOUNIT1_CONTROL_PHY_ENABLE_ORDER_HIGH (0x0008)
+#define MPI_SAS_IOUNIT1_CONTROL_SUBTRACTIVE_ILLEGAL (0x0004)
+#define MPI_SAS_IOUNIT1_CONTROL_FIRST_LVL_DISC_ONLY (0x0002)
+#define MPI_SAS_IOUNIT1_CONTROL_CLEAR_AFFILIATION (0x0001)
+
+/* values for SAS IO Unit Page 1 PortFlags */
+#define MPI_SAS_IOUNIT1_PORT_FLAGS_0_TARGET_IOC_NUM (0x00)
+#define MPI_SAS_IOUNIT1_PORT_FLAGS_1_TARGET_IOC_NUM (0x04)
+#define MPI_SAS_IOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG (0x01)
+
+/* values for SAS IO Unit Page 0 PhyFlags */
+#define MPI_SAS_IOUNIT1_PHY_FLAGS_PHY_DISABLE (0x04)
+#define MPI_SAS_IOUNIT1_PHY_FLAGS_TX_INVERT (0x02)
+#define MPI_SAS_IOUNIT1_PHY_FLAGS_RX_INVERT (0x01)
+
+/* values for SAS IO Unit Page 0 MaxMinLinkRate */
+#define MPI_SAS_IOUNIT1_MAX_RATE_MASK (0xF0)
+#define MPI_SAS_IOUNIT1_MAX_RATE_1_5 (0x80)
+#define MPI_SAS_IOUNIT1_MAX_RATE_3_0 (0x90)
+#define MPI_SAS_IOUNIT1_MIN_RATE_MASK (0x0F)
+#define MPI_SAS_IOUNIT1_MIN_RATE_1_5 (0x08)
+#define MPI_SAS_IOUNIT1_MIN_RATE_3_0 (0x09)
+
+/* see mpi_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */
+
+
+typedef struct _CONFIG_PAGE_SAS_IO_UNIT_2
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U8 NumDevsPerEnclosure; /* 08h */
+ U8 Reserved1; /* 09h */
+ U16 Reserved2; /* 0Ah */
+ U16 MaxPersistentIDs; /* 0Ch */
+ U16 NumPersistentIDsUsed; /* 0Eh */
+ U8 Status; /* 10h */
+ U8 Flags; /* 11h */
+ U16 MaxNumPhysicalMappedIDs;/* 12h */
+} CONFIG_PAGE_SAS_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_2,
+ SasIOUnitPage2_t, MPI_POINTER pSasIOUnitPage2_t;
+
+#define MPI_SASIOUNITPAGE2_PAGEVERSION (0x05)
+
+/* values for SAS IO Unit Page 2 Status field */
+#define MPI_SAS_IOUNIT2_STATUS_DISABLED_PERSISTENT_MAPPINGS (0x02)
+#define MPI_SAS_IOUNIT2_STATUS_FULL_PERSISTENT_MAPPINGS (0x01)
+
+/* values for SAS IO Unit Page 2 Flags field */
+#define MPI_SAS_IOUNIT2_FLAGS_DISABLE_PERSISTENT_MAPPINGS (0x01)
+/* Physical Mapping Modes */
+#define MPI_SAS_IOUNIT2_FLAGS_MASK_PHYS_MAP_MODE (0x0E)
+#define MPI_SAS_IOUNIT2_FLAGS_SHIFT_PHYS_MAP_MODE (1)
+#define MPI_SAS_IOUNIT2_FLAGS_NO_PHYS_MAP (0x00)
+#define MPI_SAS_IOUNIT2_FLAGS_DIRECT_ATTACH_PHYS_MAP (0x01)
+#define MPI_SAS_IOUNIT2_FLAGS_ENCLOSURE_SLOT_PHYS_MAP (0x02)
+#define MPI_SAS_IOUNIT2_FLAGS_HOST_ASSIGNED_PHYS_MAP (0x07)
+
+#define MPI_SAS_IOUNIT2_FLAGS_RESERVE_ID_0_FOR_BOOT (0x10)
+#define MPI_SAS_IOUNIT2_FLAGS_DA_STARTING_SLOT (0x20)
+
+
+typedef struct _CONFIG_PAGE_SAS_IO_UNIT_3
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U32 Reserved1; /* 08h */
+ U32 MaxInvalidDwordCount; /* 0Ch */
+ U32 InvalidDwordCountTime; /* 10h */
+ U32 MaxRunningDisparityErrorCount; /* 14h */
+ U32 RunningDisparityErrorTime; /* 18h */
+ U32 MaxLossDwordSynchCount; /* 1Ch */
+ U32 LossDwordSynchCountTime; /* 20h */
+ U32 MaxPhyResetProblemCount; /* 24h */
+ U32 PhyResetProblemTime; /* 28h */
+} CONFIG_PAGE_SAS_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_SAS_IO_UNIT_3,
+ SasIOUnitPage3_t, MPI_POINTER pSasIOUnitPage3_t;
+
+#define MPI_SASIOUNITPAGE3_PAGEVERSION (0x00)
+
+
+/****************************************************************************
+* SAS Expander Config Pages
+****************************************************************************/
+
+typedef struct _CONFIG_PAGE_SAS_EXPANDER_0
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U8 PhysicalPort; /* 08h */
+ U8 Reserved1; /* 09h */
+ U16 EnclosureHandle; /* 0Ah */
+ U64 SASAddress; /* 0Ch */
+ U32 DiscoveryStatus; /* 14h */
+ U16 DevHandle; /* 18h */
+ U16 ParentDevHandle; /* 1Ah */
+ U16 ExpanderChangeCount; /* 1Ch */
+ U16 ExpanderRouteIndexes; /* 1Eh */
+ U8 NumPhys; /* 20h */
+ U8 SASLevel; /* 21h */
+ U8 Flags; /* 22h */
+ U8 Reserved3; /* 23h */
+} CONFIG_PAGE_SAS_EXPANDER_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_EXPANDER_0,
+ SasExpanderPage0_t, MPI_POINTER pSasExpanderPage0_t;
+
+#define MPI_SASEXPANDER0_PAGEVERSION (0x03)
+
+/* values for SAS Expander Page 0 DiscoveryStatus field */
+#define MPI_SAS_EXPANDER0_DS_LOOP_DETECTED (0x00000001)
+#define MPI_SAS_EXPANDER0_DS_UNADDRESSABLE_DEVICE (0x00000002)
+#define MPI_SAS_EXPANDER0_DS_MULTIPLE_PORTS (0x00000004)
+#define MPI_SAS_EXPANDER0_DS_EXPANDER_ERR (0x00000008)
+#define MPI_SAS_EXPANDER0_DS_SMP_TIMEOUT (0x00000010)
+#define MPI_SAS_EXPANDER0_DS_OUT_ROUTE_ENTRIES (0x00000020)
+#define MPI_SAS_EXPANDER0_DS_INDEX_NOT_EXIST (0x00000040)
+#define MPI_SAS_EXPANDER0_DS_SMP_FUNCTION_FAILED (0x00000080)
+#define MPI_SAS_EXPANDER0_DS_SMP_CRC_ERROR (0x00000100)
+#define MPI_SAS_EXPANDER0_DS_SUBTRACTIVE_LINK (0x00000200)
+#define MPI_SAS_EXPANDER0_DS_TABLE_LINK (0x00000400)
+#define MPI_SAS_EXPANDER0_DS_UNSUPPORTED_DEVICE (0x00000800)
+
+/* values for SAS Expander Page 0 Flags field */
+#define MPI_SAS_EXPANDER0_FLAGS_ROUTE_TABLE_CONFIG (0x02)
+#define MPI_SAS_EXPANDER0_FLAGS_CONFIG_IN_PROGRESS (0x01)
+
+
+typedef struct _CONFIG_PAGE_SAS_EXPANDER_1
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U8 PhysicalPort; /* 08h */
+ U8 Reserved1; /* 09h */
+ U16 Reserved2; /* 0Ah */
+ U8 NumPhys; /* 0Ch */
+ U8 Phy; /* 0Dh */
+ U16 NumTableEntriesProgrammed; /* 0Eh */
+ U8 ProgrammedLinkRate; /* 10h */
+ U8 HwLinkRate; /* 11h */
+ U16 AttachedDevHandle; /* 12h */
+ U32 PhyInfo; /* 14h */
+ U32 AttachedDeviceInfo; /* 18h */
+ U16 OwnerDevHandle; /* 1Ch */
+ U8 ChangeCount; /* 1Eh */
+ U8 NegotiatedLinkRate; /* 1Fh */
+ U8 PhyIdentifier; /* 20h */
+ U8 AttachedPhyIdentifier; /* 21h */
+ U8 Reserved3; /* 22h */
+ U8 DiscoveryInfo; /* 23h */
+ U32 Reserved4; /* 24h */
+} CONFIG_PAGE_SAS_EXPANDER_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_EXPANDER_1,
+ SasExpanderPage1_t, MPI_POINTER pSasExpanderPage1_t;
+
+#define MPI_SASEXPANDER1_PAGEVERSION (0x01)
+
+/* use MPI_SAS_PHY0_PRATE_ defines for ProgrammedLinkRate */
+
+/* use MPI_SAS_PHY0_HWRATE_ defines for HwLinkRate */
+
+/* use MPI_SAS_PHY0_PHYINFO_ defines for PhyInfo */
+
+/* see mpi_sas.h for values for SAS Expander Page 1 AttachedDeviceInfo values */
+
+/* values for SAS Expander Page 1 DiscoveryInfo field */
+#define MPI_SAS_EXPANDER1_DISCINFO_BAD_PHY DISABLED (0x04)
+#define MPI_SAS_EXPANDER1_DISCINFO_LINK_STATUS_CHANGE (0x02)
+#define MPI_SAS_EXPANDER1_DISCINFO_NO_ROUTING_ENTRIES (0x01)
+
+/* values for SAS Expander Page 1 NegotiatedLinkRate field */
+#define MPI_SAS_EXPANDER1_NEG_RATE_UNKNOWN (0x00)
+#define MPI_SAS_EXPANDER1_NEG_RATE_PHY_DISABLED (0x01)
+#define MPI_SAS_EXPANDER1_NEG_RATE_FAILED_NEGOTIATION (0x02)
+#define MPI_SAS_EXPANDER1_NEG_RATE_SATA_OOB_COMPLETE (0x03)
+#define MPI_SAS_EXPANDER1_NEG_RATE_1_5 (0x08)
+#define MPI_SAS_EXPANDER1_NEG_RATE_3_0 (0x09)
+
+
+/****************************************************************************
+* SAS Device Config Pages
+****************************************************************************/
+
+typedef struct _CONFIG_PAGE_SAS_DEVICE_0
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U16 Slot; /* 08h */
+ U16 EnclosureHandle; /* 0Ah */
+ U64 SASAddress; /* 0Ch */
+ U16 ParentDevHandle; /* 14h */
+ U8 PhyNum; /* 16h */
+ U8 AccessStatus; /* 17h */
+ U16 DevHandle; /* 18h */
+ U8 TargetID; /* 1Ah */
+ U8 Bus; /* 1Bh */
+ U32 DeviceInfo; /* 1Ch */
+ U16 Flags; /* 20h */
+ U8 PhysicalPort; /* 22h */
+ U8 Reserved2; /* 23h */
+} CONFIG_PAGE_SAS_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_0,
+ SasDevicePage0_t, MPI_POINTER pSasDevicePage0_t;
+
+#define MPI_SASDEVICE0_PAGEVERSION (0x04)
+
+/* values for SAS Device Page 0 AccessStatus field */
+#define MPI_SAS_DEVICE0_ASTATUS_NO_ERRORS (0x00)
+#define MPI_SAS_DEVICE0_ASTATUS_SATA_INIT_FAILED (0x01)
+#define MPI_SAS_DEVICE0_ASTATUS_SATA_CAPABILITY_FAILED (0x02)
+
+/* values for SAS Device Page 0 Flags field */
+#define MPI_SAS_DEVICE0_FLAGS_SATA_SW_PRESERVE (0x0200)
+#define MPI_SAS_DEVICE0_FLAGS_UNSUPPORTED_DEVICE (0x0100)
+#define MPI_SAS_DEVICE0_FLAGS_SATA_48BIT_LBA_SUPPORTED (0x0080)
+#define MPI_SAS_DEVICE0_FLAGS_SATA_SMART_SUPPORTED (0x0040)
+#define MPI_SAS_DEVICE0_FLAGS_SATA_NCQ_SUPPORTED (0x0020)
+#define MPI_SAS_DEVICE0_FLAGS_SATA_FUA_SUPPORTED (0x0010)
+#define MPI_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH (0x0008)
+#define MPI_SAS_DEVICE0_FLAGS_MAPPING_PERSISTENT (0x0004)
+#define MPI_SAS_DEVICE0_FLAGS_DEVICE_MAPPED (0x0002)
+#define MPI_SAS_DEVICE0_FLAGS_DEVICE_PRESENT (0x0001)
+
+/* see mpi_sas.h for values for SAS Device Page 0 DeviceInfo values */
+
+
+typedef struct _CONFIG_PAGE_SAS_DEVICE_1
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U32 Reserved1; /* 08h */
+ U64 SASAddress; /* 0Ch */
+ U32 Reserved2; /* 14h */
+ U16 DevHandle; /* 18h */
+ U8 TargetID; /* 1Ah */
+ U8 Bus; /* 1Bh */
+ U8 InitialRegDeviceFIS[20];/* 1Ch */
+} CONFIG_PAGE_SAS_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_1,
+ SasDevicePage1_t, MPI_POINTER pSasDevicePage1_t;
+
+#define MPI_SASDEVICE1_PAGEVERSION (0x00)
+
+
+typedef struct _CONFIG_PAGE_SAS_DEVICE_2
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U64 PhysicalIdentifier; /* 08h */
+ U32 EnclosureMapping; /* 10h */
+} CONFIG_PAGE_SAS_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SAS_DEVICE_2,
+ SasDevicePage2_t, MPI_POINTER pSasDevicePage2_t;
+
+#define MPI_SASDEVICE2_PAGEVERSION (0x01)
+
+/* defines for SAS Device Page 2 EnclosureMapping field */
+#define MPI_SASDEVICE2_ENC_MAP_MASK_MISSING_COUNT (0x0000000F)
+#define MPI_SASDEVICE2_ENC_MAP_SHIFT_MISSING_COUNT (0)
+#define MPI_SASDEVICE2_ENC_MAP_MASK_NUM_SLOTS (0x000007F0)
+#define MPI_SASDEVICE2_ENC_MAP_SHIFT_NUM_SLOTS (4)
+#define MPI_SASDEVICE2_ENC_MAP_MASK_START_INDEX (0x001FF800)
+#define MPI_SASDEVICE2_ENC_MAP_SHIFT_START_INDEX (11)
+
+
+/****************************************************************************
+* SAS PHY Config Pages
+****************************************************************************/
+
+typedef struct _CONFIG_PAGE_SAS_PHY_0
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U16 OwnerDevHandle; /* 08h */
+ U16 Reserved1; /* 0Ah */
+ U64 SASAddress; /* 0Ch */
+ U16 AttachedDevHandle; /* 14h */
+ U8 AttachedPhyIdentifier; /* 16h */
+ U8 Reserved2; /* 17h */
+ U32 AttachedDeviceInfo; /* 18h */
+ U8 ProgrammedLinkRate; /* 20h */
+ U8 HwLinkRate; /* 21h */
+ U8 ChangeCount; /* 22h */
+ U8 Flags; /* 23h */
+ U32 PhyInfo; /* 24h */
+} CONFIG_PAGE_SAS_PHY_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_PHY_0,
+ SasPhyPage0_t, MPI_POINTER pSasPhyPage0_t;
+
+#define MPI_SASPHY0_PAGEVERSION (0x01)
+
+/* values for SAS PHY Page 0 ProgrammedLinkRate field */
+#define MPI_SAS_PHY0_PRATE_MAX_RATE_MASK (0xF0)
+#define MPI_SAS_PHY0_PRATE_MAX_RATE_NOT_PROGRAMMABLE (0x00)
+#define MPI_SAS_PHY0_PRATE_MAX_RATE_1_5 (0x80)
+#define MPI_SAS_PHY0_PRATE_MAX_RATE_3_0 (0x90)
+#define MPI_SAS_PHY0_PRATE_MIN_RATE_MASK (0x0F)
+#define MPI_SAS_PHY0_PRATE_MIN_RATE_NOT_PROGRAMMABLE (0x00)
+#define MPI_SAS_PHY0_PRATE_MIN_RATE_1_5 (0x08)
+#define MPI_SAS_PHY0_PRATE_MIN_RATE_3_0 (0x09)
+
+/* values for SAS PHY Page 0 HwLinkRate field */
+#define MPI_SAS_PHY0_HWRATE_MAX_RATE_MASK (0xF0)
+#define MPI_SAS_PHY0_HWRATE_MAX_RATE_1_5 (0x80)
+#define MPI_SAS_PHY0_HWRATE_MAX_RATE_3_0 (0x90)
+#define MPI_SAS_PHY0_HWRATE_MIN_RATE_MASK (0x0F)
+#define MPI_SAS_PHY0_HWRATE_MIN_RATE_1_5 (0x08)
+#define MPI_SAS_PHY0_HWRATE_MIN_RATE_3_0 (0x09)
+
+/* values for SAS PHY Page 0 Flags field */
+#define MPI_SAS_PHY0_FLAGS_SGPIO_DIRECT_ATTACH_ENC (0x01)
+
+/* values for SAS PHY Page 0 PhyInfo field */
+#define MPI_SAS_PHY0_PHYINFO_SATA_PORT_ACTIVE (0x00004000)
+#define MPI_SAS_PHY0_PHYINFO_SATA_PORT_SELECTOR (0x00002000)
+#define MPI_SAS_PHY0_PHYINFO_VIRTUAL_PHY (0x00001000)
+
+#define MPI_SAS_PHY0_PHYINFO_MASK_PARTIAL_PATHWAY_TIME (0x00000F00)
+#define MPI_SAS_PHY0_PHYINFO_SHIFT_PARTIAL_PATHWAY_TIME (8)
+
+#define MPI_SAS_PHY0_PHYINFO_MASK_ROUTING_ATTRIBUTE (0x000000F0)
+#define MPI_SAS_PHY0_PHYINFO_DIRECT_ROUTING (0x00000000)
+#define MPI_SAS_PHY0_PHYINFO_SUBTRACTIVE_ROUTING (0x00000010)
+#define MPI_SAS_PHY0_PHYINFO_TABLE_ROUTING (0x00000020)
+
+#define MPI_SAS_PHY0_PHYINFO_MASK_LINK_RATE (0x0000000F)
+#define MPI_SAS_PHY0_PHYINFO_UNKNOWN_LINK_RATE (0x00000000)
+#define MPI_SAS_PHY0_PHYINFO_PHY_DISABLED (0x00000001)
+#define MPI_SAS_PHY0_PHYINFO_NEGOTIATION_FAILED (0x00000002)
+#define MPI_SAS_PHY0_PHYINFO_SATA_OOB_COMPLETE (0x00000003)
+#define MPI_SAS_PHY0_PHYINFO_RATE_1_5 (0x00000008)
+#define MPI_SAS_PHY0_PHYINFO_RATE_3_0 (0x00000009)
+
+
+typedef struct _CONFIG_PAGE_SAS_PHY_1
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U32 Reserved1; /* 08h */
+ U32 InvalidDwordCount; /* 0Ch */
+ U32 RunningDisparityErrorCount; /* 10h */
+ U32 LossDwordSynchCount; /* 14h */
+ U32 PhyResetProblemCount; /* 18h */
+} CONFIG_PAGE_SAS_PHY_1, MPI_POINTER PTR_CONFIG_PAGE_SAS_PHY_1,
+ SasPhyPage1_t, MPI_POINTER pSasPhyPage1_t;
+
+#define MPI_SASPHY1_PAGEVERSION (0x00)
+
+
+/****************************************************************************
+* SAS Enclosure Config Pages
+****************************************************************************/
+
+typedef struct _CONFIG_PAGE_SAS_ENCLOSURE_0
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U32 Reserved1; /* 08h */
+ U64 EnclosureLogicalID; /* 0Ch */
+ U16 Flags; /* 14h */
+ U16 EnclosureHandle; /* 16h */
+ U16 NumSlots; /* 18h */
+ U16 StartSlot; /* 1Ah */
+ U8 StartTargetID; /* 1Ch */
+ U8 StartBus; /* 1Dh */
+ U8 SEPTargetID; /* 1Eh */
+ U8 SEPBus; /* 1Fh */
+ U32 Reserved2; /* 20h */
+ U32 Reserved3; /* 24h */
+} CONFIG_PAGE_SAS_ENCLOSURE_0, MPI_POINTER PTR_CONFIG_PAGE_SAS_ENCLOSURE_0,
+ SasEnclosurePage0_t, MPI_POINTER pSasEnclosurePage0_t;
+
+#define MPI_SASENCLOSURE0_PAGEVERSION (0x01)
+
+/* values for SAS Enclosure Page 0 Flags field */
+#define MPI_SAS_ENCLS0_FLAGS_SEP_BUS_ID_VALID (0x0020)
+#define MPI_SAS_ENCLS0_FLAGS_START_BUS_ID_VALID (0x0010)
+
+#define MPI_SAS_ENCLS0_FLAGS_MNG_MASK (0x000F)
+#define MPI_SAS_ENCLS0_FLAGS_MNG_UNKNOWN (0x0000)
+#define MPI_SAS_ENCLS0_FLAGS_MNG_IOC_SES (0x0001)
+#define MPI_SAS_ENCLS0_FLAGS_MNG_IOC_SGPIO (0x0002)
+#define MPI_SAS_ENCLS0_FLAGS_MNG_EXP_SGPIO (0x0003)
+#define MPI_SAS_ENCLS0_FLAGS_MNG_SES_ENCLOSURE (0x0004)
+#define MPI_SAS_ENCLS0_FLAGS_MNG_IOC_GPIO (0x0005)
+
+
+/****************************************************************************
+* Log Config Pages
+****************************************************************************/
+/*
+ * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
+ * one and check NumLogEntries at runtime.
+ */
+#ifndef MPI_LOG_0_NUM_LOG_ENTRIES
+#define MPI_LOG_0_NUM_LOG_ENTRIES (1)
+#endif
+
+#define MPI_LOG_0_LOG_DATA_LENGTH (20)
+
+typedef struct _MPI_LOG_0_ENTRY
+{
+ U64 WWID; /* 00h */
+ U32 TimeStamp; /* 08h */
+ U32 Reserved1; /* 0Ch */
+ U16 LogSequence; /* 10h */
+ U16 LogEntryQualifier; /* 12h */
+ U8 LogData[MPI_LOG_0_LOG_DATA_LENGTH]; /* 14h */
+} MPI_LOG_0_ENTRY, MPI_POINTER PTR_MPI_LOG_0_ENTRY,
+ MpiLog0Entry_t, MPI_POINTER pMpiLog0Entry_t;
+
+/* values for Log Page 0 LogEntry LogEntryQualifier field */
+#define MPI_LOG_0_ENTRY_QUAL_ENTRY_UNUSED (0x0000)
+#define MPI_LOG_0_ENTRY_QUAL_POWER_ON_RESET (0x0001)
+
+typedef struct _CONFIG_PAGE_LOG_0
+{
+ CONFIG_EXTENDED_PAGE_HEADER Header; /* 00h */
+ U32 Reserved1; /* 08h */
+ U32 Reserved2; /* 0Ch */
+ U16 NumLogEntries; /* 10h */
+ U16 Reserved3; /* 12h */
+ MPI_LOG_0_ENTRY LogEntry[MPI_LOG_0_NUM_LOG_ENTRIES]; /* 14h */
+} CONFIG_PAGE_LOG_0, MPI_POINTER PTR_CONFIG_PAGE_LOG_0,
+ LogPage0_t, MPI_POINTER pLogPage0_t;
+
+#define MPI_LOG_0_PAGEVERSION (0x00)
+
+
#endif
diff --git a/sys/dev/mpt/mpilib/mpi_fc.h b/sys/dev/mpt/mpilib/mpi_fc.h
index 4067fc3..b50a332 100644
--- a/sys/dev/mpt/mpilib/mpi_fc.h
+++ b/sys/dev/mpt/mpilib/mpi_fc.h
@@ -28,13 +28,13 @@
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
* OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *
- * Name: MPI_FC.H
+ *
+ *
+ * Name: mpi_fc.h
* Title: MPI Fibre Channel messages and structures
* Creation Date: June 12, 2000
*
- * MPI_FC.H Version: 01.02.04
+ * mpi_fc.h Version: 01.05.01
*
* Version History
* ---------------
@@ -65,6 +65,8 @@
* MSG_LINK_SERVICE_RSP_REPLY.
* 05-31-02 01.02.03 Adding AliasIndex to FC Direct Access requests.
* 01-16-04 01.02.04 Added define for MPI_FC_PRIM_SEND_FLAGS_ML_RESET_LINK.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
*/
@@ -74,7 +76,7 @@
/*****************************************************************************
*
-* F C T a r g e t M o d e M e s s a g e s
+* F C D i r e c t A c c e s s M e s s a g e s
*
*****************************************************************************/
diff --git a/sys/dev/mpt/mpilib/mpi_inb.h b/sys/dev/mpt/mpilib/mpi_inb.h
new file mode 100644
index 0000000..9239ecf
--- /dev/null
+++ b/sys/dev/mpt/mpilib/mpi_inb.h
@@ -0,0 +1,250 @@
+/* $FreeBSD$ */
+/*-
+ * Copyright (c) 2000-2005, LSI Logic Corporation and its contributors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce at minimum a disclaimer
+ * substantially similar to the "NO WARRANTY" disclaimer below
+ * ("Disclaimer") and any redistribution must be conditioned upon including
+ * a substantially similar Disclaimer requirement for further binary
+ * redistribution.
+ * 3. Neither the name of the LSI Logic Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
+ * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+/*
+ * Copyright (c) 2003-2004 LSI Logic Corporation.
+ *
+ *
+ * Name: mpi_inb.h
+ * Title: MPI Inband structures and definitions
+ * Creation Date: September 30, 2003
+ *
+ * mpi_inb.h Version: 01.05.01
+ *
+ * Version History
+ * ---------------
+ *
+ * Date Version Description
+ * -------- -------- ------------------------------------------------------
+ * 05-11-04 01.03.01 Original release.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
+ * --------------------------------------------------------------------------
+ */
+
+#ifndef MPI_INB_H
+#define MPI_INB_H
+
+/******************************************************************************
+*
+* I n b a n d M e s s a g e s
+*
+*******************************************************************************/
+
+
+/****************************************************************************/
+/* Inband Buffer Post Request */
+/****************************************************************************/
+
+typedef struct _MSG_INBAND_BUFFER_POST_REQUEST
+{
+ U8 Reserved1; /* 00h */
+ U8 BufferCount; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved2; /* 04h */
+ U8 Reserved3; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 Reserved4; /* 0Ch */
+ SGE_TRANS_SIMPLE_UNION SGL; /* 10h */
+} MSG_INBAND_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_INBAND_BUFFER_POST_REQUEST,
+ MpiInbandBufferPostRequest_t , MPI_POINTER pMpiInbandBufferPostRequest_t;
+
+
+typedef struct _WWN_FC_FORMAT
+{
+ U64 NodeName; /* 00h */
+ U64 PortName; /* 08h */
+} WWN_FC_FORMAT, MPI_POINTER PTR_WWN_FC_FORMAT,
+ WwnFcFormat_t, MPI_POINTER pWwnFcFormat_t;
+
+typedef struct _WWN_SAS_FORMAT
+{
+ U64 WorldWideID; /* 00h */
+ U32 Reserved1; /* 08h */
+ U32 Reserved2; /* 0Ch */
+} WWN_SAS_FORMAT, MPI_POINTER PTR_WWN_SAS_FORMAT,
+ WwnSasFormat_t, MPI_POINTER pWwnSasFormat_t;
+
+typedef union _WWN_INBAND_FORMAT
+{
+ WWN_FC_FORMAT Fc;
+ WWN_SAS_FORMAT Sas;
+} WWN_INBAND_FORMAT, MPI_POINTER PTR_WWN_INBAND_FORMAT,
+ WwnInbandFormat, MPI_POINTER pWwnInbandFormat;
+
+
+/* Inband Buffer Post reply message */
+
+typedef struct _MSG_INBAND_BUFFER_POST_REPLY
+{
+ U16 Reserved1; /* 00h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved2; /* 04h */
+ U8 Reserved3; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U16 Reserved4; /* 0Ch */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+ U32 TransferLength; /* 14h */
+ U32 TransactionContext; /* 18h */
+ WWN_INBAND_FORMAT Wwn; /* 1Ch */
+ U32 IOCIdentifier[4]; /* 2Ch */
+} MSG_INBAND_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_INBAND_BUFFER_POST_REPLY,
+ MpiInbandBufferPostReply_t, MPI_POINTER pMpiInbandBufferPostReply_t;
+
+
+/****************************************************************************/
+/* Inband Send Request */
+/****************************************************************************/
+
+typedef struct _MSG_INBAND_SEND_REQUEST
+{
+ U16 Reserved1; /* 00h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved2; /* 04h */
+ U8 Reserved3; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 Reserved4; /* 0Ch */
+ WWN_INBAND_FORMAT Wwn; /* 10h */
+ U32 Reserved5; /* 20h */
+ SGE_IO_UNION SGL; /* 24h */
+} MSG_INBAND_SEND_REQUEST, MPI_POINTER PTR_MSG_INBAND_SEND_REQUEST,
+ MpiInbandSendRequest_t , MPI_POINTER pMpiInbandSendRequest_t;
+
+
+/* Inband Send reply message */
+
+typedef struct _MSG_INBAND_SEND_REPLY
+{
+ U16 Reserved1; /* 00h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved2; /* 04h */
+ U8 Reserved3; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U16 Reserved4; /* 0Ch */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+ U32 ResponseLength; /* 14h */
+} MSG_INBAND_SEND_REPLY, MPI_POINTER PTR_MSG_INBAND_SEND_REPLY,
+ MpiInbandSendReply_t, MPI_POINTER pMpiInbandSendReply_t;
+
+
+/****************************************************************************/
+/* Inband Response Request */
+/****************************************************************************/
+
+typedef struct _MSG_INBAND_RSP_REQUEST
+{
+ U16 Reserved1; /* 00h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved2; /* 04h */
+ U8 Reserved3; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 Reserved4; /* 0Ch */
+ WWN_INBAND_FORMAT Wwn; /* 10h */
+ U32 IOCIdentifier[4]; /* 20h */
+ U32 ResponseLength; /* 30h */
+ SGE_IO_UNION SGL; /* 34h */
+} MSG_INBAND_RSP_REQUEST, MPI_POINTER PTR_MSG_INBAND_RSP_REQUEST,
+ MpiInbandRspRequest_t , MPI_POINTER pMpiInbandRspRequest_t;
+
+
+/* Inband Response reply message */
+
+typedef struct _MSG_INBAND_RSP_REPLY
+{
+ U16 Reserved1; /* 00h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved2; /* 04h */
+ U8 Reserved3; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U16 Reserved4; /* 0Ch */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+} MSG_INBAND_RSP_REPLY, MPI_POINTER PTR_MSG_INBAND_RSP_REPLY,
+ MpiInbandRspReply_t, MPI_POINTER pMpiInbandRspReply_t;
+
+
+/****************************************************************************/
+/* Inband Abort Request */
+/****************************************************************************/
+
+typedef struct _MSG_INBAND_ABORT_REQUEST
+{
+ U8 Reserved1; /* 00h */
+ U8 AbortType; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved2; /* 04h */
+ U8 Reserved3; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 Reserved4; /* 0Ch */
+ U32 ContextToAbort; /* 10h */
+} MSG_INBAND_ABORT_REQUEST, MPI_POINTER PTR_MSG_INBAND_ABORT_REQUEST,
+ MpiInbandAbortRequest_t , MPI_POINTER pMpiInbandAbortRequest_t;
+
+#define MPI_INBAND_ABORT_TYPE_ALL_BUFFERS (0x00)
+#define MPI_INBAND_ABORT_TYPE_EXACT_BUFFER (0x01)
+#define MPI_INBAND_ABORT_TYPE_SEND_REQUEST (0x02)
+#define MPI_INBAND_ABORT_TYPE_RESPONSE_REQUEST (0x03)
+
+
+/* Inband Abort reply message */
+
+typedef struct _MSG_INBAND_ABORT_REPLY
+{
+ U8 Reserved1; /* 00h */
+ U8 AbortType; /* 01h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved2; /* 04h */
+ U8 Reserved3; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U16 Reserved4; /* 0Ch */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+} MSG_INBAND_ABORT_REPLY, MPI_POINTER PTR_MSG_INBAND_ABORT_REPLY,
+ MpiInbandAbortReply_t, MPI_POINTER pMpiInbandAbortReply_t;
+
+
+#endif
diff --git a/sys/dev/mpt/mpilib/mpi_init.h b/sys/dev/mpt/mpilib/mpi_init.h
index a3dfa42..e44e48a 100644
--- a/sys/dev/mpt/mpilib/mpi_init.h
+++ b/sys/dev/mpt/mpilib/mpi_init.h
@@ -28,13 +28,12 @@
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
* OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *
- * Name: MPI_INIT.H
+ *
+ * Name: mpi_init.h
* Title: MPI initiator mode messages and structures
* Creation Date: June 8, 2000
*
- * MPI_INIT.H Version: 01.02.07
+ * mpi_init.h Version: 01.05.06
*
* Version History
* ---------------
@@ -61,6 +60,25 @@
* for SCSI IO requests.
* 11-15-02 01.02.06 Added special extended SCSI Status defines for FCP.
* 06-26-03 01.02.07 Added MPI_SCSI_STATUS_FCPEXT_UNASSIGNED define.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Added MsgFlags defines for EEDP to SCSI IO request.
+ * Added new word to MSG_SCSI_IO_REPLY to add TaskTag field
+ * and a reserved U16.
+ * Added new MSG_SCSI_IO32_REQUEST structure.
+ * Added a TaskType of Clear Task Set to SCSI
+ * Task Management request.
+ * 12-07-04 01.05.02 Added support for Task Management Query Task.
+ * 01-15-05 01.05.03 Modified SCSI Enclosure Processor Request to support
+ * WWID addressing.
+ * 03-11-05 01.05.04 Removed EEDP flags from SCSI IO Request.
+ * Removed SCSI IO 32 Request.
+ * Modified SCSI Enclosure Processor Request and Reply to
+ * support Enclosure/Slot addressing rather than WWID
+ * addressing.
+ * 06-24-05 01.05.05 Added SCSI IO 32 structures and defines.
+ * Added four new defines for SEP SlotStatus.
+ * 08-03-05 01.05.06 Fixed some MPI_SCSIIO32_MSGFLGS_ defines to make them
+ * unique in the first 32 characters.
* --------------------------------------------------------------------------
*/
@@ -75,7 +93,7 @@
*****************************************************************************/
/****************************************************************************/
-/* SCSI IO messages and assocaited structures */
+/* SCSI IO messages and associated structures */
/****************************************************************************/
typedef struct _MSG_SCSI_IO_REQUEST
@@ -104,9 +122,11 @@ typedef struct _MSG_SCSI_IO_REQUEST
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01)
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00)
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01)
+
#define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02)
#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00)
#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02)
+
#define MPI_SCSIIO_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
/* SCSI IO LUN fields */
@@ -166,6 +186,8 @@ typedef struct _MSG_SCSI_IO_REPLY
U32 TransferCount; /* 14h */
U32 SenseCount; /* 18h */
U32 ResponseInfo; /* 1Ch */
+ U16 TaskTag; /* 20h */
+ U16 Reserved1; /* 22h */
} MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY,
SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t;
@@ -208,6 +230,199 @@ typedef struct _MSG_SCSI_IO_REPLY
#define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000)
#define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000)
+#define MPI_SCSI_TASKTAG_UNKNOWN (0xFFFF)
+
+
+/****************************************************************************/
+/* SCSI IO 32 messages and associated structures */
+/****************************************************************************/
+
+typedef struct
+{
+ U8 CDB[20]; /* 00h */
+ U32 PrimaryReferenceTag; /* 14h */
+ U16 PrimaryApplicationTag; /* 18h */
+ U16 PrimaryApplicationTagMask; /* 1Ah */
+ U32 TransferLength; /* 1Ch */
+} MPI_SCSI_IO32_CDB_EEDP32, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP32,
+ MpiScsiIo32CdbEedp32_t, MPI_POINTER pMpiScsiIo32CdbEedp32_t;
+
+typedef struct
+{
+ U8 CDB[16]; /* 00h */
+ U32 DataLength; /* 10h */
+ U32 PrimaryReferenceTag; /* 14h */
+ U16 PrimaryApplicationTag; /* 18h */
+ U16 PrimaryApplicationTagMask; /* 1Ah */
+ U32 TransferLength; /* 1Ch */
+} MPI_SCSI_IO32_CDB_EEDP16, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_EEDP16,
+ MpiScsiIo32CdbEedp16_t, MPI_POINTER pMpiScsiIo32CdbEedp16_t;
+
+typedef union
+{
+ U8 CDB32[32];
+ MPI_SCSI_IO32_CDB_EEDP32 EEDP32;
+ MPI_SCSI_IO32_CDB_EEDP16 EEDP16;
+ SGE_SIMPLE_UNION SGE;
+} MPI_SCSI_IO32_CDB_UNION, MPI_POINTER PTR_MPI_SCSI_IO32_CDB_UNION,
+ MpiScsiIo32Cdb_t, MPI_POINTER pMpiScsiIo32Cdb_t;
+
+typedef struct
+{
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U16 Reserved1; /* 02h */
+ U32 Reserved2; /* 04h */
+} MPI_SCSI_IO32_BUS_TARGET_ID_FORM, MPI_POINTER PTR_MPI_SCSI_IO32_BUS_TARGET_ID_FORM,
+ MpiScsiIo32BusTargetIdForm_t, MPI_POINTER pMpiScsiIo32BusTargetIdForm_t;
+
+typedef union
+{
+ MPI_SCSI_IO32_BUS_TARGET_ID_FORM SCSIID;
+ U64 WWID;
+} MPI_SCSI_IO32_ADDRESS, MPI_POINTER PTR_MPI_SCSI_IO32_ADDRESS,
+ MpiScsiIo32Address_t, MPI_POINTER pMpiScsiIo32Address_t;
+
+typedef struct _MSG_SCSI_IO32_REQUEST
+{
+ U8 Port; /* 00h */
+ U8 Reserved1; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U8 CDBLength; /* 04h */
+ U8 SenseBufferLength; /* 05h */
+ U8 Flags; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 LUN[8]; /* 0Ch */
+ U32 Control; /* 14h */
+ MPI_SCSI_IO32_CDB_UNION CDB; /* 18h */
+ U32 DataLength; /* 38h */
+ U32 BidirectionalDataLength; /* 3Ch */
+ U32 SecondaryReferenceTag; /* 40h */
+ U16 SecondaryApplicationTag; /* 44h */
+ U16 Reserved2; /* 46h */
+ U16 EEDPFlags; /* 48h */
+ U16 ApplicationTagTranslationMask; /* 4Ah */
+ U32 EEDPBlockSize; /* 4Ch */
+ MPI_SCSI_IO32_ADDRESS DeviceAddress; /* 50h */
+ U8 SGLOffset0; /* 58h */
+ U8 SGLOffset1; /* 59h */
+ U8 SGLOffset2; /* 5Ah */
+ U8 SGLOffset3; /* 5Bh */
+ U32 Reserved3; /* 5Ch */
+ U32 Reserved4; /* 60h */
+ U32 SenseBufferLowAddr; /* 64h */
+ SGE_IO_UNION SGL; /* 68h */
+} MSG_SCSI_IO32_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO32_REQUEST,
+ SCSIIO32Request_t, MPI_POINTER pSCSIIO32Request_t;
+
+/* SCSI IO 32 MsgFlags bits */
+#define MPI_SCSIIO32_MSGFLGS_SENSE_WIDTH (0x01)
+#define MPI_SCSIIO32_MSGFLGS_32_SENSE_WIDTH (0x00)
+#define MPI_SCSIIO32_MSGFLGS_64_SENSE_WIDTH (0x01)
+
+#define MPI_SCSIIO32_MSGFLGS_SENSE_LOCATION (0x02)
+#define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_HOST (0x00)
+#define MPI_SCSIIO32_MSGFLGS_SENSE_LOC_IOC (0x02)
+
+#define MPI_SCSIIO32_MSGFLGS_CMD_DETERMINES_DATA_DIR (0x04)
+#define MPI_SCSIIO32_MSGFLGS_SGL_OFFSETS_CHAINS (0x08)
+#define MPI_SCSIIO32_MSGFLGS_MULTICAST (0x10)
+#define MPI_SCSIIO32_MSGFLGS_BIDIRECTIONAL (0x20)
+#define MPI_SCSIIO32_MSGFLGS_LARGE_CDB (0x40)
+
+/* SCSI IO 32 Flags bits */
+#define MPI_SCSIIO32_FLAGS_FORM_MASK (0x03)
+#define MPI_SCSIIO32_FLAGS_FORM_SCSIID (0x00)
+#define MPI_SCSIIO32_FLAGS_FORM_WWID (0x01)
+
+/* SCSI IO 32 LUN fields */
+#define MPI_SCSIIO32_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
+#define MPI_SCSIIO32_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
+#define MPI_SCSIIO32_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
+#define MPI_SCSIIO32_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
+#define MPI_SCSIIO32_LUN_LEVEL_1_WORD (0xFF00)
+#define MPI_SCSIIO32_LUN_LEVEL_1_DWORD (0x0000FF00)
+
+/* SCSI IO 32 Control bits */
+#define MPI_SCSIIO32_CONTROL_DATADIRECTION_MASK (0x03000000)
+#define MPI_SCSIIO32_CONTROL_NODATATRANSFER (0x00000000)
+#define MPI_SCSIIO32_CONTROL_WRITE (0x01000000)
+#define MPI_SCSIIO32_CONTROL_READ (0x02000000)
+#define MPI_SCSIIO32_CONTROL_BIDIRECTIONAL (0x03000000)
+
+#define MPI_SCSIIO32_CONTROL_ADDCDBLEN_MASK (0xFC000000)
+#define MPI_SCSIIO32_CONTROL_ADDCDBLEN_SHIFT (26)
+
+#define MPI_SCSIIO32_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
+#define MPI_SCSIIO32_CONTROL_SIMPLEQ (0x00000000)
+#define MPI_SCSIIO32_CONTROL_HEADOFQ (0x00000100)
+#define MPI_SCSIIO32_CONTROL_ORDEREDQ (0x00000200)
+#define MPI_SCSIIO32_CONTROL_ACAQ (0x00000400)
+#define MPI_SCSIIO32_CONTROL_UNTAGGED (0x00000500)
+#define MPI_SCSIIO32_CONTROL_NO_DISCONNECT (0x00000700)
+
+#define MPI_SCSIIO32_CONTROL_TASKMANAGE_MASK (0x00FF0000)
+#define MPI_SCSIIO32_CONTROL_OBSOLETE (0x00800000)
+#define MPI_SCSIIO32_CONTROL_CLEAR_ACA_RSV (0x00400000)
+#define MPI_SCSIIO32_CONTROL_TARGET_RESET (0x00200000)
+#define MPI_SCSIIO32_CONTROL_LUN_RESET_RSV (0x00100000)
+#define MPI_SCSIIO32_CONTROL_RESERVED (0x00080000)
+#define MPI_SCSIIO32_CONTROL_CLR_TASK_SET_RSV (0x00040000)
+#define MPI_SCSIIO32_CONTROL_ABORT_TASK_SET (0x00020000)
+#define MPI_SCSIIO32_CONTROL_RESERVED2 (0x00010000)
+
+/* SCSI IO 32 EEDPFlags */
+#define MPI_SCSIIO32_EEDPFLAGS_MASK_OP (0x0007)
+#define MPI_SCSIIO32_EEDPFLAGS_NOOP_OP (0x0000)
+#define MPI_SCSIIO32_EEDPFLAGS_CHK_OP (0x0001)
+#define MPI_SCSIIO32_EEDPFLAGS_STRIP_OP (0x0002)
+#define MPI_SCSIIO32_EEDPFLAGS_CHKRM_OP (0x0003)
+#define MPI_SCSIIO32_EEDPFLAGS_INSERT_OP (0x0004)
+#define MPI_SCSIIO32_EEDPFLAGS_REPLACE_OP (0x0006)
+#define MPI_SCSIIO32_EEDPFLAGS_CHKREGEN_OP (0x0007)
+
+#define MPI_SCSIIO32_EEDPFLAGS_PASS_REF_TAG (0x0008)
+#define MPI_SCSIIO32_EEDPFLAGS_8_9THS_MODE (0x0010)
+
+#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_MASK (0x0700)
+#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_GUARD (0x0100)
+#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_REFTAG (0x0200)
+#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_LBATAG (0x0400)
+#define MPI_SCSIIO32_EEDPFLAGS_T10_CHK_SHIFT (8)
+
+#define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
+#define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
+#define MPI_SCSIIO32_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
+#define MPI_SCSIIO32_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
+
+
+/* SCSIIO32 IO reply structure */
+typedef struct _MSG_SCSIIO32_IO_REPLY
+{
+ U8 Port; /* 00h */
+ U8 Reserved1; /* 01h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U8 CDBLength; /* 04h */
+ U8 SenseBufferLength; /* 05h */
+ U8 Flags; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 SCSIStatus; /* 0Ch */
+ U8 SCSIState; /* 0Dh */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+ U32 TransferCount; /* 14h */
+ U32 SenseCount; /* 18h */
+ U32 ResponseInfo; /* 1Ch */
+ U16 TaskTag; /* 20h */
+ U16 Reserved2; /* 22h */
+ U32 BidirectionalTransferCount; /* 24h */
+} MSG_SCSIIO32_IO_REPLY, MPI_POINTER PTR_MSG_SCSIIO32_IO_REPLY,
+ SCSIIO32Reply_t, MPI_POINTER pSCSIIO32Reply_t;
+
/****************************************************************************/
/* SCSI Task Management messages */
@@ -237,6 +452,8 @@ typedef struct _MSG_SCSI_TASK_MGMT
#define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
#define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04)
#define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
+#define MPI_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
+#define MPI_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
/* MsgFlags bits */
#define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00)
@@ -250,7 +467,7 @@ typedef struct _MSG_SCSI_TASK_MGMT_REPLY
U8 Bus; /* 01h */
U8 MsgLength; /* 02h */
U8 Function; /* 03h */
- U8 Reserved; /* 04h */
+ U8 ResponseCode; /* 04h */
U8 TaskType; /* 05h */
U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
@@ -262,6 +479,15 @@ typedef struct _MSG_SCSI_TASK_MGMT_REPLY
} MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY,
SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t;
+/* ResponseCode values */
+#define MPI_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
+#define MPI_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
+#define MPI_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
+#define MPI_SCSITASKMGMT_RSP_TM_FAILED (0x05)
+#define MPI_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
+#define MPI_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
+#define MPI_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
+
/****************************************************************************/
/* SCSI Enclosure Processor messages */
@@ -274,11 +500,16 @@ typedef struct _MSG_SEP_REQUEST
U8 ChainOffset; /* 02h */
U8 Function; /* 03h */
U8 Action; /* 04h */
- U8 Reserved1; /* 05h */
- U8 Reserved2; /* 06h */
+ U8 Flags; /* 05h */
+ U8 Reserved1; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
U32 SlotStatus; /* 0Ch */
+ U32 Reserved2; /* 10h */
+ U32 Reserved3; /* 14h */
+ U32 Reserved4; /* 18h */
+ U16 Slot; /* 1Ch */
+ U16 EnclosureHandle; /* 1Eh */
} MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST,
SEPRequest_t, MPI_POINTER pSEPRequest_t;
@@ -286,6 +517,10 @@ typedef struct _MSG_SEP_REQUEST
#define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00)
#define MPI_SEP_REQ_ACTION_READ_STATUS (0x01)
+/* Flags defines */
+#define MPI_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
+#define MPI_SEP_REQ_FLAGS_BUS_TARGETID_ADDRESS (0x00)
+
/* SlotStatus bits for MSG_SEP_REQUEST */
#define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
#define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
@@ -297,10 +532,14 @@ typedef struct _MSG_SEP_REQUEST
#define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
+#define MPI_SEP_REQ_SLOTSTATUS_REQ_CONSISTENCY_CHECK (0x00001000)
+#define MPI_SEP_REQ_SLOTSTATUS_DISABLE (0x00002000)
+#define MPI_SEP_REQ_SLOTSTATUS_REQ_RESERVED_DEVICE (0x00004000)
#define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000)
#define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000)
+#define MPI_SEP_REQ_SLOTSTATUS_ACTIVE (0x00800000)
#define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
#define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
#define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000)
@@ -322,6 +561,9 @@ typedef struct _MSG_SEP_REPLY
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
U32 SlotStatus; /* 14h */
+ U32 Reserved4; /* 18h */
+ U16 Slot; /* 1Ch */
+ U16 EnclosureHandle; /* 1Eh */
} MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY,
SEPReply_t, MPI_POINTER pSEPReply_t;
@@ -336,11 +578,15 @@ typedef struct _MSG_SEP_REPLY
#define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
+#define MPI_SEP_REPLY_SLOTSTATUS_CONSISTENCY_CHECK (0x00001000)
+#define MPI_SEP_REPLY_SLOTSTATUS_DISABLE (0x00002000)
+#define MPI_SEP_REPLY_SLOTSTATUS_RESERVED_DEVICE (0x00004000)
#define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000)
#define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
#define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000)
#define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000)
+#define MPI_SEP_REPLY_SLOTSTATUS_ACTIVE (0x00800000)
#define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000)
#define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000)
#define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
diff --git a/sys/dev/mpt/mpilib/mpi_ioc.h b/sys/dev/mpt/mpilib/mpi_ioc.h
index 78d20bc..43790ba 100644
--- a/sys/dev/mpt/mpilib/mpi_ioc.h
+++ b/sys/dev/mpt/mpilib/mpi_ioc.h
@@ -28,13 +28,13 @@
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
* OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *
- * Name: MPI_IOC.H
+ *
+ *
+ * Name: mpi_ioc.h
* Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
* Creation Date: August 11, 2000
*
- * MPI_IOC.H Version: 01.02.08
+ * mpi_ioc.h Version: 01.05.09
*
* Version History
* ---------------
@@ -85,6 +85,32 @@
* Added AliasIndex to EVENT_DATA_LOGOUT structure.
* 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_.
* 06-26-03 01.02.08 Added new values to the product family defines.
+ * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
+ * added related defines.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT.
+ * Added three new fields to MSG_IOC_FACTS_REPLY.
+ * Defined four new bits for the IOCCapabilities field of
+ * the IOCFacts reply.
+ * Added two new PortTypes for the PortFacts reply.
+ * Added six new events along with their EventData
+ * structures.
+ * Added a new MsgFlag to the FwDownload request to
+ * indicate last segment.
+ * Defined a new image type of boot loader.
+ * Added FW family codes for SAS product families.
+ * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to
+ * MSG_IOC_FACTS_REPLY.
+ * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event.
+ * 12-09-04 01.05.04 Added Unsupported device to SAS Device event.
+ * 01-15-05 01.05.05 Added event data for SAS SES Event.
+ * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
+ * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts
+ * Reply and IOC Init Request.
+ * 03-11-05 01.05.08 Added family code for 1068E family.
+ * Removed IOCFacts Reply EEDP Capability bit.
+ * 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits.
+ * Added Max SATA Targets to SAS Discovery Error event.
* --------------------------------------------------------------------------
*/
@@ -117,6 +143,10 @@ typedef struct _MSG_IOC_INIT
U8 Reserved1[2]; /* 0Eh */
U32 HostMfaHighAddr; /* 10h */
U32 SenseBufferHighAddr; /* 14h */
+ U32 ReplyFifoHostSignalingAddr; /* 18h */
+ SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */
+ U16 MsgVersion; /* 28h */
+ U16 HeaderVersion; /* 2Ah */
} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
IOCInit_t, MPI_POINTER pIOCInit_t;
@@ -129,8 +159,23 @@ typedef struct _MSG_IOC_INIT
#define MPI_WHOINIT_MANUFACTURER (0x05)
/* Flags values */
+#define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
+#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
+/* MsgVersion */
+#define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
+#define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
+#define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
+#define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
+
+/* HeaderVersion */
+#define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00)
+#define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8)
+#define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF)
+#define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0)
+
+
typedef struct _MSG_IOC_INIT_REPLY
{
U8 WhoInit; /* 00h */
@@ -209,25 +254,48 @@ typedef struct _MSG_IOC_FACTS_REPLY
U8 MaxDevices; /* 2Eh */
U8 MaxBuses; /* 2Fh */
U32 FWImageSize; /* 30h */
- U32 Reserved4; /* 34h */
+ U32 IOCCapabilities; /* 34h */
MPI_FW_VERSION FWVersion; /* 38h */
+ U16 HighPriorityQueueDepth; /* 3Ch */
+ U16 Reserved2; /* 3Eh */
+ SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */
+ U32 ReplyFifoHostSignalingAddr; /* 4Ch */
} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
+#define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
+#define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
-#define MPI_IOCFACTS_HEADERVERSION_UNIT_MASK (0xFF00)
-#define MPI_IOCFACTS_HEADERVERSION_DEV_MASK (0x00FF)
+#define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
+#define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
+#define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
+#define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
+#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
+#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
+#define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
+#define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
+#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
+#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
+#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
+#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
+#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
+#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
+#define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
+#define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080)
+#define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
+#define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200)
+#define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400)
/*****************************************************************************
@@ -283,6 +351,8 @@ typedef struct _MSG_PORT_FACTS_REPLY
#define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)
#define MPI_PORTFACTS_PORTTYPE_SCSI (0x01)
#define MPI_PORTFACTS_PORTTYPE_FC (0x10)
+#define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20)
+#define MPI_PORTFACTS_PORTTYPE_SAS (0x30)
/* ProtocolFlags values */
@@ -416,6 +486,12 @@ typedef struct _MSG_EVENT_ACK_REPLY
#define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
#define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
#define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
+#define MPI_EVENT_QUEUE_FULL (0x0000000E)
+#define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
+#define MPI_EVENT_SAS_SES (0x00000010)
+#define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
+#define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
+#define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
/* AckRequired field values */
@@ -463,6 +539,74 @@ typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
#define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04)
#define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05)
+/* SAS Device Status Change Event data */
+
+typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
+{
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U8 ReasonCode; /* 02h */
+ U8 Reserved; /* 03h */
+ U8 ASC; /* 04h */
+ U8 ASCQ; /* 05h */
+ U16 DevHandle; /* 06h */
+ U32 DeviceInfo; /* 08h */
+ U16 ParentDevHandle; /* 0Ch */
+ U8 PhyNum; /* 0Eh */
+ U8 Reserved1; /* 0Fh */
+ U64 SASAddress; /* 10h */
+} EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
+ MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
+ MpiEventDataSasDeviceStatusChange_t,
+ MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
+
+/* MPI SAS Device Status Change Event data ReasonCode values */
+#define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03)
+#define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
+#define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
+#define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
+#define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
+
+
+/* SCSI Event data for Queue Full event */
+
+typedef struct _EVENT_DATA_QUEUE_FULL
+{
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U16 CurrentDepth; /* 02h */
+} EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
+ EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
+
+/* MPI Integrated RAID Event data */
+
+typedef struct _EVENT_DATA_RAID
+{
+ U8 VolumeID; /* 00h */
+ U8 VolumeBus; /* 01h */
+ U8 ReasonCode; /* 02h */
+ U8 PhysDiskNum; /* 03h */
+ U8 ASC; /* 04h */
+ U8 ASCQ; /* 05h */
+ U16 Reserved; /* 06h */
+ U32 SettingsStatus; /* 08h */
+} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
+ MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
+
+/* MPI Integrated RAID Event data ReasonCode values */
+#define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
+#define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
+#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
+#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
+#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
+#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
+#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
+#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
+#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
+#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
+#define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
+#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
+
/* MPI Link Status Change Event data */
typedef struct _EVENT_DATA_LINK_STATUS
@@ -510,35 +654,64 @@ typedef struct _EVENT_DATA_LOGOUT
#define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF)
+/* SAS SES Event data */
-/* MPI Integrated RAID Event data */
-
-typedef struct _EVENT_DATA_RAID
+typedef struct _EVENT_DATA_SAS_SES
{
- U8 VolumeID; /* 00h */
- U8 VolumeBus; /* 01h */
- U8 ReasonCode; /* 02h */
- U8 PhysDiskNum; /* 03h */
- U8 ASC; /* 04h */
- U8 ASCQ; /* 05h */
- U16 Reserved; /* 06h */
- U32 SettingsStatus; /* 08h */
-} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
- MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
+ U8 PhyNum; /* 00h */
+ U8 Port; /* 01h */
+ U8 PortWidth; /* 02h */
+ U8 Reserved1; /* 04h */
+} EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
+ MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
-/* MPI Integrated RAID Event data ReasonCode values */
-#define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
-#define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
-#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
-#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
-#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
-#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
-#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
-#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
-#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
-#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
-#define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
-#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
+/* SAS Phy Link Status Event data */
+
+typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
+{
+ U8 PhyNum; /* 00h */
+ U8 LinkRates; /* 01h */
+ U16 DevHandle; /* 02h */
+ U64 SASAddress; /* 04h */
+} EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
+ MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
+
+/* defines for the LinkRates field of the SAS PHY Link Status event */
+#define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0)
+#define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4)
+#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F)
+#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0)
+#define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00)
+#define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01)
+#define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02)
+#define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03)
+#define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08)
+#define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09)
+
+/* SAS Discovery Errror Event data */
+
+typedef struct _EVENT_DATA_DISCOVERY_ERROR
+{
+ U32 DiscoveryStatus; /* 00h */
+ U8 Port; /* 04h */
+ U8 Reserved1; /* 05h */
+ U16 Reserved2; /* 06h */
+} EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
+ EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
+
+#define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001)
+#define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002)
+#define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004)
+#define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008)
+#define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010)
+#define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020)
+#define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040)
+#define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080)
+#define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100)
+#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200)
+#define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400)
+#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS (0x00000800)
+#define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000)
/*****************************************************************************
@@ -564,10 +737,13 @@ typedef struct _MSG_FW_DOWNLOAD
} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
FWDownload_t, MPI_POINTER pFWDownload_t;
+#define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
+
#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
+#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
typedef struct _FWDownloadTCSGE
@@ -620,6 +796,8 @@ typedef struct _MSG_FW_UPLOAD
#define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
#define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
+#define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
+#define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
typedef struct _FWUploadTCSGE
{
@@ -683,6 +861,7 @@ typedef struct _MPI_FW_HEADER
#define MPI_FW_HEADER_PID_TYPE_MASK (0xF000)
#define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000)
#define MPI_FW_HEADER_PID_TYPE_FC (0x1000)
+#define MPI_FW_HEADER_PID_TYPE_SAS (0x2000)
#define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A)
#define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5)
@@ -695,8 +874,10 @@ typedef struct _MPI_FW_HEADER
#define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
#define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
#define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
+#define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
#define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
+/* SCSI */
#define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001)
#define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002)
#define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003)
@@ -709,9 +890,18 @@ typedef struct _MPI_FW_HEADER
#define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A)
#define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B)
#define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C)
+/* Fibre Channel */
#define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
-#define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001)
-#define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002)
+#define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) /* 919 and 929 */
+#define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) /* 919X and 929X */
+#define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) /* 919XL and 929XL */
+#define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004) /* 939X and 949X */
+#define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005)
+/* SAS */
+#define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001)
+#define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002)
+#define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003)
+#define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004) /* 1068E, 1066E, and 1064E */
typedef struct _MPI_EXT_IMAGE_HEADER
{
@@ -730,5 +920,6 @@ typedef struct _MPI_EXT_IMAGE_HEADER
#define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
#define MPI_EXT_IMAGE_TYPE_FW (0x01)
#define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
+#define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
#endif
diff --git a/sys/dev/mpt/mpilib/mpi_lan.h b/sys/dev/mpt/mpilib/mpi_lan.h
index a7551c6..9357064 100644
--- a/sys/dev/mpt/mpilib/mpi_lan.h
+++ b/sys/dev/mpt/mpilib/mpi_lan.h
@@ -28,13 +28,13 @@
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
* OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *
- * Name: MPI_LAN.H
+ *
+ *
+ * Name: mpi_lan.h
* Title: MPI LAN messages and structures
* Creation Date: June 30, 2000
*
- * MPI_LAN.H Version: 01.02.01
+ * mpi_lan.h Version: 01.05.01
*
* Version History
* ---------------
@@ -56,6 +56,8 @@
* 02-20-01 01.01.02 Started using MPI_POINTER.
* 03-27-01 01.01.03 Added structure offset comments.
* 08-08-01 01.02.01 Original release for v1.2 work.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
*/
diff --git a/sys/dev/mpt/mpilib/mpi_log_fc.h b/sys/dev/mpt/mpilib/mpi_log_fc.h
new file mode 100644
index 0000000..73cd941
--- /dev/null
+++ b/sys/dev/mpt/mpilib/mpi_log_fc.h
@@ -0,0 +1,117 @@
+/* $FreeBSD$ */
+/*-
+ * Copyright (c) 2000-2005, LSI Logic Corporation and its contributors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce at minimum a disclaimer
+ * substantially similar to the "NO WARRANTY" disclaimer below
+ * ("Disclaimer") and any redistribution must be conditioned upon including
+ * a substantially similar Disclaimer requirement for further binary
+ * redistribution.
+ * 3. Neither the name of the LSI Logic Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
+ * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * NAME: fc_log.h
+ * SUMMARY: MPI IocLogInfo definitions for the SYMFC9xx chips
+ * DESCRIPTION: Contains the enumerated list of values that may be returned
+ * in the IOCLogInfo field of a MPI Default Reply Message.
+ *
+ * CREATION DATE: 6/02/2000
+ * ID: $Id: //prod/main/platform/os/linux/drivers/message/fusion/lsi/mpi_log_fc.h#1 $
+ */
+
+
+/*
+ * MpiIocLogInfo_t enum
+ *
+ * These 32 bit values are used in the IOCLogInfo field of the MPI reply
+ * messages.
+ * The value is 0xabcccccc where
+ * a = The type of log info as per the MPI spec. Since these codes are
+ * all for Fibre Channel this value will always be 2.
+ * b = Specifies a subclass of the firmware where
+ * 0 = FCP Initiator
+ * 1 = FCP Target
+ * 2 = LAN
+ * 3 = MPI Message Layer
+ * 4 = FC Link
+ * 5 = Context Manager
+ * 6 = Invalid Field Offset
+ * 7 = State Change Info
+ * all others are reserved for future use
+ * c = A specific value within the subclass.
+ *
+ * NOTE: Any new values should be added to the end of each subclass so that the
+ * codes remain consistent across firmware releases.
+ */
+typedef enum _MpiIocLogInfoFc
+{
+ MPI_IOCLOGINFO_FC_INIT_BASE = 0x20000000,
+ MPI_IOCLOGINFO_FC_INIT_ERROR_OUT_OF_ORDER_FRAME = 0x20000001, /* received an out of order frame - unsupported */
+ MPI_IOCLOGINFO_FC_INIT_ERROR_BAD_START_OF_FRAME = 0x20000002, /* Bad Rx Frame, bad start of frame primative */
+ MPI_IOCLOGINFO_FC_INIT_ERROR_BAD_END_OF_FRAME = 0x20000003, /* Bad Rx Frame, bad end of frame primative */
+ MPI_IOCLOGINFO_FC_INIT_ERROR_OVER_RUN = 0x20000004, /* Bad Rx Frame, overrun */
+ MPI_IOCLOGINFO_FC_INIT_ERROR_RX_OTHER = 0x20000005, /* Other errors caught by IOC which require retries */
+ MPI_IOCLOGINFO_FC_INIT_ERROR_SUBPROC_DEAD = 0x20000006, /* Main processor could not initialize sub-processor */
+ MPI_IOCLOGINFO_FC_INIT_ERROR_RX_OVERRUN = 0x20000007, /* Scatter Gather overrun */
+ MPI_IOCLOGINFO_FC_INIT_ERROR_RX_BAD_STATUS = 0x20000008, /* Receiver detected context mismatch via invalid header */
+ MPI_IOCLOGINFO_FC_INIT_ERROR_RX_UNEXPECTED_FRAME= 0x20000009, /* CtxMgr detected unsupported frame type */
+ MPI_IOCLOGINFO_FC_INIT_ERROR_LINK_FAILURE = 0x2000000A, /* Link failure occurred */
+ MPI_IOCLOGINFO_FC_INIT_ERROR_TX_TIMEOUT = 0x2000000B, /* Transmitter timeout error */
+
+ MPI_IOCLOGINFO_FC_TARGET_BASE = 0x21000000,
+ MPI_IOCLOGINFO_FC_TARGET_NO_PDISC = 0x21000001, /* not sent because we are waiting for a PDISC from the initiator */
+ MPI_IOCLOGINFO_FC_TARGET_NO_LOGIN = 0x21000002, /* not sent because we are not logged in to the remote node */
+ MPI_IOCLOGINFO_FC_TARGET_DOAR_KILLED_BY_LIP = 0x21000003, /* Data Out, Auto Response, not sent due to a LIP */
+ MPI_IOCLOGINFO_FC_TARGET_DIAR_KILLED_BY_LIP = 0x21000004, /* Data In, Auto Response, not sent due to a LIP */
+ MPI_IOCLOGINFO_FC_TARGET_DIAR_MISSING_DATA = 0x21000005, /* Data In, Auto Response, missing data frames */
+ MPI_IOCLOGINFO_FC_TARGET_DONR_KILLED_BY_LIP = 0x21000006, /* Data Out, No Response, not sent due to a LIP */
+ MPI_IOCLOGINFO_FC_TARGET_WRSP_KILLED_BY_LIP = 0x21000007, /* Auto-response after a write not sent due to a LIP */
+ MPI_IOCLOGINFO_FC_TARGET_DINR_KILLED_BY_LIP = 0x21000008, /* Data In, No Response, not completed due to a LIP */
+ MPI_IOCLOGINFO_FC_TARGET_DINR_MISSING_DATA = 0x21000009, /* Data In, No Response, missing data frames */
+ MPI_IOCLOGINFO_FC_TARGET_MRSP_KILLED_BY_LIP = 0x2100000a, /* Manual Response not sent due to a LIP */
+ MPI_IOCLOGINFO_FC_TARGET_NO_CLASS_3 = 0x2100000b, /* not sent because remote node does not support Class 3 */
+ MPI_IOCLOGINFO_FC_TARGET_LOGIN_NOT_VALID = 0x2100000c, /* not sent because login to remote node not validated */
+ MPI_IOCLOGINFO_FC_TARGET_FROM_OUTBOUND = 0x2100000e, /* cleared from the outbound queue after a logout */
+ MPI_IOCLOGINFO_FC_TARGET_WAITING_FOR_DATA_IN = 0x2100000f, /* cleared waiting for data after a logout */
+
+ MPI_IOCLOGINFO_FC_LAN_BASE = 0x22000000,
+ MPI_IOCLOGINFO_FC_LAN_TRANS_SGL_MISSING = 0x22000001, /* Transaction Context Sgl Missing */
+ MPI_IOCLOGINFO_FC_LAN_TRANS_WRONG_PLACE = 0x22000002, /* Transaction Context found before an EOB */
+ MPI_IOCLOGINFO_FC_LAN_TRANS_RES_BITS_SET = 0x22000003, /* Transaction Context value has reserved bits set */
+ MPI_IOCLOGINFO_FC_LAN_WRONG_SGL_FLAG = 0x22000004, /* Invalid SGL Flags */
+
+ MPI_IOCLOGINFO_FC_MSG_BASE = 0x23000000,
+
+ MPI_IOCLOGINFO_FC_LINK_BASE = 0x24000000,
+ MPI_IOCLOGINFO_FC_LINK_LOOP_INIT_TIMEOUT = 0x24000001, /* Loop initialization timed out */
+ MPI_IOCLOGINFO_FC_LINK_ALREADY_INITIALIZED = 0x24000002, /* Another system controller already initialized the loop */
+ MPI_IOCLOGINFO_FC_LINK_LINK_NOT_ESTABLISHED = 0x24000003, /* Not synchronized to signal or still negotiating (possible cable problem) */
+ MPI_IOCLOGINFO_FC_LINK_CRC_ERROR = 0x24000004, /* CRC check detected error on received frame */
+
+ MPI_IOCLOGINFO_FC_CTX_BASE = 0x25000000,
+
+ MPI_IOCLOGINFO_FC_INVALID_FIELD_BYTE_OFFSET = 0x26000000, /* The lower 24 bits give the byte offset of the field in the request message that is invalid */
+ MPI_IOCLOGINFO_FC_INVALID_FIELD_MAX_OFFSET = 0x26ffffff,
+
+ MPI_IOCLOGINFO_FC_STATE_CHANGE = 0x27000000 /* The lower 24 bits give additional information concerning state change */
+
+} MpiIocLogInfoFc_t;
diff --git a/sys/dev/mpt/mpilib/mpi_log_sas.h b/sys/dev/mpt/mpilib/mpi_log_sas.h
new file mode 100644
index 0000000..2c0a358
--- /dev/null
+++ b/sys/dev/mpt/mpilib/mpi_log_sas.h
@@ -0,0 +1,181 @@
+/* $FreeBSD$ */
+/*-
+ * Copyright (c) 2000-2005, LSI Logic Corporation and its contributors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce at minimum a disclaimer
+ * substantially similar to the "NO WARRANTY" disclaimer below
+ * ("Disclaimer") and any redistribution must be conditioned upon including
+ * a substantially similar Disclaimer requirement for further binary
+ * redistribution.
+ * 3. Neither the name of the LSI Logic Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
+ * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * *
+ ***************************************************************************
+ *
+ * Name: iopiIocLogInfo.h
+ * Title: SAS Firmware IOP Interface IOC Log Info Definitions
+ * Programmer: Guy Kendall
+ * Creation Date: September 24, 2003
+ *
+ * Version History
+ * ---------------
+ *
+ * Last Updated
+ * -------------
+ * Version %version: 22 %
+ * Date Updated %date_modified: %
+ * Programmer %created_by: nperucca %
+ *
+ * Date Who Description
+ * -------- --- -------------------------------------------------------
+ * 09/24/03 GWK Initial version
+ *
+ *
+ * Description
+ * ------------
+ * This include file contains SAS firmware interface IOC Log Info codes
+ *
+ *-------------------------------------------------------------------------
+ */
+
+#ifndef IOPI_IOCLOGINFO_H_INCLUDED
+#define IOPI_IOCLOGINFO_H_INCLUDED
+
+
+/****************************************************************************/
+/* IOC LOGINFO defines, 0x00000000 - 0x0FFFFFFF */
+/* Format: */
+/* Bits 31-28: MPI_IOCLOGINFO_TYPE_SAS (3) */
+/* Bits 27-24: IOC_LOGINFO_ORIGINATOR: 0=IOP, 1=PL, 2=IR */
+/* Bits 23-16: LOGINFO_CODE */
+/* Bits 15-0: LOGINFO_CODE Specific */
+/****************************************************************************/
+
+/****************************************************************************/
+/* IOC_LOGINFO_ORIGINATOR defines */
+/****************************************************************************/
+#define IOC_LOGINFO_ORIGINATOR_IOP (0x00000000)
+#define IOC_LOGINFO_ORIGINATOR_PL (0x01000000)
+#define IOC_LOGINFO_ORIGINATOR_IR (0x02000000)
+
+/****************************************************************************/
+/* LOGINFO_CODE defines */
+/****************************************************************************/
+#define IOC_LOGINFO_CODE_MASK (0x00FF0000)
+#define IOC_LOGINFO_CODE_SHIFT (16)
+
+/****************************************************************************/
+/* IOP LOGINFO_CODE defines, valid if IOC_LOGINFO_ORIGINATOR = IOP */
+/****************************************************************************/
+#define IOP_LOGINFO_CODE_INVALID_SAS_ADDRESS (0x00010000)
+#define IOP_LOGINFO_CODE_UNUSED2 (0x00020000)
+#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE (0x00030000)
+#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE_RT (0x00030100) /* Route Table Entry not found */
+#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE_PN (0x00030200) /* Invalid Page Number */
+#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE_FORM (0x00030300) /* Invalid FORM */
+#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE_PT (0x00030400) /* Invalid Page Type */
+#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE_DNM (0x00030500) /* Device Not Mapped */
+#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE_PERSIST (0x00030600) /* Persistent Page not found */
+#define IOP_LOGINFO_CODE_CONFIG_INVALID_PAGE_DEFAULT (0x00030700) /* Default Page not found */
+#define IOP_LOGINFO_CODE_TASK_TERMINATED (0x00050000)
+
+
+/****************************************************************************/
+/* PL LOGINFO_CODE defines, valid if IOC_LOGINFO_ORIGINATOR = PL */
+/****************************************************************************/
+#define PL_LOGINFO_CODE_OPEN_FAILURE (0x00010000)
+#define PL_LOGINFO_CODE_INVALID_SGL (0x00020000)
+#define PL_LOGINFO_CODE_WRONG_REL_OFF_OR_FRAME_LENGTH (0x00030000)
+#define PL_LOGINFO_CODE_FRAME_XFER_ERROR (0x00040000)
+#define PL_LOGINFO_CODE_TX_FM_CONNECTED_LOW (0x00050000)
+#define PL_LOGINFO_CODE_SATA_NON_NCQ_RW_ERR_BIT_SET (0x00060000)
+#define PL_LOGINFO_CODE_SATA_READ_LOG_RECEIVE_DATA_ERR (0x00070000)
+#define PL_LOGINFO_CODE_SATA_NCQ_FAIL_ALL_CMDS_AFTR_ERR (0x00080000)
+#define PL_LOGINFO_CODE_SATA_ERR_IN_RCV_SET_DEV_BIT_FIS (0x00090000)
+#define PL_LOGINFO_CODE_RX_FM_INVALID_MESSAGE (0x000A0000)
+#define PL_LOGINFO_CODE_RX_CTX_MESSAGE_VALID_ERROR (0x000B0000)
+#define PL_LOGINFO_CODE_RX_FM_CURRENT_FRAME_ERROR (0x000C0000)
+#define PL_LOGINFO_CODE_SATA_LINK_DOWN (0x000D0000)
+#define PL_LOGINFO_CODE_DISCOVERY_SATA_INIT_W_IOS (0x000E0000)
+#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE (0x000F0000)
+#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE_PT (0x000F0100) /* Invalid Page Type */
+#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE_NUM_PHYS (0x000F0200) /* Invalid Number of Phys */
+#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE_NOT_IMP (0x000F0300) /* Case Not Handled */
+#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE_NO_DEV (0x000F0400) /* No Device Found */
+#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE_FORM (0x000F0500) /* Invalid FORM */
+#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE_PHY (0x000F0600) /* Invalid Phy */
+#define PL_LOGINFO_CODE_CONFIG_INVALID_PAGE_NO_OWNER (0x000F0700) /* No Owner Found */
+#define PL_LOGINFO_CODE_DSCVRY_SATA_INIT_TIMEOUT (0x00100000)
+#define PL_LOGINFO_CODE_RESET (0x00110000)
+#define PL_LOGINFO_CODE_ABORT (0x00120000)
+#define PL_LOGINFO_CODE_IO_NOT_YET_EXECUTED (0x00130000)
+#define PL_LOGINFO_CODE_IO_EXECUTED (0x00140000)
+#define PL_LOGINFO_SUB_CODE_OPEN_FAILURE (0x00000100)
+#define PL_LOGINFO_SUB_CODE_INVALID_SGL (0x00000200)
+#define PL_LOGINFO_SUB_CODE_WRONG_REL_OFF_OR_FRAME_LENGTH (0x00000300)
+#define PL_LOGINFO_SUB_CODE_FRAME_XFER_ERROR (0x00000400)
+#define PL_LOGINFO_SUB_CODE_TX_FM_CONNECTED_LOW (0x00000500)
+#define PL_LOGINFO_SUB_CODE_SATA_NON_NCQ_RW_ERR_BIT_SET (0x00000600)
+#define PL_LOGINFO_SUB_CODE_SATA_READ_LOG_RECEIVE_DATA_ERR (0x00000700)
+#define PL_LOGINFO_SUB_CODE_SATA_NCQ_FAIL_ALL_CMDS_AFTR_ERR (0x00000800)
+#define PL_LOGINFO_SUB_CODE_SATA_ERR_IN_RCV_SET_DEV_BIT_FIS (0x00000900)
+#define PL_LOGINFO_SUB_CODE_RX_FM_INVALID_MESSAGE (0x00000A00)
+#define PL_LOGINFO_SUB_CODE_RX_CTX_MESSAGE_VALID_ERROR (0x00000B00)
+#define PL_LOGINFO_SUB_CODE_RX_FM_CURRENT_FRAME_ERROR (0x00000C00)
+#define PL_LOGINFO_SUB_CODE_SATA_LINK_DOWN (0x00000D00)
+#define PL_LOGINFO_SUB_CODE_DISCOVERY_SATA_INIT_W_IOS (0x00000E00)
+#define PL_LOGINFO_SUB_CODE_DSCVRY_SATA_INIT_TIMEOUT (0x00001000)
+
+
+#define PL_LOGINFO_CODE_ENCL_MGMT_SMP_FRAME_FAILURE (0x00200000) /* Can't get SMP Frame */
+#define PL_LOGINFO_CODE_ENCL_MGMT_SMP_READ_ERROR (0x00200001) /* Error occured on SMP Read */
+#define PL_LOGINFO_CODE_ENCL_MGMT_SMP_WRITE_ERROR (0x00200002) /* Error occured on SMP Write */
+#define PL_LOGINFO_CODE_ENCL_MGMT_NOT_SUPPORTED_ON_ENCL (0x00200004) /* Encl Mgmt services not available for this WWID */
+#define PL_LOGINFO_CODE_ENCL_MGMT_ADDR_MODE_NOT_SUPPORTED (0x00200005) /* Address Mode not suppored */
+#define PL_LOGINFO_CODE_ENCL_MGMT_BAD_SLOT_NUM (0x00200006) /* Invalid Slot Number in SEP Msg */
+#define PL_LOGINFO_CODE_ENCL_MGMT_SGPIO_NOT_PRESENT (0x00200007) /* SGPIO not present/enabled */
+
+#define PL_LOGINFO_DA_SEP_NOT_PRESENT (0x00200100) /* SEP not present when msg received */
+#define PL_LOGINFO_DA_SEP_SINGLE_THREAD_ERROR (0x00200101) /* Can only accept 1 msg at a time */
+#define PL_LOGINFO_DA_SEP_ISTWI_INTR_IN_IDLE_STATE (0x00200102) /* ISTWI interrupt recvd. while IDLE */
+#define PL_LOGINFO_DA_SEP_RECEIVED_NACK_FROM_SLAVE (0x00200103) /* SEP NACK'd, it is busy */
+#define PL_LOGINFO_DA_SEP_BAD_STATUS_HDR_CHKSUM (0x00200104) /* SEP stopped or sent bad chksum in Hdr */
+#define PL_LOGINFO_DA_SEP_UNSUPPORTED_SCSI_STATUS_1 (0x00200105) /* SEP returned unknown scsi status */
+#define PL_LOGINFO_DA_SEP_UNSUPPORTED_SCSI_STATUS_2 (0x00200106) /* SEP returned unknown scsi status */
+#define PL_LOGINFO_DA_SEP_CHKSUM_ERROR_AFTER_STOP (0x00200107) /* SEP returned bad chksum after STOP */
+#define PL_LOGINFO_DA_SEP_CHKSUM_ERROR_AFTER_STOP_GETDATA (0x00200108) /* SEP returned bad chksum after STOP while gettin data*/
+
+
+/****************************************************************************/
+/* IR LOGINFO_CODE defines, valid if IOC_LOGINFO_ORIGINATOR = IR */
+/****************************************************************************/
+#define IR_LOGINFO_CODE_UNUSED1 (0x00010000)
+#define IR_LOGINFO_CODE_UNUSED2 (0x00020000)
+
+/****************************************************************************/
+/* Defines for convienence */
+/****************************************************************************/
+#define IOC_LOGINFO_PREFIX_IOP ((MPI_IOCLOGINFO_TYPE_SAS << MPI_IOCLOGINFO_TYPE_SHIFT) | IOC_LOGINFO_ORIGINATOR_IOP)
+#define IOC_LOGINFO_PREFIX_PL ((MPI_IOCLOGINFO_TYPE_SAS << MPI_IOCLOGINFO_TYPE_SHIFT) | IOC_LOGINFO_ORIGINATOR_PL)
+#define IOC_LOGINFO_PREFIX_IR ((MPI_IOCLOGINFO_TYPE_SAS << MPI_IOCLOGINFO_TYPE_SHIFT) | IOC_LOGINFO_ORIGINATOR_IR)
+
+#endif /* end of file */
diff --git a/sys/dev/mpt/mpilib/mpi_raid.h b/sys/dev/mpt/mpilib/mpi_raid.h
index 97dcd20..8dc5a50 100644
--- a/sys/dev/mpt/mpilib/mpi_raid.h
+++ b/sys/dev/mpt/mpilib/mpi_raid.h
@@ -28,13 +28,13 @@
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
* OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *
- * Name: MPI_RAID.H
+ *
+ *
+ * Name: mpi_raid.h
* Title: MPI RAID message and structures
* Creation Date: February 27, 2001
*
- * MPI_RAID.H Version: 01.02.09
+ * mpi_raid.h Version: 01.05.02
*
* Version History
* ---------------
@@ -56,6 +56,10 @@
* 11-15-02 01.02.08 Added missing MsgContext field to MSG_MAILBOX_REQUEST.
* 04-01-03 01.02.09 New action data option flag for
* MPI_RAID_ACTION_DELETE_VOLUME.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
+ * 01-15-05 01.05.02 Added defines for the two new RAID Actions for
+ * _SET_RESYNC_RATE and _SET_DATA_SCRUB_RATE.
* --------------------------------------------------------------------------
*/
@@ -71,7 +75,7 @@
/****************************************************************************/
-/* RAID Volume Request */
+/* RAID Action Request */
/****************************************************************************/
typedef struct _MSG_RAID_ACTION
@@ -129,6 +133,13 @@ typedef struct _MSG_RAID_ACTION
/* ActionDataWord defines for use with MPI_RAID_ACTION_ACTIVATE_VOLUME action */
#define MPI_RAID_ACTION_ADATA_INACTIVATE_ALL (0x00000001)
+/* ActionDataWord defines for use with MPI_RAID_ACTION_SET_RESYNC_RATE action */
+#define MPI_RAID_ACTION_ADATA_RESYNC_RATE_MASK (0x000000FF)
+
+/* ActionDataWord defines for use with MPI_RAID_ACTION_SET_DATA_SCRUB_RATE action */
+#define MPI_RAID_ACTION_ADATA_DATA_SCRUB_RATE_MASK (0x000000FF)
+
+
/* RAID Action reply message */
diff --git a/sys/dev/mpt/mpilib/mpi_sas.h b/sys/dev/mpt/mpilib/mpi_sas.h
new file mode 100644
index 0000000..0bc3634
--- /dev/null
+++ b/sys/dev/mpt/mpilib/mpi_sas.h
@@ -0,0 +1,276 @@
+/* $FreeBSD$ */
+/*-
+ * Copyright (c) 2000-2005, LSI Logic Corporation and its contributors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce at minimum a disclaimer
+ * substantially similar to the "NO WARRANTY" disclaimer below
+ * ("Disclaimer") and any redistribution must be conditioned upon including
+ * a substantially similar Disclaimer requirement for further binary
+ * redistribution.
+ * 3. Neither the name of the LSI Logic Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
+ * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ * Name: mpi_sas.h
+ * Title: MPI Serial Attached SCSI structures and definitions
+ * Creation Date: August 19, 2004
+ *
+ * mpi_sas.h Version: 01.05.01
+ *
+ * Version History
+ * ---------------
+ *
+ * Date Version Description
+ * -------- -------- ------------------------------------------------------
+ * 08-19-04 01.05.01 Original release.
+ * --------------------------------------------------------------------------
+ */
+
+#ifndef MPI_SAS_H
+#define MPI_SAS_H
+
+
+/*
+ * Values for SASStatus.
+ */
+#define MPI_SASSTATUS_SUCCESS (0x00)
+#define MPI_SASSTATUS_UNKNOWN_ERROR (0x01)
+#define MPI_SASSTATUS_INVALID_FRAME (0x02)
+#define MPI_SASSTATUS_UTC_BAD_DEST (0x03)
+#define MPI_SASSTATUS_UTC_BREAK_RECEIVED (0x04)
+#define MPI_SASSTATUS_UTC_CONNECT_RATE_NOT_SUPPORTED (0x05)
+#define MPI_SASSTATUS_UTC_PORT_LAYER_REQUEST (0x06)
+#define MPI_SASSTATUS_UTC_PROTOCOL_NOT_SUPPORTED (0x07)
+#define MPI_SASSTATUS_UTC_STP_RESOURCES_BUSY (0x08)
+#define MPI_SASSTATUS_UTC_WRONG_DESTINATION (0x09)
+#define MPI_SASSTATUS_SHORT_INFORMATION_UNIT (0x0A)
+#define MPI_SASSTATUS_LONG_INFORMATION_UNIT (0x0B)
+#define MPI_SASSTATUS_XFER_RDY_INCORRECT_WRITE_DATA (0x0C)
+#define MPI_SASSTATUS_XFER_RDY_REQUEST_OFFSET_ERROR (0x0D)
+#define MPI_SASSTATUS_XFER_RDY_NOT_EXPECTED (0x0E)
+#define MPI_SASSTATUS_DATA_INCORRECT_DATA_LENGTH (0x0F)
+#define MPI_SASSTATUS_DATA_TOO_MUCH_READ_DATA (0x10)
+#define MPI_SASSTATUS_DATA_OFFSET_ERROR (0x11)
+#define MPI_SASSTATUS_SDSF_NAK_RECEIVED (0x12)
+#define MPI_SASSTATUS_SDSF_CONNECTION_FAILED (0x13)
+#define MPI_SASSTATUS_INITIATOR_RESPONSE_TIMEOUT (0x14)
+
+
+/*
+ * Values for the SAS DeviceInfo field used in SAS Device Status Change Event
+ * data and SAS IO Unit Configuration pages.
+ */
+#define MPI_SAS_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
+#define MPI_SAS_DEVICE_INFO_LSI_DEVICE (0x00001000)
+#define MPI_SAS_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
+#define MPI_SAS_DEVICE_INFO_SSP_TARGET (0x00000400)
+#define MPI_SAS_DEVICE_INFO_STP_TARGET (0x00000200)
+#define MPI_SAS_DEVICE_INFO_SMP_TARGET (0x00000100)
+#define MPI_SAS_DEVICE_INFO_SATA_DEVICE (0x00000080)
+#define MPI_SAS_DEVICE_INFO_SSP_INITIATOR (0x00000040)
+#define MPI_SAS_DEVICE_INFO_STP_INITIATOR (0x00000020)
+#define MPI_SAS_DEVICE_INFO_SMP_INITIATOR (0x00000010)
+#define MPI_SAS_DEVICE_INFO_SATA_HOST (0x00000008)
+
+#define MPI_SAS_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
+#define MPI_SAS_DEVICE_INFO_NO_DEVICE (0x00000000)
+#define MPI_SAS_DEVICE_INFO_END_DEVICE (0x00000001)
+#define MPI_SAS_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
+#define MPI_SAS_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
+
+
+
+/*****************************************************************************
+*
+* S e r i a l A t t a c h e d S C S I M e s s a g e s
+*
+*****************************************************************************/
+
+/****************************************************************************/
+/* Serial Management Protocol Passthrough Request */
+/****************************************************************************/
+
+typedef struct _MSG_SMP_PASSTHROUGH_REQUEST
+{
+ U8 PassthroughFlags; /* 00h */
+ U8 PhysicalPort; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 RequestDataLength; /* 04h */
+ U8 ConnectionRate; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 Reserved1; /* 0Ch */
+ U64 SASAddress; /* 10h */
+ U32 Reserved2; /* 18h */
+ U32 Reserved3; /* 1Ch */
+ SGE_SIMPLE_UNION SGL; /* 20h */
+} MSG_SMP_PASSTHROUGH_REQUEST, MPI_POINTER PTR_MSG_SMP_PASSTHROUGH_REQUEST,
+ SmpPassthroughRequest_t, MPI_POINTER pSmpPassthroughRequest_t;
+
+/* values for PassthroughFlags field */
+#define MPI_SMP_PT_REQ_PT_FLAGS_IMMEDIATE (0x80)
+
+/* values for ConnectionRate field */
+#define MPI_SMP_PT_REQ_CONNECT_RATE_NEGOTIATED (0x00)
+#define MPI_SMP_PT_REQ_CONNECT_RATE_1_5 (0x08)
+#define MPI_SMP_PT_REQ_CONNECT_RATE_3_0 (0x09)
+
+
+/* Serial Management Protocol Passthrough Reply */
+typedef struct _MSG_SMP_PASSTHROUGH_REPLY
+{
+ U8 PassthroughFlags; /* 00h */
+ U8 PhysicalPort; /* 01h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U16 ResponseDataLength; /* 04h */
+ U8 Reserved1; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 Reserved2; /* 0Ch */
+ U8 SASStatus; /* 0Dh */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+ U32 Reserved3; /* 14h */
+ U8 ResponseData[4]; /* 18h */
+} MSG_SMP_PASSTHROUGH_REPLY, MPI_POINTER PTR_MSG_SMP_PASSTHROUGH_REPLY,
+ SmpPassthroughReply_t, MPI_POINTER pSmpPassthroughReply_t;
+
+#define MPI_SMP_PT_REPLY_PT_FLAGS_IMMEDIATE (0x80)
+
+
+/****************************************************************************/
+/* SATA Passthrough Request */
+/****************************************************************************/
+
+typedef struct _MSG_SATA_PASSTHROUGH_REQUEST
+{
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 PassthroughFlags; /* 04h */
+ U8 ConnectionRate; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 Reserved1; /* 0Ch */
+ U32 Reserved2; /* 10h */
+ U32 Reserved3; /* 14h */
+ U32 DataLength; /* 18h */
+ U8 CommandFIS[20]; /* 1Ch */
+ SGE_SIMPLE_UNION SGL; /* 30h */
+} MSG_SATA_PASSTHROUGH_REQUEST, MPI_POINTER PTR_MSG_SATA_PASSTHROUGH_REQUEST,
+ SataPassthroughRequest_t, MPI_POINTER pSataPassthroughRequest_t;
+
+/* values for PassthroughFlags field */
+#define MPI_SATA_PT_REQ_PT_FLAGS_RESET_DEVICE (0x0200)
+#define MPI_SATA_PT_REQ_PT_FLAGS_EXECUTE_DIAG (0x0100)
+#define MPI_SATA_PT_REQ_PT_FLAGS_DMA_QUEUED (0x0080)
+#define MPI_SATA_PT_REQ_PT_FLAGS_PACKET_COMMAND (0x0040)
+#define MPI_SATA_PT_REQ_PT_FLAGS_DMA (0x0020)
+#define MPI_SATA_PT_REQ_PT_FLAGS_PIO (0x0010)
+#define MPI_SATA_PT_REQ_PT_FLAGS_UNSPECIFIED_VU (0x0004)
+#define MPI_SATA_PT_REQ_PT_FLAGS_WRITE (0x0002)
+#define MPI_SATA_PT_REQ_PT_FLAGS_READ (0x0001)
+
+/* values for ConnectionRate field */
+#define MPI_SATA_PT_REQ_CONNECT_RATE_NEGOTIATED (0x00)
+#define MPI_SATA_PT_REQ_CONNECT_RATE_1_5 (0x08)
+#define MPI_SATA_PT_REQ_CONNECT_RATE_3_0 (0x09)
+
+
+/* SATA Passthrough Reply */
+typedef struct _MSG_SATA_PASSTHROUGH_REPLY
+{
+ U8 TargetID; /* 00h */
+ U8 Bus; /* 01h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U16 PassthroughFlags; /* 04h */
+ U8 Reserved1; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 Reserved2; /* 0Ch */
+ U8 SASStatus; /* 0Dh */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+ U8 StatusFIS[20]; /* 14h */
+ U32 StatusControlRegisters; /* 28h */
+ U32 TransferCount; /* 2Ch */
+} MSG_SATA_PASSTHROUGH_REPLY, MPI_POINTER PTR_MSG_SATA_PASSTHROUGH_REPLY,
+ SataPassthroughReply_t, MPI_POINTER pSataPassthroughReply_t;
+
+
+
+
+/****************************************************************************/
+/* SAS IO Unit Control Request */
+/****************************************************************************/
+
+typedef struct _MSG_SAS_IOUNIT_CONTROL_REQUEST
+{
+ U8 Operation; /* 00h */
+ U8 Reserved1; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved2; /* 04h */
+ U8 Reserved3; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 TargetID; /* 0Ch */
+ U8 Bus; /* 0Dh */
+ U8 PhyNum; /* 0Eh */
+ U8 Reserved4; /* 0Fh */
+ U32 Reserved5; /* 10h */
+ U64 SASAddress; /* 14h */
+ U32 Reserved6; /* 1Ch */
+} MSG_SAS_IOUNIT_CONTROL_REQUEST, MPI_POINTER PTR_MSG_SAS_IOUNIT_CONTROL_REQUEST,
+ SasIoUnitControlRequest_t, MPI_POINTER pSasIoUnitControlRequest_t;
+
+/* values for the Operation field */
+#define MPI_SAS_OP_CLEAR_NOT_PRESENT (0x01)
+#define MPI_SAS_OP_CLEAR_ALL_PERSISTENT (0x02)
+#define MPI_SAS_OP_PHY_LINK_RESET (0x06)
+#define MPI_SAS_OP_PHY_HARD_RESET (0x07)
+#define MPI_SAS_OP_PHY_CLEAR_ERROR_LOG (0x08)
+#define MPI_SAS_OP_MAP_CURRENT (0x09)
+
+
+/* SAS IO Unit Control Reply */
+typedef struct _MSG_SAS_IOUNIT_CONTROL_REPLY
+{
+ U8 Operation; /* 00h */
+ U8 Reserved1; /* 01h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved2; /* 04h */
+ U8 Reserved3; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U16 Reserved4; /* 0Ch */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+} MSG_SAS_IOUNIT_CONTROL_REPLY, MPI_POINTER PTR_MSG_SAS_IOUNIT_CONTROL_REPLY,
+ SasIoUnitControlReply_t, MPI_POINTER pSasIoUnitControlReply_t;
+
+#endif
diff --git a/sys/dev/mpt/mpilib/mpi_targ.h b/sys/dev/mpt/mpilib/mpi_targ.h
index 2642a67..fb232fe 100644
--- a/sys/dev/mpt/mpilib/mpi_targ.h
+++ b/sys/dev/mpt/mpilib/mpi_targ.h
@@ -30,11 +30,11 @@
* OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
- * Name: MPI_TARG.H
+ * Name: mpi_targ.h
* Title: MPI Target mode messages and structures
* Creation Date: June 22, 2000
*
- * MPI_TARG.H Version: 01.02.09
+ * mpi_targ.h Version: 01.05.05
*
* Version History
* ---------------
@@ -71,6 +71,17 @@
* Added PRIORITY_REASON_TARGET_BUSY.
* 11-15-02 01.02.08 Added AliasID field to MPI_TARGET_SCSI_SPI_CMD_BUFFER.
* 04-01-03 01.02.09 Added OptionalOxid field to MPI_TARGET_FCP_CMD_BUFFER.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Added new request message structures for
+ * MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
+ * MSG_TARGET_CMD_BUF_POST_LIST_REQUEST, and
+ * MSG_TARGET_ASSIST_EXT_REQUEST.
+ * Added new structures for SAS SSP Command buffer, SSP
+ * Task buffer, and SSP Status IU.
+ * 10-05-04 01.05.02 MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY added.
+ * 02-22-05 01.05.03 Changed a comment.
+ * 03-11-05 01.05.04 Removed TargetAssistExtended Request.
+ * 06-24-05 01.05.05 Added TargetAssistExtended structures and defines.
* --------------------------------------------------------------------------
*/
@@ -161,6 +172,25 @@ typedef struct _MSG_PRIORITY_CMD_RECEIVED_REPLY
} MSG_PRIORITY_CMD_RECEIVED_REPLY, MPI_POINTER PTR_MSG_PRIORITY_CMD_RECEIVED_REPLY,
PriorityCommandReceivedReply_t, MPI_POINTER pPriorityCommandReceivedReply_t;
+
+typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY
+{
+ U16 Reserved; /* 00h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved1; /* 04h */
+ U8 Reserved2; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 PriorityReason; /* 0Ch */
+ U8 Reserved3; /* 0Dh */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+ U32 ReplyWord; /* 14h */
+} MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
+ MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
+ TargetCmdBufferPostErrorReply_t, MPI_POINTER pTargetCmdBufferPostErrorReply_t;
+
#define PRIORITY_REASON_NO_DISCONNECT (0x00)
#define PRIORITY_REASON_SCSI_TASK_MANAGEMENT (0x01)
#define PRIORITY_REASON_CMD_PARITY_ERR (0x02)
@@ -174,7 +204,34 @@ typedef struct _MSG_PRIORITY_CMD_RECEIVED_REPLY
#define PRIORITY_REASON_UNKNOWN (0xFF)
-typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY
+/****************************************************************************/
+/* Target Command Buffer Post Base Request */
+/****************************************************************************/
+
+typedef struct _MSG_TARGET_CMD_BUF_POST_BASE_REQUEST
+{
+ U8 BufferPostFlags; /* 00h */
+ U8 PortNumber; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 TotalCmdBuffers; /* 04h */
+ U8 Reserved; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 Reserved1; /* 0Ch */
+ U16 CmdBufferLength; /* 10h */
+ U16 NextCmdBufferOffset; /* 12h */
+ U32 BaseAddressLow; /* 14h */
+ U32 BaseAddressHigh; /* 18h */
+} MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
+ MPI_POINTER PTR__MSG_TARGET_CMD_BUF_POST_BASE_REQUEST,
+ TargetCmdBufferPostBaseRequest_t,
+ MPI_POINTER pTargetCmdBufferPostBaseRequest_t;
+
+#define CMD_BUFFER_POST_BASE_FLAGS_AUTO_POST_ALL (0x01)
+
+
+typedef struct _MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY
{
U16 Reserved; /* 00h */
U8 MsgLength; /* 02h */
@@ -183,16 +240,41 @@ typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY
U8 Reserved2; /* 06h */
U8 MsgFlags; /* 07h */
U32 MsgContext; /* 08h */
- U8 PriorityReason; /* 0Ch */
- U8 Reserved3; /* 0Dh */
+ U16 Reserved3; /* 0Ch */
U16 IOCStatus; /* 0Eh */
U32 IOCLogInfo; /* 10h */
- U32 ReplyWord; /* 14h */
-} MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
- MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
- TargetCmdBufferPostErrorReply_t, MPI_POINTER pTargetCmdBufferPostErrorReply_t;
+} MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY,
+ MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_BASE_LIST_REPLY,
+ TargetCmdBufferPostBaseListReply_t,
+ MPI_POINTER pTargetCmdBufferPostBaseListReply_t;
+/****************************************************************************/
+/* Target Command Buffer Post List Request */
+/****************************************************************************/
+
+typedef struct _MSG_TARGET_CMD_BUF_POST_LIST_REQUEST
+{
+ U8 Reserved; /* 00h */
+ U8 PortNumber; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 CmdBufferCount; /* 04h */
+ U8 Reserved1; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 Reserved2; /* 0Ch */
+ U16 IoIndex[2]; /* 10h */
+} MSG_TARGET_CMD_BUF_POST_LIST_REQUEST,
+ MPI_POINTER PTR_MSG_TARGET_CMD_BUF_POST_LIST_REQUEST,
+ TargetCmdBufferPostListRequest_t,
+ MPI_POINTER pTargetCmdBufferPostListRequest_t;
+
+
+/****************************************************************************/
+/* Command Buffer Formats (with 16 byte CDB) */
+/****************************************************************************/
+
typedef struct _MPI_TARGET_FCP_CMD_BUFFER
{
U8 FcpLun[8]; /* 00h */
@@ -229,6 +311,46 @@ typedef struct _MPI_TARGET_SCSI_SPI_CMD_BUFFER
MpiTargetScsiSpiCmdBuffer, MPI_POINTER pMpiTargetScsiSpiCmdBuffer;
+typedef struct _MPI_TARGET_SSP_CMD_BUFFER
+{
+ U8 FrameType; /* 00h */
+ U8 Reserved1; /* 01h */
+ U16 Reserved2; /* 02h */
+ U16 InitiatorTag; /* 04h */
+ U16 DevHandle; /* 06h */
+ /* COMMAND information unit starts here */
+ U8 LogicalUnitNumber[8]; /* 08h */
+ U8 Reserved3; /* 10h */
+ U8 TaskAttribute; /* lower 3 bits */ /* 11h */
+ U8 Reserved4; /* 12h */
+ U8 AdditionalCDBLength; /* upper 5 bits */ /* 13h */
+ U8 CDB[16]; /* 14h */
+ /* Additional CDB bytes extend past the CDB field */
+} MPI_TARGET_SSP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_SSP_CMD_BUFFER,
+ MpiTargetSspCmdBuffer, MPI_POINTER pMpiTargetSspCmdBuffer;
+
+typedef struct _MPI_TARGET_SSP_TASK_BUFFER
+{
+ U8 FrameType; /* 00h */
+ U8 Reserved1; /* 01h */
+ U16 Reserved2; /* 02h */
+ U16 InitiatorTag; /* 04h */
+ U16 DevHandle; /* 06h */
+ /* TASK information unit starts here */
+ U8 LogicalUnitNumber[8]; /* 08h */
+ U8 Reserved3; /* 10h */
+ U8 Reserved4; /* 11h */
+ U8 TaskManagementFunction; /* 12h */
+ U8 Reserved5; /* 13h */
+ U16 ManagedTaskTag; /* 14h */
+ U16 Reserved6; /* 16h */
+ U32 Reserved7; /* 18h */
+ U32 Reserved8; /* 1Ch */
+ U32 Reserved9; /* 20h */
+} MPI_TARGET_SSP_TASK_BUFFER, MPI_POINTER PTR_MPI_TARGET_SSP_TASK_BUFFER,
+ MpiTargetSspTaskBuffer, MPI_POINTER pMpiTargetSspTaskBuffer;
+
+
/****************************************************************************/
/* Target Assist Request */
/****************************************************************************/
@@ -278,6 +400,77 @@ typedef struct _MSG_TARGET_ERROR_REPLY
/****************************************************************************/
+/* Target Assist Extended Request */
+/****************************************************************************/
+
+typedef struct _MSG_TARGET_ASSIST_EXT_REQUEST
+{
+ U8 StatusCode; /* 00h */
+ U8 TargetAssistFlags; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 QueueTag; /* 04h */
+ U8 Reserved1; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 ReplyWord; /* 0Ch */
+ U8 LUN[8]; /* 10h */
+ U32 RelativeOffset; /* 18h */
+ U32 Reserved2; /* 1Ch */
+ U32 Reserved3; /* 20h */
+ U32 PrimaryReferenceTag; /* 24h */
+ U16 PrimaryApplicationTag; /* 28h */
+ U16 PrimaryApplicationTagMask; /* 2Ah */
+ U32 Reserved4; /* 2Ch */
+ U32 DataLength; /* 30h */
+ U32 BidirectionalDataLength; /* 34h */
+ U32 SecondaryReferenceTag; /* 38h */
+ U16 SecondaryApplicationTag; /* 3Ch */
+ U16 Reserved5; /* 3Eh */
+ U16 EEDPFlags; /* 40h */
+ U16 ApplicationTagTranslationMask; /* 42h */
+ U32 EEDPBlockSize; /* 44h */
+ U8 SGLOffset0; /* 48h */
+ U8 SGLOffset1; /* 49h */
+ U8 SGLOffset2; /* 4Ah */
+ U8 SGLOffset3; /* 4Bh */
+ U32 Reserved6; /* 4Ch */
+ SGE_IO_UNION SGL[1]; /* 50h */
+} MSG_TARGET_ASSIST_EXT_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_EXT_REQUEST,
+ TargetAssistExtRequest_t, MPI_POINTER pTargetAssistExtRequest_t;
+
+/* see the defines after MSG_TARGET_ASSIST_REQUEST for TargetAssistFlags */
+
+/* defines for the MsgFlags field */
+#define TARGET_ASSIST_EXT_MSGFLAGS_BIDIRECTIONAL (0x20)
+#define TARGET_ASSIST_EXT_MSGFLAGS_MULTICAST (0x10)
+#define TARGET_ASSIST_EXT_MSGFLAGS_SGL_OFFSET_CHAINS (0x08)
+
+/* defines for the EEDPFlags field */
+#define TARGET_ASSIST_EXT_EEDP_MASK_OP (0x0007)
+#define TARGET_ASSIST_EXT_EEDP_NOOP_OP (0x0000)
+#define TARGET_ASSIST_EXT_EEDP_CHK_OP (0x0001)
+#define TARGET_ASSIST_EXT_EEDP_STRIP_OP (0x0002)
+#define TARGET_ASSIST_EXT_EEDP_CHKRM_OP (0x0003)
+#define TARGET_ASSIST_EXT_EEDP_INSERT_OP (0x0004)
+#define TARGET_ASSIST_EXT_EEDP_REPLACE_OP (0x0006)
+#define TARGET_ASSIST_EXT_EEDP_CHKREGEN_OP (0x0007)
+
+#define TARGET_ASSIST_EXT_EEDP_PASS_REF_TAG (0x0008)
+
+#define TARGET_ASSIST_EXT_EEDP_T10_CHK_MASK (0x0700)
+#define TARGET_ASSIST_EXT_EEDP_T10_CHK_GUARD (0x0100)
+#define TARGET_ASSIST_EXT_EEDP_T10_CHK_APPTAG (0x0200)
+#define TARGET_ASSIST_EXT_EEDP_T10_CHK_REFTAG (0x0400)
+#define TARGET_ASSIST_EXT_EEDP_T10_CHK_SHIFT (8)
+
+#define TARGET_ASSIST_EXT_EEDP_INC_SEC_APPTAG (0x1000)
+#define TARGET_ASSIST_EXT_EEDP_INC_PRI_APPTAG (0x2000)
+#define TARGET_ASSIST_EXT_EEDP_INC_SEC_REFTAG (0x4000)
+#define TARGET_ASSIST_EXT_EEDP_INC_PRI_REFTAG (0x8000)
+
+
+/****************************************************************************/
/* Target Status Send Request */
/****************************************************************************/
@@ -336,6 +529,27 @@ typedef struct _MPI_TARGET_SCSI_SPI_STATUS_IU
} MPI_TARGET_SCSI_SPI_STATUS_IU, MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_STATUS_IU,
TargetScsiSpiStatusIU_t, MPI_POINTER pTargetScsiSpiStatusIU_t;
+/*
+ * NOTE: The SSP status IU is big-endian. When used on a little-endian system,
+ * this structure properly orders the bytes.
+ */
+typedef struct _MPI_TARGET_SSP_RSP_IU
+{
+ U32 Reserved0[6]; /* reserved for SSP header */ /* 00h */
+ /* start of RESPONSE information unit */
+ U32 Reserved1; /* 18h */
+ U32 Reserved2; /* 1Ch */
+ U16 Reserved3; /* 20h */
+ U8 DataPres; /* lower 2 bits */ /* 22h */
+ U8 Status; /* 23h */
+ U32 Reserved4; /* 24h */
+ U32 SenseDataLength; /* 28h */
+ U32 ResponseDataLength; /* 2Ch */
+ U8 ResponseSenseData[4]; /* 30h */
+} MPI_TARGET_SSP_RSP_IU, MPI_POINTER PTR_MPI_TARGET_SSP_RSP_IU,
+ MpiTargetSspRspIu_t, MPI_POINTER pMpiTargetSspRspIu_t;
+
+
/****************************************************************************/
/* Target Mode Abort Request */
/****************************************************************************/
diff --git a/sys/dev/mpt/mpilib/mpi_tool.h b/sys/dev/mpt/mpilib/mpi_tool.h
new file mode 100644
index 0000000..14c4411
--- /dev/null
+++ b/sys/dev/mpt/mpilib/mpi_tool.h
@@ -0,0 +1,380 @@
+/* $FreeBSD$ */
+/*-
+ * Copyright (c) 2000-2005, LSI Logic Corporation and its contributors.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce at minimum a disclaimer
+ * substantially similar to the "NO WARRANTY" disclaimer below
+ * ("Disclaimer") and any redistribution must be conditioned upon including
+ * a substantially similar Disclaimer requirement for further binary
+ * redistribution.
+ * 3. Neither the name of the LSI Logic Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
+ * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *
+ * Name: mpi_tool.h
+ * Title: MPI Toolbox structures and definitions
+ * Creation Date: July 30, 2001
+ *
+ * mpi_tool.h Version: 01.05.03
+ *
+ * Version History
+ * ---------------
+ *
+ * Date Version Description
+ * -------- -------- ------------------------------------------------------
+ * 08-08-01 01.02.01 Original release.
+ * 08-29-01 01.02.02 Added DIAG_DATA_UPLOAD_HEADER and related defines.
+ * 01-16-04 01.02.03 Added defines and structures for new tools
+ *. MPI_TOOLBOX_ISTWI_READ_WRITE_TOOL and
+ * MPI_TOOLBOX_FC_MANAGEMENT_TOOL.
+ * 04-29-04 01.02.04 Added message structures for Diagnostic Buffer Post and
+ * Diagnostic Release requests and replies.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
+ * 10-06-04 01.05.02 Added define for MPI_DIAG_BUF_TYPE_COUNT.
+ * 02-09-05 01.05.03 Added frame size option to FC management tool.
+ * Added Beacon tool to the Toolbox.
+ * --------------------------------------------------------------------------
+ */
+
+#ifndef MPI_TOOL_H
+#define MPI_TOOL_H
+
+#define MPI_TOOLBOX_CLEAN_TOOL (0x00)
+#define MPI_TOOLBOX_MEMORY_MOVE_TOOL (0x01)
+#define MPI_TOOLBOX_DIAG_DATA_UPLOAD_TOOL (0x02)
+#define MPI_TOOLBOX_ISTWI_READ_WRITE_TOOL (0x03)
+#define MPI_TOOLBOX_FC_MANAGEMENT_TOOL (0x04)
+#define MPI_TOOLBOX_BEACON_TOOL (0x05)
+
+
+/****************************************************************************/
+/* Toolbox reply */
+/****************************************************************************/
+
+typedef struct _MSG_TOOLBOX_REPLY
+{
+ U8 Tool; /* 00h */
+ U8 Reserved; /* 01h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved1; /* 04h */
+ U8 Reserved2; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U16 Reserved3; /* 0Ch */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+} MSG_TOOLBOX_REPLY, MPI_POINTER PTR_MSG_TOOLBOX_REPLY,
+ ToolboxReply_t, MPI_POINTER pToolboxReply_t;
+
+
+/****************************************************************************/
+/* Toolbox Clean Tool request */
+/****************************************************************************/
+
+typedef struct _MSG_TOOLBOX_CLEAN_REQUEST
+{
+ U8 Tool; /* 00h */
+ U8 Reserved; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved1; /* 04h */
+ U8 Reserved2; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 Flags; /* 0Ch */
+} MSG_TOOLBOX_CLEAN_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_CLEAN_REQUEST,
+ ToolboxCleanRequest_t, MPI_POINTER pToolboxCleanRequest_t;
+
+#define MPI_TOOLBOX_CLEAN_NVSRAM (0x00000001)
+#define MPI_TOOLBOX_CLEAN_SEEPROM (0x00000002)
+#define MPI_TOOLBOX_CLEAN_FLASH (0x00000004)
+#define MPI_TOOLBOX_CLEAN_BOOTLOADER (0x04000000)
+#define MPI_TOOLBOX_CLEAN_FW_BACKUP (0x08000000)
+#define MPI_TOOLBOX_CLEAN_FW_CURRENT (0x10000000)
+#define MPI_TOOLBOX_CLEAN_OTHER_PERSIST_PAGES (0x20000000)
+#define MPI_TOOLBOX_CLEAN_PERSIST_MANUFACT_PAGES (0x40000000)
+#define MPI_TOOLBOX_CLEAN_BOOT_SERVICES (0x80000000)
+
+
+/****************************************************************************/
+/* Toolbox Memory Move request */
+/****************************************************************************/
+
+typedef struct _MSG_TOOLBOX_MEM_MOVE_REQUEST
+{
+ U8 Tool; /* 00h */
+ U8 Reserved; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved1; /* 04h */
+ U8 Reserved2; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ SGE_SIMPLE_UNION SGL; /* 0Ch */
+} MSG_TOOLBOX_MEM_MOVE_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_MEM_MOVE_REQUEST,
+ ToolboxMemMoveRequest_t, MPI_POINTER pToolboxMemMoveRequest_t;
+
+
+/****************************************************************************/
+/* Toolbox Diagnostic Data Upload request */
+/****************************************************************************/
+
+typedef struct _MSG_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST
+{
+ U8 Tool; /* 00h */
+ U8 Reserved; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved1; /* 04h */
+ U8 Reserved2; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 Flags; /* 0Ch */
+ U32 Reserved3; /* 10h */
+ SGE_SIMPLE_UNION SGL; /* 14h */
+} MSG_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST,
+ ToolboxDiagDataUploadRequest_t, MPI_POINTER pToolboxDiagDataUploadRequest_t;
+
+typedef struct _DIAG_DATA_UPLOAD_HEADER
+{
+ U32 DiagDataLength; /* 00h */
+ U8 FormatCode; /* 04h */
+ U8 Reserved; /* 05h */
+ U16 Reserved1; /* 06h */
+} DIAG_DATA_UPLOAD_HEADER, MPI_POINTER PTR_DIAG_DATA_UPLOAD_HEADER,
+ DiagDataUploadHeader_t, MPI_POINTER pDiagDataUploadHeader_t;
+
+#define MPI_TB_DIAG_FORMAT_SCSI_PRINTF_1 (0x01)
+#define MPI_TB_DIAG_FORMAT_SCSI_2 (0x02)
+#define MPI_TB_DIAG_FORMAT_SCSI_3 (0x03)
+#define MPI_TB_DIAG_FORMAT_FC_TRACE_1 (0x04)
+
+
+/****************************************************************************/
+/* Toolbox ISTWI Read Write request */
+/****************************************************************************/
+
+typedef struct _MSG_TOOLBOX_ISTWI_READ_WRITE_REQUEST
+{
+ U8 Tool; /* 00h */
+ U8 Reserved; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved1; /* 04h */
+ U8 Reserved2; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 Flags; /* 0Ch */
+ U8 BusNum; /* 0Dh */
+ U16 Reserved3; /* 0Eh */
+ U8 NumAddressBytes; /* 10h */
+ U8 Reserved4; /* 11h */
+ U16 DataLength; /* 12h */
+ U8 DeviceAddr; /* 14h */
+ U8 Addr1; /* 15h */
+ U8 Addr2; /* 16h */
+ U8 Addr3; /* 17h */
+ U32 Reserved5; /* 18h */
+ SGE_SIMPLE_UNION SGL; /* 1Ch */
+} MSG_TOOLBOX_ISTWI_READ_WRITE_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_ISTWI_READ_WRITE_REQUEST,
+ ToolboxIstwiReadWriteRequest_t, MPI_POINTER pToolboxIstwiReadWriteRequest_t;
+
+#define MPI_TB_ISTWI_FLAGS_WRITE (0x00)
+#define MPI_TB_ISTWI_FLAGS_READ (0x01)
+
+
+/****************************************************************************/
+/* Toolbox FC Management request */
+/****************************************************************************/
+
+/* ActionInfo for Bus and TargetId */
+typedef struct _MPI_TB_FC_MANAGE_BUS_TID_AI
+{
+ U16 Reserved; /* 00h */
+ U8 Bus; /* 02h */
+ U8 TargetId; /* 03h */
+} MPI_TB_FC_MANAGE_BUS_TID_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_BUS_TID_AI,
+ MpiTbFcManageBusTidAi_t, MPI_POINTER pMpiTbFcManageBusTidAi_t;
+
+/* ActionInfo for port identifier */
+typedef struct _MPI_TB_FC_MANAGE_PID_AI
+{
+ U32 PortIdentifier; /* 00h */
+} MPI_TB_FC_MANAGE_PID_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_PID_AI,
+ MpiTbFcManagePidAi_t, MPI_POINTER pMpiTbFcManagePidAi_t;
+
+/* ActionInfo for set max frame size */
+typedef struct _MPI_TB_FC_MANAGE_FRAME_SIZE_AI
+{
+ U16 FrameSize; /* 00h */
+ U8 PortNum; /* 02h */
+ U8 Reserved1; /* 03h */
+} MPI_TB_FC_MANAGE_FRAME_SIZE_AI, MPI_POINTER PTR_MPI_TB_FC_MANAGE_FRAME_SIZE_AI,
+ MpiTbFcManageFrameSizeAi_t, MPI_POINTER pMpiTbFcManageFrameSizeAi_t;
+
+/* union of ActionInfo */
+typedef union _MPI_TB_FC_MANAGE_AI_UNION
+{
+ MPI_TB_FC_MANAGE_BUS_TID_AI BusTid;
+ MPI_TB_FC_MANAGE_PID_AI Port;
+ MPI_TB_FC_MANAGE_FRAME_SIZE_AI FrameSize;
+} MPI_TB_FC_MANAGE_AI_UNION, MPI_POINTER PTR_MPI_TB_FC_MANAGE_AI_UNION,
+ MpiTbFcManageAiUnion_t, MPI_POINTER pMpiTbFcManageAiUnion_t;
+
+typedef struct _MSG_TOOLBOX_FC_MANAGE_REQUEST
+{
+ U8 Tool; /* 00h */
+ U8 Reserved; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved1; /* 04h */
+ U8 Reserved2; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 Action; /* 0Ch */
+ U8 Reserved3; /* 0Dh */
+ U16 Reserved4; /* 0Eh */
+ MPI_TB_FC_MANAGE_AI_UNION ActionInfo; /* 10h */
+} MSG_TOOLBOX_FC_MANAGE_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_FC_MANAGE_REQUEST,
+ ToolboxFcManageRequest_t, MPI_POINTER pToolboxFcManageRequest_t;
+
+/* defines for the Action field */
+#define MPI_TB_FC_MANAGE_ACTION_DISC_ALL (0x00)
+#define MPI_TB_FC_MANAGE_ACTION_DISC_PID (0x01)
+#define MPI_TB_FC_MANAGE_ACTION_DISC_BUS_TID (0x02)
+#define MPI_TB_FC_MANAGE_ACTION_SET_MAX_FRAME_SIZE (0x03)
+
+
+/****************************************************************************/
+/* Toolbox Beacon Tool request */
+/****************************************************************************/
+
+typedef struct _MSG_TOOLBOX_BEACON_REQUEST
+{
+ U8 Tool; /* 00h */
+ U8 Reserved; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved1; /* 04h */
+ U8 Reserved2; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U8 ConnectNum; /* 0Ch */
+ U8 PortNum; /* 0Dh */
+ U8 Reserved3; /* 0Eh */
+ U8 Flags; /* 0Fh */
+} MSG_TOOLBOX_BEACON_REQUEST, MPI_POINTER PTR_MSG_TOOLBOX_BEACON_REQUEST,
+ ToolboxBeaconRequest_t, MPI_POINTER pToolboxBeaconRequest_t;
+
+#define MPI_TOOLBOX_FLAGS_BEACON_MODE_OFF (0x00)
+#define MPI_TOOLBOX_FLAGS_BEACON_MODE_ON (0x01)
+
+
+/****************************************************************************/
+/* Diagnostic Buffer Post request */
+/****************************************************************************/
+
+typedef struct _MSG_DIAG_BUFFER_POST_REQUEST
+{
+ U8 TraceLevel; /* 00h */
+ U8 BufferType; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved1; /* 04h */
+ U8 Reserved2; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U32 ExtendedType; /* 0Ch */
+ U32 BufferLength; /* 10h */
+ U32 ProductSpecific[4]; /* 14h */
+ U32 Reserved3; /* 24h */
+ U64 BufferAddress; /* 28h */
+} MSG_DIAG_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_DIAG_BUFFER_POST_REQUEST,
+ DiagBufferPostRequest_t, MPI_POINTER pDiagBufferPostRequest_t;
+
+#define MPI_DIAG_BUF_TYPE_TRACE (0x00)
+#define MPI_DIAG_BUF_TYPE_SNAPSHOT (0x01)
+#define MPI_DIAG_BUF_TYPE_EXTENDED (0x02)
+/* count of the number of buffer types */
+#define MPI_DIAG_BUF_TYPE_COUNT (0x03)
+
+#define MPI_DIAG_EXTENDED_QTAG (0x00000001)
+
+
+/* Diagnostic Buffer Post reply */
+typedef struct _MSG_DIAG_BUFFER_POST_REPLY
+{
+ U8 Reserved1; /* 00h */
+ U8 BufferType; /* 01h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved2; /* 04h */
+ U8 Reserved3; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U16 Reserved4; /* 0Ch */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+ U32 TransferLength; /* 14h */
+} MSG_DIAG_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_DIAG_BUFFER_POST_REPLY,
+ DiagBufferPostReply_t, MPI_POINTER pDiagBufferPostReply_t;
+
+
+/****************************************************************************/
+/* Diagnostic Release request */
+/****************************************************************************/
+
+typedef struct _MSG_DIAG_RELEASE_REQUEST
+{
+ U8 Reserved1; /* 00h */
+ U8 BufferType; /* 01h */
+ U8 ChainOffset; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved2; /* 04h */
+ U8 Reserved3; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+} MSG_DIAG_RELEASE_REQUEST, MPI_POINTER PTR_MSG_DIAG_RELEASE_REQUEST,
+ DiagReleaseRequest_t, MPI_POINTER pDiagReleaseRequest_t;
+
+
+/* Diagnostic Release reply */
+typedef struct _MSG_DIAG_RELEASE_REPLY
+{
+ U8 Reserved1; /* 00h */
+ U8 BufferType; /* 01h */
+ U8 MsgLength; /* 02h */
+ U8 Function; /* 03h */
+ U16 Reserved2; /* 04h */
+ U8 Reserved3; /* 06h */
+ U8 MsgFlags; /* 07h */
+ U32 MsgContext; /* 08h */
+ U16 Reserved4; /* 0Ch */
+ U16 IOCStatus; /* 0Eh */
+ U32 IOCLogInfo; /* 10h */
+} MSG_DIAG_RELEASE_REPLY, MPI_POINTER PTR_MSG_DIAG_RELEASE_REPLY,
+ DiagReleaseReply_t, MPI_POINTER pDiagReleaseReply_t;
+
+
+#endif
diff --git a/sys/dev/mpt/mpilib/mpi_type.h b/sys/dev/mpt/mpilib/mpi_type.h
index c505388..76c5fba 100644
--- a/sys/dev/mpt/mpilib/mpi_type.h
+++ b/sys/dev/mpt/mpilib/mpi_type.h
@@ -28,13 +28,13 @@
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
* OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *
- * Name: MPI_TYPE.H
+ *
+ *
+ * Name: mpi_type.h
* Title: MPI Basic type definitions
* Creation Date: June 6, 2000
*
- * MPI Version: 01.02.01
+ * mpi_type.h Version: 01.05.01
*
* Version History
* ---------------
@@ -46,6 +46,8 @@
* 11-02-00 01.01.01 Original release for post 1.0 work
* 02-20-01 01.01.02 Added define and ifdef for MPI_POINTER.
* 08-08-01 01.02.01 Original release for v1.2 work.
+ * 05-11-04 01.03.01 Original release for MPI v1.3.
+ * 08-19-04 01.05.01 Original release for MPI v1.5.
* --------------------------------------------------------------------------
*/
diff --git a/sys/dev/mpt/mpt_debug.c b/sys/dev/mpt/mpt_debug.c
index 0dce5f7..b745c43 100644
--- a/sys/dev/mpt/mpt_debug.c
+++ b/sys/dev/mpt/mpt_debug.c
@@ -112,29 +112,6 @@ static const struct Error_Map IOC_Func[] = {
{ MPI_FUNCTION_TARGET_ASSIST, "Target Assist" },
{ MPI_FUNCTION_TARGET_STATUS_SEND, "Target Status Send" },
{ MPI_FUNCTION_TARGET_MODE_ABORT, "Target Mode Abort" },
-{ MPI_FUNCTION_TARGET_FC_BUF_POST_LINK_SRVC, "FC: Link Service Buffers" },
-{ MPI_FUNCTION_TARGET_FC_RSP_LINK_SRVC, "FC: Link Service Response" },
-{ MPI_FUNCTION_TARGET_FC_EX_SEND_LINK_SRVC, "FC: Send Extended Link Service" },
-{ MPI_FUNCTION_TARGET_FC_ABORT, "FC: Abort" },
-{ MPI_FUNCTION_FC_LINK_SRVC_BUF_POST, "FC: Link Service Buffers" },
-{ MPI_FUNCTION_FC_LINK_SRVC_RSP, "FC: Link Server Response" },
-{ MPI_FUNCTION_FC_EX_LINK_SRVC_SEND, "FC: Send Extended Link Service" },
-{ MPI_FUNCTION_FC_ABORT, "FC: Abort" },
-{ MPI_FUNCTION_FW_UPLOAD, "FW Upload" },
-{ MPI_FUNCTION_FC_COMMON_TRANSPORT_SEND, "FC: Send Common Transport" },
-{ MPI_FUNCTION_FC_PRIMITIVE_SEND, "FC: Send Primitive" },
-{ MPI_FUNCTION_RAID_ACTION, "RAID Action" },
-{ MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH, "RAID SCSI Pass-Through" },
-{ MPI_FUNCTION_TOOLBOX, "Toolbox Command" },
-{ MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR, "SCSI Enclosure Proc. Command" },
-{ MPI_FUNCTION_MAILBOX, "Mailbox Command" },
-{ MPI_FUNCTION_LAN_SEND, "LAN Send" },
-{ MPI_FUNCTION_LAN_RECEIVE, "LAN Recieve" },
-{ MPI_FUNCTION_LAN_RESET, "LAN Reset" },
-{ MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, "IOC Message Unit Reset" },
-{ MPI_FUNCTION_IO_UNIT_RESET, "IO Unit Reset" },
-{ MPI_FUNCTION_HANDSHAKE, "Handshake" },
-{ MPI_FUNCTION_REPLY_FRAME_REMOVAL, "Reply Frame Removal" },
{ -1, 0},
};
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