summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorps <ps@FreeBSD.org>2006-04-10 19:55:23 +0000
committerps <ps@FreeBSD.org>2006-04-10 19:55:23 +0000
commitc2fa353e653a723b0eafa47c1e8ae0e1ed569b44 (patch)
treec2e9c0c6bd41bacd72850577a680ff24feaaaa2c
parent7387c6237a0d559cee34d99e4cd2e52c88652cae (diff)
downloadFreeBSD-src-c2fa353e653a723b0eafa47c1e8ae0e1ed569b44.zip
FreeBSD-src-c2fa353e653a723b0eafa47c1e8ae0e1ed569b44.tar.gz
Add a driver for the Broadcom NetXtreme II (BCM5706/BCM5708)
PCI/PCIe Gigabit Ethernet adapeter. Submitted by: David Christensen
Diffstat
-rw-r--r--share/man/man4/bce.4293
-rw-r--r--sys/dev/bce/if_bce.c6797
-rw-r--r--sys/dev/bce/if_bcefw.h3508
-rw-r--r--sys/dev/bce/if_bcereg.h4904
-rw-r--r--sys/dev/mii/brgphy.c108
-rw-r--r--sys/dev/mii/miidevs2
-rw-r--r--sys/modules/bce/Makefile8
7 files changed, 15594 insertions, 26 deletions
diff --git a/share/man/man4/bce.4 b/share/man/man4/bce.4
new file mode 100644
index 0000000..67a3157
--- /dev/null
+++ b/share/man/man4/bce.4
@@ -0,0 +1,293 @@
+.\"Copyright (c) 2006 Broadcom Corporation
+.\" David Christensen <davidch@broadcom.com>. All rights reserved.
+.\"
+.\"Redistribution and use in source and binary forms, with or without
+.\"modification, are permitted provided that the following conditions
+.\"are met:
+.\"
+.\"1. Redistributions of source code must retain the above copyright
+.\" notice, this list of conditions and the following disclaimer.
+.\"2. Redistributions in binary form must reproduce the above copyright
+.\" notice, this list of conditions and the following disclaimer in the
+.\" documentation and/or other materials provided with the distribution.
+.\"3. Neither the name of Broadcom Corporation nor the name of its contributors
+.\" may be used to endorse or promote products derived from this software
+.\" without specific prior written consent.
+.\"
+.\"THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
+.\"AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+.\"IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+.\"ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+.\"BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+.\"CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+.\"SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+.\"INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+.\"CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+.\"ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+.\"THE POSSIBILITY OF SUCH DAMAGE.
+\"
+.\" $FreeBSD$
+.\"
+.Dd April 4, 2006
+.Dt BCE 4
+.Os
+.Sh NAME
+.Nm bce
+.Nd "Broadcom NetXtreme II (BCM5706/BCM5708) PCI/PCIe Gigabit Ethernet adapter driver"
+.Sh SYNOPSIS
+To compile this driver into the kernel,
+place the following lines in your
+kernel configuration file:
+.Bd -ragged -offset indent
+.Cd "device miibus"
+.Cd "device bce"
+.Ed
+.Pp
+Alternatively, to load the driver as a
+module at boot time, place the following line in
+.Xr loader.conf 5 :
+.Bd -literal -offset indent
+if_bce_load="YES"
+.Ed
+.Sh DESCRIPTION
+The
+.Nm
+driver supports Broadcom's NetXtreme II product family, including the
+BCM5706 and BCM5708 Ethernet controllers.
+.Pp
+The NetXtreme II product family is composed of various Converged NIC (or CNIC)
+Ethernet controllers which support a TCP Offload Engine (TOE), Remote DMA (RDMA),
+and iSCSI acceleration, in addtion to standard L2 Ethernet traffic, all on the
+same controller. The following features are supported in the
+.Nm
+driver under FreeBSD:
+.Bd -literal -offset indent
+IP/TCP/UDP checksum offload
+Jumbo frames (up to 9022 bytes)
+VLAN tag stripping
+Interrupt coalescing
+10/100/1000Mbps operation in full-duplex mode
+10/100Mbps operation in half-duplex mode
+.Ed
+.Pp
+The
+.Nm
+driver supports the following media types:
+.Bl -tag -width ".Cm 10baseT/UTP"
+.It Cm autoselect
+Enable autoselection of the media type and options.
+The user can manually override
+the autoselected mode by adding media options to
+.Xr rc.conf 5 .
+.It Cm 10baseT/UTP
+Set 10Mbps operation.
+The
+.Xr ifconfig 8
+.Ic mediaopt
+option can also be used to select either
+.Cm full-duplex
+or
+.Cm half-duplex
+modes.
+.It Cm 100baseTX
+Set 100Mbps (Fast Ethernet) operation.
+The
+.Xr ifconfig 8
+.Ic mediaopt
+option can also be used to select either
+.Cm full-duplex
+or
+.Cm half-duplex
+modes.
+.It Cm 1000baseTX
+Set 1000baseTX operation over twisted pair.
+Only
+.Cm full-duplex
+mode is supported.
+.El
+.Pp
+The
+.Nm
+driver supports the following media options:
+.Bl -tag -width ".Cm full-duplex"
+.It Cm full-duplex
+Force full duplex operation.
+.It Cm half-duplex
+Force half duplex operation.
+.El
+.Pp
+For more information on configuring this device, see
+.Xr ifconfig 8 .
+.Sh HARDWARE
+The
+.Nm
+driver provides support for various NICs based on the Broadcom NetXtreme II
+family of Gigabit Ethernet controller, including the
+following:
+.Pp
+.Bl -bullet -compact
+.It
+HP NC370T Multifunction Gigabit Server Adapter
+.It
+HP NC370i Multifunction Gigabit Server Adapter
+.El
+.Sh DIAGNOSTICS
+.Bl -diag
+.It "bce%d: PCI memory allocation failed!"
+The driver has encountered a fatal initialization error.
+.It "bce%d: PCI map interrupt failed!"
+The driver has encountered a fatal initialization error.
+.It "bce%d: Unsupported controller revision (%c%d)"
+The driver does not support the controller revision in use.
+.It "bce%d: SerDes controllers are not supported!"
+The driver does not currently support SerDes/Fiber versions of the
+NetXtreme II controller.
+.It "bce%d: Controller initialization failed!"
+The driver has encountered a fatal initialization error.
+.It "bce%d: NVRAM test failed!"
+The driver could not access the controller NVRAM correctly.
+.It "bce%d: DMA resource allocation failed!"
+The driver could not allocate DMA memory to setup the controllers
+host memory data structures.
+.It "bce%d: Interface allocation failed!"
+The driver could not create a network interface for the controller.
+.It "bce%d: PHY probe failed!"
+The driver could not access the PHY used by the controller.
+.It "bce%d: Failed to setup IRQ!"
+The driver could not initialize the IRQ handler.
+.It "bce%d: Error: PHY read timeout!"
+The driver could not read a PHY register before the timeout period expired.
+.It "bce%d: PHY write timeout!"
+The driver could not write to the PHY register because a timeout occurred.
+.It "bce%d: Timeout error reading NVRAM at offset 0x%08X!"
+The driver could not write to NVRAM because a timeout occurred.
+.It "bce%d: Unknown Flash NVRAM found!"
+The driver does not recognize the NVRAM device being used and therefore
+cannot access it correctly.
+.It "bce%d: Invalid NVRAM magic value!"
+The driver cannot read NVRAM or the NVRAM is corrupt.
+.It "bce%d: Invalid Manufacturing Information NVRAM CRC!"
+The driver cannot read NVRAM or the NVRAM is corrupt.
+.It "bce%d: Invalid Feature Configuration Information NVRAM CRC!"
+The driver cannot read NVRAM or the NVRAM is corrupt.
+.It "bce%d: DMA mapping error!"
+The driver was unable to map memory into DMA addressable space required
+by the controller.
+.It "bce%d: Could not allocate parent DMA tag!"
+The driver could not allocate a PCI compatible DMA tag.
+.It "bce%d: Could not allocate status block DMA tag!"
+The driver could not allocate a DMA tag for the controller's
+status block.
+.It "bce%d: Could not allocate status block DMA memory!"
+The driver could not allocate DMA addressable memory for the controller's
+status block.
+.It "bce_d: Could not map status block DMA memory!"
+The driver could not map the status block memory into the controller's DMA
+address space.
+.It "bce%d: Could not allocate statistics block DMA tag!"
+The driver could not allocate a DMA tag for the controller's
+statistics block.
+.It "bce%d: Could not allocate statistics block DMA memory!"
+The driver could not allocate DMA addressable memory for the controller's
+statistics block.
+.It "bce%d: Could not map statistics block DMA memory!"
+The driver could not map the statistics block memory into the controller's DMA
+address space.
+.It "bce%d: Could not allocate TX descriptor chain DMA tag!"
+The driver could not allocate a DMA tag for the controller's
+TX chain.
+.It "bce%d: Could not allocate TX descriptor chain DMA memory!
+The driver could not allocate DMA addressable memory for the controller's
+TX chain.
+.It "bce%d: Could not map TX descriptor chain DMA memory!"
+The driver could not map the TX descriptor chain memory into the controller's DMA
+address space.
+.It "bce%d: Could not allocate TX mbuf DMA tag!"
+The driver could not allocate a DMA tag for the controller's
+TX mbuf memory.
+.It "bce%d: Unable to create TX mbuf DMA map!"
+The driver could not map the TX mbuf memory into the controller's DMA
+address space.
+.It "bce%d: Could not allocate RX descriptor chain DMA tag!"
+The driver could not allocate a DMA tag for the controller's
+RX chain.
+.It "bce%d: Could not allocate RX descriptor chain "
+The driver could not allocate DMA addressable memory for the controller's
+RX chain.
+.It "bce%d: Could not map RX descriptor chain DMA memory!"
+The driver could not map the RX descriptor chain memory into the controller's DMA
+address space.
+.It "bce%d: Could not allocate RX mbuf DMA tag!"
+The driver could not allocate a DMA tag for the controller's
+RX mbuf memory.
+.It "bce%d: Unable to create RX mbuf DMA map!"
+The driver could not map the RX mbuf memory into the controller's DMA
+address space.
+.It "bce%d: Firmware synchronization timeout!"
+The driver was not able to synchronize with the firmware running on the
+controller. The firmware may be stopped or hung.
+.It "bce%d: Invalid Ethernet address!"
+The driver was not able to read a vaild Ethernet MAC address from NVRAM.
+.It "bce%d: Reset failed!"
+The driver has encountered a fatal initialization error.
+.It "bce%d: Byte swap is incorrect!"
+The driver has encountered a fatal initialization error. Contact the author
+with details of the CPU architecture and system chipset in use.
+.It "bce%d: Firmware did not complete initialization!"
+The driver has encountered a fatal initialization error.
+.It "bce%d: Bootcode not running!"
+The driver has encountered a fatal initialization error.
+.It "bce%d: Error mapping mbuf into RX chain!"
+The driver could not map a RX mbuf into DMA addressable memory.
+.It "bce%d: Error filling RX chain: rx_bd[0x%04X]!"
+The driver was unable to allocate enough mbufs to fill the RX chain
+during initialization. Try increasing the number of mbufs available in
+the system, increase system memory, or if using jumbo frames, make sure
+enough 9KB mbufs are available.
+.It "bce%d: Failed to allocate new mbuf, incoming frame dropped!"
+The driver was unable to allocate a new mbuf for the RX chain and reused
+the mbuf for the received frame, dropping the incoming frame in the process.
+Try increasing the number of mbufs available in the system or increase system
+memory.
+.It "bce%d: Controller reset failed!"
+A fatal initialization error has occurred.
+.It "bce%d: Controller initialization failed!"
+A fatal initialization error has occurred.
+.It "bce%d: Block initialization failed!"
+A fatal initialization error has occurred.
+.It "bce%d: Error mapping mbuf into TX chain!"
+The driver could not map a TX mbuf into DMA addressable memory.
+.It "bce%d: Error registering poll function!"
+The driver received an error while attempting to register the poll function.
+.It "bce%d: Changing VLAN_MTU not supported."
+Changing the VLAN MTU is not currently supported by the driver.
+.It "bce%d: Cannot change VLAN_HWTAGGING while management firmware (ASF/IPMI/UMP) is running!"
+Management firmware to support ASF/IPMI/UMP requires that VLAN
+tag stripping be enabled in the controller.
+.It "bce%d: Changing VLAN_HWTAGGING not supported!"
+Disabling VLAN tag stripping is not currently supported by the driver.
+.It "bce%d: Watchdog timeout occurred, resetting!"
+The device has stopped responding to the network, there is a problem
+with the cable connection, or a driver logic problem has occurred..
+.It "bce%d: Fatal attention detected: 0x%08X!"
+A controller hardware failure has occurred. If the problem continues replace
+the controller.
+.El
+.Sh SEE ALSO
+.Xr arp 4 ,
+.Xr miibus 4 ,
+.Xr netintro 4 ,
+.Xr ng_ether 4 ,
+.Xr polling 4 ,
+.Xr vlan 4 ,
+.Xr ifconfig 8
+.Sh HISTORY
+The
+.Nm
+device driver first appeared in
+.Fx 6.1 .
+.Sh AUTHORS
+The
+.Nm
+driver was written by
+.An David Christensen Aq davidch@broadcom.com .
diff --git a/sys/dev/bce/if_bce.c b/sys/dev/bce/if_bce.c
new file mode 100644
index 0000000..c961a6d
--- /dev/null
+++ b/sys/dev/bce/if_bce.c
@@ -0,0 +1,6797 @@
+/*-
+ * Copyright (c) 2006 Broadcom Corporation
+ * David Christensen <davidch@broadcom.com>. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Broadcom Corporation nor the name of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written consent.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * The following controllers are supported by this driver:
+ * BCM5706C A2, A3
+ * BCM5708C B1
+ *
+ * The following controllers are not supported by this driver:
+ * (These are not "Production" versions of the controller.)
+ *
+ * BCM5706C A0, A1
+ * BCM5706S A0, A1, A2, A3
+ * BCM5708C A0, B0
+ * BCM5708S A0, B0, B1
+ */
+
+#include <dev/bce/if_bcereg.h>
+#include <dev/bce/if_bcefw.h>
+
+/****************************************************************************/
+/* BCE Driver Version */
+/****************************************************************************/
+char bce_driver_version[] = "v0.9.5";
+
+
+/****************************************************************************/
+/* BCE Debug Options */
+/****************************************************************************/
+#ifdef BCE_DEBUG
+ u32 bce_debug = BCE_WARN;
+
+ /* 0 = Never */
+ /* 1 = 1 in 2,147,483,648 */
+ /* 256 = 1 in 8,388,608 */
+ /* 2048 = 1 in 1,048,576 */
+ /* 65536 = 1 in 32,768 */
+ /* 1048576 = 1 in 2,048 */
+ /* 268435456 = 1 in 8 */
+ /* 536870912 = 1 in 4 */
+ /* 1073741824 = 1 in 2 */
+
+ /* Controls how often the l2_fhdr frame error check will fail. */
+ int bce_debug_l2fhdr_status_check = 0;
+
+ /* Controls how often the unexpected attention check will fail. */
+ int bce_debug_unexpected_attention = 0;
+
+ /* Controls how often to simulate an mbuf allocation failure. */
+ int bce_debug_mbuf_allocation_failure = 0;
+
+ /* Controls how often to simulate a DMA mapping failure. */
+ int bce_debug_dma_map_addr_failure = 0;
+
+ /* Controls how often to simulate a bootcode failure. */
+ int bce_debug_bootcode_running_failure = 0;
+#endif
+
+
+/****************************************************************************/
+/* PCI Device ID Table */
+/* */
+/* Used by bce_probe() to identify the devices supported by this driver. */
+/****************************************************************************/
+#define BCE_DEVDESC_MAX 64
+
+static struct bce_type bce_devs[] = {
+ /* BCM5706C Controllers and OEM boards. */
+ { BRCM_VENDORID, BRCM_DEVICEID_BCM5706, HP_VENDORID, 0x3101,
+ "HP NC370T Multifunction Gigabit Server Adapter" },
+ { BRCM_VENDORID, BRCM_DEVICEID_BCM5706, HP_VENDORID, 0x3106,
+ "HP NC370i Multifunction Gigabit Server Adapter" },
+ { BRCM_VENDORID, BRCM_DEVICEID_BCM5706, PCI_ANY_ID, PCI_ANY_ID,
+ "Broadcom NetXtreme II BCM5706 1000Base-T" },
+
+ /* BCM5706S controllers and OEM boards. */
+ { BRCM_VENDORID, BRCM_DEVICEID_BCM5706S, HP_VENDORID, 0x3102,
+ "HP NC370F Multifunction Gigabit Server Adapter" },
+ { BRCM_VENDORID, BRCM_DEVICEID_BCM5706S, PCI_ANY_ID, PCI_ANY_ID,
+ "Broadcom NetXtreme II BCM5706 1000Base-SX" },
+
+ /* BCM5708C controllers and OEM boards. */
+ { BRCM_VENDORID, BRCM_DEVICEID_BCM5708, PCI_ANY_ID, PCI_ANY_ID,
+ "Broadcom NetXtreme II BCM5708 1000Base-T" },
+
+ /* BCM5708S controllers and OEM boards. */
+ { BRCM_VENDORID, BRCM_DEVICEID_BCM5708, PCI_ANY_ID, PCI_ANY_ID,
+ "Broadcom NetXtreme II BCM5708 1000Base-T" },
+ { 0, 0, 0, 0, NULL }
+};
+
+
+/****************************************************************************/
+/* Supported Flash NVRAM device data. */
+/****************************************************************************/
+static struct flash_spec flash_table[] =
+{
+ /* Slow EEPROM */
+ {0x00000000, 0x40830380, 0x009f0081, 0xa184a053, 0xaf000400,
+ 1, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
+ SEEPROM_BYTE_ADDR_MASK, SEEPROM_TOTAL_SIZE,
+ "EEPROM - slow"},
+ /* Expansion entry 0001 */
+ {0x08000002, 0x4b808201, 0x00050081, 0x03840253, 0xaf020406,
+ 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+ SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
+ "Entry 0001"},
+ /* Saifun SA25F010 (non-buffered flash) */
+ /* strap, cfg1, & write1 need updates */
+ {0x04000001, 0x47808201, 0x00050081, 0x03840253, 0xaf020406,
+ 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+ SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE*2,
+ "Non-buffered flash (128kB)"},
+ /* Saifun SA25F020 (non-buffered flash) */
+ /* strap, cfg1, & write1 need updates */
+ {0x0c000003, 0x4f808201, 0x00050081, 0x03840253, 0xaf020406,
+ 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+ SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE*4,
+ "Non-buffered flash (256kB)"},
+ /* Expansion entry 0100 */
+ {0x11000000, 0x53808201, 0x00050081, 0x03840253, 0xaf020406,
+ 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+ SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
+ "Entry 0100"},
+ /* Entry 0101: ST M45PE10 (non-buffered flash, TetonII B0) */
+ {0x19000002, 0x5b808201, 0x000500db, 0x03840253, 0xaf020406,
+ 0, ST_MICRO_FLASH_PAGE_BITS, ST_MICRO_FLASH_PAGE_SIZE,
+ ST_MICRO_FLASH_BYTE_ADDR_MASK, ST_MICRO_FLASH_BASE_TOTAL_SIZE*2,
+ "Entry 0101: ST M45PE10 (128kB non-bufferred)"},
+ /* Entry 0110: ST M45PE20 (non-buffered flash)*/
+ {0x15000001, 0x57808201, 0x000500db, 0x03840253, 0xaf020406,
+ 0, ST_MICRO_FLASH_PAGE_BITS, ST_MICRO_FLASH_PAGE_SIZE,
+ ST_MICRO_FLASH_BYTE_ADDR_MASK, ST_MICRO_FLASH_BASE_TOTAL_SIZE*4,
+ "Entry 0110: ST M45PE20 (256kB non-bufferred)"},
+ /* Saifun SA25F005 (non-buffered flash) */
+ /* strap, cfg1, & write1 need updates */
+ {0x1d000003, 0x5f808201, 0x00050081, 0x03840253, 0xaf020406,
+ 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+ SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE,
+ "Non-buffered flash (64kB)"},
+ /* Fast EEPROM */
+ {0x22000000, 0x62808380, 0x009f0081, 0xa184a053, 0xaf000400,
+ 1, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
+ SEEPROM_BYTE_ADDR_MASK, SEEPROM_TOTAL_SIZE,
+ "EEPROM - fast"},
+ /* Expansion entry 1001 */
+ {0x2a000002, 0x6b808201, 0x00050081, 0x03840253, 0xaf020406,
+ 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+ SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
+ "Entry 1001"},
+ /* Expansion entry 1010 */
+ {0x26000001, 0x67808201, 0x00050081, 0x03840253, 0xaf020406,
+ 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+ SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
+ "Entry 1010"},
+ /* ATMEL AT45DB011B (buffered flash) */
+ {0x2e000003, 0x6e808273, 0x00570081, 0x68848353, 0xaf000400,
+ 1, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
+ BUFFERED_FLASH_BYTE_ADDR_MASK, BUFFERED_FLASH_TOTAL_SIZE,
+ "Buffered flash (128kB)"},
+ /* Expansion entry 1100 */
+ {0x33000000, 0x73808201, 0x00050081, 0x03840253, 0xaf020406,
+ 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+ SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
+ "Entry 1100"},
+ /* Expansion entry 1101 */
+ {0x3b000002, 0x7b808201, 0x00050081, 0x03840253, 0xaf020406,
+ 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+ SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
+ "Entry 1101"},
+ /* Ateml Expansion entry 1110 */
+ {0x37000001, 0x76808273, 0x00570081, 0x68848353, 0xaf000400,
+ 1, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
+ BUFFERED_FLASH_BYTE_ADDR_MASK, 0,
+ "Entry 1110 (Atmel)"},
+ /* ATMEL AT45DB021B (buffered flash) */
+ {0x3f000003, 0x7e808273, 0x00570081, 0x68848353, 0xaf000400,
+ 1, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
+ BUFFERED_FLASH_BYTE_ADDR_MASK, BUFFERED_FLASH_TOTAL_SIZE*2,
+ "Buffered flash (256kB)"},
+};
+
+
+/****************************************************************************/
+/* FreeBSD device entry points. */
+/****************************************************************************/
+static int bce_probe (device_t);
+static int bce_attach (device_t);
+static int bce_detach (device_t);
+static void bce_shutdown (device_t);
+
+
+/****************************************************************************/
+/* BCE Debug Data Structure Dump Routines */
+/****************************************************************************/
+#ifdef BCE_DEBUG
+static void bce_dump_mbuf (struct bce_softc *, struct mbuf *);
+static void bce_dump_tx_mbuf_chain (struct bce_softc *, int, int);
+static void bce_dump_rx_mbuf_chain (struct bce_softc *, int, int);
+static void bce_dump_txbd (struct bce_softc *, int, struct tx_bd *);
+static void bce_dump_rxbd (struct bce_softc *, int, struct rx_bd *);
+static void bce_dump_l2fhdr (struct bce_softc *, int, struct l2_fhdr *);
+static void bce_dump_tx_chain (struct bce_softc *, int, int);
+static void bce_dump_rx_chain (struct bce_softc *, int, int);
+static void bce_dump_status_block (struct bce_softc *);
+static void bce_dump_stats_block (struct bce_softc *);
+static void bce_dump_driver_state (struct bce_softc *);
+static void bce_dump_hw_state (struct bce_softc *);
+static void bce_breakpoint (struct bce_softc *);
+#endif
+
+
+/****************************************************************************/
+/* BCE Register/Memory Access Routines */
+/****************************************************************************/
+static u32 bce_reg_rd_ind (struct bce_softc *, u32);
+static void bce_reg_wr_ind (struct bce_softc *, u32, u32);
+static void bce_ctx_wr (struct bce_softc *, u32, u32, u32);
+static int bce_miibus_read_reg (device_t, int, int);
+static int bce_miibus_write_reg (device_t, int, int, int);
+static void bce_miibus_statchg (device_t);
+
+
+/****************************************************************************/
+/* BCE NVRAM Access Routines */
+/****************************************************************************/
+static int bce_acquire_nvram_lock (struct bce_softc *);
+static int bce_release_nvram_lock (struct bce_softc *);
+static void bce_enable_nvram_access (struct bce_softc *);
+static void bce_disable_nvram_access(struct bce_softc *);
+static int bce_nvram_read_dword (struct bce_softc *, u32, u8 *, u32);
+static int bce_init_nvram (struct bce_softc *);
+static int bce_nvram_read (struct bce_softc *, u32, u8 *, int);
+static int bce_nvram_test (struct bce_softc *);
+#ifdef BCE_NVRAM_WRITE_SUPPORT
+static int bce_enable_nvram_write (struct bce_softc *);
+static void bce_disable_nvram_write (struct bce_softc *);
+static int bce_nvram_erase_page (struct bce_softc *, u32);
+static int bce_nvram_write_dword (struct bce_softc *, u32, u8 *, u32);
+static int bce_nvram_write (struct bce_softc *, u32, u8 *, int);
+#endif
+
+/****************************************************************************/
+/* */
+/****************************************************************************/
+static void bce_dma_map_addr (void *, bus_dma_segment_t *, int, int);
+static void bce_dma_map_tx_desc (void *, bus_dma_segment_t *, int, bus_size_t, int);
+static int bce_dma_alloc (device_t);
+static void bce_dma_free (struct bce_softc *);
+static void bce_release_resources (struct bce_softc *);
+
+/****************************************************************************/
+/* BCE Firmware Synchronization and Load */
+/****************************************************************************/
+static int bce_fw_sync (struct bce_softc *, u32);
+static void bce_load_rv2p_fw (struct bce_softc *, u32 *, u32, u32);
+static void bce_load_cpu_fw (struct bce_softc *, struct cpu_reg *, struct fw_info *);
+static void bce_init_cpus (struct bce_softc *);
+
+static void bce_stop (struct bce_softc *);
+static int bce_reset (struct bce_softc *, u32);
+static int bce_chipinit (struct bce_softc *);
+static int bce_blockinit (struct bce_softc *);
+static int bce_get_buf (struct bce_softc *, struct mbuf *, u16 *, u16 *, u32 *);
+
+static int bce_init_tx_chain (struct bce_softc *);
+static int bce_init_rx_chain (struct bce_softc *);
+static void bce_free_rx_chain (struct bce_softc *);
+static void bce_free_tx_chain (struct bce_softc *);
+
+static int bce_tx_encap (struct bce_softc *, struct mbuf *, u16 *, u16 *, u32 *);
+static void bce_start_locked (struct ifnet *);
+static void bce_start (struct ifnet *);
+static int bce_ioctl (struct ifnet *, u_long, caddr_t);
+static void bce_watchdog (struct ifnet *);
+static int bce_ifmedia_upd (struct ifnet *);
+static void bce_ifmedia_sts (struct ifnet *, struct ifmediareq *);
+static void bce_init_locked (struct bce_softc *);
+static void bce_init (void *);
+
+static void bce_init_context (struct bce_softc *);
+static void bce_get_mac_addr (struct bce_softc *);
+static void bce_set_mac_addr (struct bce_softc *);
+static void bce_phy_intr (struct bce_softc *);
+static void bce_rx_intr (struct bce_softc *);
+static void bce_tx_intr (struct bce_softc *);
+static void bce_disable_intr (struct bce_softc *);
+static void bce_enable_intr (struct bce_softc *);
+
+#ifdef DEVICE_POLLING
+static void bce_poll_locked (struct ifnet *, enum poll_cmd, int);
+static void bce_poll (struct ifnet *, enum poll_cmd, int);
+#endif
+static void bce_intr (void *);
+static void bce_set_rx_mode (struct bce_softc *);
+static void bce_stats_update (struct bce_softc *);
+static void bce_tick_locked (struct bce_softc *);
+static void bce_tick (void *);
+static void bce_add_sysctls (struct bce_softc *);
+
+
+/****************************************************************************/
+/* FreeBSD device dispatch table. */
+/****************************************************************************/
+static device_method_t bce_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, bce_probe),
+ DEVMETHOD(device_attach, bce_attach),
+ DEVMETHOD(device_detach, bce_detach),
+ DEVMETHOD(device_shutdown, bce_shutdown),
+
+ /* bus interface */
+ DEVMETHOD(bus_print_child, bus_generic_print_child),
+ DEVMETHOD(bus_driver_added, bus_generic_driver_added),
+
+ /* MII interface */
+ DEVMETHOD(miibus_readreg, bce_miibus_read_reg),
+ DEVMETHOD(miibus_writereg, bce_miibus_write_reg),
+ DEVMETHOD(miibus_statchg, bce_miibus_statchg),
+
+ { 0, 0 }
+};
+
+static driver_t bce_driver = {
+ "bce",
+ bce_methods,
+ sizeof(struct bce_softc)
+};
+
+static devclass_t bce_devclass;
+
+MODULE_DEPEND(bce, pci, 1, 1, 1);
+MODULE_DEPEND(bce, ether, 1, 1, 1);
+MODULE_DEPEND(bce, miibus, 1, 1, 1);
+
+DRIVER_MODULE(bce, pci, bce_driver, bce_devclass, 0, 0);
+DRIVER_MODULE(miibus, bce, miibus_driver, miibus_devclass, 0, 0);
+
+
+/****************************************************************************/
+/* Device probe function. */
+/* */
+/* Compares the device to the driver's list of supported devices and */
+/* reports back to the OS whether this is the right driver for the device. */
+/* */
+/* Returns: */
+/* BUS_PROBE_DEFAULT on success, positive value on failure. */
+/****************************************************************************/
+static int
+bce_probe(device_t dev)
+{
+ struct bce_type *t;
+ struct bce_softc *sc;
+ char *descbuf;
+ u16 vid = 0, did = 0, svid = 0, sdid = 0;
+
+ t = bce_devs;
+
+ sc = device_get_softc(dev);
+ bzero(sc, sizeof(struct bce_softc));
+ sc->bce_unit = device_get_unit(dev);
+ sc->bce_dev = dev;
+
+ /* Get the data for the device to be probed. */
+ vid = pci_get_vendor(dev);
+ did = pci_get_device(dev);
+ svid = pci_get_subvendor(dev);
+ sdid = pci_get_subdevice(dev);
+
+ DBPRINT(sc, BCE_VERBOSE_LOAD,
+ "%s(); VID = 0x%04X, DID = 0x%04X, SVID = 0x%04X, "
+ "SDID = 0x%04X\n", __FUNCTION__, vid, did, svid, sdid);
+
+ /* Look through the list of known devices for a match. */
+ while(t->bce_name != NULL) {
+
+ if ((vid == t->bce_vid) && (did == t->bce_did) &&
+ ((svid == t->bce_svid) || (t->bce_svid == PCI_ANY_ID)) &&
+ ((sdid == t->bce_sdid) || (t->bce_sdid == PCI_ANY_ID))) {
+
+ descbuf = malloc(BCE_DEVDESC_MAX, M_TEMP, M_NOWAIT);
+
+ if (descbuf == NULL)
+ return(ENOMEM);
+
+ /* Print out the device identity. */
+ snprintf(descbuf, BCE_DEVDESC_MAX, "%s (%c%d), %s",
+ t->bce_name,
+ (((pci_read_config(dev, PCIR_REVID, 4) & 0xf0) >> 4) + 'A'),
+ (pci_read_config(dev, PCIR_REVID, 4) & 0xf),
+ bce_driver_version);
+
+ device_set_desc_copy(dev, descbuf);
+ free(descbuf, M_TEMP);
+ return(BUS_PROBE_DEFAULT);
+ }
+ t++;
+ }
+
+ DBPRINT(sc, BCE_VERBOSE_LOAD, "%s(%d): No IOCTL match found!\n",
+ __FILE__, __LINE__);
+
+ return(ENXIO);
+}
+
+
+/****************************************************************************/
+/* Device attach function. */
+/* */
+/* Allocates device resources, performs secondary chip identification, */
+/* resets and initializes the hardware, and initializes driver instance */
+/* variables. */
+/* */
+/* Returns: */
+/* 0 on success, positive value on failure. */
+/****************************************************************************/
+static int
+bce_attach(device_t dev)
+{
+ struct bce_softc *sc;
+ struct ifnet *ifp;
+ u32 val;
+ int mbuf, rid, rc = 0;
+
+ sc = device_get_softc(dev);
+ sc->bce_dev = dev;
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ mbuf = device_get_unit(dev);
+ sc->bce_unit = mbuf;
+
+ pci_enable_busmaster(dev);
+
+ /* Allocate PCI memory resources. */
+ rid = PCIR_BAR(0);
+ sc->bce_res = bus_alloc_resource_any(
+ dev, /* dev */
+ SYS_RES_MEMORY, /* type */
+ &rid, /* rid */
+ RF_ACTIVE | PCI_RF_DENSE); /* flags */
+
+ if (sc->bce_res == NULL) {
+ BCE_PRINTF(sc, "%s(%d): PCI memory allocation failed\n",
+ __FILE__, __LINE__);
+ rc = ENXIO;
+ goto bce_attach_fail;
+ }
+
+ /* Get various resource handles. */
+ sc->bce_btag = rman_get_bustag(sc->bce_res);
+ sc->bce_bhandle = rman_get_bushandle(sc->bce_res);
+ sc->bce_vhandle = (vm_offset_t) rman_get_virtual(sc->bce_res);
+
+ /* Allocate PCI IRQ resources. */
+ rid = 0;
+ sc->bce_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
+ RF_SHAREABLE | RF_ACTIVE);
+
+ if (sc->bce_irq == NULL) {
+ BCE_PRINTF(sc, "%s(%d): PCI map interrupt failed\n",
+ __FILE__, __LINE__);
+ rc = ENXIO;
+ goto bce_attach_fail;
+ }
+
+ /* Initialize mutex for the current device instance. */
+ BCE_LOCK_INIT(sc, device_get_nameunit(dev));
+
+ /*
+ * Configure byte swap and enable indirect register access.
+ * Rely on CPU to do target byte swapping on big endian systems.
+ * Access to registers outside of PCI configurtion space are not
+ * valid until this is done.
+ */
+ pci_write_config(dev, BCE_PCICFG_MISC_CONFIG,
+ BCE_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
+ BCE_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP, 4);
+
+ /* Save ASIC revsion info. */
+ sc->bce_chipid = REG_RD(sc, BCE_MISC_ID);
+
+ /* Weed out any non-production controller revisions. */
+ switch(BCE_CHIP_ID(sc)) {
+ case BCE_CHIP_ID_5706_A0:
+ case BCE_CHIP_ID_5706_A1:
+ case BCE_CHIP_ID_5708_A0:
+ case BCE_CHIP_ID_5708_B0:
+ BCE_PRINTF(sc, "%s(%d): Unsupported controller revision (%c%d)!\n",
+ __FILE__, __LINE__,
+ (((pci_read_config(dev, PCIR_REVID, 4) & 0xf0) >> 4) + 'A'),
+ (pci_read_config(dev, PCIR_REVID, 4) & 0xf));
+ rc = ENODEV;
+ goto bce_attach_fail;
+ }
+
+ if (BCE_CHIP_BOND_ID(sc) & BCE_CHIP_BOND_ID_SERDES_BIT) {
+ BCE_PRINTF(sc, "%s(%d): SerDes controllers are not supported!\n",
+ __FILE__, __LINE__);
+ rc = ENODEV;
+ goto bce_attach_fail;
+ }
+
+ /*
+ * The embedded PCIe to PCI-X bridge (EPB)
+ * in the 5708 cannot address memory above
+ * 40 bits (E7_5708CB1_23043 & E6_5708SB1_23043).
+ */
+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5708)
+ sc->max_bus_addr = BCE_BUS_SPACE_MAXADDR;
+ else
+ sc->max_bus_addr = BUS_SPACE_MAXADDR;
+
+ /*
+ * Find the base address for shared memory access.
+ * Newer versions of bootcode use a signature and offset
+ * while older versions use a fixed address.
+ */
+ val = REG_RD_IND(sc, BCE_SHM_HDR_SIGNATURE);
+ if ((val & BCE_SHM_HDR_SIGNATURE_SIG_MASK) == BCE_SHM_HDR_SIGNATURE_SIG)
+ sc->bce_shmem_base = REG_RD_IND(sc, BCE_SHM_HDR_ADDR_0);
+ else
+ sc->bce_shmem_base = HOST_VIEW_SHMEM_BASE;
+
+ DBPRINT(sc, BCE_INFO, "bce_shmem_base = 0x%08X\n", sc->bce_shmem_base);
+
+ /* Set initial device and PHY flags */
+ sc->bce_flags = 0;
+ sc->bce_phy_flags = 0;
+
+ /* Get PCI bus information (speed and type). */
+ val = REG_RD(sc, BCE_PCICFG_MISC_STATUS);
+ if (val & BCE_PCICFG_MISC_STATUS_PCIX_DET) {
+ u32 clkreg;
+
+ sc->bce_flags |= BCE_PCIX_FLAG;
+
+ clkreg = REG_RD(sc, BCE_PCICFG_PCI_CLOCK_CONTROL_BITS);
+
+ clkreg &= BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET;
+ switch (clkreg) {
+ case BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ:
+ sc->bus_speed_mhz = 133;
+ break;
+
+ case BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ:
+ sc->bus_speed_mhz = 100;
+ break;
+
+ case BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ:
+ case BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ:
+ sc->bus_speed_mhz = 66;
+ break;
+
+ case BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ:
+ case BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ:
+ sc->bus_speed_mhz = 50;
+ break;
+
+ case BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW:
+ case BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ:
+ case BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ:
+ sc->bus_speed_mhz = 33;
+ break;
+ }
+ } else {
+ if (val & BCE_PCICFG_MISC_STATUS_M66EN)
+ sc->bus_speed_mhz = 66;
+ else
+ sc->bus_speed_mhz = 33;
+ }
+
+ if (val & BCE_PCICFG_MISC_STATUS_32BIT_DET)
+ sc->bce_flags |= BCE_PCI_32BIT_FLAG;
+
+ BCE_PRINTF(sc, "ASIC ID 0x%08X; Revision (%c%d); PCI%s %s %dMHz\n",
+ sc->bce_chipid,
+ ((BCE_CHIP_ID(sc) & 0xf000) >> 12) + 'A',
+ ((BCE_CHIP_ID(sc) & 0x0ff0) >> 4),
+ ((sc->bce_flags & BCE_PCIX_FLAG) ? "-X" : ""),
+ ((sc->bce_flags & BCE_PCI_32BIT_FLAG) ? "32-bit" : "64-bit"),
+ sc->bus_speed_mhz);
+
+ /* Reset the controller. */
+ if (bce_reset(sc, BCE_DRV_MSG_CODE_RESET)) {
+ rc = ENXIO;
+ goto bce_attach_fail;
+ }
+
+ /* Initialize the controller. */
+ if (bce_chipinit(sc)) {
+ BCE_PRINTF(sc, "%s(%d): Controller initialization failed!\n",
+ __FILE__, __LINE__);
+ rc = ENXIO;
+ goto bce_attach_fail;
+ }
+
+ /* Perform NVRAM test. */
+ if (bce_nvram_test(sc)) {
+ BCE_PRINTF(sc, "%s(%d): NVRAM test failed!\n",
+ __FILE__, __LINE__);
+ rc = ENXIO;
+ goto bce_attach_fail;
+ }
+
+ /* Fetch the permanent Ethernet MAC address. */
+ bce_get_mac_addr(sc);
+
+ /*
+ * Trip points control how many BDs
+ * should be ready before generating an
+ * interrupt while ticks control how long
+ * a BD can sit in the chain before
+ * generating an interrupt. Set the default
+ * values for the RX and TX rings.
+ */
+
+#ifdef BCE_DRBUG
+ /* Force more frequent interrupts. */
+ sc->bce_tx_quick_cons_trip_int = 1;
+ sc->bce_tx_quick_cons_trip = 1;
+ sc->bce_tx_ticks_int = 0;
+ sc->bce_tx_ticks = 0;
+
+ sc->bce_rx_quick_cons_trip_int = 1;
+ sc->bce_rx_quick_cons_trip = 1;
+ sc->bce_rx_ticks_int = 0;
+ sc->bce_rx_ticks = 0;
+#else
+ sc->bce_tx_quick_cons_trip_int = 20;
+ sc->bce_tx_quick_cons_trip = 20;
+ sc->bce_tx_ticks_int = 80;
+ sc->bce_tx_ticks = 80;
+
+ sc->bce_rx_quick_cons_trip_int = 6;
+ sc->bce_rx_quick_cons_trip = 6;
+ sc->bce_rx_ticks_int = 18;
+ sc->bce_rx_ticks = 18;
+#endif
+
+ /* Update statistics once every second. */
+ sc->bce_stats_ticks = 1000000 & 0xffff00;
+
+ /*
+ * The copper based NetXtreme II controllers
+ * use an integrated PHY at address 1 while
+ * the SerDes controllers use a PHY at
+ * address 2.
+ */
+ sc->bce_phy_addr = 1;
+
+ if (BCE_CHIP_BOND_ID(sc) & BCE_CHIP_BOND_ID_SERDES_BIT) {
+ sc->bce_phy_flags |= BCE_PHY_SERDES_FLAG;
+ sc->bce_flags |= BCE_NO_WOL_FLAG;
+ if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5708) {
+ sc->bce_phy_addr = 2;
+ val = REG_RD_IND(sc, sc->bce_shmem_base +
+ BCE_SHARED_HW_CFG_CONFIG);
+ if (val & BCE_SHARED_HW_CFG_PHY_2_5G)
+ sc->bce_phy_flags |= BCE_PHY_2_5G_CAPABLE_FLAG;
+ }
+ }
+
+ /* Allocate DMA memory resources. */
+ if (bce_dma_alloc(dev)) {
+ BCE_PRINTF(sc, "%s(%d): DMA resource allocation failed!\n",
+ __FILE__, __LINE__);
+ rc = ENXIO;
+ goto bce_attach_fail;
+ }
+
+ /* Allocate an ifnet structure. */
+ ifp = sc->bce_ifp = if_alloc(IFT_ETHER);
+ if (ifp == NULL) {
+ BCE_PRINTF(sc, "%s(%d): Interface allocation failed!\n",
+ __FILE__, __LINE__);
+ rc = ENXIO;
+ goto bce_attach_fail;
+ }
+
+ /* Initialize the ifnet interface. */
+ ifp->if_softc = sc;
+ if_initname(ifp, device_get_name(dev), device_get_unit(dev));
+ ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
+ ifp->if_ioctl = bce_ioctl;
+ ifp->if_start = bce_start;
+ ifp->if_timer = 0;
+ ifp->if_watchdog = bce_watchdog;
+ ifp->if_init = bce_init;
+ ifp->if_mtu = ETHERMTU;
+ ifp->if_hwassist = BCE_IF_HWASSIST;
+ ifp->if_capabilities = BCE_IF_CAPABILITIES;
+ ifp->if_capenable = ifp->if_capabilities;
+
+ /* Assume a standard 1500 byte MTU size for mbuf allocations. */
+ sc->mbuf_alloc_size = MCLBYTES;
+#ifdef DEVICE_POLLING
+ ifp->if_capabilities |= IFCAP_POLLING;
+#endif
+
+ ifp->if_snd.ifq_drv_maxlen = USABLE_TX_BD;
+ if (sc->bce_phy_flags & BCE_PHY_2_5G_CAPABLE_FLAG)
+ ifp->if_baudrate = IF_Gbps(2.5);
+ else
+ ifp->if_baudrate = IF_Gbps(1);
+
+ IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
+ IFQ_SET_READY(&ifp->if_snd);
+
+ if (sc->bce_phy_flags & BCE_PHY_SERDES_FLAG) {
+ BCE_PRINTF(sc, "%s(%d): SerDes is not supported by this driver!\n",
+ __FILE__, __LINE__);
+ rc = ENODEV;
+ goto bce_attach_fail;
+ } else {
+ /* Look for our PHY. */
+ if (mii_phy_probe(dev, &sc->bce_miibus, bce_ifmedia_upd,
+ bce_ifmedia_sts)) {
+ BCE_PRINTF(sc, "%s(%d): PHY probe failed!\n",
+ __FILE__, __LINE__);
+ rc = ENXIO;
+ goto bce_attach_fail;
+ }
+ }
+
+ /* Attach to the Ethernet interface list. */
+ ether_ifattach(ifp, sc->eaddr);
+
+#if __FreeBSD_version < 500000
+ callout_init(&sc->bce_stat_ch);
+#else
+ callout_init(&sc->bce_stat_ch, CALLOUT_MPSAFE);
+#endif
+
+ /* Hookup IRQ last. */
+ rc = bus_setup_intr(dev, sc->bce_irq, INTR_TYPE_NET | INTR_MPSAFE,
+ bce_intr, sc, &sc->bce_intrhand);
+
+ if (rc) {
+ BCE_PRINTF(sc, "%s(%d): Failed to setup IRQ!\n",
+ __FILE__, __LINE__);
+ bce_detach(dev);
+ goto bce_attach_exit;
+ }
+
+ /* Print some important debugging info. */
+ DBRUN(BCE_INFO, bce_dump_driver_state(sc));
+
+ /* Add the supported sysctls to the kernel. */
+ bce_add_sysctls(sc);
+
+ goto bce_attach_exit;
+
+bce_attach_fail:
+ bce_release_resources(sc);
+
+bce_attach_exit:
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+
+ return(rc);
+}
+
+
+/****************************************************************************/
+/* Device detach function. */
+/* */
+/* Stops the controller, resets the controller, and releases resources. */
+/* */
+/* Returns: */
+/* 0 on success, positive value on failure. */
+/****************************************************************************/
+static int
+bce_detach(device_t dev)
+{
+ struct bce_softc *sc;
+ struct ifnet *ifp;
+
+ sc = device_get_softc(dev);
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ ifp = sc->bce_ifp;
+
+#ifdef DEVICE_POLLING
+ if (ifp->if_capenable & IFCAP_POLLING)
+ ether_poll_deregister(ifp);
+#endif
+
+ /* Stop and reset the controller. */
+ BCE_LOCK(sc);
+ bce_stop(sc);
+ bce_reset(sc, BCE_DRV_MSG_CODE_RESET);
+ BCE_UNLOCK(sc);
+
+ ether_ifdetach(ifp);
+
+ /* If we have a child device on the MII bus remove it too. */
+ if (sc->bce_phy_flags & BCE_PHY_SERDES_FLAG) {
+ ifmedia_removeall(&sc->bce_ifmedia);
+ } else {
+ bus_generic_detach(dev);
+ device_delete_child(dev, sc->bce_miibus);
+ }
+
+ /* Release all remaining resources. */
+ bce_release_resources(sc);
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+
+ return(0);
+}
+
+
+/****************************************************************************/
+/* Device shutdown function. */
+/* */
+/* Stops and resets the controller. */
+/* */
+/* Returns: */
+/* Nothing */
+/****************************************************************************/
+static void
+bce_shutdown(device_t dev)
+{
+ struct bce_softc *sc = device_get_softc(dev);
+
+ BCE_LOCK(sc);
+ bce_stop(sc);
+ bce_reset(sc, BCE_DRV_MSG_CODE_RESET);
+ BCE_UNLOCK(sc);
+}
+
+
+/****************************************************************************/
+/* Indirect register read. */
+/* */
+/* Reads NetXtreme II registers using an index/data register pair in PCI */
+/* configuration space. Using this mechanism avoids issues with posted */
+/* reads but is much slower than memory-mapped I/O. */
+/* */
+/* Returns: */
+/* The value of the register. */
+/****************************************************************************/
+static u32
+bce_reg_rd_ind(struct bce_softc *sc, u32 offset)
+{
+ device_t dev;
+ dev = sc->bce_dev;
+
+ pci_write_config(dev, BCE_PCICFG_REG_WINDOW_ADDRESS, offset, 4);
+#ifdef BCE_DEBUG
+ {
+ u32 val;
+ val = pci_read_config(dev, BCE_PCICFG_REG_WINDOW, 4);
+ DBPRINT(sc, BCE_EXCESSIVE, "%s(); offset = 0x%08X, val = 0x%08X\n",
+ __FUNCTION__, offset, val);
+ return val;
+ }
+#else
+ return pci_read_config(dev, BCE_PCICFG_REG_WINDOW, 4);
+#endif
+}
+
+
+/****************************************************************************/
+/* Indirect register write. */
+/* */
+/* Writes NetXtreme II registers using an index/data register pair in PCI */
+/* configuration space. Using this mechanism avoids issues with posted */
+/* writes but is muchh slower than memory-mapped I/O. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_reg_wr_ind(struct bce_softc *sc, u32 offset, u32 val)
+{
+ device_t dev;
+ dev = sc->bce_dev;
+
+ DBPRINT(sc, BCE_EXCESSIVE, "%s(); offset = 0x%08X, val = 0x%08X\n",
+ __FUNCTION__, offset, val);
+
+ pci_write_config(dev, BCE_PCICFG_REG_WINDOW_ADDRESS, offset, 4);
+ pci_write_config(dev, BCE_PCICFG_REG_WINDOW, val, 4);
+}
+
+
+/****************************************************************************/
+/* Context memory write. */
+/* */
+/* The NetXtreme II controller uses context memory to track connection */
+/* information for L2 and higher network protocols. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_ctx_wr(struct bce_softc *sc, u32 cid_addr, u32 offset, u32 val)
+{
+
+ DBPRINT(sc, BCE_EXCESSIVE, "%s(); cid_addr = 0x%08X, offset = 0x%08X, "
+ "val = 0x%08X\n", __FUNCTION__, cid_addr, offset, val);
+
+ offset += cid_addr;
+ REG_WR(sc, BCE_CTX_DATA_ADR, offset);
+ REG_WR(sc, BCE_CTX_DATA, val);
+}
+
+
+/****************************************************************************/
+/* PHY register read. */
+/* */
+/* Implements register reads on the MII bus. */
+/* */
+/* Returns: */
+/* The value of the register. */
+/****************************************************************************/
+static int
+bce_miibus_read_reg(device_t dev, int phy, int reg)
+{
+ struct bce_softc *sc;
+ u32 val;
+ int i;
+
+ sc = device_get_softc(dev);
+
+ /* Make sure we are accessing the correct PHY address. */
+ if (phy != sc->bce_phy_addr) {
+ DBPRINT(sc, BCE_VERBOSE, "Invalid PHY address %d for PHY read!\n", phy);
+ return(0);
+ }
+
+ if (sc->bce_phy_flags & BCE_PHY_INT_MODE_AUTO_POLLING_FLAG) {
+ val = REG_RD(sc, BCE_EMAC_MDIO_MODE);
+ val &= ~BCE_EMAC_MDIO_MODE_AUTO_POLL;
+
+ REG_WR(sc, BCE_EMAC_MDIO_MODE, val);
+ REG_RD(sc, BCE_EMAC_MDIO_MODE);
+
+ DELAY(40);
+ }
+
+ val = BCE_MIPHY(phy) | BCE_MIREG(reg) |
+ BCE_EMAC_MDIO_COMM_COMMAND_READ | BCE_EMAC_MDIO_COMM_DISEXT |
+ BCE_EMAC_MDIO_COMM_START_BUSY;
+ REG_WR(sc, BCE_EMAC_MDIO_COMM, val);
+
+ for (i = 0; i < BCE_PHY_TIMEOUT; i++) {
+ DELAY(10);
+
+ val = REG_RD(sc, BCE_EMAC_MDIO_COMM);
+ if (!(val & BCE_EMAC_MDIO_COMM_START_BUSY)) {
+ DELAY(5);
+
+ val = REG_RD(sc, BCE_EMAC_MDIO_COMM);
+ val &= BCE_EMAC_MDIO_COMM_DATA;
+
+ break;
+ }
+ }
+
+ if (val & BCE_EMAC_MDIO_COMM_START_BUSY) {
+ BCE_PRINTF(sc, "%s(%d): Error: PHY read timeout! phy = %d, reg = 0x%04X\n",
+ __FILE__, __LINE__, phy, reg);
+ val = 0x0;
+ } else {
+ val = REG_RD(sc, BCE_EMAC_MDIO_COMM);
+ }
+
+ DBPRINT(sc, BCE_EXCESSIVE, "%s(): phy = %d, reg = 0x%04X, val = 0x%04X\n",
+ __FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff);
+
+ if (sc->bce_phy_flags & BCE_PHY_INT_MODE_AUTO_POLLING_FLAG) {
+ val = REG_RD(sc, BCE_EMAC_MDIO_MODE);
+ val |= BCE_EMAC_MDIO_MODE_AUTO_POLL;
+
+ REG_WR(sc, BCE_EMAC_MDIO_MODE, val);
+ REG_RD(sc, BCE_EMAC_MDIO_MODE);
+
+ DELAY(40);
+ }
+
+ return (val & 0xffff);
+
+}
+
+
+/****************************************************************************/
+/* PHY register write. */
+/* */
+/* Implements register writes on the MII bus. */
+/* */
+/* Returns: */
+/* The value of the register. */
+/****************************************************************************/
+static int
+bce_miibus_write_reg(device_t dev, int phy, int reg, int val)
+{
+ struct bce_softc *sc;
+ u32 val1;
+ int i;
+
+ sc = device_get_softc(dev);
+
+ /* Make sure we are accessing the correct PHY address. */
+ if (phy != sc->bce_phy_addr) {
+ DBPRINT(sc, BCE_WARN, "Invalid PHY address %d for PHY write!\n", phy);
+ return(0);
+ }
+
+ DBPRINT(sc, BCE_EXCESSIVE, "%s(): phy = %d, reg = 0x%04X, val = 0x%04X\n",
+ __FUNCTION__, phy, (u16) reg & 0xffff, (u16) val & 0xffff);
+
+ if (sc->bce_phy_flags & BCE_PHY_INT_MODE_AUTO_POLLING_FLAG) {
+ val1 = REG_RD(sc, BCE_EMAC_MDIO_MODE);
+ val1 &= ~BCE_EMAC_MDIO_MODE_AUTO_POLL;
+
+ REG_WR(sc, BCE_EMAC_MDIO_MODE, val1);
+ REG_RD(sc, BCE_EMAC_MDIO_MODE);
+
+ DELAY(40);
+ }
+
+ val1 = BCE_MIPHY(phy) | BCE_MIREG(reg) | val |
+ BCE_EMAC_MDIO_COMM_COMMAND_WRITE |
+ BCE_EMAC_MDIO_COMM_START_BUSY | BCE_EMAC_MDIO_COMM_DISEXT;
+ REG_WR(sc, BCE_EMAC_MDIO_COMM, val1);
+
+ for (i = 0; i < BCE_PHY_TIMEOUT; i++) {
+ DELAY(10);
+
+ val1 = REG_RD(sc, BCE_EMAC_MDIO_COMM);
+ if (!(val1 & BCE_EMAC_MDIO_COMM_START_BUSY)) {
+ DELAY(5);
+ break;
+ }
+ }
+
+ if (val1 & BCE_EMAC_MDIO_COMM_START_BUSY)
+ BCE_PRINTF(sc, "%s(%d): PHY write timeout!\n",
+ __FILE__, __LINE__);
+
+ if (sc->bce_phy_flags & BCE_PHY_INT_MODE_AUTO_POLLING_FLAG) {
+ val1 = REG_RD(sc, BCE_EMAC_MDIO_MODE);
+ val1 |= BCE_EMAC_MDIO_MODE_AUTO_POLL;
+
+ REG_WR(sc, BCE_EMAC_MDIO_MODE, val1);
+ REG_RD(sc, BCE_EMAC_MDIO_MODE);
+
+ DELAY(40);
+ }
+
+ return 0;
+}
+
+
+/****************************************************************************/
+/* MII bus status change. */
+/* */
+/* Called by the MII bus driver when the PHY establishes link to set the */
+/* MAC interface registers. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_miibus_statchg(device_t dev)
+{
+ struct bce_softc *sc;
+ struct mii_data *mii;
+
+ sc = device_get_softc(dev);
+
+ mii = device_get_softc(sc->bce_miibus);
+
+ BCE_CLRBIT(sc, BCE_EMAC_MODE, BCE_EMAC_MODE_PORT);
+
+ /* Set MII or GMII inerface based on the speed negotiated by the PHY. */
+ if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
+ DBPRINT(sc, BCE_INFO, "Setting GMII interface.\n");
+ BCE_SETBIT(sc, BCE_EMAC_MODE, BCE_EMAC_MODE_PORT_GMII);
+ } else {
+ DBPRINT(sc, BCE_INFO, "Setting MII interface.\n");
+ BCE_SETBIT(sc, BCE_EMAC_MODE, BCE_EMAC_MODE_PORT_MII);
+ }
+
+ /* Set half or full duplex based on the duplicity negotiated by the PHY. */
+ if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) {
+ DBPRINT(sc, BCE_INFO, "Setting Full-Duplex interface.\n");
+ BCE_CLRBIT(sc, BCE_EMAC_MODE, BCE_EMAC_MODE_HALF_DUPLEX);
+ } else {
+ DBPRINT(sc, BCE_INFO, "Setting Half-Duplex interface.\n");
+ BCE_SETBIT(sc, BCE_EMAC_MODE, BCE_EMAC_MODE_HALF_DUPLEX);
+ }
+}
+
+
+/****************************************************************************/
+/* Acquire NVRAM lock. */
+/* */
+/* Before the NVRAM can be accessed the caller must acquire an NVRAM lock. */
+/* Locks 0 and 2 are reserved, lock 1 is used by firmware and lock 2 is */
+/* for use by the driver. */
+/* */
+/* Returns: */
+/* 0 on success, positive value on failure. */
+/****************************************************************************/
+static int
+bce_acquire_nvram_lock(struct bce_softc *sc)
+{
+ u32 val;
+ int j;
+
+ DBPRINT(sc, BCE_VERBOSE, "Acquiring NVRAM lock.\n");
+
+ /* Request access to the flash interface. */
+ REG_WR(sc, BCE_NVM_SW_ARB, BCE_NVM_SW_ARB_ARB_REQ_SET2);
+ for (j = 0; j < NVRAM_TIMEOUT_COUNT; j++) {
+ val = REG_RD(sc, BCE_NVM_SW_ARB);
+ if (val & BCE_NVM_SW_ARB_ARB_ARB2)
+ break;
+
+ DELAY(5);
+ }
+
+ if (j >= NVRAM_TIMEOUT_COUNT) {
+ DBPRINT(sc, BCE_WARN, "Timeout acquiring NVRAM lock!\n");
+ return EBUSY;
+ }
+
+ return 0;
+}
+
+
+/****************************************************************************/
+/* Release NVRAM lock. */
+/* */
+/* When the caller is finished accessing NVRAM the lock must be released. */
+/* Locks 0 and 2 are reserved, lock 1 is used by firmware and lock 2 is */
+/* for use by the driver. */
+/* */
+/* Returns: */
+/* 0 on success, positive value on failure. */
+/****************************************************************************/
+static int
+bce_release_nvram_lock(struct bce_softc *sc)
+{
+ int j;
+ u32 val;
+
+ DBPRINT(sc, BCE_VERBOSE, "Releasing NVRAM lock.\n");
+
+ /*
+ * Relinquish nvram interface.
+ */
+ REG_WR(sc, BCE_NVM_SW_ARB, BCE_NVM_SW_ARB_ARB_REQ_CLR2);
+
+ for (j = 0; j < NVRAM_TIMEOUT_COUNT; j++) {
+ val = REG_RD(sc, BCE_NVM_SW_ARB);
+ if (!(val & BCE_NVM_SW_ARB_ARB_ARB2))
+ break;
+
+ DELAY(5);
+ }
+
+ if (j >= NVRAM_TIMEOUT_COUNT) {
+ DBPRINT(sc, BCE_WARN, "Timeout reeasing NVRAM lock!\n");
+ return EBUSY;
+ }
+
+ return 0;
+}
+
+
+#ifdef BCE_NVRAM_WRITE_SUPPORT
+/****************************************************************************/
+/* Enable NVRAM write access. */
+/* */
+/* Before writing to NVRAM the caller must enable NVRAM writes. */
+/* */
+/* Returns: */
+/* 0 on success, positive value on failure. */
+/****************************************************************************/
+static int
+bce_enable_nvram_write(struct bce_softc *sc)
+{
+ u32 val;
+
+ DBPRINT(sc, BCE_VERBOSE, "Enabling NVRAM write.\n");
+
+ val = REG_RD(sc, BCE_MISC_CFG);
+ REG_WR(sc, BCE_MISC_CFG, val | BCE_MISC_CFG_NVM_WR_EN_PCI);
+
+ if (!sc->bce_flash_info->buffered) {
+ int j;
+
+ REG_WR(sc, BCE_NVM_COMMAND, BCE_NVM_COMMAND_DONE);
+ REG_WR(sc, BCE_NVM_COMMAND, BCE_NVM_COMMAND_WREN | BCE_NVM_COMMAND_DOIT);
+
+ for (j = 0; j < NVRAM_TIMEOUT_COUNT; j++) {
+ DELAY(5);
+
+ val = REG_RD(sc, BCE_NVM_COMMAND);
+ if (val & BCE_NVM_COMMAND_DONE)
+ break;
+ }
+
+ if (j >= NVRAM_TIMEOUT_COUNT) {
+ DBPRINT(sc, BCE_WARN, "Timeout writing NVRAM!\n");
+ return EBUSY;
+ }
+ }
+ return 0;
+}
+
+
+/****************************************************************************/
+/* Disable NVRAM write access. */
+/* */
+/* When the caller is finished writing to NVRAM write access must be */
+/* disabled. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_disable_nvram_write(struct bce_softc *sc)
+{
+ u32 val;
+
+ DBPRINT(sc, BCE_VERBOSE, "Disabling NVRAM write.\n");
+
+ val = REG_RD(sc, BCE_MISC_CFG);
+ REG_WR(sc, BCE_MISC_CFG, val & ~BCE_MISC_CFG_NVM_WR_EN);
+}
+#endif
+
+
+/****************************************************************************/
+/* Enable NVRAM access. */
+/* */
+/* Before accessing NVRAM for read or write operations the caller must */
+/* enabled NVRAM access. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_enable_nvram_access(struct bce_softc *sc)
+{
+ u32 val;
+
+ DBPRINT(sc, BCE_VERBOSE, "Enabling NVRAM access.\n");
+
+ val = REG_RD(sc, BCE_NVM_ACCESS_ENABLE);
+ /* Enable both bits, even on read. */
+ REG_WR(sc, BCE_NVM_ACCESS_ENABLE,
+ val | BCE_NVM_ACCESS_ENABLE_EN | BCE_NVM_ACCESS_ENABLE_WR_EN);
+}
+
+
+/****************************************************************************/
+/* Disable NVRAM access. */
+/* */
+/* When the caller is finished accessing NVRAM access must be disabled. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_disable_nvram_access(struct bce_softc *sc)
+{
+ u32 val;
+
+ DBPRINT(sc, BCE_VERBOSE, "Disabling NVRAM access.\n");
+
+ val = REG_RD(sc, BCE_NVM_ACCESS_ENABLE);
+
+ /* Disable both bits, even after read. */
+ REG_WR(sc, BCE_NVM_ACCESS_ENABLE,
+ val & ~(BCE_NVM_ACCESS_ENABLE_EN |
+ BCE_NVM_ACCESS_ENABLE_WR_EN));
+}
+
+
+#ifdef BCE_NVRAM_WRITE_SUPPORT
+/****************************************************************************/
+/* Erase NVRAM page before writing. */
+/* */
+/* Non-buffered flash parts require that a page be erased before it is */
+/* written. */
+/* */
+/* Returns: */
+/* 0 on success, positive value on failure. */
+/****************************************************************************/
+static int
+bce_nvram_erase_page(struct bce_softc *sc, u32 offset)
+{
+ u32 cmd;
+ int j;
+
+ /* Buffered flash doesn't require an erase. */
+ if (sc->bce_flash_info->buffered)
+ return 0;
+
+ DBPRINT(sc, BCE_VERBOSE, "Erasing NVRAM page.\n");
+
+ /* Build an erase command. */
+ cmd = BCE_NVM_COMMAND_ERASE | BCE_NVM_COMMAND_WR |
+ BCE_NVM_COMMAND_DOIT;
+
+ /*
+ * Clear the DONE bit separately, set the NVRAM adress to erase,
+ * and issue the erase command.
+ */
+ REG_WR(sc, BCE_NVM_COMMAND, BCE_NVM_COMMAND_DONE);
+ REG_WR(sc, BCE_NVM_ADDR, offset & BCE_NVM_ADDR_NVM_ADDR_VALUE);
+ REG_WR(sc, BCE_NVM_COMMAND, cmd);
+
+ /* Wait for completion. */
+ */
+ for (j = 0; j < NVRAM_TIMEOUT_COUNT; j++) {
+ u32 val;
+
+ DELAY(5);
+
+ val = REG_RD(sc, BCE_NVM_COMMAND);
+ if (val & BCE_NVM_COMMAND_DONE)
+ break;
+ }
+
+ if (j >= NVRAM_TIMEOUT_COUNT) {
+ DBPRINT(sc, BCE_WARN, "Timeout erasing NVRAM.\n");
+ return EBUSY;
+ }
+
+ return 0;
+}
+#endif /* BCE_NVRAM_WRITE_SUPPORT */
+
+
+/****************************************************************************/
+/* Read a dword (32 bits) from NVRAM. */
+/* */
+/* Read a 32 bit word from NVRAM. The caller is assumed to have already */
+/* obtained the NVRAM lock and enabled the controller for NVRAM access. */
+/* */
+/* Returns: */
+/* 0 on success and the 32 bit value read, positive value on failure. */
+/****************************************************************************/
+static int
+bce_nvram_read_dword(struct bce_softc *sc, u32 offset, u8 *ret_val,
+ u32 cmd_flags)
+{
+ u32 cmd;
+ int i, rc = 0;
+
+ /* Build the command word. */
+ cmd = BCE_NVM_COMMAND_DOIT | cmd_flags;
+
+ /* Calculate the offset for buffered flash. */
+ if (sc->bce_flash_info->buffered) {
+ offset = ((offset / sc->bce_flash_info->page_size) <<
+ sc->bce_flash_info->page_bits) +
+ (offset % sc->bce_flash_info->page_size);
+ }
+
+ /*
+ * Clear the DONE bit separately, set the address to read,
+ * and issue the read.
+ */
+ REG_WR(sc, BCE_NVM_COMMAND, BCE_NVM_COMMAND_DONE);
+ REG_WR(sc, BCE_NVM_ADDR, offset & BCE_NVM_ADDR_NVM_ADDR_VALUE);
+ REG_WR(sc, BCE_NVM_COMMAND, cmd);
+
+ /* Wait for completion. */
+ for (i = 0; i < NVRAM_TIMEOUT_COUNT; i++) {
+ u32 val;
+
+ DELAY(5);
+
+ val = REG_RD(sc, BCE_NVM_COMMAND);
+ if (val & BCE_NVM_COMMAND_DONE) {
+ val = REG_RD(sc, BCE_NVM_READ);
+
+ val = bce_be32toh(val);
+ memcpy(ret_val, &val, 4);
+ break;
+ }
+ }
+
+ /* Check for errors. */
+ if (i >= NVRAM_TIMEOUT_COUNT) {
+ BCE_PRINTF(sc, "%s(%d): Timeout error reading NVRAM at offset 0x%08X!\n",
+ __FILE__, __LINE__, offset);
+ rc = EBUSY;
+ }
+
+ return(rc);
+}
+
+
+#ifdef BCE_NVRAM_WRITE_SUPPORT
+/****************************************************************************/
+/* Write a dword (32 bits) to NVRAM. */
+/* */
+/* Write a 32 bit word to NVRAM. The caller is assumed to have already */
+/* obtained the NVRAM lock, enabled the controller for NVRAM access, and */
+/* enabled NVRAM write access. */
+/* */
+/* Returns: */
+/* 0 on success, positive value on failure. */
+/****************************************************************************/
+static int
+bce_nvram_write_dword(struct bce_softc *sc, u32 offset, u8 *val,
+ u32 cmd_flags)
+{
+ u32 cmd, val32;
+ int j;
+
+ /* Build the command word. */
+ cmd = BCE_NVM_COMMAND_DOIT | BCE_NVM_COMMAND_WR | cmd_flags;
+
+ /* Calculate the offset for buffered flash. */
+ if (sc->bce_flash_info->buffered) {
+ offset = ((offset / sc->bce_flash_info->page_size) <<
+ sc->bce_flash_info->page_bits) +
+ (offset % sc->bce_flash_info->page_size);
+ }
+
+ /*
+ * Clear the DONE bit separately, convert NVRAM data to big-endian,
+ * set the NVRAM address to write, and issue the write command
+ */
+ REG_WR(sc, BCE_NVM_COMMAND, BCE_NVM_COMMAND_DONE);
+ memcpy(&val32, val, 4);
+ val32 = htobe32(val32);
+ REG_WR(sc, BCE_NVM_WRITE, val32);
+ REG_WR(sc, BCE_NVM_ADDR, offset & BCE_NVM_ADDR_NVM_ADDR_VALUE);
+ REG_WR(sc, BCE_NVM_COMMAND, cmd);
+
+ /* Wait for completion. */
+ for (j = 0; j < NVRAM_TIMEOUT_COUNT; j++) {
+ DELAY(5);
+
+ if (REG_RD(sc, BCE_NVM_COMMAND) & BCE_NVM_COMMAND_DONE)
+ break;
+ }
+ if (j >= NVRAM_TIMEOUT_COUNT) {
+ BCE_PRINTF(sc, "%s(%d): Timeout error writing NVRAM at offset 0x%08X\n",
+ __FILE__, __LINE__, offset);
+ return EBUSY;
+ }
+
+ return 0;
+}
+#endif /* BCE_NVRAM_WRITE_SUPPORT */
+
+
+/****************************************************************************/
+/* Initialize NVRAM access. */
+/* */
+/* Identify the NVRAM device in use and prepare the NVRAM interface to */
+/* access that device. */
+/* */
+/* Returns: */
+/* 0 on success, positive value on failure. */
+/****************************************************************************/
+static int
+bce_init_nvram(struct bce_softc *sc)
+{
+ u32 val;
+ int j, entry_count, rc;
+ struct flash_spec *flash;
+
+ DBPRINT(sc,BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ /* Determine the selected interface. */
+ val = REG_RD(sc, BCE_NVM_CFG1);
+
+ entry_count = sizeof(flash_table) / sizeof(struct flash_spec);
+
+ rc = 0;
+
+ /*
+ * Flash reconfiguration is required to support additional
+ * NVRAM devices not directly supported in hardware.
+ * Check if the flash interface was reconfigured
+ * by the bootcode.
+ */
+
+ if (val & 0x40000000) {
+ /* Flash interface reconfigured by bootcode. */
+
+ DBPRINT(sc,BCE_INFO_LOAD,
+ "bce_init_nvram(): Flash WAS reconfigured.\n");
+
+ for (j = 0, flash = &flash_table[0]; j < entry_count;
+ j++, flash++) {
+ if ((val & FLASH_BACKUP_STRAP_MASK) ==
+ (flash->config1 & FLASH_BACKUP_STRAP_MASK)) {
+ sc->bce_flash_info = flash;
+ break;
+ }
+ }
+ } else {
+ /* Flash interface not yet reconfigured. */
+ u32 mask;
+
+ DBPRINT(sc,BCE_INFO_LOAD,
+ "bce_init_nvram(): Flash was NOT reconfigured.\n");
+
+ if (val & (1 << 23))
+ mask = FLASH_BACKUP_STRAP_MASK;
+ else
+ mask = FLASH_STRAP_MASK;
+
+ /* Look for the matching NVRAM device configuration data. */
+ for (j = 0, flash = &flash_table[0]; j < entry_count; j++, flash++) {
+
+ /* Check if the device matches any of the known devices. */
+ if ((val & mask) == (flash->strapping & mask)) {
+ /* Found a device match. */
+ sc->bce_flash_info = flash;
+
+ /* Request access to the flash interface. */
+ if ((rc = bce_acquire_nvram_lock(sc)) != 0)
+ return rc;
+
+ /* Reconfigure the flash interface. */
+ bce_enable_nvram_access(sc);
+ REG_WR(sc, BCE_NVM_CFG1, flash->config1);
+ REG_WR(sc, BCE_NVM_CFG2, flash->config2);
+ REG_WR(sc, BCE_NVM_CFG3, flash->config3);
+ REG_WR(sc, BCE_NVM_WRITE1, flash->write1);
+ bce_disable_nvram_access(sc);
+ bce_release_nvram_lock(sc);
+
+ break;
+ }
+ }
+ }
+
+ /* Check if a matching device was found. */
+ if (j == entry_count) {
+ sc->bce_flash_info = NULL;
+ BCE_PRINTF(sc, "%s(%d): Unknown Flash NVRAM found!\n",
+ __FILE__, __LINE__);
+ rc = ENODEV;
+ }
+
+ /* Write the flash config data to the shared memory interface. */
+ val = REG_RD_IND(sc, sc->bce_shmem_base + BCE_SHARED_HW_CFG_CONFIG2);
+ val &= BCE_SHARED_HW_CFG2_NVM_SIZE_MASK;
+ if (val)
+ sc->bce_flash_size = val;
+ else
+ sc->bce_flash_size = sc->bce_flash_info->total_size;
+
+ DBPRINT(sc, BCE_INFO_LOAD, "bce_init_nvram() flash->total_size = 0x%08X\n",
+ sc->bce_flash_info->total_size);
+
+ DBPRINT(sc,BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+
+ return rc;
+}
+
+
+/****************************************************************************/
+/* Read an arbitrary range of data from NVRAM. */
+/* */
+/* Prepares the NVRAM interface for access and reads the requested data */
+/* into the supplied buffer. */
+/* */
+/* Returns: */
+/* 0 on success and the data read, positive value on failure. */
+/****************************************************************************/
+static int
+bce_nvram_read(struct bce_softc *sc, u32 offset, u8 *ret_buf,
+ int buf_size)
+{
+ int rc = 0;
+ u32 cmd_flags, offset32, len32, extra;
+
+ if (buf_size == 0)
+ return 0;
+
+ /* Request access to the flash interface. */
+ if ((rc = bce_acquire_nvram_lock(sc)) != 0)
+ return rc;
+
+ /* Enable access to flash interface */
+ bce_enable_nvram_access(sc);
+
+ len32 = buf_size;
+ offset32 = offset;
+ extra = 0;
+
+ cmd_flags = 0;
+
+ if (offset32 & 3) {
+ u8 buf[4];
+ u32 pre_len;
+
+ offset32 &= ~3;
+ pre_len = 4 - (offset & 3);
+
+ if (pre_len >= len32) {
+ pre_len = len32;
+ cmd_flags = BCE_NVM_COMMAND_FIRST | BCE_NVM_COMMAND_LAST;
+ }
+ else {
+ cmd_flags = BCE_NVM_COMMAND_FIRST;
+ }
+
+ rc = bce_nvram_read_dword(sc, offset32, buf, cmd_flags);
+
+ if (rc)
+ return rc;
+
+ memcpy(ret_buf, buf + (offset & 3), pre_len);
+
+ offset32 += 4;
+ ret_buf += pre_len;
+ len32 -= pre_len;
+ }
+
+ if (len32 & 3) {
+ extra = 4 - (len32 & 3);
+ len32 = (len32 + 4) & ~3;
+ }
+
+ if (len32 == 4) {
+ u8 buf[4];
+
+ if (cmd_flags)
+ cmd_flags = BCE_NVM_COMMAND_LAST;
+ else
+ cmd_flags = BCE_NVM_COMMAND_FIRST |
+ BCE_NVM_COMMAND_LAST;
+
+ rc = bce_nvram_read_dword(sc, offset32, buf, cmd_flags);
+
+ memcpy(ret_buf, buf, 4 - extra);
+ }
+ else if (len32 > 0) {
+ u8 buf[4];
+
+ /* Read the first word. */
+ if (cmd_flags)
+ cmd_flags = 0;
+ else
+ cmd_flags = BCE_NVM_COMMAND_FIRST;
+
+ rc = bce_nvram_read_dword(sc, offset32, ret_buf, cmd_flags);
+
+ /* Advance to the next dword. */
+ offset32 += 4;
+ ret_buf += 4;
+ len32 -= 4;
+
+ while (len32 > 4 && rc == 0) {
+ rc = bce_nvram_read_dword(sc, offset32, ret_buf, 0);
+
+ /* Advance to the next dword. */
+ offset32 += 4;
+ ret_buf += 4;
+ len32 -= 4;
+ }
+
+ if (rc)
+ return rc;
+
+ cmd_flags = BCE_NVM_COMMAND_LAST;
+ rc = bce_nvram_read_dword(sc, offset32, buf, cmd_flags);
+
+ memcpy(ret_buf, buf, 4 - extra);
+ }
+
+ /* Disable access to flash interface and release the lock. */
+ bce_disable_nvram_access(sc);
+ bce_release_nvram_lock(sc);
+
+ return rc;
+}
+
+
+#ifdef BCE_NVRAM_WRITE_SUPPORT
+/****************************************************************************/
+/* Write an arbitrary range of data from NVRAM. */
+/* */
+/* Prepares the NVRAM interface for write access and writes the requested */
+/* data from the supplied buffer. The caller is responsible for */
+/* calculating any appropriate CRCs. */
+/* */
+/* Returns: */
+/* 0 on success, positive value on failure. */
+/****************************************************************************/
+static int
+bce_nvram_write(struct bce_softc *sc, u32 offset, u8 *data_buf,
+ int buf_size)
+{
+ u32 written, offset32, len32;
+ u8 *buf, start[4], end[4];
+ int rc = 0;
+ int align_start, align_end;
+
+ buf = data_buf;
+ offset32 = offset;
+ len32 = buf_size;
+ align_start = align_end = 0;
+
+ if ((align_start = (offset32 & 3))) {
+ offset32 &= ~3;
+ len32 += align_start;
+ if ((rc = bce_nvram_read(sc, offset32, start, 4)))
+ return rc;
+ }
+
+ if (len32 & 3) {
+ if ((len32 > 4) || !align_start) {
+ align_end = 4 - (len32 & 3);
+ len32 += align_end;
+ if ((rc = bce_nvram_read(sc, offset32 + len32 - 4,
+ end, 4))) {
+ return rc;
+ }
+ }
+ }
+
+ if (align_start || align_end) {
+ buf = malloc(len32, M_DEVBUF, M_NOWAIT);
+ if (buf == 0)
+ return ENOMEM;
+ if (align_start) {
+ memcpy(buf, start, 4);
+ }
+ if (align_end) {
+ memcpy(buf + len32 - 4, end, 4);
+ }
+ memcpy(buf + align_start, data_buf, buf_size);
+ }
+
+ written = 0;
+ while ((written < len32) && (rc == 0)) {
+ u32 page_start, page_end, data_start, data_end;
+ u32 addr, cmd_flags;
+ int i;
+ u8 flash_buffer[264];
+
+ /* Find the page_start addr */
+ page_start = offset32 + written;
+ page_start -= (page_start % sc->bce_flash_info->page_size);
+ /* Find the page_end addr */
+ page_end = page_start + sc->bce_flash_info->page_size;
+ /* Find the data_start addr */
+ data_start = (written == 0) ? offset32 : page_start;
+ /* Find the data_end addr */
+ data_end = (page_end > offset32 + len32) ?
+ (offset32 + len32) : page_end;
+
+ /* Request access to the flash interface. */
+ if ((rc = bce_acquire_nvram_lock(sc)) != 0)
+ goto nvram_write_end;
+
+ /* Enable access to flash interface */
+ bce_enable_nvram_access(sc);
+
+ cmd_flags = BCE_NVM_COMMAND_FIRST;
+ if (sc->bce_flash_info->buffered == 0) {
+ int j;
+
+ /* Read the whole page into the buffer
+ * (non-buffer flash only) */
+ for (j = 0; j < sc->bce_flash_info->page_size; j += 4) {
+ if (j == (sc->bce_flash_info->page_size - 4)) {
+ cmd_flags |= BCE_NVM_COMMAND_LAST;
+ }
+ rc = bce_nvram_read_dword(sc,
+ page_start + j,
+ &flash_buffer[j],
+ cmd_flags);
+
+ if (rc)
+ goto nvram_write_end;
+
+ cmd_flags = 0;
+ }
+ }
+
+ /* Enable writes to flash interface (unlock write-protect) */
+ if ((rc = bce_enable_nvram_write(sc)) != 0)
+ goto nvram_write_end;
+
+ /* Erase the page */
+ if ((rc = bce_nvram_erase_page(sc, page_start)) != 0)
+ goto nvram_write_end;
+
+ /* Re-enable the write again for the actual write */
+ bce_enable_nvram_write(sc);
+
+ /* Loop to write back the buffer data from page_start to
+ * data_start */
+ i = 0;
+ if (sc->bce_flash_info->buffered == 0) {
+ for (addr = page_start; addr < data_start;
+ addr += 4, i += 4) {
+
+ rc = bce_nvram_write_dword(sc, addr,
+ &flash_buffer[i], cmd_flags);
+
+ if (rc != 0)
+ goto nvram_write_end;
+
+ cmd_flags = 0;
+ }
+ }
+
+ /* Loop to write the new data from data_start to data_end */
+ for (addr = data_start; addr < data_end; addr += 4, i++) {
+ if ((addr == page_end - 4) ||
+ ((sc->bce_flash_info->buffered) &&
+ (addr == data_end - 4))) {
+
+ cmd_flags |= BCE_NVM_COMMAND_LAST;
+ }
+ rc = bce_nvram_write_dword(sc, addr, buf,
+ cmd_flags);
+
+ if (rc != 0)
+ goto nvram_write_end;
+
+ cmd_flags = 0;
+ buf += 4;
+ }
+
+ /* Loop to write back the buffer data from data_end
+ * to page_end */
+ if (sc->bce_flash_info->buffered == 0) {
+ for (addr = data_end; addr < page_end;
+ addr += 4, i += 4) {
+
+ if (addr == page_end-4) {
+ cmd_flags = BCE_NVM_COMMAND_LAST;
+ }
+ rc = bce_nvram_write_dword(sc, addr,
+ &flash_buffer[i], cmd_flags);
+
+ if (rc != 0)
+ goto nvram_write_end;
+
+ cmd_flags = 0;
+ }
+ }
+
+ /* Disable writes to flash interface (lock write-protect) */
+ bce_disable_nvram_write(sc);
+
+ /* Disable access to flash interface */
+ bce_disable_nvram_access(sc);
+ bce_release_nvram_lock(sc);
+
+ /* Increment written */
+ written += data_end - data_start;
+ }
+
+nvram_write_end:
+ if (align_start || align_end)
+ free(buf, M_DEVBUF);
+
+ return rc;
+}
+#endif /* BCE_NVRAM_WRITE_SUPPORT */
+
+
+/****************************************************************************/
+/* Verifies that NVRAM is accessible and contains valid data. */
+/* */
+/* Reads the configuration data from NVRAM and verifies that the CRC is */
+/* correct. */
+/* */
+/* Returns: */
+/* 0 on success, positive value on failure. */
+/****************************************************************************/
+static int
+bce_nvram_test(struct bce_softc *sc)
+{
+ u32 buf[BCE_NVRAM_SIZE / 4];
+ u8 *data = (u8 *) buf;
+ int rc = 0;
+ u32 magic, csum;
+
+
+ /*
+ * Check that the device NVRAM is valid by reading
+ * the magic value at offset 0.
+ */
+ if ((rc = bce_nvram_read(sc, 0, data, 4)) != 0)
+ goto bce_nvram_test_done;
+
+
+ magic = bce_be32toh(buf[0]);
+ if (magic != BCE_NVRAM_MAGIC) {
+ rc = ENODEV;
+ BCE_PRINTF(sc, "%s(%d): Invalid NVRAM magic value! Expected: 0x%08X, "
+ "Found: 0x%08X\n",
+ __FILE__, __LINE__, BCE_NVRAM_MAGIC, magic);
+ goto bce_nvram_test_done;
+ }
+
+ /*
+ * Verify that the device NVRAM includes valid
+ * configuration data.
+ */
+ if ((rc = bce_nvram_read(sc, 0x100, data, BCE_NVRAM_SIZE)) != 0)
+ goto bce_nvram_test_done;
+
+ csum = ether_crc32_le(data, 0x100);
+ if (csum != BCE_CRC32_RESIDUAL) {
+ rc = ENODEV;
+ BCE_PRINTF(sc, "%s(%d): Invalid Manufacturing Information NVRAM CRC! "
+ "Expected: 0x%08X, Found: 0x%08X\n",
+ __FILE__, __LINE__, BCE_CRC32_RESIDUAL, csum);
+ goto bce_nvram_test_done;
+ }
+
+ csum = ether_crc32_le(data + 0x100, 0x100);
+ if (csum != BCE_CRC32_RESIDUAL) {
+ BCE_PRINTF(sc, "%s(%d): Invalid Feature Configuration Information "
+ "NVRAM CRC! Expected: 0x%08X, Found: 08%08X\n",
+ __FILE__, __LINE__, BCE_CRC32_RESIDUAL, csum);
+ rc = ENODEV;
+ }
+
+bce_nvram_test_done:
+ return rc;
+}
+
+
+/****************************************************************************/
+/* Free any DMA memory owned by the driver. */
+/* */
+/* Scans through each data structre that requires DMA memory and frees */
+/* the memory if allocated. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_dma_free(struct bce_softc *sc)
+{
+ int i;
+
+ DBPRINT(sc,BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ /* Destroy the status block. */
+ if (sc->status_block != NULL)
+ bus_dmamem_free(
+ sc->status_tag,
+ sc->status_block,
+ sc->status_map);
+
+ if (sc->status_map != NULL) {
+ bus_dmamap_unload(
+ sc->status_tag,
+ sc->status_map);
+ bus_dmamap_destroy(sc->status_tag,
+ sc->status_map);
+ }
+
+ if (sc->status_tag != NULL)
+ bus_dma_tag_destroy(sc->status_tag);
+
+
+ /* Destroy the statistics block. */
+ if (sc->stats_block != NULL)
+ bus_dmamem_free(
+ sc->stats_tag,
+ sc->stats_block,
+ sc->stats_map);
+
+ if (sc->stats_map != NULL) {
+ bus_dmamap_unload(
+ sc->stats_tag,
+ sc->stats_map);
+ bus_dmamap_destroy(sc->stats_tag,
+ sc->stats_map);
+ }
+
+ if (sc->stats_tag != NULL)
+ bus_dma_tag_destroy(sc->stats_tag);
+
+
+ /* Free, unmap and destroy all TX buffer descriptor chain pages. */
+ for (i = 0; i < TX_PAGES; i++ ) {
+ if (sc->tx_bd_chain[i] != NULL)
+ bus_dmamem_free(
+ sc->tx_bd_chain_tag,
+ sc->tx_bd_chain[i],
+ sc->tx_bd_chain_map[i]);
+
+ if (sc->tx_bd_chain_map[i] != NULL) {
+ bus_dmamap_unload(
+ sc->tx_bd_chain_tag,
+ sc->tx_bd_chain_map[i]);
+ bus_dmamap_destroy(
+ sc->tx_bd_chain_tag,
+ sc->tx_bd_chain_map[i]);
+ }
+
+ }
+
+ /* Destroy the TX buffer descriptor tag. */
+ if (sc->tx_bd_chain_tag != NULL)
+ bus_dma_tag_destroy(sc->tx_bd_chain_tag);
+
+
+ /* Free, unmap and destroy all RX buffer descriptor chain pages. */
+ for (i = 0; i < RX_PAGES; i++ ) {
+ if (sc->rx_bd_chain[i] != NULL)
+ bus_dmamem_free(
+ sc->rx_bd_chain_tag,
+ sc->rx_bd_chain[i],
+ sc->rx_bd_chain_map[i]);
+
+ if (sc->rx_bd_chain_map[i] != NULL) {
+ bus_dmamap_unload(
+ sc->rx_bd_chain_tag,
+ sc->rx_bd_chain_map[i]);
+ bus_dmamap_destroy(
+ sc->rx_bd_chain_tag,
+ sc->rx_bd_chain_map[i]);
+ }
+ }
+
+ /* Destroy the RX buffer descriptor tag. */
+ if (sc->rx_bd_chain_tag != NULL)
+ bus_dma_tag_destroy(sc->rx_bd_chain_tag);
+
+
+ /* Unload and destroy the TX mbuf maps. */
+ for (i = 0; i < TOTAL_TX_BD; i++) {
+ if (sc->tx_mbuf_map[i] != NULL) {
+ bus_dmamap_unload(sc->tx_mbuf_tag,
+ sc->tx_mbuf_map[i]);
+ bus_dmamap_destroy(sc->tx_mbuf_tag,
+ sc->tx_mbuf_map[i]);
+ }
+ }
+
+ /* Destroy the TX mbuf tag. */
+ if (sc->tx_mbuf_tag != NULL)
+ bus_dma_tag_destroy(sc->tx_mbuf_tag);
+
+
+ /* Unload and destroy the RX mbuf maps. */
+ for (i = 0; i < TOTAL_RX_BD; i++) {
+ if (sc->rx_mbuf_map[i] != NULL) {
+ bus_dmamap_unload(sc->rx_mbuf_tag,
+ sc->rx_mbuf_map[i]);
+ bus_dmamap_destroy(sc->rx_mbuf_tag,
+ sc->rx_mbuf_map[i]);
+ }
+ }
+
+ /* Destroy the RX mbuf tag. */
+ if (sc->rx_mbuf_tag != NULL)
+ bus_dma_tag_destroy(sc->rx_mbuf_tag);
+
+
+ /* Destroy the parent tag */
+ if (sc->parent_tag != NULL)
+ bus_dma_tag_destroy(sc->parent_tag);
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+
+}
+
+
+/****************************************************************************/
+/* Get DMA memory from the OS. */
+/* */
+/* Validates that the OS has provided DMA buffers in response to a */
+/* bus_dmamap_load() call and saves the physical address of those buffers. */
+/* When the callback is used the OS will return 0 for the mapping function */
+/* (bus_dmamap_load()) so we use the value of map_arg->maxsegs to pass any */
+/* failures back to the caller. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
+{
+ struct bce_dmamap_arg *map_arg = arg;
+ struct bce_softc *sc = map_arg->sc;
+
+ /* Simulate a mapping failure. */
+ DBRUNIF(DB_RANDOMTRUE(bce_debug_dma_map_addr_failure),
+ BCE_PRINTF(sc, "%s(%d): Simulating DMA mapping error.\n",
+ __FILE__, __LINE__);
+ error = ENOMEM);
+
+ /* Check for an error and signal the caller that an error occurred. */
+ if (error || (nseg > map_arg->maxsegs)) {
+ BCE_PRINTF(sc, "%s(%d): DMA mapping error! error = %d, "
+ "nseg = %d, maxsegs = %d\n",
+ __FILE__, __LINE__, error, nseg, map_arg->maxsegs);
+ map_arg->maxsegs = 0;
+ goto bce_dma_map_addr_exit;
+ }
+
+ map_arg->busaddr = segs->ds_addr;
+
+bce_dma_map_addr_exit:
+ return;
+}
+
+
+/****************************************************************************/
+/* Map TX buffers into TX buffer descriptors. */
+/* */
+/* Given a series of DMA memory containting an outgoing frame, map the */
+/* segments into the tx_bd structure used by the hardware. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_dma_map_tx_desc(void *arg, bus_dma_segment_t *segs,
+ int nseg, bus_size_t mapsize, int error)
+{
+ struct bce_dmamap_arg *map_arg;
+ struct bce_softc *sc;
+ struct tx_bd *txbd = NULL;
+ int i = 0;
+ u16 prod, chain_prod;
+ u32 prod_bseq;
+#ifdef BCE_DEBUG
+ u16 debug_prod;
+#endif
+
+ map_arg = arg;
+ sc = map_arg->sc;
+
+ if (error) {
+ DBPRINT(sc, BCE_WARN, "%s(): Called with error = %d\n",
+ __FUNCTION__, error);
+ return;
+ }
+
+ /* Signal error to caller if there's too many segments */
+ if (nseg > map_arg->maxsegs) {
+ DBPRINT(sc, BCE_WARN,
+ "%s(): Mapped TX descriptors: max segs = %d, "
+ "actual segs = %d\n",
+ __FUNCTION__, map_arg->maxsegs, nseg);
+
+ map_arg->maxsegs = 0;
+ return;
+ }
+
+ /* prod points to an empty tx_bd at this point. */
+ prod = map_arg->prod;
+ chain_prod = map_arg->chain_prod;
+ prod_bseq = map_arg->prod_bseq;
+
+#ifdef BCE_DEBUG
+ debug_prod = chain_prod;
+#endif
+
+ DBPRINT(sc, BCE_INFO_SEND,
+ "%s(): Start: prod = 0x%04X, chain_prod = %04X, "
+ "prod_bseq = 0x%08X\n",
+ __FUNCTION__, prod, chain_prod, prod_bseq);
+
+ /*
+ * Cycle through each mbuf segment that makes up
+ * the outgoing frame, gathering the mapping info
+ * for that segment and creating a tx_bd to for
+ * the mbuf.
+ */
+
+ txbd = &map_arg->tx_chain[TX_PAGE(chain_prod)][TX_IDX(chain_prod)];
+
+ /* Setup the first tx_bd for the first segment. */
+ txbd->tx_bd_haddr_lo = htole32(BCE_ADDR_LO(segs[i].ds_addr));
+ txbd->tx_bd_haddr_hi = htole32(BCE_ADDR_HI(segs[i].ds_addr));
+ txbd->tx_bd_mss_nbytes = htole16(segs[i].ds_len);
+ txbd->tx_bd_vlan_tag_flags = htole16(map_arg->tx_flags |
+ TX_BD_FLAGS_START);
+ prod_bseq += segs[i].ds_len;
+
+ /* Setup any remaing segments. */
+ for (i = 1; i < nseg; i++) {
+ prod = NEXT_TX_BD(prod);
+ chain_prod = TX_CHAIN_IDX(prod);
+
+ txbd = &map_arg->tx_chain[TX_PAGE(chain_prod)][TX_IDX(chain_prod)];
+
+ txbd->tx_bd_haddr_lo = htole32(BCE_ADDR_LO(segs[i].ds_addr));
+ txbd->tx_bd_haddr_hi = htole32(BCE_ADDR_HI(segs[i].ds_addr));
+ txbd->tx_bd_mss_nbytes = htole16(segs[i].ds_len);
+ txbd->tx_bd_vlan_tag_flags = htole16(map_arg->tx_flags);
+
+ prod_bseq += segs[i].ds_len;
+ }
+
+ /* Set the END flag on the last TX buffer descriptor. */
+ txbd->tx_bd_vlan_tag_flags |= htole16(TX_BD_FLAGS_END);
+
+ DBRUN(BCE_INFO_SEND, bce_dump_tx_chain(sc, debug_prod, nseg));
+
+ DBPRINT(sc, BCE_INFO_SEND,
+ "%s(): End: prod = 0x%04X, chain_prod = %04X, "
+ "prod_bseq = 0x%08X\n",
+ __FUNCTION__, prod, chain_prod, prod_bseq);
+
+ /* prod points to the last tx_bd at this point. */
+ map_arg->maxsegs = nseg;
+ map_arg->prod = prod;
+ map_arg->chain_prod = chain_prod;
+ map_arg->prod_bseq = prod_bseq;
+}
+
+
+/****************************************************************************/
+/* Allocate any DMA memory needed by the driver. */
+/* */
+/* Allocates DMA memory needed for the various global structures needed by */
+/* hardware. */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static int
+bce_dma_alloc(device_t dev)
+{
+ struct bce_softc *sc;
+ int i, error, rc = 0;
+ struct bce_dmamap_arg map_arg;
+
+ sc = device_get_softc(dev);
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ /*
+ * Allocate the parent bus DMA tag appropriate for PCI.
+ */
+ if (bus_dma_tag_create(NULL, /* parent */
+ BCE_DMA_ALIGN, /* alignment */
+ BCE_DMA_BOUNDARY, /* boundary */
+ sc->max_bus_addr, /* lowaddr */
+ BUS_SPACE_MAXADDR, /* highaddr */
+ NULL, /* filterfunc */
+ NULL, /* filterarg */
+ MAXBSIZE, /* maxsize */
+ BUS_SPACE_UNRESTRICTED, /* nsegments */
+ BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
+ 0, /* flags */
+ NULL, /* locfunc */
+ NULL, /* lockarg */
+ &sc->parent_tag)) {
+ BCE_PRINTF(sc, "%s(%d): Could not allocate parent DMA tag!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ /*
+ * Create a DMA tag for the status block, allocate and clear the
+ * memory, map the memory into DMA space, and fetch the physical
+ * address of the block.
+ */
+ if (bus_dma_tag_create(
+ sc->parent_tag, /* parent */
+ BCE_DMA_ALIGN, /* alignment */
+ BCE_DMA_BOUNDARY, /* boundary */
+ sc->max_bus_addr, /* lowaddr */
+ BUS_SPACE_MAXADDR, /* highaddr */
+ NULL, /* filterfunc */
+ NULL, /* filterarg */
+ BCE_STATUS_BLK_SZ, /* maxsize */
+ 1, /* nsegments */
+ BCE_STATUS_BLK_SZ, /* maxsegsize */
+ 0, /* flags */
+ NULL, /* lockfunc */
+ NULL, /* lockarg */
+ &sc->status_tag)) {
+ BCE_PRINTF(sc, "%s(%d): Could not allocate status block DMA tag!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ if(bus_dmamem_alloc(
+ sc->status_tag, /* dmat */
+ (void **)&sc->status_block, /* vaddr */
+ BUS_DMA_NOWAIT, /* flags */
+ &sc->status_map)) {
+ BCE_PRINTF(sc, "%s(%d): Could not allocate status block DMA memory!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ bzero((char *)sc->status_block, BCE_STATUS_BLK_SZ);
+
+ map_arg.sc = sc;
+ map_arg.maxsegs = 1;
+
+ error = bus_dmamap_load(
+ sc->status_tag, /* dmat */
+ sc->status_map, /* map */
+ sc->status_block, /* buf */
+ BCE_STATUS_BLK_SZ, /* buflen */
+ bce_dma_map_addr, /* callback */
+ &map_arg, /* callbackarg */
+ BUS_DMA_NOWAIT); /* flags */
+
+ if(error || (map_arg.maxsegs == 0)) {
+ BCE_PRINTF(sc, "%s(%d): Could not map status block DMA memory!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ sc->status_block_paddr = map_arg.busaddr;
+ /* DRC - Fix for 64 bit addresses. */
+ DBPRINT(sc, BCE_INFO, "status_block_paddr = 0x%08X\n",
+ (u32) sc->status_block_paddr);
+
+ /*
+ * Create a DMA tag for the statistics block, allocate and clear the
+ * memory, map the memory into DMA space, and fetch the physical
+ * address of the block.
+ */
+ if (bus_dma_tag_create(
+ sc->parent_tag, /* parent */
+ BCE_DMA_ALIGN, /* alignment */
+ BCE_DMA_BOUNDARY, /* boundary */
+ sc->max_bus_addr, /* lowaddr */
+ BUS_SPACE_MAXADDR, /* highaddr */
+ NULL, /* filterfunc */
+ NULL, /* filterarg */
+ BCE_STATS_BLK_SZ, /* maxsize */
+ 1, /* nsegments */
+ BCE_STATS_BLK_SZ, /* maxsegsize */
+ 0, /* flags */
+ NULL, /* lockfunc */
+ NULL, /* lockarg */
+ &sc->stats_tag)) {
+ BCE_PRINTF(sc, "%s(%d): Could not allocate statistics block DMA tag!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ if (bus_dmamem_alloc(
+ sc->stats_tag, /* dmat */
+ (void **)&sc->stats_block, /* vaddr */
+ BUS_DMA_NOWAIT, /* flags */
+ &sc->stats_map)) {
+ BCE_PRINTF(sc, "%s(%d): Could not allocate statistics block DMA memory!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ bzero((char *)sc->stats_block, BCE_STATS_BLK_SZ);
+
+ map_arg.sc = sc;
+ map_arg.maxsegs = 1;
+
+ error = bus_dmamap_load(
+ sc->stats_tag, /* dmat */
+ sc->stats_map, /* map */
+ sc->stats_block, /* buf */
+ BCE_STATS_BLK_SZ, /* buflen */
+ bce_dma_map_addr, /* callback */
+ &map_arg, /* callbackarg */
+ BUS_DMA_NOWAIT); /* flags */
+
+ if(error || (map_arg.maxsegs == 0)) {
+ BCE_PRINTF(sc, "%s(%d): Could not map statistics block DMA memory!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ sc->stats_block_paddr = map_arg.busaddr;
+ /* DRC - Fix for 64 bit address. */
+ DBPRINT(sc,BCE_INFO, "stats_block_paddr = 0x%08X\n",
+ (u32) sc->stats_block_paddr);
+
+ /*
+ * Create a DMA tag for the TX buffer descriptor chain,
+ * allocate and clear the memory, and fetch the
+ * physical address of the block.
+ */
+ if(bus_dma_tag_create(
+ sc->parent_tag, /* parent */
+ BCM_PAGE_SIZE, /* alignment */
+ BCE_DMA_BOUNDARY, /* boundary */
+ sc->max_bus_addr, /* lowaddr */
+ BUS_SPACE_MAXADDR, /* highaddr */
+ NULL, /* filterfunc */
+ NULL, /* filterarg */
+ BCE_TX_CHAIN_PAGE_SZ, /* maxsize */
+ 1, /* nsegments */
+ BCE_TX_CHAIN_PAGE_SZ, /* maxsegsize */
+ 0, /* flags */
+ NULL, /* lockfunc */
+ NULL, /* lockarg */
+ &sc->tx_bd_chain_tag)) {
+ BCE_PRINTF(sc, "%s(%d): Could not allocate TX descriptor chain DMA tag!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ for (i = 0; i < TX_PAGES; i++) {
+
+ if(bus_dmamem_alloc(
+ sc->tx_bd_chain_tag, /* tag */
+ (void **)&sc->tx_bd_chain[i], /* vaddr */
+ BUS_DMA_NOWAIT, /* flags */
+ &sc->tx_bd_chain_map[i])) {
+ BCE_PRINTF(sc, "%s(%d): Could not allocate TX descriptor "
+ "chain DMA memory!\n", __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ map_arg.maxsegs = 1;
+ map_arg.sc = sc;
+
+ error = bus_dmamap_load(
+ sc->tx_bd_chain_tag, /* dmat */
+ sc->tx_bd_chain_map[i], /* map */
+ sc->tx_bd_chain[i], /* buf */
+ BCE_TX_CHAIN_PAGE_SZ, /* buflen */
+ bce_dma_map_addr, /* callback */
+ &map_arg, /* callbackarg */
+ BUS_DMA_NOWAIT); /* flags */
+
+ if(error || (map_arg.maxsegs == 0)) {
+ BCE_PRINTF(sc, "%s(%d): Could not map TX descriptor chain DMA memory!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ sc->tx_bd_chain_paddr[i] = map_arg.busaddr;
+ /* DRC - Fix for 64 bit systems. */
+ DBPRINT(sc, BCE_INFO, "tx_bd_chain_paddr[%d] = 0x%08X\n",
+ i, (u32) sc->tx_bd_chain_paddr[i]);
+ }
+
+ /* Create a DMA tag for TX mbufs. */
+ if (bus_dma_tag_create(
+ sc->parent_tag, /* parent */
+ BCE_DMA_ALIGN, /* alignment */
+ BCE_DMA_BOUNDARY, /* boundary */
+ sc->max_bus_addr, /* lowaddr */
+ BUS_SPACE_MAXADDR, /* highaddr */
+ NULL, /* filterfunc */
+ NULL, /* filterarg */
+ MCLBYTES * BCE_MAX_SEGMENTS, /* maxsize */
+ BCE_MAX_SEGMENTS, /* nsegments */
+ MCLBYTES, /* maxsegsize */
+ 0, /* flags */
+ NULL, /* lockfunc */
+ NULL, /* lockarg */
+ &sc->tx_mbuf_tag)) {
+ BCE_PRINTF(sc, "%s(%d): Could not allocate TX mbuf DMA tag!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ /* Create DMA maps for the TX mbufs clusters. */
+ for (i = 0; i < TOTAL_TX_BD; i++) {
+ if (bus_dmamap_create(sc->tx_mbuf_tag, BUS_DMA_NOWAIT,
+ &sc->tx_mbuf_map[i])) {
+ BCE_PRINTF(sc, "%s(%d): Unable to create TX mbuf DMA map!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+ }
+
+ /*
+ * Create a DMA tag for the RX buffer descriptor chain,
+ * allocate and clear the memory, and fetch the physical
+ * address of the blocks.
+ */
+ if (bus_dma_tag_create(
+ sc->parent_tag, /* parent */
+ BCM_PAGE_SIZE, /* alignment */
+ BCE_DMA_BOUNDARY, /* boundary */
+ BUS_SPACE_MAXADDR, /* lowaddr */
+ sc->max_bus_addr, /* lowaddr */
+ NULL, /* filter */
+ NULL, /* filterarg */
+ BCE_RX_CHAIN_PAGE_SZ, /* maxsize */
+ 1, /* nsegments */
+ BCE_RX_CHAIN_PAGE_SZ, /* maxsegsize */
+ 0, /* flags */
+ NULL, /* lockfunc */
+ NULL, /* lockarg */
+ &sc->rx_bd_chain_tag)) {
+ BCE_PRINTF(sc, "%s(%d): Could not allocate RX descriptor chain DMA tag!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ for (i = 0; i < RX_PAGES; i++) {
+
+ if (bus_dmamem_alloc(
+ sc->rx_bd_chain_tag, /* tag */
+ (void **)&sc->rx_bd_chain[i], /* vaddr */
+ BUS_DMA_NOWAIT, /* flags */
+ &sc->rx_bd_chain_map[i])) {
+ BCE_PRINTF(sc, "%s(%d): Could not allocate RX descriptor chain "
+ "DMA memory!\n", __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ bzero((char *)sc->rx_bd_chain[i], BCE_RX_CHAIN_PAGE_SZ);
+
+ map_arg.maxsegs = 1;
+ map_arg.sc = sc;
+
+ error = bus_dmamap_load(
+ sc->rx_bd_chain_tag, /* dmat */
+ sc->rx_bd_chain_map[i], /* map */
+ sc->rx_bd_chain[i], /* buf */
+ BCE_RX_CHAIN_PAGE_SZ, /* buflen */
+ bce_dma_map_addr, /* callback */
+ &map_arg, /* callbackarg */
+ BUS_DMA_NOWAIT); /* flags */
+
+ if(error || (map_arg.maxsegs == 0)) {
+ BCE_PRINTF(sc, "%s(%d): Could not map RX descriptor chain DMA memory!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ sc->rx_bd_chain_paddr[i] = map_arg.busaddr;
+ /* DRC - Fix for 64 bit systems. */
+ DBPRINT(sc, BCE_INFO, "rx_bd_chain_paddr[%d] = 0x%08X\n",
+ i, (u32) sc->rx_bd_chain_paddr[i]);
+ }
+
+ /*
+ * Create a DMA tag for RX mbufs.
+ */
+ if (bus_dma_tag_create(
+ sc->parent_tag, /* parent */
+ BCE_DMA_ALIGN, /* alignment */
+ BCE_DMA_BOUNDARY, /* boundary */
+ sc->max_bus_addr, /* lowaddr */
+ BUS_SPACE_MAXADDR, /* highaddr */
+ NULL, /* filterfunc */
+ NULL, /* filterarg */
+ MJUM9BYTES, /* maxsize */
+ BCE_MAX_SEGMENTS, /* nsegments */
+ MJUM9BYTES, /* maxsegsize */
+ 0, /* flags */
+ NULL, /* lockfunc */
+ NULL, /* lockarg */
+ &sc->rx_mbuf_tag)) {
+ BCE_PRINTF(sc, "%s(%d): Could not allocate RX mbuf DMA tag!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+
+ /* Create DMA maps for the RX mbuf clusters. */
+ for (i = 0; i < TOTAL_RX_BD; i++) {
+ if (bus_dmamap_create(sc->rx_mbuf_tag, BUS_DMA_NOWAIT,
+ &sc->rx_mbuf_map[i])) {
+ BCE_PRINTF(sc, "%s(%d): Unable to create RX mbuf DMA map!\n",
+ __FILE__, __LINE__);
+ rc = ENOMEM;
+ goto bce_dma_alloc_exit;
+ }
+ }
+
+bce_dma_alloc_exit:
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+
+ return(rc);
+}
+
+
+/****************************************************************************/
+/* Release all resources used by the driver. */
+/* */
+/* Releases all resources acquired by the driver including interrupts, */
+/* interrupt handler, interfaces, mutexes, and DMA memory. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_release_resources(struct bce_softc *sc)
+{
+ device_t dev;
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ dev = sc->bce_dev;
+
+ bce_dma_free(sc);
+
+ if (sc->bce_intrhand != NULL)
+ bus_teardown_intr(dev, sc->bce_irq, sc->bce_intrhand);
+
+ if (sc->bce_irq != NULL)
+ bus_release_resource(dev,
+ SYS_RES_IRQ,
+ 0,
+ sc->bce_irq);
+
+ if (sc->bce_res != NULL)
+ bus_release_resource(dev,
+ SYS_RES_MEMORY,
+ PCIR_BAR(0),
+ sc->bce_res);
+
+ if (sc->bce_ifp != NULL)
+ if_free(sc->bce_ifp);
+
+
+ if (mtx_initialized(&sc->bce_mtx))
+ BCE_LOCK_DESTROY(sc);
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+
+}
+
+
+/****************************************************************************/
+/* Firmware synchronization. */
+/* */
+/* Before performing certain events such as a chip reset, synchronize with */
+/* the firmware first. */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static int
+bce_fw_sync(struct bce_softc *sc, u32 msg_data)
+{
+ int i, rc = 0;
+ u32 val;
+
+ /* Don't waste any time if we've timed out before. */
+ if (sc->bce_fw_timed_out) {
+ rc = EBUSY;
+ goto bce_fw_sync_exit;
+ }
+
+ /* Increment the message sequence number. */
+ sc->bce_fw_wr_seq++;
+ msg_data |= sc->bce_fw_wr_seq;
+
+ DBPRINT(sc, BCE_VERBOSE, "bce_fw_sync(): msg_data = 0x%08X\n", msg_data);
+
+ /* Send the message to the bootcode driver mailbox. */
+ REG_WR_IND(sc, sc->bce_shmem_base + BCE_DRV_MB, msg_data);
+
+ /* Wait for the bootcode to acknowledge the message. */
+ for (i = 0; i < FW_ACK_TIME_OUT_MS; i++) {
+ /* Check for a response in the bootcode firmware mailbox. */
+ val = REG_RD_IND(sc, sc->bce_shmem_base + BCE_FW_MB);
+ if ((val & BCE_FW_MSG_ACK) == (msg_data & BCE_DRV_MSG_SEQ))
+ break;
+ DELAY(1000);
+ }
+
+ /* If we've timed out, tell the bootcode that we've stopped waiting. */
+ if (((val & BCE_FW_MSG_ACK) != (msg_data & BCE_DRV_MSG_SEQ)) &&
+ ((msg_data & BCE_DRV_MSG_DATA) != BCE_DRV_MSG_DATA_WAIT0)) {
+
+ BCE_PRINTF(sc, "%s(%d): Firmware synchronization timeout! "
+ "msg_data = 0x%08X\n",
+ __FILE__, __LINE__, msg_data);
+
+ msg_data &= ~BCE_DRV_MSG_CODE;
+ msg_data |= BCE_DRV_MSG_CODE_FW_TIMEOUT;
+
+ REG_WR_IND(sc, sc->bce_shmem_base + BCE_DRV_MB, msg_data);
+
+ sc->bce_fw_timed_out = 1;
+ rc = EBUSY;
+ }
+
+bce_fw_sync_exit:
+ return (rc);
+}
+
+
+/****************************************************************************/
+/* Load Receive Virtual 2 Physical (RV2P) processor firmware. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_load_rv2p_fw(struct bce_softc *sc, u32 *rv2p_code,
+ u32 rv2p_code_len, u32 rv2p_proc)
+{
+ int i;
+ u32 val;
+
+ for (i = 0; i < rv2p_code_len; i += 8) {
+ REG_WR(sc, BCE_RV2P_INSTR_HIGH, *rv2p_code);
+ rv2p_code++;
+ REG_WR(sc, BCE_RV2P_INSTR_LOW, *rv2p_code);
+ rv2p_code++;
+
+ if (rv2p_proc == RV2P_PROC1) {
+ val = (i / 8) | BCE_RV2P_PROC1_ADDR_CMD_RDWR;
+ REG_WR(sc, BCE_RV2P_PROC1_ADDR_CMD, val);
+ }
+ else {
+ val = (i / 8) | BCE_RV2P_PROC2_ADDR_CMD_RDWR;
+ REG_WR(sc, BCE_RV2P_PROC2_ADDR_CMD, val);
+ }
+ }
+
+ /* Reset the processor, un-stall is done later. */
+ if (rv2p_proc == RV2P_PROC1) {
+ REG_WR(sc, BCE_RV2P_COMMAND, BCE_RV2P_COMMAND_PROC1_RESET);
+ }
+ else {
+ REG_WR(sc, BCE_RV2P_COMMAND, BCE_RV2P_COMMAND_PROC2_RESET);
+ }
+}
+
+
+/****************************************************************************/
+/* Load RISC processor firmware. */
+/* */
+/* Loads firmware from the file if_bcefw.h into the scratchpad memory */
+/* associated with a particular processor. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_load_cpu_fw(struct bce_softc *sc, struct cpu_reg *cpu_reg,
+ struct fw_info *fw)
+{
+ u32 offset;
+ u32 val;
+
+ /* Halt the CPU. */
+ val = REG_RD_IND(sc, cpu_reg->mode);
+ val |= cpu_reg->mode_value_halt;
+ REG_WR_IND(sc, cpu_reg->mode, val);
+ REG_WR_IND(sc, cpu_reg->state, cpu_reg->state_value_clear);
+
+ /* Load the Text area. */
+ offset = cpu_reg->spad_base + (fw->text_addr - cpu_reg->mips_view_base);
+ if (fw->text) {
+ int j;
+
+ for (j = 0; j < (fw->text_len / 4); j++, offset += 4) {
+ REG_WR_IND(sc, offset, fw->text[j]);
+ }
+ }
+
+ /* Load the Data area. */
+ offset = cpu_reg->spad_base + (fw->data_addr - cpu_reg->mips_view_base);
+ if (fw->data) {
+ int j;
+
+ for (j = 0; j < (fw->data_len / 4); j++, offset += 4) {
+ REG_WR_IND(sc, offset, fw->data[j]);
+ }
+ }
+
+ /* Load the SBSS area. */
+ offset = cpu_reg->spad_base + (fw->sbss_addr - cpu_reg->mips_view_base);
+ if (fw->sbss) {
+ int j;
+
+ for (j = 0; j < (fw->sbss_len / 4); j++, offset += 4) {
+ REG_WR_IND(sc, offset, fw->sbss[j]);
+ }
+ }
+
+ /* Load the BSS area. */
+ offset = cpu_reg->spad_base + (fw->bss_addr - cpu_reg->mips_view_base);
+ if (fw->bss) {
+ int j;
+
+ for (j = 0; j < (fw->bss_len/4); j++, offset += 4) {
+ REG_WR_IND(sc, offset, fw->bss[j]);
+ }
+ }
+
+ /* Load the Read-Only area. */
+ offset = cpu_reg->spad_base +
+ (fw->rodata_addr - cpu_reg->mips_view_base);
+ if (fw->rodata) {
+ int j;
+
+ for (j = 0; j < (fw->rodata_len / 4); j++, offset += 4) {
+ REG_WR_IND(sc, offset, fw->rodata[j]);
+ }
+ }
+
+ /* Clear the pre-fetch instruction. */
+ REG_WR_IND(sc, cpu_reg->inst, 0);
+ REG_WR_IND(sc, cpu_reg->pc, fw->start_addr);
+
+ /* Start the CPU. */
+ val = REG_RD_IND(sc, cpu_reg->mode);
+ val &= ~cpu_reg->mode_value_halt;
+ REG_WR_IND(sc, cpu_reg->state, cpu_reg->state_value_clear);
+ REG_WR_IND(sc, cpu_reg->mode, val);
+}
+
+
+/****************************************************************************/
+/* Initialize the RV2P, RX, TX, TPAT, and COM CPUs. */
+/* */
+/* Loads the firmware for each CPU and starts the CPU. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_init_cpus(struct bce_softc *sc)
+{
+ struct cpu_reg cpu_reg;
+ struct fw_info fw;
+
+ /* Initialize the RV2P processor. */
+ bce_load_rv2p_fw(sc, bce_rv2p_proc1, sizeof(bce_rv2p_proc1), RV2P_PROC1);
+ bce_load_rv2p_fw(sc, bce_rv2p_proc2, sizeof(bce_rv2p_proc2), RV2P_PROC2);
+
+ /* Initialize the RX Processor. */
+ cpu_reg.mode = BCE_RXP_CPU_MODE;
+ cpu_reg.mode_value_halt = BCE_RXP_CPU_MODE_SOFT_HALT;
+ cpu_reg.mode_value_sstep = BCE_RXP_CPU_MODE_STEP_ENA;
+ cpu_reg.state = BCE_RXP_CPU_STATE;
+ cpu_reg.state_value_clear = 0xffffff;
+ cpu_reg.gpr0 = BCE_RXP_CPU_REG_FILE;
+ cpu_reg.evmask = BCE_RXP_CPU_EVENT_MASK;
+ cpu_reg.pc = BCE_RXP_CPU_PROGRAM_COUNTER;
+ cpu_reg.inst = BCE_RXP_CPU_INSTRUCTION;
+ cpu_reg.bp = BCE_RXP_CPU_HW_BREAKPOINT;
+ cpu_reg.spad_base = BCE_RXP_SCRATCH;
+ cpu_reg.mips_view_base = 0x8000000;
+
+ fw.ver_major = bce_RXP_b06FwReleaseMajor;
+ fw.ver_minor = bce_RXP_b06FwReleaseMinor;
+ fw.ver_fix = bce_RXP_b06FwReleaseFix;
+ fw.start_addr = bce_RXP_b06FwStartAddr;
+
+ fw.text_addr = bce_RXP_b06FwTextAddr;
+ fw.text_len = bce_RXP_b06FwTextLen;
+ fw.text_index = 0;
+ fw.text = bce_RXP_b06FwText;
+
+ fw.data_addr = bce_RXP_b06FwDataAddr;
+ fw.data_len = bce_RXP_b06FwDataLen;
+ fw.data_index = 0;
+ fw.data = bce_RXP_b06FwData;
+
+ fw.sbss_addr = bce_RXP_b06FwSbssAddr;
+ fw.sbss_len = bce_RXP_b06FwSbssLen;
+ fw.sbss_index = 0;
+ fw.sbss = bce_RXP_b06FwSbss;
+
+ fw.bss_addr = bce_RXP_b06FwBssAddr;
+ fw.bss_len = bce_RXP_b06FwBssLen;
+ fw.bss_index = 0;
+ fw.bss = bce_RXP_b06FwBss;
+
+ fw.rodata_addr = bce_RXP_b06FwRodataAddr;
+ fw.rodata_len = bce_RXP_b06FwRodataLen;
+ fw.rodata_index = 0;
+ fw.rodata = bce_RXP_b06FwRodata;
+
+ DBPRINT(sc, BCE_INFO_RESET, "Loading RX firmware.\n");
+ bce_load_cpu_fw(sc, &cpu_reg, &fw);
+
+ /* Initialize the TX Processor. */
+ cpu_reg.mode = BCE_TXP_CPU_MODE;
+ cpu_reg.mode_value_halt = BCE_TXP_CPU_MODE_SOFT_HALT;
+ cpu_reg.mode_value_sstep = BCE_TXP_CPU_MODE_STEP_ENA;
+ cpu_reg.state = BCE_TXP_CPU_STATE;
+ cpu_reg.state_value_clear = 0xffffff;
+ cpu_reg.gpr0 = BCE_TXP_CPU_REG_FILE;
+ cpu_reg.evmask = BCE_TXP_CPU_EVENT_MASK;
+ cpu_reg.pc = BCE_TXP_CPU_PROGRAM_COUNTER;
+ cpu_reg.inst = BCE_TXP_CPU_INSTRUCTION;
+ cpu_reg.bp = BCE_TXP_CPU_HW_BREAKPOINT;
+ cpu_reg.spad_base = BCE_TXP_SCRATCH;
+ cpu_reg.mips_view_base = 0x8000000;
+
+ fw.ver_major = bce_TXP_b06FwReleaseMajor;
+ fw.ver_minor = bce_TXP_b06FwReleaseMinor;
+ fw.ver_fix = bce_TXP_b06FwReleaseFix;
+ fw.start_addr = bce_TXP_b06FwStartAddr;
+
+ fw.text_addr = bce_TXP_b06FwTextAddr;
+ fw.text_len = bce_TXP_b06FwTextLen;
+ fw.text_index = 0;
+ fw.text = bce_TXP_b06FwText;
+
+ fw.data_addr = bce_TXP_b06FwDataAddr;
+ fw.data_len = bce_TXP_b06FwDataLen;
+ fw.data_index = 0;
+ fw.data = bce_TXP_b06FwData;
+
+ fw.sbss_addr = bce_TXP_b06FwSbssAddr;
+ fw.sbss_len = bce_TXP_b06FwSbssLen;
+ fw.sbss_index = 0;
+ fw.sbss = bce_TXP_b06FwSbss;
+
+ fw.bss_addr = bce_TXP_b06FwBssAddr;
+ fw.bss_len = bce_TXP_b06FwBssLen;
+ fw.bss_index = 0;
+ fw.bss = bce_TXP_b06FwBss;
+
+ fw.rodata_addr = bce_TXP_b06FwRodataAddr;
+ fw.rodata_len = bce_TXP_b06FwRodataLen;
+ fw.rodata_index = 0;
+ fw.rodata = bce_TXP_b06FwRodata;
+
+ DBPRINT(sc, BCE_INFO_RESET, "Loading TX firmware.\n");
+ bce_load_cpu_fw(sc, &cpu_reg, &fw);
+
+ /* Initialize the TX Patch-up Processor. */
+ cpu_reg.mode = BCE_TPAT_CPU_MODE;
+ cpu_reg.mode_value_halt = BCE_TPAT_CPU_MODE_SOFT_HALT;
+ cpu_reg.mode_value_sstep = BCE_TPAT_CPU_MODE_STEP_ENA;
+ cpu_reg.state = BCE_TPAT_CPU_STATE;
+ cpu_reg.state_value_clear = 0xffffff;
+ cpu_reg.gpr0 = BCE_TPAT_CPU_REG_FILE;
+ cpu_reg.evmask = BCE_TPAT_CPU_EVENT_MASK;
+ cpu_reg.pc = BCE_TPAT_CPU_PROGRAM_COUNTER;
+ cpu_reg.inst = BCE_TPAT_CPU_INSTRUCTION;
+ cpu_reg.bp = BCE_TPAT_CPU_HW_BREAKPOINT;
+ cpu_reg.spad_base = BCE_TPAT_SCRATCH;
+ cpu_reg.mips_view_base = 0x8000000;
+
+ fw.ver_major = bce_TPAT_b06FwReleaseMajor;
+ fw.ver_minor = bce_TPAT_b06FwReleaseMinor;
+ fw.ver_fix = bce_TPAT_b06FwReleaseFix;
+ fw.start_addr = bce_TPAT_b06FwStartAddr;
+
+ fw.text_addr = bce_TPAT_b06FwTextAddr;
+ fw.text_len = bce_TPAT_b06FwTextLen;
+ fw.text_index = 0;
+ fw.text = bce_TPAT_b06FwText;
+
+ fw.data_addr = bce_TPAT_b06FwDataAddr;
+ fw.data_len = bce_TPAT_b06FwDataLen;
+ fw.data_index = 0;
+ fw.data = bce_TPAT_b06FwData;
+
+ fw.sbss_addr = bce_TPAT_b06FwSbssAddr;
+ fw.sbss_len = bce_TPAT_b06FwSbssLen;
+ fw.sbss_index = 0;
+ fw.sbss = bce_TPAT_b06FwSbss;
+
+ fw.bss_addr = bce_TPAT_b06FwBssAddr;
+ fw.bss_len = bce_TPAT_b06FwBssLen;
+ fw.bss_index = 0;
+ fw.bss = bce_TPAT_b06FwBss;
+
+ fw.rodata_addr = bce_TPAT_b06FwRodataAddr;
+ fw.rodata_len = bce_TPAT_b06FwRodataLen;
+ fw.rodata_index = 0;
+ fw.rodata = bce_TPAT_b06FwRodata;
+
+ DBPRINT(sc, BCE_INFO_RESET, "Loading TPAT firmware.\n");
+ bce_load_cpu_fw(sc, &cpu_reg, &fw);
+
+ /* Initialize the Completion Processor. */
+ cpu_reg.mode = BCE_COM_CPU_MODE;
+ cpu_reg.mode_value_halt = BCE_COM_CPU_MODE_SOFT_HALT;
+ cpu_reg.mode_value_sstep = BCE_COM_CPU_MODE_STEP_ENA;
+ cpu_reg.state = BCE_COM_CPU_STATE;
+ cpu_reg.state_value_clear = 0xffffff;
+ cpu_reg.gpr0 = BCE_COM_CPU_REG_FILE;
+ cpu_reg.evmask = BCE_COM_CPU_EVENT_MASK;
+ cpu_reg.pc = BCE_COM_CPU_PROGRAM_COUNTER;
+ cpu_reg.inst = BCE_COM_CPU_INSTRUCTION;
+ cpu_reg.bp = BCE_COM_CPU_HW_BREAKPOINT;
+ cpu_reg.spad_base = BCE_COM_SCRATCH;
+ cpu_reg.mips_view_base = 0x8000000;
+
+ fw.ver_major = bce_COM_b06FwReleaseMajor;
+ fw.ver_minor = bce_COM_b06FwReleaseMinor;
+ fw.ver_fix = bce_COM_b06FwReleaseFix;
+ fw.start_addr = bce_COM_b06FwStartAddr;
+
+ fw.text_addr = bce_COM_b06FwTextAddr;
+ fw.text_len = bce_COM_b06FwTextLen;
+ fw.text_index = 0;
+ fw.text = bce_COM_b06FwText;
+
+ fw.data_addr = bce_COM_b06FwDataAddr;
+ fw.data_len = bce_COM_b06FwDataLen;
+ fw.data_index = 0;
+ fw.data = bce_COM_b06FwData;
+
+ fw.sbss_addr = bce_COM_b06FwSbssAddr;
+ fw.sbss_len = bce_COM_b06FwSbssLen;
+ fw.sbss_index = 0;
+ fw.sbss = bce_COM_b06FwSbss;
+
+ fw.bss_addr = bce_COM_b06FwBssAddr;
+ fw.bss_len = bce_COM_b06FwBssLen;
+ fw.bss_index = 0;
+ fw.bss = bce_COM_b06FwBss;
+
+ fw.rodata_addr = bce_COM_b06FwRodataAddr;
+ fw.rodata_len = bce_COM_b06FwRodataLen;
+ fw.rodata_index = 0;
+ fw.rodata = bce_COM_b06FwRodata;
+
+ DBPRINT(sc, BCE_INFO_RESET, "Loading COM firmware.\n");
+ bce_load_cpu_fw(sc, &cpu_reg, &fw);
+}
+
+
+/****************************************************************************/
+/* Initialize context memory. */
+/* */
+/* Clears the memory associated with each Context ID (CID). */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_init_context(struct bce_softc *sc)
+{
+ u32 vcid;
+
+ vcid = 96;
+ while (vcid) {
+ u32 vcid_addr, pcid_addr, offset;
+
+ vcid--;
+
+ vcid_addr = GET_CID_ADDR(vcid);
+ pcid_addr = vcid_addr;
+
+ REG_WR(sc, BCE_CTX_VIRT_ADDR, 0x00);
+ REG_WR(sc, BCE_CTX_PAGE_TBL, pcid_addr);
+
+ /* Zero out the context. */
+ for (offset = 0; offset < PHY_CTX_SIZE; offset += 4) {
+ CTX_WR(sc, 0x00, offset, 0);
+ }
+
+ REG_WR(sc, BCE_CTX_VIRT_ADDR, vcid_addr);
+ REG_WR(sc, BCE_CTX_PAGE_TBL, pcid_addr);
+ }
+}
+
+
+/****************************************************************************/
+/* Fetch the permanent MAC address of the controller. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_get_mac_addr(struct bce_softc *sc)
+{
+ u32 mac_lo = 0, mac_hi = 0;
+
+ /*
+ * The NetXtreme II bootcode populates various NIC
+ * power-on and runtime configuration items in a
+ * shared memory area. The factory configured MAC
+ * address is available from both NVRAM and the
+ * shared memory area so we'll read the value from
+ * shared memory for speed.
+ */
+
+ mac_hi = REG_RD_IND(sc, sc->bce_shmem_base +
+ BCE_PORT_HW_CFG_MAC_UPPER);
+ mac_lo = REG_RD_IND(sc, sc->bce_shmem_base +
+ BCE_PORT_HW_CFG_MAC_LOWER);
+
+ if ((mac_lo == 0) && (mac_hi == 0)) {
+ BCE_PRINTF(sc, "%s(%d): Invalid Ethernet address!\n",
+ __FILE__, __LINE__);
+ } else {
+ sc->eaddr[0] = (u_char)(mac_hi >> 8);
+ sc->eaddr[1] = (u_char)(mac_hi >> 0);
+ sc->eaddr[2] = (u_char)(mac_lo >> 24);
+ sc->eaddr[3] = (u_char)(mac_lo >> 16);
+ sc->eaddr[4] = (u_char)(mac_lo >> 8);
+ sc->eaddr[5] = (u_char)(mac_lo >> 0);
+ }
+
+ DBPRINT(sc, BCE_INFO, "Permanent Ethernet address = %6D\n", sc->eaddr, ":");
+}
+
+
+/****************************************************************************/
+/* Program the MAC address. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_set_mac_addr(struct bce_softc *sc)
+{
+ u32 val;
+ u8 *mac_addr = sc->eaddr;
+
+ DBPRINT(sc, BCE_INFO, "Setting Ethernet address = %6D\n", sc->eaddr, ":");
+
+ val = (mac_addr[0] << 8) | mac_addr[1];
+
+ REG_WR(sc, BCE_EMAC_MAC_MATCH0, val);
+
+ val = (mac_addr[2] << 24) | (mac_addr[3] << 16) |
+ (mac_addr[4] << 8) | mac_addr[5];
+
+ REG_WR(sc, BCE_EMAC_MAC_MATCH1, val);
+}
+
+
+/****************************************************************************/
+/* Stop the controller. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_stop(struct bce_softc *sc)
+{
+ struct ifnet *ifp;
+ struct ifmedia_entry *ifm;
+ struct mii_data *mii = NULL;
+ int mtmp, itmp;
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ BCE_LOCK_ASSERT(sc);
+
+ ifp = sc->bce_ifp;
+
+ mii = device_get_softc(sc->bce_miibus);
+
+ callout_stop(&sc->bce_stat_ch);
+
+ /* Disable the transmit/receive blocks. */
+ REG_WR(sc, BCE_MISC_ENABLE_CLR_BITS, 0x5ffffff);
+ REG_RD(sc, BCE_MISC_ENABLE_CLR_BITS);
+ DELAY(20);
+
+ bce_disable_intr(sc);
+
+ /* Tell firmware that the driver is going away. */
+ bce_reset(sc, BCE_DRV_MSG_CODE_SUSPEND_NO_WOL);
+
+ /* Free the RX lists. */
+ bce_free_rx_chain(sc);
+
+ /* Free TX buffers. */
+ bce_free_tx_chain(sc);
+
+ /*
+ * Isolate/power down the PHY, but leave the media selection
+ * unchanged so that things will be put back to normal when
+ * we bring the interface back up.
+ */
+
+ itmp = ifp->if_flags;
+ ifp->if_flags |= IFF_UP;
+ /*
+ * If we are called from bce_detach(), mii is already NULL.
+ */
+ if (mii != NULL) {
+ ifm = mii->mii_media.ifm_cur;
+ mtmp = ifm->ifm_media;
+ ifm->ifm_media = IFM_ETHER | IFM_NONE;
+ mii_mediachg(mii);
+ ifm->ifm_media = mtmp;
+ }
+
+ ifp->if_flags = itmp;
+ ifp->if_timer = 0;
+
+ sc->bce_link = 0;
+
+ ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+
+}
+
+
+static int
+bce_reset(struct bce_softc *sc, u32 reset_code)
+{
+ u32 val;
+ int i, rc = 0;
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ /* Wait for pending PCI transactions to complete. */
+ REG_WR(sc, BCE_MISC_ENABLE_CLR_BITS,
+ BCE_MISC_ENABLE_CLR_BITS_TX_DMA_ENABLE |
+ BCE_MISC_ENABLE_CLR_BITS_DMA_ENGINE_ENABLE |
+ BCE_MISC_ENABLE_CLR_BITS_RX_DMA_ENABLE |
+ BCE_MISC_ENABLE_CLR_BITS_HOST_COALESCE_ENABLE);
+ val = REG_RD(sc, BCE_MISC_ENABLE_CLR_BITS);
+ DELAY(5);
+
+ /* Assume bootcode is running. */
+ sc->bce_fw_timed_out = 0;
+
+ /* Give the firmware a chance to prepare for the reset. */
+ rc = bce_fw_sync(sc, BCE_DRV_MSG_DATA_WAIT0 | reset_code);
+ if (rc)
+ goto bce_reset_exit;
+
+ /* Set a firmware reminder that this is a soft reset. */
+ REG_WR_IND(sc, sc->bce_shmem_base + BCE_DRV_RESET_SIGNATURE,
+ BCE_DRV_RESET_SIGNATURE_MAGIC);
+
+ /* Dummy read to force the chip to complete all current transactions. */
+ val = REG_RD(sc, BCE_MISC_ID);
+
+ /* Chip reset. */
+ val = BCE_PCICFG_MISC_CONFIG_CORE_RST_REQ |
+ BCE_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
+ BCE_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP;
+ REG_WR(sc, BCE_PCICFG_MISC_CONFIG, val);
+
+ /* Allow up to 30us for reset to complete. */
+ for (i = 0; i < 10; i++) {
+ val = REG_RD(sc, BCE_PCICFG_MISC_CONFIG);
+ if ((val & (BCE_PCICFG_MISC_CONFIG_CORE_RST_REQ |
+ BCE_PCICFG_MISC_CONFIG_CORE_RST_BSY)) == 0) {
+ break;
+ }
+ DELAY(10);
+ }
+
+ /* Check that reset completed successfully. */
+ if (val & (BCE_PCICFG_MISC_CONFIG_CORE_RST_REQ |
+ BCE_PCICFG_MISC_CONFIG_CORE_RST_BSY)) {
+ BCE_PRINTF(sc, "%s(%d): Reset failed!\n",
+ __FILE__, __LINE__);
+ rc = EBUSY;
+ goto bce_reset_exit;
+ }
+
+ /* Make sure byte swapping is properly configured. */
+ val = REG_RD(sc, BCE_PCI_SWAP_DIAG0);
+ if (val != 0x01020304) {
+ BCE_PRINTF(sc, "%s(%d): Byte swap is incorrect!\n",
+ __FILE__, __LINE__);
+ rc = ENODEV;
+ goto bce_reset_exit;
+ }
+
+ /* Just completed a reset, assume that firmware is running again. */
+ sc->bce_fw_timed_out = 0;
+
+ /* Wait for the firmware to finish its initialization. */
+ rc = bce_fw_sync(sc, BCE_DRV_MSG_DATA_WAIT1 | reset_code);
+ if (rc)
+ BCE_PRINTF(sc, "%s(%d): Firmware did not complete initialization!\n",
+ __FILE__, __LINE__);
+
+bce_reset_exit:
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+
+ return (rc);
+}
+
+
+static int
+bce_chipinit(struct bce_softc *sc)
+{
+ u32 val;
+ int rc = 0;
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ /* Make sure the interrupt is not active. */
+ REG_WR(sc, BCE_PCICFG_INT_ACK_CMD, BCE_PCICFG_INT_ACK_CMD_MASK_INT);
+
+ /* Initialize DMA byte/word swapping, configure the number of DMA */
+ /* channels and PCI clock compensation delay. */
+ val = BCE_DMA_CONFIG_DATA_BYTE_SWAP |
+ BCE_DMA_CONFIG_DATA_WORD_SWAP |
+#if BYTE_ORDER == BIG_ENDIAN
+ BCE_DMA_CONFIG_CNTL_BYTE_SWAP |
+#endif
+ BCE_DMA_CONFIG_CNTL_WORD_SWAP |
+ DMA_READ_CHANS << 12 |
+ DMA_WRITE_CHANS << 16;
+
+ val |= (0x2 << 20) | BCE_DMA_CONFIG_CNTL_PCI_COMP_DLY;
+
+ if ((sc->bce_flags & BCE_PCIX_FLAG) && (sc->bus_speed_mhz == 133))
+ val |= BCE_DMA_CONFIG_PCI_FAST_CLK_CMP;
+
+ /*
+ * This setting resolves a problem observed on certain Intel PCI
+ * chipsets that cannot handle multiple outstanding DMA operations.
+ * See errata E9_5706A1_65.
+ */
+ if ((BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5706) &&
+ (BCE_CHIP_ID(sc) != BCE_CHIP_ID_5706_A0) &&
+ !(sc->bce_flags & BCE_PCIX_FLAG))
+ val |= BCE_DMA_CONFIG_CNTL_PING_PONG_DMA;
+
+ REG_WR(sc, BCE_DMA_CONFIG, val);
+
+ /* Clear the PCI-X relaxed ordering bit. See errata E3_5708CA0_570. */
+ if (sc->bce_flags & BCE_PCIX_FLAG) {
+ u16 val;
+
+ val = pci_read_config(sc->bce_dev, BCE_PCI_PCIX_CMD, 2);
+ pci_write_config(sc->bce_dev, BCE_PCI_PCIX_CMD, val & ~0x2, 2);
+ }
+
+ /* Enable the RX_V2P and Context state machines before access. */
+ REG_WR(sc, BCE_MISC_ENABLE_SET_BITS,
+ BCE_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE |
+ BCE_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE |
+ BCE_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE);
+
+ /* Initialize context mapping and zero out the quick contexts. */
+ bce_init_context(sc);
+
+ /* Initialize the on-boards CPUs */
+ bce_init_cpus(sc);
+
+ /* Prepare NVRAM for access. */
+ if (bce_init_nvram(sc)) {
+ rc = ENODEV;
+ goto bce_chipinit_exit;
+ }
+
+ /* Set the kernel bypass block size */
+ val = REG_RD(sc, BCE_MQ_CONFIG);
+ val &= ~BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE;
+ val |= BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE_256;
+ REG_WR(sc, BCE_MQ_CONFIG, val);
+
+ val = 0x10000 + (MAX_CID_CNT * MB_KERNEL_CTX_SIZE);
+ REG_WR(sc, BCE_MQ_KNL_BYP_WIND_START, val);
+ REG_WR(sc, BCE_MQ_KNL_WIND_END, val);
+
+ val = (BCM_PAGE_BITS - 8) << 24;
+ REG_WR(sc, BCE_RV2P_CONFIG, val);
+
+ /* Configure page size. */
+ val = REG_RD(sc, BCE_TBDR_CONFIG);
+ val &= ~BCE_TBDR_CONFIG_PAGE_SIZE;
+ val |= (BCM_PAGE_BITS - 8) << 24 | 0x40;
+ REG_WR(sc, BCE_TBDR_CONFIG, val);
+
+bce_chipinit_exit:
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+
+ return(rc);
+}
+
+
+/****************************************************************************/
+/* Initialize the controller in preparation to send/receive traffic. */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static int
+bce_blockinit(struct bce_softc *sc)
+{
+ u32 reg, val;
+ int rc = 0;
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ /* Load the hardware default MAC address. */
+ bce_set_mac_addr(sc);
+
+ /* Set the Ethernet backoff seed value */
+ val = sc->eaddr[0] + (sc->eaddr[1] << 8) +
+ (sc->eaddr[2] << 16) + (sc->eaddr[3] ) +
+ (sc->eaddr[4] << 8) + (sc->eaddr[5] << 16);
+ REG_WR(sc, BCE_EMAC_BACKOFF_SEED, val);
+
+ sc->last_status_idx = 0;
+ sc->rx_mode = BCE_EMAC_RX_MODE_SORT_MODE;
+
+ /* Set up link change interrupt generation. */
+ REG_WR(sc, BCE_EMAC_ATTENTION_ENA, BCE_EMAC_ATTENTION_ENA_LINK);
+
+ /* Program the physical address of the status block. */
+ REG_WR(sc, BCE_HC_STATUS_ADDR_L,
+ BCE_ADDR_LO(sc->status_block_paddr));
+ REG_WR(sc, BCE_HC_STATUS_ADDR_H,
+ BCE_ADDR_HI(sc->status_block_paddr));
+
+ /* Program the physical address of the statistics block. */
+ REG_WR(sc, BCE_HC_STATISTICS_ADDR_L,
+ BCE_ADDR_LO(sc->stats_block_paddr));
+ REG_WR(sc, BCE_HC_STATISTICS_ADDR_H,
+ BCE_ADDR_HI(sc->stats_block_paddr));
+
+ /* Program various host coalescing parameters. */
+ REG_WR(sc, BCE_HC_TX_QUICK_CONS_TRIP,
+ (sc->bce_tx_quick_cons_trip_int << 16) | sc->bce_tx_quick_cons_trip);
+ REG_WR(sc, BCE_HC_RX_QUICK_CONS_TRIP,
+ (sc->bce_rx_quick_cons_trip_int << 16) | sc->bce_rx_quick_cons_trip);
+ REG_WR(sc, BCE_HC_COMP_PROD_TRIP,
+ (sc->bce_comp_prod_trip_int << 16) | sc->bce_comp_prod_trip);
+ REG_WR(sc, BCE_HC_TX_TICKS,
+ (sc->bce_tx_ticks_int << 16) | sc->bce_tx_ticks);
+ REG_WR(sc, BCE_HC_RX_TICKS,
+ (sc->bce_rx_ticks_int << 16) | sc->bce_rx_ticks);
+ REG_WR(sc, BCE_HC_COM_TICKS,
+ (sc->bce_com_ticks_int << 16) | sc->bce_com_ticks);
+ REG_WR(sc, BCE_HC_CMD_TICKS,
+ (sc->bce_cmd_ticks_int << 16) | sc->bce_cmd_ticks);
+ REG_WR(sc, BCE_HC_STATS_TICKS,
+ (sc->bce_stats_ticks & 0xffff00));
+ REG_WR(sc, BCE_HC_STAT_COLLECT_TICKS,
+ 0xbb8); /* 3ms */
+ REG_WR(sc, BCE_HC_CONFIG,
+ (BCE_HC_CONFIG_RX_TMR_MODE | BCE_HC_CONFIG_TX_TMR_MODE |
+ BCE_HC_CONFIG_COLLECT_STATS));
+
+ /* Clear the internal statistics counters. */
+ REG_WR(sc, BCE_HC_COMMAND, BCE_HC_COMMAND_CLR_STAT_NOW);
+
+ /* Verify that bootcode is running. */
+ reg = REG_RD_IND(sc, sc->bce_shmem_base + BCE_DEV_INFO_SIGNATURE);
+
+ DBRUNIF(DB_RANDOMTRUE(bce_debug_bootcode_running_failure),
+ BCE_PRINTF(sc, "%s(%d): Simulating bootcode failure.\n",
+ __FILE__, __LINE__);
+ reg = 0);
+
+ if ((reg & BCE_DEV_INFO_SIGNATURE_MAGIC_MASK) !=
+ BCE_DEV_INFO_SIGNATURE_MAGIC) {
+ BCE_PRINTF(sc, "%s(%d): Bootcode not running! Found: 0x%08X, "
+ "Expected: 08%08X\n", __FILE__, __LINE__,
+ (reg & BCE_DEV_INFO_SIGNATURE_MAGIC_MASK),
+ BCE_DEV_INFO_SIGNATURE_MAGIC);
+ rc = ENODEV;
+ goto bce_blockinit_exit;
+ }
+
+ /* Check if any management firmware is running. */
+ reg = REG_RD_IND(sc, sc->bce_shmem_base + BCE_PORT_FEATURE);
+ if (reg & (BCE_PORT_FEATURE_ASF_ENABLED | BCE_PORT_FEATURE_IMD_ENABLED)) {
+ DBPRINT(sc, BCE_INFO, "Management F/W Enabled.\n");
+ sc->bce_flags |= BCE_MFW_ENABLE_FLAG;
+ }
+
+ sc->bce_fw_ver = REG_RD_IND(sc, sc->bce_shmem_base + BCE_DEV_INFO_BC_REV);
+ DBPRINT(sc, BCE_INFO, "bootcode rev = 0x%08X\n", sc->bce_fw_ver);
+
+ /* Allow bootcode to apply any additional fixes before enabling MAC. */
+ rc = bce_fw_sync(sc, BCE_DRV_MSG_DATA_WAIT2 | BCE_DRV_MSG_CODE_RESET);
+
+ /* Enable link state change interrupt generation. */
+ REG_WR(sc, BCE_HC_ATTN_BITS_ENABLE, STATUS_ATTN_BITS_LINK_STATE);
+
+ /* Enable all remaining blocks in the MAC. */
+ REG_WR(sc, BCE_MISC_ENABLE_SET_BITS, 0x5ffffff);
+ REG_RD(sc, BCE_MISC_ENABLE_SET_BITS);
+ DELAY(20);
+
+bce_blockinit_exit:
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+
+ return (rc);
+}
+
+
+/****************************************************************************/
+/* Encapsulate an mbuf cluster into the rx_bd chain. */
+/* */
+/* The NetXtreme II can support Jumbo frames by using multiple rx_bd's. */
+/* This routine will map an mbuf cluster into 1 or more rx_bd's as */
+/* necessary. */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static int
+bce_get_buf(struct bce_softc *sc, struct mbuf *m, u16 *prod, u16 *chain_prod,
+ u32 *prod_bseq)
+{
+ bus_dmamap_t map;
+ bus_dma_segment_t segs[4];
+ struct mbuf *m_new = NULL;
+ struct rx_bd *rxbd;
+ int i, nsegs, error, rc = 0;
+#ifdef BCE_DEBUG
+ u16 debug_chain_prod = *chain_prod;
+#endif
+
+ DBPRINT(sc, (BCE_VERBOSE_RESET | BCE_VERBOSE_RECV), "Entering %s()\n",
+ __FUNCTION__);
+
+ /* Make sure the inputs are valid. */
+ DBRUNIF((*chain_prod > MAX_RX_BD),
+ BCE_PRINTF(sc, "%s(%d): RX producer out of range: 0x%04X > 0x%04X\n",
+ __FILE__, __LINE__, *chain_prod, (u16) MAX_RX_BD));
+
+ DBPRINT(sc, BCE_VERBOSE_RECV, "%s(enter): prod = 0x%04X, chain_prod = 0x%04X, "
+ "prod_bseq = 0x%08X\n", __FUNCTION__, *prod, *chain_prod, *prod_bseq);
+
+ if (m == NULL) {
+
+ DBRUNIF(DB_RANDOMTRUE(bce_debug_mbuf_allocation_failure),
+ BCE_PRINTF(sc, "%s(%d): Simulating mbuf allocation failure.\n",
+ __FILE__, __LINE__);
+ sc->mbuf_alloc_failed++;
+ rc = ENOBUFS;
+ goto bce_get_buf_exit);
+
+ /* This is a new mbuf allocation. */
+ MGETHDR(m_new, M_DONTWAIT, MT_DATA);
+ if (m_new == NULL) {
+
+ DBPRINT(sc, BCE_WARN, "%s(%d): RX mbuf header allocation failed!\n",
+ __FILE__, __LINE__);
+
+ DBRUNIF(1, sc->mbuf_alloc_failed++);
+
+ rc = ENOBUFS;
+ goto bce_get_buf_exit;
+ }
+
+ DBRUNIF(1, sc->rx_mbuf_alloc++);
+ m_cljget(m_new, M_DONTWAIT, sc->mbuf_alloc_size);
+ if (!(m_new->m_flags & M_EXT)) {
+
+ DBPRINT(sc, BCE_WARN, "%s(%d): RX mbuf chain allocation failed!\n",
+ __FILE__, __LINE__);
+
+ m_freem(m_new);
+
+ DBRUNIF(1, sc->rx_mbuf_alloc--);
+ DBRUNIF(1, sc->mbuf_alloc_failed++);
+
+ rc = ENOBUFS;
+ goto bce_get_buf_exit;
+ }
+
+ m_new->m_len = m_new->m_pkthdr.len = sc->mbuf_alloc_size;
+ } else {
+ m_new = m;
+ m_new->m_len = m_new->m_pkthdr.len = sc->mbuf_alloc_size;
+ m_new->m_data = m_new->m_ext.ext_buf;
+ }
+
+ /* Map the mbuf cluster into device memory. */
+ map = sc->rx_mbuf_map[*chain_prod];
+ error = bus_dmamap_load_mbuf_sg(sc->rx_mbuf_tag, map, m_new,
+ segs, &nsegs, BUS_DMA_NOWAIT);
+
+ if (error) {
+ BCE_PRINTF(sc, "%s(%d): Error mapping mbuf into RX chain!\n",
+ __FILE__, __LINE__);
+
+ m_freem(m_new);
+
+ DBRUNIF(1, sc->rx_mbuf_alloc--);
+
+ rc = ENOBUFS;
+ goto bce_get_buf_exit;
+ }
+
+ /* Watch for overflow. */
+ DBRUNIF((sc->free_rx_bd > USABLE_RX_BD),
+ BCE_PRINTF(sc, "%s(%d): Too many free rx_bd (0x%04X > 0x%04X)!\n",
+ __FILE__, __LINE__, sc->free_rx_bd, (u16) USABLE_RX_BD));
+
+ DBRUNIF((sc->free_rx_bd < sc->rx_low_watermark),
+ sc->rx_low_watermark = sc->free_rx_bd);
+
+ /* Setup the rx_bd for the first segment. */
+ rxbd = &sc->rx_bd_chain[RX_PAGE(*chain_prod)][RX_IDX(*chain_prod)];
+
+ rxbd->rx_bd_haddr_lo = htole32(BCE_ADDR_LO(segs[0].ds_addr));
+ rxbd->rx_bd_haddr_hi = htole32(BCE_ADDR_HI(segs[0].ds_addr));
+ rxbd->rx_bd_len = htole32(segs[0].ds_len);
+ rxbd->rx_bd_flags = htole32(RX_BD_FLAGS_START);
+ *prod_bseq += segs[0].ds_len;
+
+ for (i = 1; i < nsegs; i++) {
+
+ *prod = NEXT_RX_BD(*prod);
+ *chain_prod = RX_CHAIN_IDX(*prod);
+
+ rxbd = &sc->rx_bd_chain[RX_PAGE(*chain_prod)][RX_IDX(*chain_prod)];
+
+ rxbd->rx_bd_haddr_lo = htole32(BCE_ADDR_LO(segs[i].ds_addr));
+ rxbd->rx_bd_haddr_hi = htole32(BCE_ADDR_HI(segs[i].ds_addr));
+ rxbd->rx_bd_len = htole32(segs[i].ds_len);
+ rxbd->rx_bd_flags = 0;
+ *prod_bseq += segs[i].ds_len;
+ }
+
+ rxbd->rx_bd_flags |= htole32(RX_BD_FLAGS_END);
+
+ /* Save the mbuf and update our counter. */
+ sc->rx_mbuf_ptr[*chain_prod] = m_new;
+ sc->free_rx_bd -= nsegs;
+
+ DBRUN(BCE_VERBOSE_RECV, bce_dump_rx_mbuf_chain(sc, debug_chain_prod,
+ nsegs));
+
+ DBPRINT(sc, BCE_VERBOSE_RECV, "%s(exit): prod = 0x%04X, chain_prod = 0x%04X, "
+ "prod_bseq = 0x%08X\n", __FUNCTION__, *prod, *chain_prod, *prod_bseq);
+
+bce_get_buf_exit:
+ DBPRINT(sc, (BCE_VERBOSE_RESET | BCE_VERBOSE_RECV), "Exiting %s()\n",
+ __FUNCTION__);
+
+ return(rc);
+}
+
+
+/****************************************************************************/
+/* Allocate memory and initialize the TX data structures. */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static int
+bce_init_tx_chain(struct bce_softc *sc)
+{
+ struct tx_bd *txbd;
+ u32 val;
+ int i, rc = 0;
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ /* Set the initial TX producer/consumer indices. */
+ sc->tx_prod = 0;
+ sc->tx_cons = 0;
+ sc->tx_prod_bseq = 0;
+ sc->used_tx_bd = 0;
+ DBRUNIF(1, sc->tx_hi_watermark = USABLE_TX_BD);
+
+ /*
+ * The NetXtreme II supports a linked-list structre called
+ * a Buffer Descriptor Chain (or BD chain). A BD chain
+ * consists of a series of 1 or more chain pages, each of which
+ * consists of a fixed number of BD entries.
+ * The last BD entry on each page is a pointer to the next page
+ * in the chain, and the last pointer in the BD chain
+ * points back to the beginning of the chain.
+ */
+
+ /* Set the TX next pointer chain entries. */
+ for (i = 0; i < TX_PAGES; i++) {
+ int j;
+
+ txbd = &sc->tx_bd_chain[i][USABLE_TX_BD_PER_PAGE];
+
+ /* Check if we've reached the last page. */
+ if (i == (TX_PAGES - 1))
+ j = 0;
+ else
+ j = i + 1;
+
+ txbd->tx_bd_haddr_hi = htole32(BCE_ADDR_HI(sc->tx_bd_chain_paddr[j]));
+ txbd->tx_bd_haddr_lo = htole32(BCE_ADDR_LO(sc->tx_bd_chain_paddr[j]));
+ }
+
+ /*
+ * Initialize the context ID for an L2 TX chain.
+ */
+ val = BCE_L2CTX_TYPE_TYPE_L2;
+ val |= BCE_L2CTX_TYPE_SIZE_L2;
+ CTX_WR(sc, GET_CID_ADDR(TX_CID), BCE_L2CTX_TYPE, val);
+
+ val = BCE_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
+ CTX_WR(sc, GET_CID_ADDR(TX_CID), BCE_L2CTX_CMD_TYPE, val);
+
+ /* Point the hardware to the first page in the chain. */
+ val = BCE_ADDR_HI(sc->tx_bd_chain_paddr[0]);
+ CTX_WR(sc, GET_CID_ADDR(TX_CID), BCE_L2CTX_TBDR_BHADDR_HI, val);
+ val = BCE_ADDR_LO(sc->tx_bd_chain_paddr[0]);
+ CTX_WR(sc, GET_CID_ADDR(TX_CID), BCE_L2CTX_TBDR_BHADDR_LO, val);
+
+ DBRUN(BCE_VERBOSE_SEND, bce_dump_tx_chain(sc, 0, TOTAL_TX_BD));
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+
+ return(rc);
+}
+
+
+/****************************************************************************/
+/* Free memory and clear the TX data structures. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_free_tx_chain(struct bce_softc *sc)
+{
+ int i;
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ /* Unmap, unload, and free any mbufs still in the TX mbuf chain. */
+ for (i = 0; i < TOTAL_TX_BD; i++) {
+ if (sc->tx_mbuf_ptr[i] != NULL) {
+ if (sc->tx_mbuf_map != NULL)
+ bus_dmamap_sync(sc->tx_mbuf_tag, sc->tx_mbuf_map[i],
+ BUS_DMASYNC_POSTWRITE);
+ m_freem(sc->tx_mbuf_ptr[i]);
+ sc->tx_mbuf_ptr[i] = NULL;
+ DBRUNIF(1, sc->tx_mbuf_alloc--);
+ }
+ }
+
+ /* Clear each TX chain page. */
+ for (i = 0; i < TX_PAGES; i++)
+ bzero((char *)sc->tx_bd_chain[i], BCE_TX_CHAIN_PAGE_SZ);
+
+ /* Check if we lost any mbufs in the process. */
+ DBRUNIF((sc->tx_mbuf_alloc),
+ BCE_PRINTF(sc, "%s(%d): Memory leak! Lost %d mbufs "
+ "from tx chain!\n",
+ __FILE__, __LINE__, sc->tx_mbuf_alloc));
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+}
+
+
+/****************************************************************************/
+/* Allocate memory and initialize the RX data structures. */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static int
+bce_init_rx_chain(struct bce_softc *sc)
+{
+ struct rx_bd *rxbd;
+ int i, rc = 0;
+ u16 prod, chain_prod;
+ u32 prod_bseq, val;
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ /* Initialize the RX producer and consumer indices. */
+ sc->rx_prod = 0;
+ sc->rx_cons = 0;
+ sc->rx_prod_bseq = 0;
+ sc->free_rx_bd = BCE_RX_SLACK_SPACE;
+ DBRUNIF(1, sc->rx_low_watermark = USABLE_RX_BD);
+
+ /* Initialize the RX next pointer chain entries. */
+ for (i = 0; i < RX_PAGES; i++) {
+ int j;
+
+ rxbd = &sc->rx_bd_chain[i][USABLE_RX_BD_PER_PAGE];
+
+ /* Check if we've reached the last page. */
+ if (i == (RX_PAGES - 1))
+ j = 0;
+ else
+ j = i + 1;
+
+ /* Setup the chain page pointers. */
+ rxbd->rx_bd_haddr_hi = htole32(BCE_ADDR_HI(sc->rx_bd_chain_paddr[j]));
+ rxbd->rx_bd_haddr_lo = htole32(BCE_ADDR_LO(sc->rx_bd_chain_paddr[j]));
+ }
+
+ /* Initialize the context ID for an L2 RX chain. */
+ val = BCE_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE;
+ val |= BCE_L2CTX_CTX_TYPE_SIZE_L2;
+ val |= 0x02 << 8;
+ CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_CTX_TYPE, val);
+
+ /* Point the hardware to the first page in the chain. */
+ val = BCE_ADDR_HI(sc->rx_bd_chain_paddr[0]);
+ CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_NX_BDHADDR_HI, val);
+ val = BCE_ADDR_LO(sc->rx_bd_chain_paddr[0]);
+ CTX_WR(sc, GET_CID_ADDR(RX_CID), BCE_L2CTX_NX_BDHADDR_LO, val);
+
+ /* Allocate mbuf clusters for the rx_bd chain. */
+ prod = prod_bseq = 0;
+ while (prod < BCE_RX_SLACK_SPACE) {
+ chain_prod = RX_CHAIN_IDX(prod);
+ if (bce_get_buf(sc, NULL, &prod, &chain_prod, &prod_bseq)) {
+ BCE_PRINTF(sc, "%s(%d): Error filling RX chain: rx_bd[0x%04X]!\n",
+ __FILE__, __LINE__, chain_prod);
+ rc = ENOBUFS;
+ break;
+ }
+ prod = NEXT_RX_BD(prod);
+ }
+
+ /* Save the RX chain producer index. */
+ sc->rx_prod = prod;
+ sc->rx_prod_bseq = prod_bseq;
+
+ for (i = 0; i < RX_PAGES; i++) {
+ bus_dmamap_sync(
+ sc->rx_bd_chain_tag,
+ sc->rx_bd_chain_map[i],
+ BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
+ }
+
+ /* Tell the chip about the waiting rx_bd's. */
+ REG_WR16(sc, MB_RX_CID_ADDR + BCE_L2CTX_HOST_BDIDX, sc->rx_prod);
+ REG_WR(sc, MB_RX_CID_ADDR + BCE_L2CTX_HOST_BSEQ, sc->rx_prod_bseq);
+
+ DBRUN(BCE_VERBOSE_RECV, bce_dump_rx_chain(sc, 0, TOTAL_RX_BD));
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+
+ return(rc);
+}
+
+
+/****************************************************************************/
+/* Free memory and clear the RX data structures. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_free_rx_chain(struct bce_softc *sc)
+{
+ int i;
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ /* Free any mbufs still in the RX mbuf chain. */
+ for (i = 0; i < TOTAL_RX_BD; i++) {
+ if (sc->rx_mbuf_ptr[i] != NULL) {
+ if (sc->rx_mbuf_map[i] != NULL)
+ bus_dmamap_sync(sc->rx_mbuf_tag, sc->rx_mbuf_map[i],
+ BUS_DMASYNC_POSTREAD);
+ m_freem(sc->rx_mbuf_ptr[i]);
+ sc->rx_mbuf_ptr[i] = NULL;
+ DBRUNIF(1, sc->rx_mbuf_alloc--);
+ }
+ }
+
+ /* Clear each RX chain page. */
+ for (i = 0; i < RX_PAGES; i++)
+ bzero((char *)sc->rx_bd_chain[i], BCE_RX_CHAIN_PAGE_SZ);
+
+ /* Check if we lost any mbufs in the process. */
+ DBRUNIF((sc->rx_mbuf_alloc),
+ BCE_PRINTF(sc, "%s(%d): Memory leak! Lost %d mbufs from rx chain!\n",
+ __FILE__, __LINE__, sc->rx_mbuf_alloc));
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+}
+
+
+/****************************************************************************/
+/* Set media options. */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static int
+bce_ifmedia_upd(struct ifnet *ifp)
+{
+ struct bce_softc *sc;
+ struct mii_data *mii;
+ struct ifmedia *ifm;
+ int rc = 0;
+
+ sc = ifp->if_softc;
+ ifm = &sc->bce_ifmedia;
+
+ /* DRC - ToDo: Add SerDes support. */
+
+ mii = device_get_softc(sc->bce_miibus);
+ sc->bce_link = 0;
+ if (mii->mii_instance) {
+ struct mii_softc *miisc;
+ for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL;
+ miisc = LIST_NEXT(miisc, mii_list))
+ mii_phy_reset(miisc);
+ }
+ mii_mediachg(mii);
+
+ return(rc);
+}
+
+
+/****************************************************************************/
+/* Reports current media status. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
+{
+ struct bce_softc *sc;
+ struct mii_data *mii;
+
+ sc = ifp->if_softc;
+
+ BCE_LOCK(sc);
+
+ mii = device_get_softc(sc->bce_miibus);
+
+ /* DRC - ToDo: Add SerDes support. */
+
+ mii_pollstat(mii);
+ ifmr->ifm_active = mii->mii_media_active;
+ ifmr->ifm_status = mii->mii_media_status;
+
+ BCE_UNLOCK(sc);
+}
+
+
+/****************************************************************************/
+/* Handles PHY generated interrupt events. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_phy_intr(struct bce_softc *sc)
+{
+ u32 new_link_state, old_link_state;
+
+ new_link_state = sc->status_block->status_attn_bits &
+ STATUS_ATTN_BITS_LINK_STATE;
+ old_link_state = sc->status_block->status_attn_bits_ack &
+ STATUS_ATTN_BITS_LINK_STATE;
+
+ /* Handle any changes if the link state has changed. */
+ if (new_link_state != old_link_state) {
+
+ DBRUN(BCE_VERBOSE_INTR, bce_dump_status_block(sc));
+
+ sc->bce_link = 0;
+ callout_stop(&sc->bce_stat_ch);
+ bce_tick_locked(sc);
+
+ /* Update the status_attn_bits_ack field in the status block. */
+ if (new_link_state) {
+ REG_WR(sc, BCE_PCICFG_STATUS_BIT_SET_CMD,
+ STATUS_ATTN_BITS_LINK_STATE);
+ DBPRINT(sc, BCE_INFO, "Link is now UP.\n");
+ }
+ else {
+ REG_WR(sc, BCE_PCICFG_STATUS_BIT_CLEAR_CMD,
+ STATUS_ATTN_BITS_LINK_STATE);
+ DBPRINT(sc, BCE_INFO, "Link is now DOWN.\n");
+ }
+
+ }
+
+ /* Acknowledge the link change interrupt. */
+ REG_WR(sc, BCE_EMAC_STATUS, BCE_EMAC_STATUS_LINK_CHANGE);
+}
+
+
+/****************************************************************************/
+/* Handles received frame interrupt events. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_rx_intr(struct bce_softc *sc)
+{
+ struct status_block *sblk = sc->status_block;
+ struct ifnet *ifp = sc->bce_ifp;
+ u16 hw_cons, sw_cons, sw_chain_cons, sw_prod, sw_chain_prod;
+ u32 sw_prod_bseq;
+ struct l2_fhdr *l2fhdr;
+
+ DBRUNIF(1, sc->rx_interrupts++);
+
+ /* Prepare the RX chain pages to be accessed by the host CPU. */
+ for (int i = 0; i < RX_PAGES; i++)
+ bus_dmamap_sync(sc->rx_bd_chain_tag,
+ sc->rx_bd_chain_map[i], BUS_DMASYNC_POSTWRITE);
+
+ /* Get the hardware's view of the RX consumer index. */
+ hw_cons = sc->hw_rx_cons = sblk->status_rx_quick_consumer_index0;
+ if ((hw_cons & USABLE_RX_BD_PER_PAGE) == USABLE_RX_BD_PER_PAGE)
+ hw_cons++;
+
+ /* Get working copies of the driver's view of the RX indices. */
+ sw_cons = sc->rx_cons;
+ sw_prod = sc->rx_prod;
+ sw_prod_bseq = sc->rx_prod_bseq;
+
+ DBPRINT(sc, BCE_INFO_RECV, "%s(enter): sw_prod = 0x%04X, "
+ "sw_cons = 0x%04X, sw_prod_bseq = 0x%08X\n",
+ __FUNCTION__, sw_prod, sw_cons,
+ sw_prod_bseq);
+
+ /* Prevent speculative reads from getting ahead of the status block. */
+ bus_space_barrier(sc->bce_btag, sc->bce_bhandle, 0, 0,
+ BUS_SPACE_BARRIER_READ);
+
+ DBRUNIF((sc->free_rx_bd < sc->rx_low_watermark),
+ sc->rx_low_watermark = sc->free_rx_bd);
+
+ /*
+ * Scan through the receive chain as long
+ * as there is work to do.
+ */
+ while (sw_cons != hw_cons) {
+ struct mbuf *m;
+ struct rx_bd *rxbd;
+ unsigned int len;
+ u32 status;
+
+ /* Convert the producer/consumer indices to an actual rx_bd index. */
+ sw_chain_cons = RX_CHAIN_IDX(sw_cons);
+ sw_chain_prod = RX_CHAIN_IDX(sw_prod);
+
+ /* Get the used rx_bd. */
+ rxbd = &sc->rx_bd_chain[RX_PAGE(sw_chain_cons)][RX_IDX(sw_chain_cons)];
+ sc->free_rx_bd++;
+
+ DBRUN(BCE_VERBOSE_RECV,
+ BCE_PRINTF(sc, "%s(): ", __FUNCTION__);
+ bce_dump_rxbd(sc, sw_chain_cons, rxbd));
+
+#ifdef DEVICE_POLLING
+ if (ifp->if_capenable & IFCAP_POLLING) {
+ if (sc->bce_rxcycles <= 0)
+ break;
+ sc->rxcycles--;
+ }
+#endif
+
+ /* The mbuf is stored with the last rx_bd entry of a packet. */
+ if (sc->rx_mbuf_ptr[sw_chain_cons] != NULL) {
+
+ /* Validate that this is the last rx_bd. */
+ DBRUNIF((!(rxbd->rx_bd_flags & RX_BD_FLAGS_END)),
+ BCE_PRINTF(sc, "%s(%d): Unexpected mbuf found in rx_bd[0x%04X]!\n",
+ __FILE__, __LINE__, sw_chain_cons);
+ bce_breakpoint(sc));
+
+ /* DRC - ToDo: If the received packet is small, say less */
+ /* than 128 bytes, allocate a new mbuf here, */
+ /* copy the data to that mbuf, and recycle */
+ /* the mapped jumbo frame. */
+
+ /* Unmap the mbuf from DMA space. */
+ bus_dmamap_sync(sc->rx_mbuf_tag,
+ sc->rx_mbuf_map[sw_chain_cons],
+ BUS_DMASYNC_POSTREAD);
+ bus_dmamap_unload(sc->rx_mbuf_tag,
+ sc->rx_mbuf_map[sw_chain_cons]);
+
+ /* Remove the mbuf from the driver's chain. */
+ m = sc->rx_mbuf_ptr[sw_chain_cons];
+ sc->rx_mbuf_ptr[sw_chain_cons] = NULL;
+
+ /*
+ * Frames received on the NetXteme II are prepended
+ * with the l2_fhdr structure which provides status
+ * information about the received frame (including
+ * VLAN tags and checksum info) and are also
+ * automatically adjusted to align the IP header
+ * (i.e. two null bytes are inserted before the
+ * Ethernet header).
+ */
+ l2fhdr = mtod(m, struct l2_fhdr *);
+
+ len = l2fhdr->l2_fhdr_pkt_len;
+ status = l2fhdr->l2_fhdr_status;
+
+ DBRUNIF(DB_RANDOMTRUE(bce_debug_l2fhdr_status_check),
+ BCE_PRINTF(sc, "Simulating l2_fhdr status error.\n");
+ status = status | L2_FHDR_ERRORS_PHY_DECODE);
+
+ /* Watch for unusual sized frames. */
+ DBRUNIF(((len < BCE_MIN_MTU) || (len > BCE_MAX_JUMBO_ETHER_MTU_VLAN)),
+ BCE_PRINTF(sc, "%s(%d): Unusual frame size found. "
+ "Min(%d), Actual(%d), Max(%d)\n",
+ __FILE__, __LINE__, (int) BCE_MIN_MTU,
+ len, (int) BCE_MAX_JUMBO_ETHER_MTU_VLAN);
+ bce_dump_mbuf(sc, m);
+ bce_breakpoint(sc));
+
+ len -= ETHER_CRC_LEN;
+
+ /* Check the received frame for errors. */
+ if (status & (L2_FHDR_ERRORS_BAD_CRC |
+ L2_FHDR_ERRORS_PHY_DECODE | L2_FHDR_ERRORS_ALIGNMENT |
+ L2_FHDR_ERRORS_TOO_SHORT | L2_FHDR_ERRORS_GIANT_FRAME)) {
+
+ ifp->if_ierrors++;
+ DBRUNIF(1, sc->l2fhdr_status_errors++);
+
+ /* Reuse the mbuf for a new frame. */
+ if (bce_get_buf(sc, m, &sw_prod, &sw_chain_prod, &sw_prod_bseq)) {
+
+ DBRUNIF(1, bce_breakpoint(sc));
+ panic("bce%d: Can't reuse RX mbuf!\n", sc->bce_unit);
+
+ }
+ goto bce_rx_int_next_rx;
+ }
+
+ /*
+ * Get a new mbuf for the rx_bd. If no new
+ * mbufs are available then reuse the current mbuf,
+ * log an ierror on the interface, and generate
+ * an error in the system log.
+ */
+ if (bce_get_buf(sc, NULL, &sw_prod, &sw_chain_prod, &sw_prod_bseq)) {
+
+ DBRUN(BCE_WARN,
+ BCE_PRINTF(sc, "%s(%d): Failed to allocate "
+ "new mbuf, incoming frame dropped!\n",
+ __FILE__, __LINE__));
+
+ ifp->if_ierrors++;
+
+ /* Try and reuse the exisitng mbuf. */
+ if (bce_get_buf(sc, m, &sw_prod, &sw_chain_prod, &sw_prod_bseq)) {
+
+ DBRUNIF(1, bce_breakpoint(sc));
+ panic("bce%d: Double mbuf allocation failure!", sc->bce_unit);
+
+ }
+ goto bce_rx_int_next_rx;
+ }
+
+ /* Skip over the l2_fhdr when passing the data up the stack. */
+ m_adj(m, sizeof(struct l2_fhdr) + ETHER_ALIGN);
+
+ /* Adjust the packet length to match the received data. */
+ m->m_pkthdr.len = m->m_len = len;
+
+ /* Send the packet to the appropriate interface. */
+ m->m_pkthdr.rcvif = ifp;
+
+ DBRUN(BCE_VERBOSE_RECV,
+ struct ether_header *eh;
+ eh = mtod(m, struct ether_header *);
+ BCE_PRINTF(sc, "%s(): to: %6D, from: %6D, type: 0x%04X\n",
+ __FUNCTION__, eh->ether_dhost, ":",
+ eh->ether_shost, ":", htons(eh->ether_type)));
+
+ /* Validate the checksum if offload enabled. */
+ if (ifp->if_capenable & IFCAP_RXCSUM) {
+
+ /* Check for an IP datagram. */
+ if (status & L2_FHDR_STATUS_IP_DATAGRAM) {
+ m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
+
+ /* Check if the IP checksum is valid. */
+ if ((l2fhdr->l2_fhdr_ip_xsum ^ 0xffff) == 0)
+ m->m_pkthdr.csum_flags |= CSUM_IP_VALID;
+ else
+ DBPRINT(sc, BCE_WARN_SEND,
+ "%s(): Invalid IP checksum = 0x%04X!\n",
+ __FUNCTION__, l2fhdr->l2_fhdr_ip_xsum);
+ }
+
+ /* Check for a valid TCP/UDP frame. */
+ if (status & (L2_FHDR_STATUS_TCP_SEGMENT |
+ L2_FHDR_STATUS_UDP_DATAGRAM)) {
+
+ /* Check for a good TCP/UDP checksum. */
+ if ((status & (L2_FHDR_ERRORS_TCP_XSUM |
+ L2_FHDR_ERRORS_UDP_XSUM)) == 0) {
+ m->m_pkthdr.csum_data =
+ l2fhdr->l2_fhdr_tcp_udp_xsum;
+ m->m_pkthdr.csum_flags |= (CSUM_DATA_VALID
+ | CSUM_PSEUDO_HDR);
+ } else
+ DBPRINT(sc, BCE_WARN_SEND,
+ "%s(): Invalid TCP/UDP checksum = 0x%04X!\n",
+ __FUNCTION__, l2fhdr->l2_fhdr_tcp_udp_xsum);
+ }
+ }
+
+
+ /*
+ * If we received a packet with a vlan tag,
+ * attach that information to the packet.
+ */
+ if (status & L2_FHDR_STATUS_L2_VLAN_TAG) {
+ DBPRINT(sc, BCE_VERBOSE_SEND, "%s(): VLAN tag = 0x%04X\n",
+ __FUNCTION__, l2fhdr->l2_fhdr_vlan_tag);
+#if __FreeBSD_version < 700000
+ VLAN_INPUT_TAG(ifp, m, l2fhdr->l2_fhdr_vlan_tag, continue);
+#else
+ VLAN_INPUT_TAG(ifp, m, l2fhdr->l2_fhdr_vlan_tag);
+ if (m == NULL)
+ continue;
+#endif
+ }
+
+ /* Pass the mbuf off to the upper layers. */
+ ifp->if_ipackets++;
+ DBPRINT(sc, BCE_VERBOSE_RECV, "%s(): Passing received frame up.\n",
+ __FUNCTION__);
+ BCE_UNLOCK(sc);
+ (*ifp->if_input)(ifp, m);
+ DBRUNIF(1, sc->rx_mbuf_alloc--);
+ BCE_LOCK(sc);
+
+bce_rx_int_next_rx:
+ sw_prod = NEXT_RX_BD(sw_prod);
+ }
+
+ sw_cons = NEXT_RX_BD(sw_cons);
+
+ /* Refresh hw_cons to see if there's new work */
+ if (sw_cons == hw_cons) {
+ hw_cons = sc->hw_rx_cons = sblk->status_rx_quick_consumer_index0;
+ if ((hw_cons & USABLE_RX_BD_PER_PAGE) == USABLE_RX_BD_PER_PAGE)
+ hw_cons++;
+ }
+
+ /* Prevent speculative reads from getting ahead of the status block. */
+ bus_space_barrier(sc->bce_btag, sc->bce_bhandle, 0, 0,
+ BUS_SPACE_BARRIER_READ);
+ }
+
+ for (int i = 0; i < RX_PAGES; i++)
+ bus_dmamap_sync(sc->rx_bd_chain_tag,
+ sc->rx_bd_chain_map[i], BUS_DMASYNC_PREWRITE);
+
+ sc->rx_cons = sw_cons;
+ sc->rx_prod = sw_prod;
+ sc->rx_prod_bseq = sw_prod_bseq;
+
+ REG_WR16(sc, MB_RX_CID_ADDR + BCE_L2CTX_HOST_BDIDX, sc->rx_prod);
+ REG_WR(sc, MB_RX_CID_ADDR + BCE_L2CTX_HOST_BSEQ, sc->rx_prod_bseq);
+
+ DBPRINT(sc, BCE_INFO_RECV, "%s(exit): rx_prod = 0x%04X, "
+ "rx_cons = 0x%04X, rx_prod_bseq = 0x%08X\n",
+ __FUNCTION__, sc->rx_prod, sc->rx_cons, sc->rx_prod_bseq);
+}
+
+
+/****************************************************************************/
+/* Handles transmit completion interrupt events. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_tx_intr(struct bce_softc *sc)
+{
+ struct status_block *sblk = sc->status_block;
+ struct ifnet *ifp = sc->bce_ifp;
+ u16 hw_tx_cons, sw_tx_cons, sw_tx_chain_cons;
+
+ BCE_LOCK_ASSERT(sc);
+
+ DBRUNIF(1, sc->tx_interrupts++);
+
+ /* Get the hardware's view of the TX consumer index. */
+ hw_tx_cons = sc->hw_tx_cons = sblk->status_tx_quick_consumer_index0;
+
+ /* Skip to the next entry if this is a chain page pointer. */
+ if ((hw_tx_cons & USABLE_TX_BD_PER_PAGE) == USABLE_TX_BD_PER_PAGE)
+ hw_tx_cons++;
+
+ sw_tx_cons = sc->tx_cons;
+
+ /* Prevent speculative reads from getting ahead of the status block. */
+ bus_space_barrier(sc->bce_btag, sc->bce_bhandle, 0, 0,
+ BUS_SPACE_BARRIER_READ);
+
+ /* Cycle through any completed TX chain page entries. */
+ while (sw_tx_cons != hw_tx_cons) {
+#ifdef BCE_DEBUG
+ struct tx_bd *txbd = NULL;
+#endif
+ sw_tx_chain_cons = TX_CHAIN_IDX(sw_tx_cons);
+
+ DBPRINT(sc, BCE_INFO_SEND,
+ "%s(): hw_tx_cons = 0x%04X, sw_tx_cons = 0x%04X, "
+ "sw_tx_chain_cons = 0x%04X\n",
+ __FUNCTION__, hw_tx_cons, sw_tx_cons, sw_tx_chain_cons);
+
+ DBRUNIF((sw_tx_chain_cons > MAX_TX_BD),
+ BCE_PRINTF(sc, "%s(%d): TX chain consumer out of range! "
+ " 0x%04X > 0x%04X\n",
+ __FILE__, __LINE__, sw_tx_chain_cons,
+ (int) MAX_TX_BD);
+ bce_breakpoint(sc));
+
+ DBRUNIF(1,
+ txbd = &sc->tx_bd_chain[TX_PAGE(sw_tx_chain_cons)]
+ [TX_IDX(sw_tx_chain_cons)]);
+
+ DBRUNIF((txbd == NULL),
+ BCE_PRINTF(sc, "%s(%d): Unexpected NULL tx_bd[0x%04X]!\n",
+ __FILE__, __LINE__, sw_tx_chain_cons);
+ bce_breakpoint(sc));
+
+ DBRUN(BCE_INFO_SEND,
+ BCE_PRINTF(sc, "%s(): ", __FUNCTION__);
+ bce_dump_txbd(sc, sw_tx_chain_cons, txbd));
+
+ /*
+ * Free the associated mbuf. Remember
+ * that only the last tx_bd of a packet
+ * has an mbuf pointer and DMA map.
+ */
+ if (sc->tx_mbuf_ptr[sw_tx_chain_cons] != NULL) {
+
+ /* Validate that this is the last tx_bd. */
+ DBRUNIF((!(txbd->tx_bd_vlan_tag_flags & TX_BD_FLAGS_END)),
+ BCE_PRINTF(sc, "%s(%d): tx_bd END flag not set but "
+ "txmbuf == NULL!\n", __FILE__, __LINE__);
+ bce_breakpoint(sc));
+
+ DBRUN(BCE_INFO_SEND,
+ BCE_PRINTF(sc, "%s(): Unloading map/freeing mbuf "
+ "from tx_bd[0x%04X]\n", __FUNCTION__, sw_tx_chain_cons));
+
+ /* Unmap the mbuf. */
+ bus_dmamap_unload(sc->tx_mbuf_tag,
+ sc->tx_mbuf_map[sw_tx_chain_cons]);
+
+ /* Free the mbuf. */
+ m_freem(sc->tx_mbuf_ptr[sw_tx_chain_cons]);
+ sc->tx_mbuf_ptr[sw_tx_chain_cons] = NULL;
+ DBRUNIF(1, sc->tx_mbuf_alloc--);
+
+ ifp->if_opackets++;
+ }
+
+ sc->used_tx_bd--;
+ sw_tx_cons = NEXT_TX_BD(sw_tx_cons);
+
+ /* Refresh hw_cons to see if there's new work. */
+ hw_tx_cons = sc->hw_tx_cons = sblk->status_tx_quick_consumer_index0;
+ if ((hw_tx_cons & USABLE_TX_BD_PER_PAGE) == USABLE_TX_BD_PER_PAGE)
+ hw_tx_cons++;
+
+ /* Prevent speculative reads from getting ahead of the status block. */
+ bus_space_barrier(sc->bce_btag, sc->bce_bhandle, 0, 0,
+ BUS_SPACE_BARRIER_READ);
+ }
+
+ /* Clear the TX timeout timer. */
+ ifp->if_timer = 0;
+
+ /* Clear the tx hardware queue full flag. */
+ if ((sc->used_tx_bd + BCE_TX_SLACK_SPACE) < USABLE_TX_BD) {
+ DBRUNIF((ifp->if_drv_flags & IFF_DRV_OACTIVE),
+ BCE_PRINTF(sc, "%s(): TX chain is open for business! Used tx_bd = %d\n",
+ __FUNCTION__, sc->used_tx_bd));
+ ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
+ }
+
+ sc->tx_cons = sw_tx_cons;
+}
+
+
+/****************************************************************************/
+/* Disables interrupt generation. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_disable_intr(struct bce_softc *sc)
+{
+ REG_WR(sc, BCE_PCICFG_INT_ACK_CMD,
+ BCE_PCICFG_INT_ACK_CMD_MASK_INT);
+ REG_RD(sc, BCE_PCICFG_INT_ACK_CMD);
+}
+
+
+/****************************************************************************/
+/* Enables interrupt generation. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_enable_intr(struct bce_softc *sc)
+{
+ u32 val;
+
+ REG_WR(sc, BCE_PCICFG_INT_ACK_CMD,
+ BCE_PCICFG_INT_ACK_CMD_INDEX_VALID |
+ BCE_PCICFG_INT_ACK_CMD_MASK_INT | sc->last_status_idx);
+
+ REG_WR(sc, BCE_PCICFG_INT_ACK_CMD,
+ BCE_PCICFG_INT_ACK_CMD_INDEX_VALID | sc->last_status_idx);
+
+ val = REG_RD(sc, BCE_HC_COMMAND);
+ REG_WR(sc, BCE_HC_COMMAND, val | BCE_HC_COMMAND_COAL_NOW);
+}
+
+
+/****************************************************************************/
+/* Handles controller initialization. */
+/* */
+/* Must be called from a locked routine. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_init_locked(struct bce_softc *sc)
+{
+ struct ifnet *ifp;
+ u32 ether_mtu;
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ BCE_LOCK_ASSERT(sc);
+
+ ifp = sc->bce_ifp;
+
+ /* Check if the driver is still running and bail out if it is. */
+ if (ifp->if_drv_flags & IFF_DRV_RUNNING)
+ goto bce_init_locked_exit;
+
+ bce_stop(sc);
+
+ if (bce_reset(sc, BCE_DRV_MSG_CODE_RESET)) {
+ BCE_PRINTF(sc, "%s(%d): Controller reset failed!\n",
+ __FILE__, __LINE__);
+ goto bce_init_locked_exit;
+ }
+
+ if (bce_chipinit(sc)) {
+ BCE_PRINTF(sc, "%s(%d): Controller initialization failed!\n",
+ __FILE__, __LINE__);
+ goto bce_init_locked_exit;
+ }
+
+ if (bce_blockinit(sc)) {
+ BCE_PRINTF(sc, "%s(%d): Block initialization failed!\n",
+ __FILE__, __LINE__);
+ goto bce_init_locked_exit;
+ }
+
+ /* Load our MAC address. */
+ bcopy(IF_LLADDR(sc->bce_ifp), sc->eaddr, ETHER_ADDR_LEN);
+ bce_set_mac_addr(sc);
+
+ /* Calculate and program the Ethernet MTU size. */
+ ether_mtu = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN + ifp->if_mtu +
+ ETHER_CRC_LEN;
+
+ DBPRINT(sc, BCE_INFO, "%s(): setting mtu = %d\n",__FUNCTION__, ether_mtu);
+
+ /*
+ * Program the mtu, enabling jumbo frame
+ * support if necessary. Also set the mbuf
+ * allocation count for RX frames.
+ */
+ if (ether_mtu > ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN) {
+ REG_WR(sc, BCE_EMAC_RX_MTU_SIZE, ether_mtu |
+ BCE_EMAC_RX_MTU_SIZE_JUMBO_ENA);
+ sc->mbuf_alloc_size = MJUM9BYTES;
+ } else {
+ REG_WR(sc, BCE_EMAC_RX_MTU_SIZE, ether_mtu);
+ sc->mbuf_alloc_size = MCLBYTES;
+ }
+
+ /* Calculate the RX Ethernet frame size for rx_bd's. */
+ sc->max_frame_size = sizeof(struct l2_fhdr) + 2 + ether_mtu + 8;
+
+ DBPRINT(sc, BCE_INFO,
+ "%s(): mclbytes = %d, mbuf_alloc_size = %d, "
+ "max_frame_size = %d\n",
+ __FUNCTION__, (int) MCLBYTES, sc->mbuf_alloc_size, sc->max_frame_size);
+
+ /* Program appropriate promiscuous/multicast filtering. */
+ bce_set_rx_mode(sc);
+
+ /* Init RX buffer descriptor chain. */
+ bce_init_rx_chain(sc);
+
+ /* Init TX buffer descriptor chain. */
+ bce_init_tx_chain(sc);
+
+#ifdef DEVICE_POLLING
+ /* Disable interrupts if we are polling. */
+ if (ifp->if_capenable & IFCAP_POLLING) {
+ bce_disable_intr(sc);
+
+ REG_WR(sc, BCE_HC_RX_QUICK_CONS_TRIP,
+ (1 << 16) | sc->bce_rx_quick_cons_trip);
+ REG_WR(sc, BCE_HC_TX_QUICK_CONS_TRIP,
+ (1 << 16) | sc->bce_tx_quick_cons_trip);
+ } else
+#endif
+ /* Enable host interrupts. */
+ bce_enable_intr(sc);
+
+ bce_ifmedia_upd(ifp);
+
+ ifp->if_drv_flags |= IFF_DRV_RUNNING;
+ ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
+
+ callout_reset(&sc->bce_stat_ch, hz, bce_tick, sc);
+
+bce_init_locked_exit:
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+
+ return;
+}
+
+
+/****************************************************************************/
+/* Handles controller initialization when called from an unlocked routine. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_init(void *xsc)
+{
+ struct bce_softc *sc = xsc;
+
+ BCE_LOCK(sc);
+ bce_init_locked(sc);
+ BCE_UNLOCK(sc);
+}
+
+
+/****************************************************************************/
+/* Encapsultes an mbuf cluster into the tx_bd chain structure and makes the */
+/* memory visible to the controller. */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static int
+bce_tx_encap(struct bce_softc *sc, struct mbuf *m_head, u16 *prod,
+ u16 *chain_prod, u32 *prod_bseq)
+{
+ u32 vlan_tag_flags = 0;
+ struct m_tag *mtag;
+ struct bce_dmamap_arg map_arg;
+ bus_dmamap_t map;
+ int i, error, rc = 0;
+
+ /* Transfer any checksum offload flags to the bd. */
+ if (m_head->m_pkthdr.csum_flags) {
+ if (m_head->m_pkthdr.csum_flags & CSUM_IP)
+ vlan_tag_flags |= TX_BD_FLAGS_IP_CKSUM;
+ if (m_head->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP))
+ vlan_tag_flags |= TX_BD_FLAGS_TCP_UDP_CKSUM;
+ }
+
+ /* Transfer any VLAN tags to the bd. */
+ mtag = VLAN_OUTPUT_TAG(sc->bce_ifp, m_head);
+ if (mtag != NULL)
+ vlan_tag_flags |= (TX_BD_FLAGS_VLAN_TAG |
+ (VLAN_TAG_VALUE(mtag) << 16));
+
+ /* Map the mbuf into DMAable memory. */
+ map = sc->tx_mbuf_map[*chain_prod];
+ map_arg.sc = sc;
+ map_arg.prod = *prod;
+ map_arg.chain_prod = *chain_prod;
+ map_arg.prod_bseq = *prod_bseq;
+ map_arg.tx_flags = vlan_tag_flags;
+ map_arg.maxsegs = USABLE_TX_BD - sc->used_tx_bd -
+ BCE_TX_SLACK_SPACE;
+
+ KASSERT(map_arg.maxsegs > 0, ("Invalid TX maxsegs value!"));
+
+ for (i = 0; i < TX_PAGES; i++)
+ map_arg.tx_chain[i] = sc->tx_bd_chain[i];
+
+ /* Map the mbuf into our DMA address space. */
+ error = bus_dmamap_load_mbuf(sc->tx_mbuf_tag, map, m_head,
+ bce_dma_map_tx_desc, &map_arg, BUS_DMA_NOWAIT);
+
+ if (error || map_arg.maxsegs == 0) {
+ BCE_PRINTF(sc, "%s(%d): Error mapping mbuf into TX chain!\n",
+ __FILE__, __LINE__);
+ rc = ENOBUFS;
+ goto bce_tx_encap_exit;
+ }
+
+ /*
+ * Ensure that the map for this transmission
+ * is placed at the array index of the last
+ * descriptor in this chain. This is done
+ * because a single map is used for all
+ * segments of the mbuf and we don't want to
+ * delete the map before all of the segments
+ * have been freed.
+ */
+ sc->tx_mbuf_map[*chain_prod] =
+ sc->tx_mbuf_map[map_arg.chain_prod];
+ sc->tx_mbuf_map[map_arg.chain_prod] = map;
+ sc->tx_mbuf_ptr[map_arg.chain_prod] = m_head;
+ sc->used_tx_bd += map_arg.maxsegs;
+
+ DBRUNIF((sc->used_tx_bd > sc->tx_hi_watermark),
+ sc->tx_hi_watermark = sc->used_tx_bd);
+
+ DBRUNIF(1, sc->tx_mbuf_alloc++);
+
+ DBRUN(BCE_VERBOSE_SEND, bce_dump_tx_mbuf_chain(sc, *chain_prod,
+ map_arg.maxsegs));
+
+ /* prod still points the last used tx_bd at this point. */
+ *prod = map_arg.prod;
+ *chain_prod = map_arg.chain_prod;
+ *prod_bseq = map_arg.prod_bseq;
+
+bce_tx_encap_exit:
+
+ return(rc);
+}
+
+
+/****************************************************************************/
+/* Main transmit routine when called from another routine with a lock. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_start_locked(struct ifnet *ifp)
+{
+ struct bce_softc *sc = ifp->if_softc;
+ struct mbuf *m_head = NULL;
+ int count = 0;
+ u16 tx_prod, tx_chain_prod;
+ u32 tx_prod_bseq;
+
+ /* If there's no link or the transmit queue is empty then just exit. */
+ if (!sc->bce_link || IFQ_DRV_IS_EMPTY(&ifp->if_snd)) {
+ DBPRINT(sc, BCE_INFO_SEND, "%s(): No link or transmit queue empty.\n",
+ __FUNCTION__);
+ goto bce_start_locked_exit;
+ }
+
+ /* prod points to the next free tx_bd. */
+ tx_prod = sc->tx_prod;
+ tx_chain_prod = TX_CHAIN_IDX(tx_prod);
+ tx_prod_bseq = sc->tx_prod_bseq;
+
+ DBPRINT(sc, BCE_INFO_SEND,
+ "%s(): Start: tx_prod = 0x%04X, tx_chain_prod = %04X, "
+ "tx_prod_bseq = 0x%08X\n",
+ __FUNCTION__, tx_prod, tx_chain_prod, tx_prod_bseq);
+
+ /* Keep adding entries while there is space in the ring. */
+ while(sc->tx_mbuf_ptr[tx_chain_prod] == NULL) {
+
+ /* Check for any frames to send. */
+ IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
+ if (m_head == NULL)
+ break;
+
+ /*
+ * Pack the data into the transmit ring. If we
+ * don't have room, place the mbuf back at the
+ * head of the queue and set the OACTIVE flag
+ * to wait for the NIC to drain the chain.
+ */
+ if (bce_tx_encap(sc, m_head, &tx_prod, &tx_chain_prod, &tx_prod_bseq)) {
+ IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
+ ifp->if_drv_flags |= IFF_DRV_OACTIVE;
+ DBPRINT(sc, BCE_INFO_SEND,
+ "TX chain is closed for business! Total tx_bd used = %d\n",
+ sc->used_tx_bd);
+ break;
+ }
+
+ count++;
+
+ /* Send a copy of the frame to any BPF listeners. */
+ BPF_MTAP(ifp, m_head);
+
+ tx_prod = NEXT_TX_BD(tx_prod);
+ tx_chain_prod = TX_CHAIN_IDX(tx_prod);
+ }
+
+ if (count == 0) {
+ /* no packets were dequeued */
+ DBPRINT(sc, BCE_VERBOSE_SEND, "%s(): No packets were dequeued\n",
+ __FUNCTION__);
+ goto bce_start_locked_exit;
+ }
+
+ /* Update the driver's counters. */
+ sc->tx_prod = tx_prod;
+ sc->tx_prod_bseq = tx_prod_bseq;
+
+ DBPRINT(sc, BCE_INFO_SEND,
+ "%s(): End: tx_prod = 0x%04X, tx_chain_prod = 0x%04X, "
+ "tx_prod_bseq = 0x%08X\n",
+ __FUNCTION__, tx_prod, tx_chain_prod, tx_prod_bseq);
+
+ /* Start the transmit. */
+ REG_WR16(sc, MB_TX_CID_ADDR + BCE_L2CTX_TX_HOST_BIDX, sc->tx_prod);
+ REG_WR(sc, MB_TX_CID_ADDR + BCE_L2CTX_TX_HOST_BSEQ, sc->tx_prod_bseq);
+
+ /* Set the tx timeout. */
+ ifp->if_timer = BCE_TX_TIMEOUT;
+
+bce_start_locked_exit:
+ return;
+}
+
+
+/****************************************************************************/
+/* Main transmit routine when called from another routine without a lock. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_start(struct ifnet *ifp)
+{
+ struct bce_softc *sc = ifp->if_softc;
+
+ BCE_LOCK(sc);
+ bce_start_locked(ifp);
+ BCE_UNLOCK(sc);
+}
+
+
+/****************************************************************************/
+/* Handles any IOCTL calls from the operating system. */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static int
+bce_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
+{
+ struct bce_softc *sc = ifp->if_softc;
+ struct ifreq *ifr = (struct ifreq *) data;
+ struct mii_data *mii;
+ int mask, error = 0;
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
+
+ switch(command) {
+
+ /* Set the MTU. */
+ case SIOCSIFMTU:
+ /* Check that the MTU setting is supported. */
+ if ((ifr->ifr_mtu < BCE_MIN_MTU) ||
+ (ifr->ifr_mtu > BCE_MAX_JUMBO_MTU)) {
+ error = EINVAL;
+ break;
+ }
+
+ DBPRINT(sc, BCE_INFO, "Setting new MTU of %d\n", ifr->ifr_mtu);
+
+ ifp->if_mtu = ifr->ifr_mtu;
+ ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
+ bce_init(sc);
+ break;
+
+ /* Set interface. */
+ case SIOCSIFFLAGS:
+ DBPRINT(sc, BCE_VERBOSE, "Received SIOCSIFFLAGS\n");
+
+ BCE_LOCK(sc);
+
+ /* Check if the interface is up. */
+ if (ifp->if_flags & IFF_UP) {
+ /* Change the promiscuous/multicast flags as necessary. */
+ bce_set_rx_mode(sc);
+ } else {
+ /* The interface is down. Check if the driver is running. */
+ if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
+ bce_stop(sc);
+ }
+ }
+
+ BCE_UNLOCK(sc);
+ error = 0;
+
+ break;
+
+ /* Add/Delete multicast address */
+ case SIOCADDMULTI:
+ case SIOCDELMULTI:
+ DBPRINT(sc, BCE_VERBOSE, "Received SIOCADDMULTI/SIOCDELMULTI\n");
+
+ if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
+ BCE_LOCK(sc);
+ bce_set_rx_mode(sc);
+ BCE_UNLOCK(sc);
+ error = 0;
+ }
+
+ break;
+
+ /* Set/Get Interface media */
+ case SIOCSIFMEDIA:
+ case SIOCGIFMEDIA:
+ DBPRINT(sc, BCE_VERBOSE, "Received SIOCSIFMEDIA/SIOCGIFMEDIA\n");
+
+ DBPRINT(sc, BCE_VERBOSE, "bce_phy_flags = 0x%08X\n",
+ sc->bce_phy_flags);
+
+ if (sc->bce_phy_flags & BCE_PHY_SERDES_FLAG) {
+ DBPRINT(sc, BCE_VERBOSE, "SerDes media set/get\n");
+
+ error = ifmedia_ioctl(ifp, ifr,
+ &sc->bce_ifmedia, command);
+ } else {
+ DBPRINT(sc, BCE_VERBOSE, "Copper media set/get\n");
+ mii = device_get_softc(sc->bce_miibus);
+ error = ifmedia_ioctl(ifp, ifr,
+ &mii->mii_media, command);
+ }
+ break;
+
+ /* Set interface capability */
+ case SIOCSIFCAP:
+ mask = ifr->ifr_reqcap ^ ifp->if_capenable;
+ DBPRINT(sc, BCE_INFO, "Received SIOCSIFCAP = 0x%08X\n", (u32) mask);
+
+#ifdef DEVICE_POLLING
+ if (mask & IFCAP_POLLING) {
+ if (ifr->ifr_reqcap & IFCAP_POLLING) {
+
+ /* Setup the poll routine to call. */
+ error = ether_poll_register(bce_poll, ifp);
+ if (error) {
+ BCE_PRINTF(sc, "%s(%d): Error registering poll function!\n",
+ __FILE__, __LINE__);
+ goto bce_ioctl_exit;
+ }
+
+ /* Clear the interrupt. */
+ BCE_LOCK(sc);
+ bce_disable_intr(sc);
+
+ REG_WR(sc, BCE_HC_RX_QUICK_CONS_TRIP,
+ (1 << 16) | sc->bce_rx_quick_cons_trip);
+ REG_WR(sc, BCE_HC_TX_QUICK_CONS_TRIP,
+ (1 << 16) | sc->bce_tx_quick_cons_trip);
+
+ ifp->if_capenable |= IFCAP_POLLING;
+ BCE_UNLOCK(sc);
+ } else {
+ /* Clear the poll routine. */
+ error = ether_poll_deregister(ifp);
+
+ /* Enable interrupt even in error case */
+ BCE_LOCK(sc);
+ bce_enable_intr(sc);
+
+ REG_WR(sc, BCE_HC_TX_QUICK_CONS_TRIP,
+ (sc->bce_tx_quick_cons_trip_int << 16) |
+ sc->bce_tx_quick_cons_trip);
+ REG_WR(sc, BCE_HC_RX_QUICK_CONS_TRIP,
+ (sc->bce_rx_quick_cons_trip_int << 16) |
+ sc->bce_rx_quick_cons_trip);
+
+ ifp->if_capenable &= ~IFCAP_POLLING;
+ BCE_UNLOCK(sc);
+ }
+ }
+#endif /*DEVICE_POLLING */
+
+ /* Toggle the TX checksum capabilites enable flag. */
+ if (mask & IFCAP_TXCSUM) {
+ ifp->if_capenable ^= IFCAP_TXCSUM;
+ if (IFCAP_TXCSUM & ifp->if_capenable)
+ ifp->if_hwassist = BCE_IF_HWASSIST;
+ else
+ ifp->if_hwassist = 0;
+ }
+
+ /* Toggle the RX checksum capabilities enable flag. */
+ if (mask & IFCAP_RXCSUM) {
+ ifp->if_capenable ^= IFCAP_RXCSUM;
+ if (IFCAP_RXCSUM & ifp->if_capenable)
+ ifp->if_hwassist = BCE_IF_HWASSIST;
+ else
+ ifp->if_hwassist = 0;
+ }
+
+ /* Toggle VLAN_MTU capabilities enable flag. */
+ if (mask & IFCAP_VLAN_MTU) {
+ BCE_PRINTF(sc, "%s(%d): Changing VLAN_MTU not supported.\n",
+ __FILE__, __LINE__);
+ }
+
+ /* Toggle VLANHWTAG capabilities enabled flag. */
+ if (mask & IFCAP_VLAN_HWTAGGING) {
+ if (sc->bce_flags & BCE_MFW_ENABLE_FLAG)
+ BCE_PRINTF(sc, "%s(%d): Cannot change VLAN_HWTAGGING while "
+ "management firmware (ASF/IPMI/UMP) is running!\n",
+ __FILE__, __LINE__);
+ else
+ BCE_PRINTF(sc, "%s(%d): Changing VLAN_HWTAGGING not supported!\n",
+ __FILE__, __LINE__);
+ }
+
+ break;
+ default:
+ DBPRINT(sc, BCE_INFO, "Received unsupported IOCTL: 0x%08X\n",
+ (u32) command);
+
+ /* We don't know how to handle the IOCTL, pass it on. */
+ error = ether_ioctl(ifp, command, data);
+ break;
+ }
+
+ DBPRINT(sc, BCE_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
+
+ return(error);
+}
+
+
+/****************************************************************************/
+/* Transmit timeout handler. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_watchdog(struct ifnet *ifp)
+{
+ struct bce_softc *sc = ifp->if_softc;
+
+ DBRUN(BCE_WARN_SEND,
+ bce_dump_driver_state(sc);
+ bce_dump_status_block(sc));
+
+ BCE_PRINTF(sc, "%s(%d): Watchdog timeout occurred, resetting!\n",
+ __FILE__, __LINE__);
+
+ /* DBRUN(BCE_FATAL, bce_breakpoint(sc)); */
+
+ ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
+
+ bce_init(sc);
+ ifp->if_oerrors++;
+
+}
+
+
+#ifdef DEVICE_POLLING
+static void
+bce_poll_locked(struct ifnet *ifp, enum poll_cmd cmd, int count)
+{
+ struct bce_softc *sc = ifp->if_softc;
+
+ BCE_LOCK_ASSERT(sc);
+
+ sc->bce_rxcycles = count;
+
+ bus_dmamap_sync(sc->status_tag, sc->status_map,
+ BUS_DMASYNC_POSTWRITE);
+
+ /* Check for any completed RX frames. */
+ if (sc->status_block->status_rx_quick_consumer_index0 !=
+ sc->hw_rx_cons)
+ bce_rx_intr(sc);
+
+ /* Check for any completed TX frames. */
+ if (sc->status_block->status_tx_quick_consumer_index0 !=
+ sc->hw_tx_cons)
+ bce_tx_intr(sc);
+
+ /* Check for new frames to transmit. */
+ if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
+ bce_start_locked(ifp);
+
+}
+
+
+static void
+bce_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
+{
+ struct bce_softc *sc = ifp->if_softc;
+
+ BCE_LOCK(sc);
+ if (ifp->if_drv_flags & IFF_DRV_RUNNING)
+ bce_poll_locked(ifp, cmd, count);
+ BCE_UNLOCK(sc);
+}
+#endif /* DEVICE_POLLING */
+
+
+#if 0
+static inline int
+bce_has_work(struct bce_softc *sc)
+{
+ struct status_block *stat = sc->status_block;
+
+ if ((stat->status_rx_quick_consumer_index0 != sc->hw_rx_cons) ||
+ (stat->status_tx_quick_consumer_index0 != sc->hw_tx_cons))
+ return 1;
+
+ if (((stat->status_attn_bits & STATUS_ATTN_BITS_LINK_STATE) != 0) !=
+ bp->link_up)
+ return 1;
+
+ return 0;
+}
+#endif
+
+
+/*
+ * Interrupt handler.
+ */
+/****************************************************************************/
+/* Main interrupt entry point. Verifies that the controller generated the */
+/* interrupt and then calls a separate routine for handle the various */
+/* interrupt causes (PHY, TX, RX). */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static void
+bce_intr(void *xsc)
+{
+ struct bce_softc *sc;
+ struct ifnet *ifp;
+ u32 status_attn_bits;
+
+ sc = xsc;
+ ifp = sc->bce_ifp;
+
+ BCE_LOCK(sc);
+
+ DBRUNIF(1, sc->interrupts_generated++);
+
+#ifdef DEVICE_POLLING
+ if (ifp->if_capenable & IFCAP_POLLING) {
+ DBPRINT(sc, BCE_INFO, "Polling enabled!\n");
+ goto bce_intr_exit;
+ }
+#endif
+
+ bus_dmamap_sync(sc->status_tag, sc->status_map,
+ BUS_DMASYNC_POSTWRITE);
+
+ /*
+ * If the hardware status block index
+ * matches the last value read by the
+ * driver and we haven't asserted our
+ * interrupt then there's nothing to do.
+ */
+ if ((sc->status_block->status_idx == sc->last_status_idx) &&
+ (REG_RD(sc, BCE_PCICFG_MISC_STATUS) & BCE_PCICFG_MISC_STATUS_INTA_VALUE))
+ goto bce_intr_exit;
+
+ /* Ack the interrupt and stop others from occuring. */
+ REG_WR(sc, BCE_PCICFG_INT_ACK_CMD,
+ BCE_PCICFG_INT_ACK_CMD_USE_INT_HC_PARAM |
+ BCE_PCICFG_INT_ACK_CMD_MASK_INT);
+
+ /* Keep processing data as long as there is work to do. */
+ for (;;) {
+
+ status_attn_bits = sc->status_block->status_attn_bits;
+
+ DBRUNIF(DB_RANDOMTRUE(bce_debug_unexpected_attention),
+ BCE_PRINTF(sc, "Simulating unexpected status attention bit set.");
+ status_attn_bits = status_attn_bits | STATUS_ATTN_BITS_PARITY_ERROR);
+
+ /* Was it a link change interrupt? */
+ if ((status_attn_bits & STATUS_ATTN_BITS_LINK_STATE) !=
+ (sc->status_block->status_attn_bits_ack & STATUS_ATTN_BITS_LINK_STATE))
+ bce_phy_intr(sc);
+
+ /* If any other attention is asserted then the chip is toast. */
+ if (((status_attn_bits & ~STATUS_ATTN_BITS_LINK_STATE) !=
+ (sc->status_block->status_attn_bits_ack &
+ ~STATUS_ATTN_BITS_LINK_STATE))) {
+
+ DBRUN(1, sc->unexpected_attentions++);
+
+ BCE_PRINTF(sc, "%s(%d): Fatal attention detected: 0x%08X\n",
+ __FILE__, __LINE__, sc->status_block->status_attn_bits);
+
+ DBRUN(BCE_FATAL,
+ if (bce_debug_unexpected_attention == 0)
+ bce_breakpoint(sc));
+
+ bce_init_locked(sc);
+ goto bce_intr_exit;
+ }
+
+ /* Check for any completed RX frames. */
+ if (sc->status_block->status_rx_quick_consumer_index0 != sc->hw_rx_cons)
+ bce_rx_intr(sc);
+
+ /* Check for any completed TX frames. */
+ if (sc->status_block->status_tx_quick_consumer_index0 != sc->hw_tx_cons)
+ bce_tx_intr(sc);
+
+ /* Save the status block index value for use during the next interrupt. */
+ sc->last_status_idx = sc->status_block->status_idx;
+
+ /* Prevent speculative reads from getting ahead of the status block. */
+ bus_space_barrier(sc->bce_btag, sc->bce_bhandle, 0, 0,
+ BUS_SPACE_BARRIER_READ);
+
+ /* If there's no work left then exit the interrupt service routine. */
+ if ((sc->status_block->status_rx_quick_consumer_index0 == sc->hw_rx_cons) &&
+ (sc->status_block->status_tx_quick_consumer_index0 == sc->hw_tx_cons))
+ break;
+
+ }
+
+ bus_dmamap_sync(sc->status_tag, sc->status_map,
+ BUS_DMASYNC_PREWRITE);
+
+ /* Re-enable interrupts. */
+ REG_WR(sc, BCE_PCICFG_INT_ACK_CMD,
+ BCE_PCICFG_INT_ACK_CMD_INDEX_VALID | sc->last_status_idx |
+ BCE_PCICFG_INT_ACK_CMD_MASK_INT);
+ REG_WR(sc, BCE_PCICFG_INT_ACK_CMD,
+ BCE_PCICFG_INT_ACK_CMD_INDEX_VALID | sc->last_status_idx);
+
+ /* Handle any frames that arrived while handling the interrupt. */
+ if (ifp->if_drv_flags & IFF_DRV_RUNNING && !IFQ_DRV_IS_EMPTY(&ifp->if_snd))
+ bce_start_locked(ifp);
+
+bce_intr_exit:
+ BCE_UNLOCK(sc);
+}
+
+
+/****************************************************************************/
+/* Programs the various packet receive modes (broadcast and multicast). */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_set_rx_mode(struct bce_softc *sc)
+{
+ struct ifnet *ifp;
+ struct ifmultiaddr *ifma;
+ u32 hashes[4] = { 0, 0, 0, 0 };
+ u32 rx_mode, sort_mode;
+ int h, i;
+
+ BCE_LOCK_ASSERT(sc);
+
+ ifp = sc->bce_ifp;
+
+ /* Initialize receive mode default settings. */
+ rx_mode = sc->rx_mode & ~(BCE_EMAC_RX_MODE_PROMISCUOUS |
+ BCE_EMAC_RX_MODE_KEEP_VLAN_TAG);
+ sort_mode = 1 | BCE_RPM_SORT_USER0_BC_EN;
+
+ /*
+ * ASF/IPMI/UMP firmware requires that VLAN tag stripping
+ * be enbled.
+ */
+ if (!(BCE_IF_CAPABILITIES & IFCAP_VLAN_HWTAGGING) &&
+ (!(sc->bce_flags & BCE_MFW_ENABLE_FLAG)))
+ rx_mode |= BCE_EMAC_RX_MODE_KEEP_VLAN_TAG;
+
+ /*
+ * Check for promiscuous, all multicast, or selected
+ * multicast address filtering.
+ */
+ if (ifp->if_flags & IFF_PROMISC) {
+ DBPRINT(sc, BCE_INFO, "Enabling promiscuous mode.\n");
+
+ /* Enable promiscuous mode. */
+ rx_mode |= BCE_EMAC_RX_MODE_PROMISCUOUS;
+ sort_mode |= BCE_RPM_SORT_USER0_PROM_EN;
+ } else if (ifp->if_flags & IFF_ALLMULTI) {
+ DBPRINT(sc, BCE_INFO, "Enabling all multicast mode.\n");
+
+ /* Enable all multicast addresses. */
+ for (i = 0; i < NUM_MC_HASH_REGISTERS; i++) {
+ REG_WR(sc, BCE_EMAC_MULTICAST_HASH0 + (i * 4), 0xffffffff);
+ }
+ sort_mode |= BCE_RPM_SORT_USER0_MC_EN;
+ } else {
+ /* Accept one or more multicast(s). */
+ DBPRINT(sc, BCE_INFO, "Enabling selective multicast mode.\n");
+
+ IF_ADDR_LOCK(ifp);
+ TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
+ if (ifma->ifma_addr->sa_family != AF_LINK)
+ continue;
+ h = ether_crc32_le(LLADDR((struct sockaddr_dl *)
+ ifma->ifma_addr), ETHER_ADDR_LEN) & 0x7F;
+ hashes[(h & 0x60) >> 5] |= 1 << (h & 0x1F);
+ }
+ IF_ADDR_UNLOCK(ifp);
+
+ for (i = 0; i < 4; i++)
+ REG_WR(sc, BCE_EMAC_MULTICAST_HASH0 + (i * 4), hashes[i]);
+
+ sort_mode |= BCE_RPM_SORT_USER0_MC_HSH_EN;
+ }
+
+ /* Only make changes if the recive mode has actually changed. */
+ if (rx_mode != sc->rx_mode) {
+ DBPRINT(sc, BCE_VERBOSE, "Enabling new receive mode: 0x%08X\n",
+ rx_mode);
+
+ sc->rx_mode = rx_mode;
+ REG_WR(sc, BCE_EMAC_RX_MODE, rx_mode);
+ }
+
+ /* Disable and clear the exisitng sort before enabling a new sort. */
+ REG_WR(sc, BCE_RPM_SORT_USER0, 0x0);
+ REG_WR(sc, BCE_RPM_SORT_USER0, sort_mode);
+ REG_WR(sc, BCE_RPM_SORT_USER0, sort_mode | BCE_RPM_SORT_USER0_ENA);
+}
+
+
+/****************************************************************************/
+/* Called periodically to updates statistics from the controllers */
+/* statistics block. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_stats_update(struct bce_softc *sc)
+{
+ struct ifnet *ifp;
+ struct statistics_block *stats;
+
+ DBPRINT(sc, BCE_EXCESSIVE, "Entering %s()\n", __FUNCTION__);
+
+ ifp = sc->bce_ifp;
+
+ stats = (struct statistics_block *) sc->stats_block;
+
+ /*
+ * Update the interface statistics from the
+ * hardware statistics.
+ */
+ ifp->if_collisions = (u_long) stats->stat_EtherStatsCollisions;
+
+ ifp->if_ibytes = BCE_STATS(IfHCInOctets);
+
+ ifp->if_obytes = BCE_STATS(IfHCOutOctets);
+
+ ifp->if_imcasts = BCE_STATS(IfHCInMulticastPkts);
+
+ ifp->if_omcasts = BCE_STATS(IfHCOutMulticastPkts);
+
+ ifp->if_ierrors = (u_long) stats->stat_EtherStatsUndersizePkts +
+ (u_long) stats->stat_EtherStatsOverrsizePkts +
+ (u_long) stats->stat_IfInMBUFDiscards +
+ (u_long) stats->stat_Dot3StatsAlignmentErrors +
+ (u_long) stats->stat_Dot3StatsFCSErrors;
+
+ ifp->if_oerrors = (u_long) stats->stat_emac_tx_stat_dot3statsinternalmactransmiterrors +
+ (u_long) stats->stat_Dot3StatsExcessiveCollisions +
+ (u_long) stats->stat_Dot3StatsLateCollisions;
+
+ /*
+ * Certain controllers don't report
+ * carrier sense errors correctly.
+ * See errata E11_5708CA0_1165.
+ */
+ if (!(BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5706) &&
+ !(BCE_CHIP_ID(sc) == BCE_CHIP_ID_5708_A0))
+ ifp->if_oerrors += (u_long) stats->stat_Dot3StatsCarrierSenseErrors;
+
+ /*
+ * Update the sysctl statistics from the
+ * hardware statistics.
+ */
+ sc->stat_IfHCInOctets =
+ ((u64) stats->stat_IfHCInOctets_hi << 32) +
+ (u64) stats->stat_IfHCInOctets_lo;
+
+ sc->stat_IfHCInBadOctets =
+ ((u64) stats->stat_IfHCInBadOctets_hi << 32) +
+ (u64) stats->stat_IfHCInBadOctets_lo;
+
+ sc->stat_IfHCOutOctets =
+ ((u64) stats->stat_IfHCOutOctets_hi << 32) +
+ (u64) stats->stat_IfHCOutOctets_lo;
+
+ sc->stat_IfHCOutBadOctets =
+ ((u64) stats->stat_IfHCOutBadOctets_hi << 32) +
+ (u64) stats->stat_IfHCOutBadOctets_lo;
+
+ sc->stat_IfHCInUcastPkts =
+ ((u64) stats->stat_IfHCInUcastPkts_hi << 32) +
+ (u64) stats->stat_IfHCInUcastPkts_lo;
+
+ sc->stat_IfHCInMulticastPkts =
+ ((u64) stats->stat_IfHCInMulticastPkts_hi << 32) +
+ (u64) stats->stat_IfHCInMulticastPkts_lo;
+
+ sc->stat_IfHCInBroadcastPkts =
+ ((u64) stats->stat_IfHCInBroadcastPkts_hi << 32) +
+ (u64) stats->stat_IfHCInBroadcastPkts_lo;
+
+ sc->stat_IfHCOutUcastPkts =
+ ((u64) stats->stat_IfHCOutUcastPkts_hi << 32) +
+ (u64) stats->stat_IfHCOutUcastPkts_lo;
+
+ sc->stat_IfHCOutMulticastPkts =
+ ((u64) stats->stat_IfHCOutMulticastPkts_hi << 32) +
+ (u64) stats->stat_IfHCOutMulticastPkts_lo;
+
+ sc->stat_IfHCOutBroadcastPkts =
+ ((u64) stats->stat_IfHCOutBroadcastPkts_hi << 32) +
+ (u64) stats->stat_IfHCOutBroadcastPkts_lo;
+
+ sc->stat_emac_tx_stat_dot3statsinternalmactransmiterrors =
+ stats->stat_emac_tx_stat_dot3statsinternalmactransmiterrors;
+
+ sc->stat_Dot3StatsCarrierSenseErrors =
+ stats->stat_Dot3StatsCarrierSenseErrors;
+
+ sc->stat_Dot3StatsFCSErrors =
+ stats->stat_Dot3StatsFCSErrors;
+
+ sc->stat_Dot3StatsAlignmentErrors =
+ stats->stat_Dot3StatsAlignmentErrors;
+
+ sc->stat_Dot3StatsSingleCollisionFrames =
+ stats->stat_Dot3StatsSingleCollisionFrames;
+
+ sc->stat_Dot3StatsMultipleCollisionFrames =
+ stats->stat_Dot3StatsMultipleCollisionFrames;
+
+ sc->stat_Dot3StatsDeferredTransmissions =
+ stats->stat_Dot3StatsDeferredTransmissions;
+
+ sc->stat_Dot3StatsExcessiveCollisions =
+ stats->stat_Dot3StatsExcessiveCollisions;
+
+ sc->stat_Dot3StatsLateCollisions =
+ stats->stat_Dot3StatsLateCollisions;
+
+ sc->stat_EtherStatsCollisions =
+ stats->stat_EtherStatsCollisions;
+
+ sc->stat_EtherStatsFragments =
+ stats->stat_EtherStatsFragments;
+
+ sc->stat_EtherStatsJabbers =
+ stats->stat_EtherStatsJabbers;
+
+ sc->stat_EtherStatsUndersizePkts =
+ stats->stat_EtherStatsUndersizePkts;
+
+ sc->stat_EtherStatsOverrsizePkts =
+ stats->stat_EtherStatsOverrsizePkts;
+
+ sc->stat_EtherStatsPktsRx64Octets =
+ stats->stat_EtherStatsPktsRx64Octets;
+
+ sc->stat_EtherStatsPktsRx65Octetsto127Octets =
+ stats->stat_EtherStatsPktsRx65Octetsto127Octets;
+
+ sc->stat_EtherStatsPktsRx128Octetsto255Octets =
+ stats->stat_EtherStatsPktsRx128Octetsto255Octets;
+
+ sc->stat_EtherStatsPktsRx256Octetsto511Octets =
+ stats->stat_EtherStatsPktsRx256Octetsto511Octets;
+
+ sc->stat_EtherStatsPktsRx512Octetsto1023Octets =
+ stats->stat_EtherStatsPktsRx512Octetsto1023Octets;
+
+ sc->stat_EtherStatsPktsRx1024Octetsto1522Octets =
+ stats->stat_EtherStatsPktsRx1024Octetsto1522Octets;
+
+ sc->stat_EtherStatsPktsRx1523Octetsto9022Octets =
+ stats->stat_EtherStatsPktsRx1523Octetsto9022Octets;
+
+ sc->stat_EtherStatsPktsTx64Octets =
+ stats->stat_EtherStatsPktsTx64Octets;
+
+ sc->stat_EtherStatsPktsTx65Octetsto127Octets =
+ stats->stat_EtherStatsPktsTx65Octetsto127Octets;
+
+ sc->stat_EtherStatsPktsTx128Octetsto255Octets =
+ stats->stat_EtherStatsPktsTx128Octetsto255Octets;
+
+ sc->stat_EtherStatsPktsTx256Octetsto511Octets =
+ stats->stat_EtherStatsPktsTx256Octetsto511Octets;
+
+ sc->stat_EtherStatsPktsTx512Octetsto1023Octets =
+ stats->stat_EtherStatsPktsTx512Octetsto1023Octets;
+
+ sc->stat_EtherStatsPktsTx1024Octetsto1522Octets =
+ stats->stat_EtherStatsPktsTx1024Octetsto1522Octets;
+
+ sc->stat_EtherStatsPktsTx1523Octetsto9022Octets =
+ stats->stat_EtherStatsPktsTx1523Octetsto9022Octets;
+
+ sc->stat_XonPauseFramesReceived =
+ stats->stat_XonPauseFramesReceived;
+
+ sc->stat_XoffPauseFramesReceived =
+ stats->stat_XoffPauseFramesReceived;
+
+ sc->stat_OutXonSent =
+ stats->stat_OutXonSent;
+
+ sc->stat_OutXoffSent =
+ stats->stat_OutXoffSent;
+
+ sc->stat_FlowControlDone =
+ stats->stat_FlowControlDone;
+
+ sc->stat_MacControlFramesReceived =
+ stats->stat_MacControlFramesReceived;
+
+ sc->stat_XoffStateEntered =
+ stats->stat_XoffStateEntered;
+
+ sc->stat_IfInFramesL2FilterDiscards =
+ stats->stat_IfInFramesL2FilterDiscards;
+
+ sc->stat_IfInRuleCheckerDiscards =
+ stats->stat_IfInRuleCheckerDiscards;
+
+ sc->stat_IfInFTQDiscards =
+ stats->stat_IfInFTQDiscards;
+
+ sc->stat_IfInMBUFDiscards =
+ stats->stat_IfInMBUFDiscards;
+
+ sc->stat_IfInRuleCheckerP4Hit =
+ stats->stat_IfInRuleCheckerP4Hit;
+
+ sc->stat_CatchupInRuleCheckerDiscards =
+ stats->stat_CatchupInRuleCheckerDiscards;
+
+ sc->stat_CatchupInFTQDiscards =
+ stats->stat_CatchupInFTQDiscards;
+
+ sc->stat_CatchupInMBUFDiscards =
+ stats->stat_CatchupInMBUFDiscards;
+
+ sc->stat_CatchupInRuleCheckerP4Hit =
+ stats->stat_CatchupInRuleCheckerP4Hit;
+
+ DBPRINT(sc, BCE_EXCESSIVE, "Exiting %s()\n", __FUNCTION__);
+}
+
+
+static void
+bce_tick_locked(struct bce_softc *sc)
+{
+ struct mii_data *mii = NULL;
+ struct ifnet *ifp;
+ u32 msg;
+
+ ifp = sc->bce_ifp;
+
+ BCE_LOCK_ASSERT(sc);
+
+ /* Tell the firmware that the driver is still running. */
+#ifdef BCE_DEBUG
+ msg = (u32) BCE_DRV_MSG_DATA_PULSE_CODE_ALWAYS_ALIVE;
+#else
+ msg = (u32) ++sc->bce_fw_drv_pulse_wr_seq;
+#endif
+ REG_WR_IND(sc, sc->bce_shmem_base + BCE_DRV_PULSE_MB, msg);
+
+ /* Update the statistics from the hardware statistics block. */
+ bce_stats_update(sc);
+
+ /* Schedule the next tick. */
+ callout_reset(
+ &sc->bce_stat_ch, /* callout */
+ hz, /* ticks */
+ bce_tick, /* function */
+ sc); /* function argument */
+
+ /* If link is up already up then we're done. */
+ if (sc->bce_link)
+ goto bce_tick_locked_exit;
+
+ /* DRC - ToDo: Add SerDes support and check SerDes link here. */
+
+ mii = device_get_softc(sc->bce_miibus);
+ mii_tick(mii);
+
+ /* Check if the link has come up. */
+ if (!sc->bce_link && mii->mii_media_status & IFM_ACTIVE &&
+ IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
+ sc->bce_link++;
+ if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T ||
+ IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_SX) &&
+ bootverbose)
+ BCE_PRINTF(sc, "Gigabit link up\n");
+ /* Now that link is up, handle any outstanding TX traffic. */
+ if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
+ bce_start_locked(ifp);
+ }
+
+bce_tick_locked_exit:
+ return;
+}
+
+
+static void
+bce_tick(void *xsc)
+{
+ struct bce_softc *sc;
+
+ sc = xsc;
+
+ BCE_LOCK(sc);
+ bce_tick_locked(sc);
+ BCE_UNLOCK(sc);
+}
+
+
+#ifdef BCE_DEBUG
+/****************************************************************************/
+/* Allows the driver state to be dumped through the sysctl interface. */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static int
+bce_sysctl_driver_state(SYSCTL_HANDLER_ARGS)
+{
+ int error;
+ int result;
+ struct bce_softc *sc;
+
+ result = -1;
+ error = sysctl_handle_int(oidp, &result, 0, req);
+
+ if (error || !req->newptr)
+ return (error);
+
+ if (result == 1) {
+ sc = (struct bce_softc *)arg1;
+ bce_dump_driver_state(sc);
+ }
+
+ return error;
+}
+
+
+/****************************************************************************/
+/* Allows the hardware state to be dumped through the sysctl interface. */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static int
+bce_sysctl_hw_state(SYSCTL_HANDLER_ARGS)
+{
+ int error;
+ int result;
+ struct bce_softc *sc;
+
+ result = -1;
+ error = sysctl_handle_int(oidp, &result, 0, req);
+
+ if (error || !req->newptr)
+ return (error);
+
+ if (result == 1) {
+ sc = (struct bce_softc *)arg1;
+ bce_dump_hw_state(sc);
+ }
+
+ return error;
+}
+
+
+/****************************************************************************/
+/* */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static int
+bce_sysctl_dump_rx_chain(SYSCTL_HANDLER_ARGS)
+{
+ int error;
+ int result;
+ struct bce_softc *sc;
+
+ result = -1;
+ error = sysctl_handle_int(oidp, &result, 0, req);
+
+ if (error || !req->newptr)
+ return (error);
+
+ if (result == 1) {
+ sc = (struct bce_softc *)arg1;
+ bce_dump_rx_chain(sc, 0, USABLE_RX_BD);
+ }
+
+ return error;
+}
+
+
+/****************************************************************************/
+/* */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static int
+bce_sysctl_breakpoint(SYSCTL_HANDLER_ARGS)
+{
+ int error;
+ int result;
+ struct bce_softc *sc;
+
+ result = -1;
+ error = sysctl_handle_int(oidp, &result, 0, req);
+
+ if (error || !req->newptr)
+ return (error);
+
+ if (result == 1) {
+ sc = (struct bce_softc *)arg1;
+ bce_breakpoint(sc);
+ }
+
+ return error;
+}
+#endif
+
+
+/****************************************************************************/
+/* Adds any sysctl parameters for tuning or debugging purposes. */
+/* */
+/* Returns: */
+/* 0 for success, positive value for failure. */
+/****************************************************************************/
+static void
+bce_add_sysctls(struct bce_softc *sc)
+{
+ struct sysctl_ctx_list *ctx;
+ struct sysctl_oid_list *children;
+
+ ctx = device_get_sysctl_ctx(sc->bce_dev);
+ children = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->bce_dev));
+
+ SYSCTL_ADD_STRING(ctx, children, OID_AUTO,
+ "driver_version",
+ CTLFLAG_RD, &bce_driver_version,
+ 0, "bce driver version");
+
+#ifdef BCE_DEBUG
+ SYSCTL_ADD_INT(ctx, children, OID_AUTO,
+ "rx_low_watermark",
+ CTLFLAG_RD, &sc->rx_low_watermark,
+ 0, "Lowest level of free rx_bd's");
+
+ SYSCTL_ADD_INT(ctx, children, OID_AUTO,
+ "tx_hi_watermark",
+ CTLFLAG_RD, &sc->tx_hi_watermark,
+ 0, "Highest level of used tx_bd's");
+
+ SYSCTL_ADD_INT(ctx, children, OID_AUTO,
+ "l2fhdr_status_errors",
+ CTLFLAG_RD, &sc->l2fhdr_status_errors,
+ 0, "l2_fhdr status errors");
+
+ SYSCTL_ADD_INT(ctx, children, OID_AUTO,
+ "unexpected_attentions",
+ CTLFLAG_RD, &sc->unexpected_attentions,
+ 0, "unexpected attentions");
+
+ SYSCTL_ADD_INT(ctx, children, OID_AUTO,
+ "lost_status_block_updates",
+ CTLFLAG_RD, &sc->lost_status_block_updates,
+ 0, "lost status block updates");
+
+ SYSCTL_ADD_INT(ctx, children, OID_AUTO,
+ "mbuf_alloc_failed",
+ CTLFLAG_RD, &sc->mbuf_alloc_failed,
+ 0, "mbuf cluster allocation failures");
+#endif
+
+ SYSCTL_ADD_ULONG(ctx, children, OID_AUTO,
+ "stat_IfHcInOctets",
+ CTLFLAG_RD, &sc->stat_IfHCInOctets,
+ "Bytes received");
+
+ SYSCTL_ADD_ULONG(ctx, children, OID_AUTO,
+ "stat_IfHCInBadOctets",
+ CTLFLAG_RD, &sc->stat_IfHCInBadOctets,
+ "Bad bytes received");
+
+ SYSCTL_ADD_ULONG(ctx, children, OID_AUTO,
+ "stat_IfHCOutOctets",
+ CTLFLAG_RD, &sc->stat_IfHCOutOctets,
+ "Bytes sent");
+
+ SYSCTL_ADD_ULONG(ctx, children, OID_AUTO,
+ "stat_IfHCOutBadOctets",
+ CTLFLAG_RD, &sc->stat_IfHCOutBadOctets,
+ "Bad bytes sent");
+
+ SYSCTL_ADD_ULONG(ctx, children, OID_AUTO,
+ "stat_IfHCInUcastPkts",
+ CTLFLAG_RD, &sc->stat_IfHCInUcastPkts,
+ "Unicast packets received");
+
+ SYSCTL_ADD_ULONG(ctx, children, OID_AUTO,
+ "stat_IfHCInMulticastPkts",
+ CTLFLAG_RD, &sc->stat_IfHCInMulticastPkts,
+ "Multicast packets received");
+
+ SYSCTL_ADD_ULONG(ctx, children, OID_AUTO,
+ "stat_IfHCInBroadcastPkts",
+ CTLFLAG_RD, &sc->stat_IfHCInBroadcastPkts,
+ "Broadcast packets received");
+
+ SYSCTL_ADD_ULONG(ctx, children, OID_AUTO,
+ "stat_IfHCOutUcastPkts",
+ CTLFLAG_RD, &sc->stat_IfHCOutUcastPkts,
+ "Unicast packets sent");
+
+ SYSCTL_ADD_ULONG(ctx, children, OID_AUTO,
+ "stat_IfHCOutMulticastPkts",
+ CTLFLAG_RD, &sc->stat_IfHCOutMulticastPkts,
+ "Multicast packets sent");
+
+ SYSCTL_ADD_ULONG(ctx, children, OID_AUTO,
+ "stat_IfHCOutBroadcastPkts",
+ CTLFLAG_RD, &sc->stat_IfHCOutBroadcastPkts,
+ "Broadcast packets sent");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_emac_tx_stat_dot3statsinternalmactransmiterrors",
+ CTLFLAG_RD, &sc->stat_emac_tx_stat_dot3statsinternalmactransmiterrors,
+ 0, "Internal MAC transmit errors");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_Dot3StatsCarrierSenseErrors",
+ CTLFLAG_RD, &sc->stat_Dot3StatsCarrierSenseErrors,
+ 0, "Carrier sense errors");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_Dot3StatsFCSErrors",
+ CTLFLAG_RD, &sc->stat_Dot3StatsFCSErrors,
+ 0, "Frame check sequence errors");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_Dot3StatsAlignmentErrors",
+ CTLFLAG_RD, &sc->stat_Dot3StatsAlignmentErrors,
+ 0, "Alignment errors");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_Dot3StatsSingleCollisionFrames",
+ CTLFLAG_RD, &sc->stat_Dot3StatsSingleCollisionFrames,
+ 0, "Single Collision Frames");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_Dot3StatsMultipleCollisionFrames",
+ CTLFLAG_RD, &sc->stat_Dot3StatsMultipleCollisionFrames,
+ 0, "Multiple Collision Frames");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_Dot3StatsDeferredTransmissions",
+ CTLFLAG_RD, &sc->stat_Dot3StatsDeferredTransmissions,
+ 0, "Deferred Transmissions");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_Dot3StatsExcessiveCollisions",
+ CTLFLAG_RD, &sc->stat_Dot3StatsExcessiveCollisions,
+ 0, "Excessive Collisions");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_Dot3StatsLateCollisions",
+ CTLFLAG_RD, &sc->stat_Dot3StatsLateCollisions,
+ 0, "Late Collisions");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsCollisions",
+ CTLFLAG_RD, &sc->stat_EtherStatsCollisions,
+ 0, "Collisions");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsFragments",
+ CTLFLAG_RD, &sc->stat_EtherStatsFragments,
+ 0, "Fragments");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsJabbers",
+ CTLFLAG_RD, &sc->stat_EtherStatsJabbers,
+ 0, "Jabbers");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsUndersizePkts",
+ CTLFLAG_RD, &sc->stat_EtherStatsUndersizePkts,
+ 0, "Undersize packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsOverrsizePkts",
+ CTLFLAG_RD, &sc->stat_EtherStatsOverrsizePkts,
+ 0, "stat_EtherStatsOverrsizePkts");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsPktsRx64Octets",
+ CTLFLAG_RD, &sc->stat_EtherStatsPktsRx64Octets,
+ 0, "Bytes received in 64 byte packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsPktsRx65Octetsto127Octets",
+ CTLFLAG_RD, &sc->stat_EtherStatsPktsRx65Octetsto127Octets,
+ 0, "Bytes received in 65 to 127 byte packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsPktsRx128Octetsto255Octets",
+ CTLFLAG_RD, &sc->stat_EtherStatsPktsRx128Octetsto255Octets,
+ 0, "Bytes received in 128 to 255 byte packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsPktsRx256Octetsto511Octets",
+ CTLFLAG_RD, &sc->stat_EtherStatsPktsRx256Octetsto511Octets,
+ 0, "Bytes received in 256 to 511 byte packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsPktsRx512Octetsto1023Octets",
+ CTLFLAG_RD, &sc->stat_EtherStatsPktsRx512Octetsto1023Octets,
+ 0, "Bytes received in 512 to 1023 byte packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsPktsRx1024Octetsto1522Octets",
+ CTLFLAG_RD, &sc->stat_EtherStatsPktsRx1024Octetsto1522Octets,
+ 0, "Bytes received in 1024 t0 1522 byte packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsPktsRx1523Octetsto9022Octets",
+ CTLFLAG_RD, &sc->stat_EtherStatsPktsRx1523Octetsto9022Octets,
+ 0, "Bytes received in 1523 to 9022 byte packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsPktsTx64Octets",
+ CTLFLAG_RD, &sc->stat_EtherStatsPktsTx64Octets,
+ 0, "Bytes sent in 64 byte packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsPktsTx65Octetsto127Octets",
+ CTLFLAG_RD, &sc->stat_EtherStatsPktsTx65Octetsto127Octets,
+ 0, "Bytes sent in 65 to 127 byte packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsPktsTx128Octetsto255Octets",
+ CTLFLAG_RD, &sc->stat_EtherStatsPktsTx128Octetsto255Octets,
+ 0, "Bytes sent in 128 to 255 byte packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsPktsTx256Octetsto511Octets",
+ CTLFLAG_RD, &sc->stat_EtherStatsPktsTx256Octetsto511Octets,
+ 0, "Bytes sent in 256 to 511 byte packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsPktsTx512Octetsto1023Octets",
+ CTLFLAG_RD, &sc->stat_EtherStatsPktsTx512Octetsto1023Octets,
+ 0, "Bytes sent in 512 to 1023 byte packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsPktsTx1024Octetsto1522Octets",
+ CTLFLAG_RD, &sc->stat_EtherStatsPktsTx1024Octetsto1522Octets,
+ 0, "Bytes sent in 1024 to 1522 byte packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_EtherStatsPktsTx1523Octetsto9022Octets",
+ CTLFLAG_RD, &sc->stat_EtherStatsPktsTx1523Octetsto9022Octets,
+ 0, "Bytes sent in 1523 to 9022 byte packets");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_XonPauseFramesReceived",
+ CTLFLAG_RD, &sc->stat_XonPauseFramesReceived,
+ 0, "XON pause frames receved");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_XoffPauseFramesReceived",
+ CTLFLAG_RD, &sc->stat_XoffPauseFramesReceived,
+ 0, "XOFF pause frames received");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_OutXonSent",
+ CTLFLAG_RD, &sc->stat_OutXonSent,
+ 0, "XON pause frames sent");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_OutXoffSent",
+ CTLFLAG_RD, &sc->stat_OutXoffSent,
+ 0, "XOFF pause frames sent");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_FlowControlDone",
+ CTLFLAG_RD, &sc->stat_FlowControlDone,
+ 0, "Flow control done");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_MacControlFramesReceived",
+ CTLFLAG_RD, &sc->stat_MacControlFramesReceived,
+ 0, "MAC control frames received");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_XoffStateEntered",
+ CTLFLAG_RD, &sc->stat_XoffStateEntered,
+ 0, "XOFF state entered");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_IfInFramesL2FilterDiscards",
+ CTLFLAG_RD, &sc->stat_IfInFramesL2FilterDiscards,
+ 0, "Received L2 packets discarded");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_IfInRuleCheckerDiscards",
+ CTLFLAG_RD, &sc->stat_IfInRuleCheckerDiscards,
+ 0, "Received packets discarded by rule");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_IfInFTQDiscards",
+ CTLFLAG_RD, &sc->stat_IfInFTQDiscards,
+ 0, "Received packet FTQ discards");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_IfInMBUFDiscards",
+ CTLFLAG_RD, &sc->stat_IfInMBUFDiscards,
+ 0, "Received packets discarded due to lack of controller buffer memory");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_IfInRuleCheckerP4Hit",
+ CTLFLAG_RD, &sc->stat_IfInRuleCheckerP4Hit,
+ 0, "Received packets rule checker hits");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_CatchupInRuleCheckerDiscards",
+ CTLFLAG_RD, &sc->stat_CatchupInRuleCheckerDiscards,
+ 0, "Received packets discarded in Catchup path");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_CatchupInFTQDiscards",
+ CTLFLAG_RD, &sc->stat_CatchupInFTQDiscards,
+ 0, "Received packets discarded in FTQ in Catchup path");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_CatchupInMBUFDiscards",
+ CTLFLAG_RD, &sc->stat_CatchupInMBUFDiscards,
+ 0, "Received packets discarded in controller buffer memory in Catchup path");
+
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO,
+ "stat_CatchupInRuleCheckerP4Hit",
+ CTLFLAG_RD, &sc->stat_CatchupInRuleCheckerP4Hit,
+ 0, "Received packets rule checker hits in Catchup path");
+
+#ifdef BCE_DEBUG
+ SYSCTL_ADD_PROC(ctx, children, OID_AUTO,
+ "driver_state", CTLTYPE_INT | CTLFLAG_RW,
+ (void *)sc, 0,
+ bce_sysctl_driver_state, "I", "Drive state information");
+
+ SYSCTL_ADD_PROC(ctx, children, OID_AUTO,
+ "hw_state", CTLTYPE_INT | CTLFLAG_RW,
+ (void *)sc, 0,
+ bce_sysctl_hw_state, "I", "Hardware state information");
+
+ SYSCTL_ADD_PROC(ctx, children, OID_AUTO,
+ "dump_rx_chain", CTLTYPE_INT | CTLFLAG_RW,
+ (void *)sc, 0,
+ bce_sysctl_dump_rx_chain, "I", "Dump rx_bd chain");
+
+ SYSCTL_ADD_PROC(ctx, children, OID_AUTO,
+ "breakpoint", CTLTYPE_INT | CTLFLAG_RW,
+ (void *)sc, 0,
+ bce_sysctl_breakpoint, "I", "Driver breakpoint");
+#endif
+
+}
+
+
+/****************************************************************************/
+/* BCE Debug Routines */
+/****************************************************************************/
+#ifdef BCE_DEBUG
+
+/****************************************************************************/
+/* Prints out information about an mbuf. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_dump_mbuf(struct bce_softc *sc, struct mbuf *m)
+{
+ u32 val_hi, val_lo;
+ struct mbuf *mp = m;
+
+ if (m == NULL) {
+ /* Index out of range. */
+ printf("mbuf ptr is null!\n");
+ return;
+ }
+
+ while (mp) {
+ val_hi = BCE_ADDR_HI(mp);
+ val_lo = BCE_ADDR_LO(mp);
+ BCE_PRINTF(sc, "mbuf: vaddr = 0x%08X:%08X, m_len = %d, m_flags = ",
+ val_hi, val_lo, mp->m_len);
+
+ if (mp->m_flags & M_EXT)
+ printf("M_EXT ");
+ if (mp->m_flags & M_PKTHDR)
+ printf("M_PKTHDR ");
+ printf("\n");
+
+ if (mp->m_flags & M_EXT) {
+ val_hi = BCE_ADDR_HI(mp->m_ext.ext_buf);
+ val_lo = BCE_ADDR_LO(mp->m_ext.ext_buf);
+ BCE_PRINTF(sc, "- m_ext: vaddr = 0x%08X:%08X, ext_size = 0x%04X\n",
+ val_hi, val_lo, mp->m_ext.ext_size);
+ }
+
+ mp = mp->m_next;
+ }
+
+
+}
+
+
+/****************************************************************************/
+/* Prints out the mbufs in the TX mbuf chain. */
+/* */
+/* Returns: */
+/* Nothing. */
+/****************************************************************************/
+static void
+bce_dump_tx_mbuf_chain(struct bce_softc *sc, int chain_prod, int count)
+{
+ struct mbuf *m;
+
+ BCE_PRINTF(sc,
+ "----------------------------"
+ " tx mbuf data "
+ "----------------------------\n");
+
+ for (int i = 0; i < count; i++) {
+ m = sc->tx_mbuf_ptr[chain_prod];
+ BCE_PRINTF(sc, "txmbuf[%d]\n", chain_prod);
+ bce_dump_mbuf(sc, m);
+ chain_prod = TX_CHAIN_IDX(NEXT_TX_BD(chain_prod));
+ }
+
+ BCE_PRINTF(sc,
+ "----------------------------"
+ "----------------"
+ "----------------------------\n");
+}
+
+
+/*
+ * This routine prints the RX mbuf chain.
+ */
+static void
+bce_dump_rx_mbuf_chain(struct bce_softc *sc, int chain_prod, int count)
+{
+ struct mbuf *m;
+
+ BCE_PRINTF(sc,
+ "----------------------------"
+ " rx mbuf data "
+ "----------------------------\n");
+
+ for (int i = 0; i < count; i++) {
+ m = sc->rx_mbuf_ptr[chain_prod];
+ BCE_PRINTF(sc, "rxmbuf[0x%04X]\n", chain_prod);
+ bce_dump_mbuf(sc, m);
+ chain_prod = RX_CHAIN_IDX(NEXT_RX_BD(chain_prod));
+ }
+
+
+ BCE_PRINTF(sc,
+ "----------------------------"
+ "----------------"
+ "----------------------------\n");
+}
+
+
+static void
+bce_dump_txbd(struct bce_softc *sc, int idx, struct tx_bd *txbd)
+{
+ if (idx > MAX_TX_BD)
+ /* Index out of range. */
+ BCE_PRINTF(sc, "tx_bd[0x%04X]: Invalid tx_bd index!\n", idx);
+ else if ((idx & USABLE_TX_BD_PER_PAGE) == USABLE_TX_BD_PER_PAGE)
+ /* TX Chain page pointer. */
+ BCE_PRINTF(sc, "tx_bd[0x%04X]: haddr = 0x%08X:%08X, chain page pointer\n",
+ idx, txbd->tx_bd_haddr_hi, txbd->tx_bd_haddr_lo);
+ else
+ /* Normal tx_bd entry. */
+ BCE_PRINTF(sc, "tx_bd[0x%04X]: haddr = 0x%08X:%08X, nbytes = 0x%08X, "
+ "flags = 0x%08X\n", idx,
+ txbd->tx_bd_haddr_hi, txbd->tx_bd_haddr_lo,
+ txbd->tx_bd_mss_nbytes, txbd->tx_bd_vlan_tag_flags);
+}
+
+
+static void
+bce_dump_rxbd(struct bce_softc *sc, int idx, struct rx_bd *rxbd)
+{
+ if (idx > MAX_RX_BD)
+ /* Index out of range. */
+ BCE_PRINTF(sc, "rx_bd[0x%04X]: Invalid rx_bd index!\n", idx);
+ else if ((idx & USABLE_RX_BD_PER_PAGE) == USABLE_RX_BD_PER_PAGE)
+ /* TX Chain page pointer. */
+ BCE_PRINTF(sc, "rx_bd[0x%04X]: haddr = 0x%08X:%08X, chain page pointer\n",
+ idx, rxbd->rx_bd_haddr_hi, rxbd->rx_bd_haddr_lo);
+ else
+ /* Normal tx_bd entry. */
+ BCE_PRINTF(sc, "rx_bd[0x%04X]: haddr = 0x%08X:%08X, nbytes = 0x%08X, "
+ "flags = 0x%08X\n", idx,
+ rxbd->rx_bd_haddr_hi, rxbd->rx_bd_haddr_lo,
+ rxbd->rx_bd_len, rxbd->rx_bd_flags);
+}
+
+
+static void
+bce_dump_l2fhdr(struct bce_softc *sc, int idx, struct l2_fhdr *l2fhdr)
+{
+ BCE_PRINTF(sc, "l2_fhdr[0x%04X]: status = 0x%08X, "
+ "pkt_len = 0x%04X, vlan = 0x%04x, ip_xsum = 0x%04X, "
+ "tcp_udp_xsum = 0x%04X\n", idx,
+ l2fhdr->l2_fhdr_status, l2fhdr->l2_fhdr_pkt_len,
+ l2fhdr->l2_fhdr_vlan_tag, l2fhdr->l2_fhdr_ip_xsum,
+ l2fhdr->l2_fhdr_tcp_udp_xsum);
+}
+
+
+/*
+ * This routine prints the TX chain.
+ */
+static void
+bce_dump_tx_chain(struct bce_softc *sc, int tx_prod, int count)
+{
+ struct tx_bd *txbd;
+
+ /* First some info about the tx_bd chain structure. */
+ BCE_PRINTF(sc,
+ "----------------------------"
+ " tx_bd chain "
+ "----------------------------\n");
+
+ BCE_PRINTF(sc, "page size = 0x%08X, tx chain pages = 0x%08X\n",
+ (u32) BCM_PAGE_SIZE, (u32) TX_PAGES);
+
+ BCE_PRINTF(sc, "tx_bd per page = 0x%08X, usable tx_bd per page = 0x%08X\n",
+ (u32) TOTAL_TX_BD_PER_PAGE, (u32) USABLE_TX_BD_PER_PAGE);
+
+ BCE_PRINTF(sc, "total tx_bd = 0x%08X\n", (u32) TOTAL_TX_BD);
+
+ BCE_PRINTF(sc, ""
+ "-----------------------------"
+ " tx_bd data "
+ "-----------------------------\n");
+
+ /* Now print out the tx_bd's themselves. */
+ for (int i = 0; i < count; i++) {
+ txbd = &sc->tx_bd_chain[TX_PAGE(tx_prod)][TX_IDX(tx_prod)];
+ bce_dump_txbd(sc, tx_prod, txbd);
+ tx_prod = TX_CHAIN_IDX(NEXT_TX_BD(tx_prod));
+ }
+
+ BCE_PRINTF(sc,
+ "-----------------------------"
+ "--------------"
+ "-----------------------------\n");
+}
+
+
+/*
+ * This routine prints the RX chain.
+ */
+static void
+bce_dump_rx_chain(struct bce_softc *sc, int rx_prod, int count)
+{
+ struct rx_bd *rxbd;
+
+ /* First some info about the tx_bd chain structure. */
+ BCE_PRINTF(sc,
+ "----------------------------"
+ " rx_bd chain "
+ "----------------------------\n");
+
+ BCE_PRINTF(sc, "----- RX_BD Chain -----\n");
+
+ BCE_PRINTF(sc, "page size = 0x%08X, rx chain pages = 0x%08X\n",
+ (u32) BCM_PAGE_SIZE, (u32) RX_PAGES);
+
+ BCE_PRINTF(sc, "rx_bd per page = 0x%08X, usable rx_bd per page = 0x%08X\n",
+ (u32) TOTAL_RX_BD_PER_PAGE, (u32) USABLE_RX_BD_PER_PAGE);
+
+ BCE_PRINTF(sc, "total rx_bd = 0x%08X\n", (u32) TOTAL_RX_BD);
+
+ BCE_PRINTF(sc,
+ "----------------------------"
+ " rx_bd data "
+ "----------------------------\n");
+
+ /* Now print out the rx_bd's themselves. */
+ for (int i = 0; i < count; i++) {
+ rxbd = &sc->rx_bd_chain[RX_PAGE(rx_prod)][RX_IDX(rx_prod)];
+ bce_dump_rxbd(sc, rx_prod, rxbd);
+ rx_prod = RX_CHAIN_IDX(NEXT_RX_BD(rx_prod));
+ }
+
+ BCE_PRINTF(sc,
+ "----------------------------"
+ "--------------"
+ "----------------------------\n");
+}
+
+
+/*
+ * This routine prints the status block.
+ */
+static void
+bce_dump_status_block(struct bce_softc *sc)
+{
+ struct status_block *sblk;
+
+ sblk = sc->status_block;
+
+ BCE_PRINTF(sc, "----------------------------- Status Block "
+ "-----------------------------\n");
+
+ BCE_PRINTF(sc, "attn_bits = 0x%08X, attn_bits_ack = 0x%08X, index = 0x%04X\n",
+ sblk->status_attn_bits, sblk->status_attn_bits_ack,
+ sblk->status_idx);
+
+ BCE_PRINTF(sc, "rx_cons0 = 0x%08X, tx_cons0 = 0x%08X\n",
+ sblk->status_rx_quick_consumer_index0,
+ sblk->status_tx_quick_consumer_index0);
+
+ BCE_PRINTF(sc, "status_idx = 0x%04X\n", sblk->status_idx);
+
+ /* Theses indices are not used for normal L2 drivers. */
+ if (sblk->status_rx_quick_consumer_index1 ||
+ sblk->status_tx_quick_consumer_index1)
+ BCE_PRINTF(sc, "rx_cons1 = 0x%08X, tx_cons1 = 0x%08X\n",
+ sblk->status_rx_quick_consumer_index1,
+ sblk->status_tx_quick_consumer_index1);
+
+ if (sblk->status_rx_quick_consumer_index2 ||
+ sblk->status_tx_quick_consumer_index2)
+ BCE_PRINTF(sc, "rx_cons2 = 0x%08X, tx_cons2 = 0x%08X\n",
+ sblk->status_rx_quick_consumer_index2,
+ sblk->status_tx_quick_consumer_index2);
+
+ if (sblk->status_rx_quick_consumer_index3 ||
+ sblk->status_tx_quick_consumer_index3)
+ BCE_PRINTF(sc, "rx_cons3 = 0x%08X, tx_cons3 = 0x%08X\n",
+ sblk->status_rx_quick_consumer_index3,
+ sblk->status_tx_quick_consumer_index3);
+
+ if (sblk->status_rx_quick_consumer_index4 ||
+ sblk->status_rx_quick_consumer_index5)
+ BCE_PRINTF(sc, "rx_cons4 = 0x%08X, rx_cons5 = 0x%08X\n",
+ sblk->status_rx_quick_consumer_index4,
+ sblk->status_rx_quick_consumer_index5);
+
+ if (sblk->status_rx_quick_consumer_index6 ||
+ sblk->status_rx_quick_consumer_index7)
+ BCE_PRINTF(sc, "rx_cons6 = 0x%08X, rx_cons7 = 0x%08X\n",
+ sblk->status_rx_quick_consumer_index6,
+ sblk->status_rx_quick_consumer_index7);
+
+ if (sblk->status_rx_quick_consumer_index8 ||
+ sblk->status_rx_quick_consumer_index9)
+ BCE_PRINTF(sc, "rx_cons8 = 0x%08X, rx_cons9 = 0x%08X\n",
+ sblk->status_rx_quick_consumer_index8,
+ sblk->status_rx_quick_consumer_index9);
+
+ if (sblk->status_rx_quick_consumer_index10 ||
+ sblk->status_rx_quick_consumer_index11)
+ BCE_PRINTF(sc, "rx_cons10 = 0x%08X, rx_cons11 = 0x%08X\n",
+ sblk->status_rx_quick_consumer_index10,
+ sblk->status_rx_quick_consumer_index11);
+
+ if (sblk->status_rx_quick_consumer_index12 ||
+ sblk->status_rx_quick_consumer_index13)
+ BCE_PRINTF(sc, "rx_cons12 = 0x%08X, rx_cons13 = 0x%08X\n",
+ sblk->status_rx_quick_consumer_index12,
+ sblk->status_rx_quick_consumer_index13);
+
+ if (sblk->status_rx_quick_consumer_index14 ||
+ sblk->status_rx_quick_consumer_index15)
+ BCE_PRINTF(sc, "rx_cons14 = 0x%08X, rx_cons15 = 0x%08X\n",
+ sblk->status_rx_quick_consumer_index14,
+ sblk->status_rx_quick_consumer_index15);
+
+ if (sblk->status_completion_producer_index ||
+ sblk->status_cmd_consumer_index)
+ BCE_PRINTF(sc, "com_prod = 0x%08X, cmd_cons = 0x%08X\n",
+ sblk->status_completion_producer_index,
+ sblk->status_cmd_consumer_index);
+
+ BCE_PRINTF(sc, "-------------------------------------------"
+ "-----------------------------\n");
+}
+
+
+/*
+ * This routine prints the statistics block.
+ */
+static void
+bce_dump_stats_block(struct bce_softc *sc)
+{
+ struct statistics_block *sblk;
+
+ sblk = sc->stats_block;
+
+ BCE_PRINTF(sc, ""
+ "-----------------------------"
+ " Stats Block "
+ "-----------------------------\n");
+
+ BCE_PRINTF(sc, "IfHcInOctets = 0x%08X:%08X, "
+ "IfHcInBadOctets = 0x%08X:%08X\n",
+ sblk->stat_IfHCInOctets_hi, sblk->stat_IfHCInOctets_lo,
+ sblk->stat_IfHCInBadOctets_hi, sblk->stat_IfHCInBadOctets_lo);
+
+ BCE_PRINTF(sc, "IfHcOutOctets = 0x%08X:%08X, "
+ "IfHcOutBadOctets = 0x%08X:%08X\n",
+ sblk->stat_IfHCOutOctets_hi, sblk->stat_IfHCOutOctets_lo,
+ sblk->stat_IfHCOutBadOctets_hi, sblk->stat_IfHCOutBadOctets_lo);
+
+ BCE_PRINTF(sc, "IfHcInUcastPkts = 0x%08X:%08X, "
+ "IfHcInMulticastPkts = 0x%08X:%08X\n",
+ sblk->stat_IfHCInUcastPkts_hi, sblk->stat_IfHCInUcastPkts_lo,
+ sblk->stat_IfHCInMulticastPkts_hi, sblk->stat_IfHCInMulticastPkts_lo);
+
+ BCE_PRINTF(sc, "IfHcInBroadcastPkts = 0x%08X:%08X, "
+ "IfHcOutUcastPkts = 0x%08X:%08X\n",
+ sblk->stat_IfHCInBroadcastPkts_hi, sblk->stat_IfHCInBroadcastPkts_lo,
+ sblk->stat_IfHCOutUcastPkts_hi, sblk->stat_IfHCOutUcastPkts_lo);
+
+ BCE_PRINTF(sc, "IfHcOutMulticastPkts = 0x%08X:%08X, IfHcOutBroadcastPkts = 0x%08X:%08X\n",
+ sblk->stat_IfHCOutMulticastPkts_hi, sblk->stat_IfHCOutMulticastPkts_lo,
+ sblk->stat_IfHCOutBroadcastPkts_hi, sblk->stat_IfHCOutBroadcastPkts_lo);
+
+ if (sblk->stat_emac_tx_stat_dot3statsinternalmactransmiterrors)
+ BCE_PRINTF(sc, "0x%08X : "
+ "emac_tx_stat_dot3statsinternalmactransmiterrors\n",
+ sblk->stat_emac_tx_stat_dot3statsinternalmactransmiterrors);
+
+ if (sblk->stat_Dot3StatsCarrierSenseErrors)
+ BCE_PRINTF(sc, "0x%08X : Dot3StatsCarrierSenseErrors\n",
+ sblk->stat_Dot3StatsCarrierSenseErrors);
+
+ if (sblk->stat_Dot3StatsFCSErrors)
+ BCE_PRINTF(sc, "0x%08X : Dot3StatsFCSErrors\n",
+ sblk->stat_Dot3StatsFCSErrors);
+
+ if (sblk->stat_Dot3StatsAlignmentErrors)
+ BCE_PRINTF(sc, "0x%08X : Dot3StatsAlignmentErrors\n",
+ sblk->stat_Dot3StatsAlignmentErrors);
+
+ if (sblk->stat_Dot3StatsSingleCollisionFrames)
+ BCE_PRINTF(sc, "0x%08X : Dot3StatsSingleCollisionFrames\n",
+ sblk->stat_Dot3StatsSingleCollisionFrames);
+
+ if (sblk->stat_Dot3StatsMultipleCollisionFrames)
+ BCE_PRINTF(sc, "0x%08X : Dot3StatsMultipleCollisionFrames\n",
+ sblk->stat_Dot3StatsMultipleCollisionFrames);
+
+ if (sblk->stat_Dot3StatsDeferredTransmissions)
+ BCE_PRINTF(sc, "0x%08X : Dot3StatsDeferredTransmissions\n",
+ sblk->stat_Dot3StatsDeferredTransmissions);
+
+ if (sblk->stat_Dot3StatsExcessiveCollisions)
+ BCE_PRINTF(sc, "0x%08X : Dot3StatsExcessiveCollisions\n",
+ sblk->stat_Dot3StatsExcessiveCollisions);
+
+ if (sblk->stat_Dot3StatsLateCollisions)
+ BCE_PRINTF(sc, "0x%08X : Dot3StatsLateCollisions\n",
+ sblk->stat_Dot3StatsLateCollisions);
+
+ if (sblk->stat_EtherStatsCollisions)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsCollisions\n",
+ sblk->stat_EtherStatsCollisions);
+
+ if (sblk->stat_EtherStatsFragments)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsFragments\n",
+ sblk->stat_EtherStatsFragments);
+
+ if (sblk->stat_EtherStatsJabbers)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsJabbers\n",
+ sblk->stat_EtherStatsJabbers);
+
+ if (sblk->stat_EtherStatsUndersizePkts)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsUndersizePkts\n",
+ sblk->stat_EtherStatsUndersizePkts);
+
+ if (sblk->stat_EtherStatsOverrsizePkts)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsOverrsizePkts\n",
+ sblk->stat_EtherStatsOverrsizePkts);
+
+ if (sblk->stat_EtherStatsPktsRx64Octets)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsPktsRx64Octets\n",
+ sblk->stat_EtherStatsPktsRx64Octets);
+
+ if (sblk->stat_EtherStatsPktsRx65Octetsto127Octets)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsPktsRx65Octetsto127Octets\n",
+ sblk->stat_EtherStatsPktsRx65Octetsto127Octets);
+
+ if (sblk->stat_EtherStatsPktsRx128Octetsto255Octets)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsPktsRx128Octetsto255Octets\n",
+ sblk->stat_EtherStatsPktsRx128Octetsto255Octets);
+
+ if (sblk->stat_EtherStatsPktsRx256Octetsto511Octets)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsPktsRx256Octetsto511Octets\n",
+ sblk->stat_EtherStatsPktsRx256Octetsto511Octets);
+
+ if (sblk->stat_EtherStatsPktsRx512Octetsto1023Octets)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsPktsRx512Octetsto1023Octets\n",
+ sblk->stat_EtherStatsPktsRx512Octetsto1023Octets);
+
+ if (sblk->stat_EtherStatsPktsRx1024Octetsto1522Octets)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsPktsRx1024Octetsto1522Octets\n",
+ sblk->stat_EtherStatsPktsRx1024Octetsto1522Octets);
+
+ if (sblk->stat_EtherStatsPktsRx1523Octetsto9022Octets)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsPktsRx1523Octetsto9022Octets\n",
+ sblk->stat_EtherStatsPktsRx1523Octetsto9022Octets);
+
+ if (sblk->stat_EtherStatsPktsTx64Octets)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsPktsTx64Octets\n",
+ sblk->stat_EtherStatsPktsTx64Octets);
+
+ if (sblk->stat_EtherStatsPktsTx65Octetsto127Octets)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsPktsTx65Octetsto127Octets\n",
+ sblk->stat_EtherStatsPktsTx65Octetsto127Octets);
+
+ if (sblk->stat_EtherStatsPktsTx128Octetsto255Octets)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsPktsTx128Octetsto255Octets\n",
+ sblk->stat_EtherStatsPktsTx128Octetsto255Octets);
+
+ if (sblk->stat_EtherStatsPktsTx256Octetsto511Octets)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsPktsTx256Octetsto511Octets\n",
+ sblk->stat_EtherStatsPktsTx256Octetsto511Octets);
+
+ if (sblk->stat_EtherStatsPktsTx512Octetsto1023Octets)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsPktsTx512Octetsto1023Octets\n",
+ sblk->stat_EtherStatsPktsTx512Octetsto1023Octets);
+
+ if (sblk->stat_EtherStatsPktsTx1024Octetsto1522Octets)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsPktsTx1024Octetsto1522Octets\n",
+ sblk->stat_EtherStatsPktsTx1024Octetsto1522Octets);
+
+ if (sblk->stat_EtherStatsPktsTx1523Octetsto9022Octets)
+ BCE_PRINTF(sc, "0x%08X : EtherStatsPktsTx1523Octetsto9022Octets\n",
+ sblk->stat_EtherStatsPktsTx1523Octetsto9022Octets);
+
+ if (sblk->stat_XonPauseFramesReceived)
+ BCE_PRINTF(sc, "0x%08X : XonPauseFramesReceived\n",
+ sblk->stat_XonPauseFramesReceived);
+
+ if (sblk->stat_XoffPauseFramesReceived)
+ BCE_PRINTF(sc, "0x%08X : XoffPauseFramesReceived\n",
+ sblk->stat_XoffPauseFramesReceived);
+
+ if (sblk->stat_OutXonSent)
+ BCE_PRINTF(sc, "0x%08X : OutXonSent\n",
+ sblk->stat_OutXonSent);
+
+ if (sblk->stat_OutXoffSent)
+ BCE_PRINTF(sc, "0x%08X : OutXoffSent\n",
+ sblk->stat_OutXoffSent);
+
+ if (sblk->stat_FlowControlDone)
+ BCE_PRINTF(sc, "0x%08X : FlowControlDone\n",
+ sblk->stat_FlowControlDone);
+
+ if (sblk->stat_MacControlFramesReceived)
+ BCE_PRINTF(sc, "0x%08X : MacControlFramesReceived\n",
+ sblk->stat_MacControlFramesReceived);
+
+ if (sblk->stat_XoffStateEntered)
+ BCE_PRINTF(sc, "0x%08X : XoffStateEntered\n",
+ sblk->stat_XoffStateEntered);
+
+ if (sblk->stat_IfInFramesL2FilterDiscards)
+ BCE_PRINTF(sc, "0x%08X : IfInFramesL2FilterDiscards\n",
+ sblk->stat_IfInFramesL2FilterDiscards);
+
+ if (sblk->stat_IfInRuleCheckerDiscards)
+ BCE_PRINTF(sc, "0x%08X : IfInRuleCheckerDiscards\n",
+ sblk->stat_IfInRuleCheckerDiscards);
+
+ if (sblk->stat_IfInFTQDiscards)
+ BCE_PRINTF(sc, "0x%08X : IfInFTQDiscards\n",
+ sblk->stat_IfInFTQDiscards);
+
+ if (sblk->stat_IfInMBUFDiscards)
+ BCE_PRINTF(sc, "0x%08X : IfInMBUFDiscards\n",
+ sblk->stat_IfInMBUFDiscards);
+
+ if (sblk->stat_IfInRuleCheckerP4Hit)
+ BCE_PRINTF(sc, "0x%08X : IfInRuleCheckerP4Hit\n",
+ sblk->stat_IfInRuleCheckerP4Hit);
+
+ if (sblk->stat_CatchupInRuleCheckerDiscards)
+ BCE_PRINTF(sc, "0x%08X : CatchupInRuleCheckerDiscards\n",
+ sblk->stat_CatchupInRuleCheckerDiscards);
+
+ if (sblk->stat_CatchupInFTQDiscards)
+ BCE_PRINTF(sc, "0x%08X : CatchupInFTQDiscards\n",
+ sblk->stat_CatchupInFTQDiscards);
+
+ if (sblk->stat_CatchupInMBUFDiscards)
+ BCE_PRINTF(sc, "0x%08X : CatchupInMBUFDiscards\n",
+ sblk->stat_CatchupInMBUFDiscards);
+
+ if (sblk->stat_CatchupInRuleCheckerP4Hit)
+ BCE_PRINTF(sc, "0x%08X : CatchupInRuleCheckerP4Hit\n",
+ sblk->stat_CatchupInRuleCheckerP4Hit);
+
+ BCE_PRINTF(sc,
+ "-----------------------------"
+ "--------------"
+ "-----------------------------\n");
+}
+
+
+static void
+bce_dump_driver_state(struct bce_softc *sc)
+{
+ u32 val_hi, val_lo;
+
+ BCE_PRINTF(sc,
+ "-----------------------------"
+ " Driver State "
+ "-----------------------------\n");
+
+ val_hi = BCE_ADDR_HI(sc);
+ val_lo = BCE_ADDR_LO(sc);
+ BCE_PRINTF(sc, "0x%08X:%08X - (sc) driver softc structure virtual address\n",
+ val_hi, val_lo);
+
+ val_hi = BCE_ADDR_HI(sc->bce_vhandle);
+ val_lo = BCE_ADDR_LO(sc->bce_vhandle);
+ BCE_PRINTF(sc, "0x%08X:%08X - (sc->bce_vhandle) PCI BAR virtual address\n",
+ val_hi, val_lo);
+
+ val_hi = BCE_ADDR_HI(sc->status_block);
+ val_lo = BCE_ADDR_LO(sc->status_block);
+ BCE_PRINTF(sc, "0x%08X:%08X - (sc->status_block) status block virtual address\n",
+ val_hi, val_lo);
+
+ val_hi = BCE_ADDR_HI(sc->stats_block);
+ val_lo = BCE_ADDR_LO(sc->stats_block);
+ BCE_PRINTF(sc, "0x%08X:%08X - (sc->stats_block) statistics block virtual address\n",
+ val_hi, val_lo);
+
+ val_hi = BCE_ADDR_HI(sc->tx_bd_chain);
+ val_lo = BCE_ADDR_LO(sc->tx_bd_chain);
+ BCE_PRINTF(sc,
+ "0x%08X:%08X - (sc->tx_bd_chain) tx_bd chain virtual adddress\n",
+ val_hi, val_lo);
+
+ val_hi = BCE_ADDR_HI(sc->rx_bd_chain);
+ val_lo = BCE_ADDR_LO(sc->rx_bd_chain);
+ BCE_PRINTF(sc,
+ "0x%08X:%08X - (sc->rx_bd_chain) rx_bd chain virtual address\n",
+ val_hi, val_lo);
+
+ val_hi = BCE_ADDR_HI(sc->tx_mbuf_ptr);
+ val_lo = BCE_ADDR_LO(sc->tx_mbuf_ptr);
+ BCE_PRINTF(sc,
+ "0x%08X:%08X - (sc->tx_mbuf_ptr) tx mbuf chain virtual address\n",
+ val_hi, val_lo);
+
+ val_hi = BCE_ADDR_HI(sc->rx_mbuf_ptr);
+ val_lo = BCE_ADDR_LO(sc->rx_mbuf_ptr);
+ BCE_PRINTF(sc,
+ "0x%08X:%08X - (sc->rx_mbuf_ptr) rx mbuf chain virtual address\n",
+ val_hi, val_lo);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->interrupts_generated) h/w intrs\n",
+ sc->interrupts_generated);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->rx_interrupts) rx interrupts handled\n",
+ sc->rx_interrupts);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->tx_interrupts) tx interrupts handled\n",
+ sc->tx_interrupts);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->last_status_idx) status block index\n",
+ sc->last_status_idx);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->tx_prod) tx producer index\n",
+ sc->tx_prod);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->tx_cons) tx consumer index\n",
+ sc->tx_cons);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->tx_prod_bseq) tx producer bseq index\n",
+ sc->tx_prod_bseq);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->rx_prod) rx producer index\n",
+ sc->rx_prod);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->rx_cons) rx consumer index\n",
+ sc->rx_cons);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->rx_prod_bseq) rx producer bseq index\n",
+ sc->rx_prod_bseq);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->rx_mbuf_alloc) rx mbufs allocated\n",
+ sc->rx_mbuf_alloc);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->free_rx_bd) free rx_bd's\n",
+ sc->free_rx_bd);
+
+ BCE_PRINTF(sc, "0x%08X/%08X - (sc->rx_low_watermark) rx low watermark\n",
+ sc->rx_low_watermark, (u32) USABLE_RX_BD);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->txmbuf_alloc) tx mbufs allocated\n",
+ sc->tx_mbuf_alloc);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->rx_mbuf_alloc) rx mbufs allocated\n",
+ sc->rx_mbuf_alloc);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->used_tx_bd) used tx_bd's\n",
+ sc->used_tx_bd);
+
+ BCE_PRINTF(sc, "0x%08X/%08X - (sc->tx_hi_watermark) tx hi watermark\n",
+ sc->tx_hi_watermark, (u32) USABLE_TX_BD);
+
+ BCE_PRINTF(sc, " 0x%08X - (sc->mbuf_alloc_failed) failed mbuf alloc\n",
+ sc->mbuf_alloc_failed);
+
+ BCE_PRINTF(sc,
+ "-----------------------------"
+ "--------------"
+ "-----------------------------\n");
+}
+
+
+static void
+bce_dump_hw_state(struct bce_softc *sc)
+{
+ u32 val1;
+
+ BCE_PRINTF(sc,
+ "----------------------------"
+ " Hardware State "
+ "----------------------------\n");
+
+ BCE_PRINTF(sc, "0x%08X : bootcode version\n", sc->bce_fw_ver);
+
+ val1 = REG_RD(sc, BCE_MISC_ENABLE_STATUS_BITS);
+ BCE_PRINTF(sc, "0x%08X : (0x%04X) misc_enable_status_bits\n",
+ val1, BCE_MISC_ENABLE_STATUS_BITS);
+
+ val1 = REG_RD(sc, BCE_DMA_STATUS);
+ BCE_PRINTF(sc, "0x%08X : (0x%04X) dma_status\n", val1, BCE_DMA_STATUS);
+
+ val1 = REG_RD(sc, BCE_CTX_STATUS);
+ BCE_PRINTF(sc, "0x%08X : (0x%04X) ctx_status\n", val1, BCE_CTX_STATUS);
+
+ val1 = REG_RD(sc, BCE_EMAC_STATUS);
+ BCE_PRINTF(sc, "0x%08X : (0x%04X) emac_status\n", val1, BCE_EMAC_STATUS);
+
+ val1 = REG_RD(sc, BCE_RPM_STATUS);
+ BCE_PRINTF(sc, "0x%08X : (0x%04X) rpm_status\n", val1, BCE_RPM_STATUS);
+
+ val1 = REG_RD(sc, BCE_TBDR_STATUS);
+ BCE_PRINTF(sc, "0x%08X : (0x%04X) tbdr_status\n", val1, BCE_TBDR_STATUS);
+
+ val1 = REG_RD(sc, BCE_TDMA_STATUS);
+ BCE_PRINTF(sc, "0x%08X : (0x%04X) tdma_status\n", val1, BCE_TDMA_STATUS);
+
+ val1 = REG_RD(sc, BCE_HC_STATUS);
+ BCE_PRINTF(sc, "0x%08X : (0x%04X) hc_status\n", val1, BCE_HC_STATUS);
+
+ BCE_PRINTF(sc,
+ "----------------------------"
+ "----------------"
+ "----------------------------\n");
+
+ BCE_PRINTF(sc,
+ "----------------------------"
+ " Register Dump "
+ "----------------------------\n");
+
+ for (int i = 0x400; i < 0x8000; i += 0x10)
+ BCE_PRINTF(sc, "0x%04X: 0x%08X 0x%08X 0x%08X 0x%08X\n",
+ i, REG_RD(sc, i), REG_RD(sc, i + 0x4),
+ REG_RD(sc, i + 0x8), REG_RD(sc, i + 0xC));
+
+ BCE_PRINTF(sc,
+ "----------------------------"
+ "----------------"
+ "----------------------------\n");
+}
+
+
+static void
+bce_breakpoint(struct bce_softc *sc)
+{
+
+ /* Unreachable code to shut the compiler up about unused functions. */
+ if (0) {
+ bce_dump_txbd(sc, 0, NULL);
+ bce_dump_rxbd(sc, 0, NULL);
+ bce_dump_tx_mbuf_chain(sc, 0, USABLE_TX_BD);
+ bce_dump_rx_mbuf_chain(sc, 0, USABLE_RX_BD);
+ bce_dump_l2fhdr(sc, 0, NULL);
+ bce_dump_tx_chain(sc, 0, USABLE_TX_BD);
+ bce_dump_rx_chain(sc, 0, USABLE_RX_BD);
+ bce_dump_status_block(sc);
+ bce_dump_stats_block(sc);
+ bce_dump_driver_state(sc);
+ bce_dump_hw_state(sc);
+ }
+
+ bce_dump_driver_state(sc);
+ /* Print the important status block fields. */
+ bce_dump_status_block(sc);
+
+ /* Call the debugger. */
+ breakpoint();
+
+ return;
+}
+#endif
diff --git a/sys/dev/bce/if_bcefw.h b/sys/dev/bce/if_bcefw.h
new file mode 100644
index 0000000..b7c38ba
--- /dev/null
+++ b/sys/dev/bce/if_bcefw.h
@@ -0,0 +1,3508 @@
+/*-
+ * Copyright (c) 2006 Broadcom Corporation
+ * David Christensen <davidch@broadcom.com>. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Broadcom Corporation nor the name of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written consent.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * This file contains firmware data derived from proprietary unpublished
+ * source code, Copyright (c) 2004, 2005 Broadcom Corporation.
+ *
+ * Permission is hereby granted for the distribution of this firmware data
+ * in hexadecimal or equivalent format, provided this copyright notice is
+ * accompanying it.
+ */
+
+static int bce_COM_b06FwReleaseMajor = 0x1;
+static int bce_COM_b06FwReleaseMinor = 0x0;
+static int bce_COM_b06FwReleaseFix = 0x0;
+static u32 bce_COM_b06FwStartAddr = 0x080008b4;
+static u32 bce_COM_b06FwTextAddr = 0x08000000;
+static int bce_COM_b06FwTextLen = 0x57bc;
+static u32 bce_COM_b06FwDataAddr = 0x08005840;
+static int bce_COM_b06FwDataLen = 0x0;
+static u32 bce_COM_b06FwRodataAddr = 0x080057c0;
+static int bce_COM_b06FwRodataLen = 0x58;
+static u32 bce_COM_b06FwBssAddr = 0x08005860;
+static int bce_COM_b06FwBssLen = 0x88;
+static u32 bce_COM_b06FwSbssAddr = 0x08005840;
+static int bce_COM_b06FwSbssLen = 0x1c;
+static u32 bce_COM_b06FwText[(0x57bc/4) + 1] = {
+ 0x0a00022d, 0x00000000, 0x00000000, 0x0000000d, 0x636f6d20, 0x322e352e,
+ 0x38000000, 0x02050802, 0x00000000, 0x00000003, 0x00000014, 0x00000032,
+ 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000010, 0x000003e8, 0x0000ea60, 0x00000001, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000002, 0x00000020, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x10000003, 0x00000000, 0x0000000d, 0x0000000d, 0x3c020800, 0x24425840,
+ 0x3c030800, 0x246358e8, 0xac400000, 0x0043202b, 0x1480fffd, 0x24420004,
+ 0x3c1d0800, 0x37bd7ffc, 0x03a0f021, 0x3c100800, 0x261008b4, 0x3c1c0800,
+ 0x279c5840, 0x0e0002f7, 0x00000000, 0x0000000d, 0x27bdffe8, 0x3c1a8000,
+ 0x3c020008, 0x0342d825, 0x3c036010, 0xafbf0010, 0x8c655000, 0x3c020800,
+ 0x24470f30, 0x3c040800, 0x24865860, 0x2402ff7f, 0x00a22824, 0x34a5380c,
+ 0xac655000, 0x00002821, 0x24020037, 0x24030c80, 0xaf420008, 0xaf430024,
+ 0xacc70000, 0x24a50001, 0x2ca20016, 0x1440fffc, 0x24c60004, 0x24845860,
+ 0x3c020800, 0x24420f3c, 0x3c030800, 0x24630e2c, 0xac820004, 0x3c020800,
+ 0x24420a2c, 0x3c050800, 0x24a51268, 0xac82000c, 0x3c020800, 0x244243dc,
+ 0xac830008, 0x3c030800, 0x24633698, 0xac820014, 0x3c020800, 0x24423c24,
+ 0xac830018, 0xac83001c, 0x3c030800, 0x24630f44, 0xac820024, 0x3c020800,
+ 0x244243ac, 0xac83002c, 0x3c030800, 0x246343cc, 0xac820030, 0x3c020800,
+ 0x244242f0, 0xac830034, 0x3c030800, 0x24633d78, 0xac82003c, 0x3c020800,
+ 0x24420fd4, 0xac850010, 0xac850020, 0xac830040, 0x0e0010b7, 0xac820050,
+ 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x27bdffe0, 0xafb00010, 0x27500100,
+ 0xafbf0018, 0xafb10014, 0x9203000b, 0x24020003, 0x1462005b, 0x96110008,
+ 0x32220001, 0x10400009, 0x27430080, 0x8e020000, 0x96040014, 0x000211c2,
+ 0x00021040, 0x00621821, 0xa4640000, 0x0a0002d0, 0x3c020800, 0x3c020800,
+ 0x8c430020, 0x1060002a, 0x3c030800, 0x0e00148e, 0x00000000, 0x97420108,
+ 0x8f850018, 0x9743010c, 0x3042003e, 0x00021400, 0x00621825, 0xaca30000,
+ 0x8f840018, 0x8f420100, 0xac820004, 0x97430116, 0x9742010e, 0x8f840018,
+ 0x00031c00, 0x00431025, 0xac820008, 0x97430110, 0x97440112, 0x8f850018,
+ 0x00031c00, 0x00832025, 0xaca4000c, 0x97420114, 0x8f840018, 0x3042ffff,
+ 0xac820010, 0x8f830018, 0xac600014, 0x8f820018, 0x3c030800, 0xac400018,
+ 0x946258ce, 0x8f840018, 0x3c032000, 0x00431025, 0xac82001c, 0x0e0014cc,
+ 0x24040001, 0x3c030800, 0x8c620040, 0x24420001, 0xac620040, 0x3c020800,
+ 0x8c430044, 0x32240004, 0x24630001, 0x10800017, 0xac430044, 0x8f4202b8,
+ 0x04430007, 0x8e020020, 0x3c040800, 0x8c830060, 0x24020001, 0x24630001,
+ 0x0a0002f2, 0xac830060, 0x3c060800, 0x8cc4005c, 0xaf420280, 0x96030016,
+ 0x00001021, 0xa7430284, 0x8e050004, 0x24840001, 0x3c031000, 0xaf450288,
+ 0xaf4302b8, 0x0a0002f2, 0xacc4005c, 0x32220002, 0x0a0002f2, 0x0002102b,
+ 0x3c026000, 0xac400808, 0x0000000d, 0x00001021, 0x8fbf0018, 0x8fb10014,
+ 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffc8, 0xafbf0034, 0xafbe0030,
+ 0xafb7002c, 0xafb60028, 0xafb50024, 0xafb40020, 0xafb3001c, 0xafb20018,
+ 0xafb10014, 0x0e000244, 0xafb00010, 0x3c170800, 0x3c160800, 0x24110020,
+ 0x24150030, 0x2794000c, 0x27930008, 0x3c124000, 0x3c1e0800, 0x8f820004,
+ 0x3c040800, 0x8c830020, 0x10430005, 0x8ee200a4, 0xaf830004, 0x0e001593,
+ 0x00000000, 0x8ee200a4, 0x8ec300a0, 0x10430004, 0x26c400a0, 0x94820002,
+ 0xa742009e, 0xaee300a4, 0x8f500000, 0x32020007, 0x1040ffee, 0x32020001,
+ 0x1040002c, 0x32020002, 0x8f420100, 0xaf420020, 0x8f430104, 0xaf4300a8,
+ 0x9342010b, 0x93630000, 0x306300ff, 0x10710005, 0x304400ff, 0x10750006,
+ 0x2c820016, 0x0a000333, 0x00000000, 0xaf940000, 0x0a000334, 0x2c820016,
+ 0xaf930000, 0x0a000334, 0x00000000, 0xaf800000, 0x14400005, 0x00041880,
+ 0x0e0003cc, 0x00000000, 0x0a000340, 0x00000000, 0x3c020800, 0x24425860,
+ 0x00621821, 0x8c620000, 0x0040f809, 0x00000000, 0x10400005, 0x3c030800,
+ 0x8f420104, 0x3c016020, 0xac220014, 0x3c030800, 0x8c620034, 0xaf520138,
+ 0x24420001, 0xac620034, 0x32020002, 0x1040001a, 0x32020004, 0x8f420140,
+ 0xaf420020, 0x93630000, 0x306300ff, 0x10710005, 0x00000000, 0x10750006,
+ 0x00000000, 0x0a00035d, 0x00000000, 0xaf940000, 0x0a00035e, 0x00000000,
+ 0xaf930000, 0x0a00035e, 0x00000000, 0xaf800000, 0x0e000c7b, 0x00000000,
+ 0x3c040800, 0x8c820038, 0xaf520178, 0x24420001, 0xac820038, 0x32020004,
+ 0x1040ffa4, 0x00000000, 0x8f420180, 0xaf420020, 0x93630000, 0x306300ff,
+ 0x10710005, 0x00000000, 0x10750006, 0x00000000, 0x0a000378, 0x00000000,
+ 0xaf940000, 0x0a000379, 0x00000000, 0xaf930000, 0x0a000379, 0x00000000,
+ 0xaf800000, 0x8f430180, 0x24020f00, 0x14620005, 0x00000000, 0x8f420188,
+ 0xa742009c, 0x0a000387, 0x8fc2003c, 0x93620000, 0x14510004, 0x8fc2003c,
+ 0x0e000bad, 0x00000000, 0x8fc2003c, 0xaf5201b8, 0x24420001, 0x0a00030b,
+ 0xafc2003c, 0x27bdffe8, 0xafbf0010, 0x97420108, 0x24033000, 0x30447000,
+ 0x10830016, 0x28823001, 0x10400007, 0x24024000, 0x1080000b, 0x24022000,
+ 0x1082000c, 0x00000000, 0x0a0003b3, 0x00000000, 0x10820010, 0x24025000,
+ 0x10820012, 0x00000000, 0x0a0003b3, 0x00000000, 0x0000000d, 0x0a0003b5,
+ 0x00001021, 0x0e000442, 0x00000000, 0x0a0003b6, 0x8fbf0010, 0x0e00041a,
+ 0x00000000, 0x0a0003b5, 0x00001021, 0x0e000669, 0x00000000, 0x0a0003b5,
+ 0x00001021, 0x0e001467, 0x00000000, 0x0a0003b5, 0x00001021, 0x0000000d,
+ 0x00001021, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x93620000, 0x24030020,
+ 0x304400ff, 0x10830005, 0x24020030, 0x10820007, 0x00000000, 0x0a0003c9,
+ 0x00000000, 0x2782000c, 0xaf820000, 0x03e00008, 0x00000000, 0x27820008,
+ 0xaf820000, 0x03e00008, 0x00000000, 0xaf800000, 0x03e00008, 0x00000000,
+ 0x0000000d, 0x03e00008, 0x00001021, 0x03e00008, 0x00001021, 0x27440100,
+ 0x94830008, 0x30620004, 0x10400017, 0x30620002, 0x8f4202b8, 0x04430007,
+ 0x8c820020, 0x3c040800, 0x8c830060, 0x24020001, 0x24630001, 0x03e00008,
+ 0xac830060, 0xaf420280, 0x94830016, 0x3c060800, 0xa7430284, 0x8c850004,
+ 0x8cc4005c, 0x00001021, 0x3c031000, 0x24840001, 0xaf450288, 0xaf4302b8,
+ 0x03e00008, 0xacc4005c, 0x14400003, 0x3c040800, 0x03e00008, 0x00001021,
+ 0x8c830084, 0x24020001, 0x24630001, 0x03e00008, 0xac830084, 0x27450100,
+ 0x3c040800, 0x8c820088, 0x94a3000c, 0x24420001, 0x007a1821, 0xac820088,
+ 0x8ca40018, 0x90664000, 0xaf440038, 0x8ca2001c, 0x2403fff8, 0x00063600,
+ 0x00431024, 0x34420004, 0x3c030005, 0xaf42003c, 0xaf430030, 0x00000000,
+ 0x00000000, 0x00000000, 0xaf460404, 0x00000000, 0x00000000, 0x00000000,
+ 0x3c020006, 0x34420001, 0xaf420030, 0x00000000, 0x00000000, 0x00000000,
+ 0x8f420000, 0x30420010, 0x1040fffd, 0x00001021, 0x03e00008, 0x00000000,
+ 0x3c020800, 0x8c430020, 0x27bdffe8, 0xafb00010, 0x27500100, 0x1060001e,
+ 0xafbf0014, 0x0e00148e, 0x00000000, 0x8f830018, 0x8e020018, 0xac620000,
+ 0x8f840018, 0x9602000c, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018,
+ 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018, 0xac400014, 0x8f840018,
+ 0x3c026000, 0x8c434448, 0xac830018, 0x96020008, 0x3c030800, 0x946458ce,
+ 0x8f850018, 0x00021400, 0x00441025, 0x24040001, 0x0e0014cc, 0xaca2001c,
+ 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x27bdffe8, 0xafb00010,
+ 0x27500100, 0xafbf0014, 0x92020009, 0x14400003, 0x3c020800, 0x0a00046c,
+ 0x24020001, 0x8c430020, 0x1060001f, 0x00001021, 0x0e00148e, 0x00000000,
+ 0x8f830018, 0x8e020018, 0xac620000, 0x8f840018, 0x9602000c, 0xac820004,
+ 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+ 0x8f820018, 0xac400014, 0x8f840018, 0x3c026000, 0x8c434448, 0xac830018,
+ 0x96020008, 0x3c030800, 0x946458ce, 0x8f850018, 0x00021400, 0x00441025,
+ 0x24040001, 0x0e0014cc, 0xaca2001c, 0x00001021, 0x8fbf0014, 0x8fb00010,
+ 0x03e00008, 0x27bd0018, 0x3c0b0800, 0x8d6808b0, 0x3c070800, 0x24e700b0,
+ 0x00084900, 0x01271821, 0xac640000, 0x93620005, 0x97660008, 0x00e95021,
+ 0x93630023, 0x9364003f, 0x25080001, 0x00021600, 0x00063400, 0x00461025,
+ 0x00031a00, 0x00431025, 0x00822025, 0xad440004, 0x9362007e, 0x9366007f,
+ 0x8f630178, 0x9364007a, 0x00021600, 0x00063400, 0x00461025, 0x00031a00,
+ 0x00431025, 0x00822025, 0xad440008, 0x93620080, 0x9363007d, 0x3108007f,
+ 0x01403821, 0xad6808b0, 0x00021600, 0x00031c00, 0x00431025, 0x00451025,
+ 0x03e00008, 0xace2000c, 0x27bdffb8, 0xafb3002c, 0x00009821, 0xafbe0040,
+ 0x0000f021, 0xafb50034, 0x27550100, 0xafbf0044, 0xafb7003c, 0xafb60038,
+ 0xafb40030, 0xafb20028, 0xafb10024, 0xafb00020, 0xafa00010, 0xafa00014,
+ 0x96a20008, 0x8f540100, 0x8eb10018, 0x30420001, 0x10400037, 0x02a0b821,
+ 0x8f630054, 0x2622ffff, 0x00431023, 0x18400006, 0x00000000, 0x0000000d,
+ 0x00000000, 0x2400015c, 0x0a0004e5, 0x00002021, 0x8f62004c, 0x02221023,
+ 0x18400028, 0x00002021, 0x93650120, 0x93640121, 0x3c030800, 0x8c62008c,
+ 0x308400ff, 0x24420001, 0x30a500ff, 0x00803821, 0x1485000b, 0xac62008c,
+ 0x3c040800, 0x8c830090, 0x24630001, 0xac830090, 0x93620122, 0x30420001,
+ 0x00021023, 0x30420005, 0x0a0004e5, 0x34440004, 0x27660100, 0x00041080,
+ 0x00c21021, 0x8c430000, 0x02231823, 0x04600004, 0x24820001, 0x30440007,
+ 0x1485fff9, 0x00041080, 0x10870007, 0x3c030800, 0xa3640121, 0x8c620094,
+ 0x24040005, 0x24420001, 0x0a0004e5, 0xac620094, 0x24040004, 0x00809821,
+ 0x9362003f, 0x304400ff, 0x38830016, 0x2c630001, 0x38820010, 0x2c420001,
+ 0x00621825, 0x1460000c, 0x24020001, 0x38830008, 0x2c630001, 0x38820014,
+ 0x2c420001, 0x00621825, 0x14600005, 0x24020001, 0x24020012, 0x14820002,
+ 0x00001021, 0x24020001, 0x10400009, 0x00000000, 0x8ea20020, 0x8f630040,
+ 0x0040b021, 0x00431023, 0x5c400010, 0x8f760040, 0x0a000511, 0x00000000,
+ 0x9343010b, 0x24020004, 0x1462000a, 0x8eb60020, 0x8f630040, 0x3c021000,
+ 0x00761823, 0x0043102a, 0x10400004, 0x00000000, 0x0000000d, 0x00000000,
+ 0x240002fa, 0x9343010b, 0x24020004, 0x5462000b, 0x96a20008, 0x24020001,
+ 0xafa20010, 0x96a20008, 0x24030001, 0xafa30018, 0x8eb2001c, 0x36730002,
+ 0x30420020, 0x0a000526, 0xafa20014, 0x36730080, 0x30420002, 0x10400003,
+ 0xafa00018, 0x0a000526, 0x8eb2001c, 0x8eb20014, 0x2402fffb, 0x02628024,
+ 0x1200002a, 0x3c030800, 0x8c620030, 0x02021024, 0x10400026, 0x3c020800,
+ 0x8c430020, 0x10600024, 0x32620004, 0x0e00148e, 0x00000000, 0x8f830018,
+ 0x8f420100, 0xac620000, 0x8f840018, 0x02401821, 0x32620002, 0xac900004,
+ 0x8f840018, 0x54400001, 0x02c01821, 0xac830008, 0x8f830018, 0x8ee20020,
+ 0xac62000c, 0x8f840018, 0x8f620040, 0xac820010, 0x8f830018, 0x8ee20018,
+ 0xac620014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800,
+ 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024010, 0x00621825, 0x0e0014cc,
+ 0xaca3001c, 0x32620004, 0x10400063, 0x00003821, 0x3c029000, 0x34420001,
+ 0x3c038000, 0x02821025, 0xa360007c, 0xaf420020, 0x8f420020, 0x00431024,
+ 0x1440fffd, 0x00000000, 0x93620023, 0x30420080, 0x10400011, 0x00000000,
+ 0x8f65005c, 0x8f63004c, 0x9764003c, 0x8f620064, 0x00a32823, 0x00852821,
+ 0x00a2102b, 0x54400006, 0x3c023fff, 0x93620023, 0x3042007f, 0xa3620023,
+ 0xaf710064, 0x3c023fff, 0x0a000580, 0x3442ffff, 0x8f62005c, 0x02221023,
+ 0x04400011, 0x00000000, 0x8f65005c, 0x8f630064, 0x9764003c, 0x3c023fff,
+ 0x3442ffff, 0xaf710064, 0x00a32823, 0x00852821, 0x0045102b, 0x10400004,
+ 0x02251021, 0x3c053fff, 0x34a5ffff, 0x02251021, 0xaf62005c, 0x24070001,
+ 0xaf71004c, 0x8f620054, 0x16220005, 0x00000000, 0x93620023, 0x30420040,
+ 0x10400017, 0x24020001, 0x9762006a, 0x00022880, 0x50a00001, 0x24050001,
+ 0x97630068, 0x93640081, 0x3c020800, 0x8c46004c, 0x00652821, 0x00852804,
+ 0x00c5102b, 0x54400001, 0x00a03021, 0x3c020800, 0x8c440050, 0x00c4182b,
+ 0x54600001, 0x00c02021, 0x8f420074, 0x2403fffe, 0x00832824, 0x00a21021,
+ 0xaf62000c, 0x93620082, 0x30420080, 0x50400001, 0xa3600081, 0x3c028000,
+ 0x34420001, 0x02821025, 0xaf420020, 0x9363007e, 0x9362007a, 0x10620004,
+ 0x00000000, 0x0e0013c4, 0x00000000, 0x00403821, 0x54e00001, 0x241e0001,
+ 0x8f700040, 0x8f620040, 0x14520003, 0x00521023, 0x0a0005bf, 0x00001021,
+ 0x28420001, 0x10400041, 0x8fa20010, 0x0e000fae, 0x02402021, 0xaf720040,
+ 0x9362003e, 0x30420001, 0x1440000b, 0x3c029000, 0x93620022, 0x24420001,
+ 0xa3620022, 0x93630022, 0x3c020800, 0x8c440098, 0x0064182b, 0x14600027,
+ 0x3c020800, 0x3c029000, 0x34420001, 0x02821025, 0xaf420020, 0x3c038000,
+ 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000,
+ 0x34420001, 0xa362007d, 0x8f640074, 0x34630001, 0x02831825, 0xaf430020,
+ 0x04810006, 0x3c038000, 0x02802021, 0x0e000470, 0x24050273, 0x0a0005f2,
+ 0x24050001, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000,
+ 0xaf5401c0, 0xa34201c4, 0xaf4301f8, 0x24050001, 0x24020001, 0xa7620012,
+ 0xa3600022, 0x0a0005fe, 0x2ca20001, 0x9743007a, 0x9444002a, 0x00002821,
+ 0x00641821, 0x3063fffe, 0xa7630012, 0x2ca20001, 0x00021023, 0x03c2f024,
+ 0x8fa20010, 0x10400004, 0x8fa30014, 0x0e0013c1, 0x00000000, 0x8fa30014,
+ 0x10600003, 0x00000000, 0x0e0010eb, 0x00000000, 0x13c0001f, 0x3c029000,
+ 0x34420001, 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024,
+ 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074,
+ 0x34630001, 0x02831825, 0xaf430020, 0x04810006, 0x3c038000, 0x02802021,
+ 0x0e000470, 0x2405036c, 0x0a00062b, 0x8fa20018, 0x8f4201f8, 0x00431024,
+ 0x1440fffd, 0x24020002, 0x3c031000, 0xaf5401c0, 0xa34201c4, 0xaf4301f8,
+ 0x8fa20018, 0x5040002f, 0x96a20008, 0x8f620048, 0x8f630024, 0x00761821,
+ 0xaf630048, 0x9764003c, 0x00501023, 0x0044102b, 0x10400025, 0x3c029000,
+ 0x34420001, 0x3c040800, 0x8c830080, 0x8f450100, 0x3c068000, 0x24630001,
+ 0x00a21025, 0xac830080, 0xaf420020, 0x8f420020, 0x00461024, 0x1440fffd,
+ 0x00000000, 0x9362007d, 0x3c038000, 0x34420004, 0xa362007d, 0x8f640074,
+ 0x34630001, 0x00a31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00a02021,
+ 0x0e000470, 0x2405038a, 0x0a00065b, 0x96a20008, 0x8f4201f8, 0x00431024,
+ 0x1440fffd, 0x24020002, 0x3c031000, 0xaf4501c0, 0xa34201c4, 0xaf4301f8,
+ 0x96a20008, 0x8fbf0044, 0x8fbe0040, 0x8fb7003c, 0x8fb60038, 0x8fb50034,
+ 0x8fb40030, 0x8fb3002c, 0x8fb20028, 0x8fb10024, 0x8fb00020, 0x00021042,
+ 0x30420001, 0x03e00008, 0x27bd0048, 0x27bdffe0, 0xafbf0018, 0x97420108,
+ 0x24030019, 0x304400ff, 0x10830065, 0x2882001a, 0x1040001a, 0x2882000a,
+ 0x1040000f, 0x28820008, 0x10400040, 0x24020001, 0x1082003a, 0x28820002,
+ 0x50400005, 0x24020006, 0x10800032, 0x3c026000, 0x0a0006fb, 0x00000000,
+ 0x1082003d, 0x00000000, 0x0a0006fb, 0x00000000, 0x2402000b, 0x10820044,
+ 0x2882000b, 0x1440004b, 0x2402000e, 0x10820045, 0x00000000, 0x0a0006fb,
+ 0x00000000, 0x24020020, 0x10820062, 0x28820021, 0x1040000e, 0x2402001c,
+ 0x1082004c, 0x2882001d, 0x10400005, 0x2402001b, 0x10820043, 0x00000000,
+ 0x0a0006fb, 0x00000000, 0x2402001f, 0x10820050, 0x00000000, 0x0a0006fb,
+ 0x00000000, 0x240200c1, 0x10820042, 0x288200c2, 0x10400005, 0x24020080,
+ 0x10820021, 0x00000000, 0x0a0006fb, 0x00000000, 0x240200c2, 0x1082003d,
+ 0x240200c9, 0x50820049, 0xafa00010, 0x0a0006fb, 0x00000000, 0x0e001163,
+ 0xac400808, 0x0a0006fd, 0x8fbf0018, 0x3c026000, 0x8c444448, 0x3c030800,
+ 0xac640064, 0x0e001163, 0x00000000, 0x3c026000, 0x8c444448, 0x3c030800,
+ 0x0a0006fc, 0xac640068, 0x8f440100, 0x0e0006ff, 0x00000000, 0x3c026000,
+ 0x8c444448, 0x3c030800, 0x0a0006fc, 0xac64006c, 0x0e001191, 0x00000000,
+ 0x0a0006fd, 0x8fbf0018, 0x8f440100, 0x0e0011bb, 0x00000000, 0x0a0006fd,
+ 0x8fbf0018, 0x0e001202, 0x00000000, 0x0a0006fd, 0x8fbf0018, 0x0000000d,
+ 0x0a0006fd, 0x8fbf0018, 0x0e000826, 0x00000000, 0x0a0006fd, 0x8fbf0018,
+ 0x8f440100, 0x0e001264, 0x00000000, 0x0a0006fd, 0x8fbf0018, 0x0e00134e,
+ 0x00000000, 0x0a0006fd, 0x8fbf0018, 0x0e00087c, 0x27440100, 0x0a0006fd,
+ 0x8fbf0018, 0x8f640040, 0x0e000fae, 0x00000000, 0x0a0006fd, 0x8fbf0018,
+ 0x8f440100, 0x0e001059, 0x00000000, 0x0a0006fd, 0x8fbf0018, 0x0e001417,
+ 0x00000000, 0x0a0006fd, 0x8fbf0018, 0xafa00014, 0x8f440100, 0x8f450118,
+ 0x8f46011c, 0x0e001439, 0x8f470120, 0x0a0006fd, 0x8fbf0018, 0x0000000d,
+ 0x8fbf0018, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0xafbf0010, 0x9742010c,
+ 0x1440005e, 0x00803821, 0x3c029000, 0x34420001, 0x00e21025, 0xaf420020,
+ 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620023,
+ 0x30420010, 0x14400026, 0x3c030800, 0x8f630074, 0x3c027fff, 0x3442ffff,
+ 0x00621824, 0xaf630074, 0x93620005, 0x34420001, 0xa3620005, 0x8f63004c,
+ 0x8f620054, 0x10620021, 0x24040001, 0x9762006a, 0x00022880, 0x50a00001,
+ 0x24050001, 0x97630068, 0x93640081, 0x3c020800, 0x8c46004c, 0x00652821,
+ 0x00852804, 0x00c5102b, 0x54400001, 0x00a03021, 0x3c020800, 0x8c440050,
+ 0x00c4182b, 0x54600001, 0x00c02021, 0x8f420074, 0x2403fffe, 0x00832824,
+ 0x00a21021, 0xaf62000c, 0x0a00073d, 0x24040001, 0x8c6200a8, 0x00002021,
+ 0x24420001, 0xac6200a8, 0x0000000d, 0x00000000, 0x2400044d, 0x3c028000,
+ 0x34420001, 0x00e21025, 0xaf420020, 0x1080001f, 0x3c029000, 0x34420001,
+ 0x00e21025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+ 0x00000000, 0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074, 0x34630001,
+ 0x00e31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00e02021, 0x0e000470,
+ 0x24050455, 0x0a000761, 0x00000000, 0x8f4201f8, 0x00431024, 0x1440fffd,
+ 0x24020002, 0x3c031000, 0xaf4701c0, 0xa34201c4, 0xaf4301f8, 0x0e001163,
+ 0x00000000, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x27bdffd8, 0xafbf0024,
+ 0xafb40020, 0xafb3001c, 0xafb20018, 0xafb10014, 0xafb00010, 0x93630005,
+ 0x00809821, 0x24020030, 0x30630030, 0x146200ac, 0x00a0a021, 0x3c020800,
+ 0x8c430020, 0x106000a6, 0x00000000, 0x0e00148e, 0x00000000, 0x8f830018,
+ 0xac730000, 0x936200c4, 0x30420002, 0x10400004, 0x24020001, 0x8f830018,
+ 0x0a000784, 0x00000000, 0x8f830018, 0x24020003, 0xac620004, 0x8f6200dc,
+ 0x8f630040, 0x00431023, 0x18400004, 0x00000000, 0x0000000d, 0x00000000,
+ 0x24000509, 0x8f840018, 0x8f6200dc, 0xac820008, 0x8f830018, 0xac60000c,
+ 0x8f820018, 0xac400010, 0x8f830018, 0x8f62004c, 0x3c100800, 0xac620014,
+ 0x8f850018, 0x3c026000, 0x8c434448, 0x261258c0, 0x00002021, 0xaca30018,
+ 0x9642000e, 0x8f850018, 0x3c034010, 0x00431025, 0x0e0014cc, 0xaca2001c,
+ 0x8f830018, 0xac730000, 0x9362003e, 0x9363003f, 0x8f840018, 0x00021200,
+ 0x00621825, 0xac830004, 0x93620081, 0x93630082, 0x8f840018, 0x00021600,
+ 0x00031c00, 0x00431025, 0xac820008, 0x8f830018, 0x8f620040, 0xac62000c,
+ 0x8f840018, 0x8f620048, 0xac820010, 0x8f71004c, 0x8f820018, 0xac510014,
+ 0x8f620050, 0x8f850018, 0x00401821, 0x02221023, 0x5c400001, 0x02201821,
+ 0x00002021, 0xaca30018, 0x9642000e, 0x8f850018, 0x3c03c00b, 0x00431025,
+ 0x0e0014cc, 0xaca2001c, 0x8f620054, 0x8f840018, 0x00401821, 0x02221023,
+ 0x5c400001, 0x02201821, 0xac830000, 0x8f840018, 0x8f630058, 0xac830004,
+ 0x93620023, 0x30420010, 0x10400004, 0x00000000, 0x8f830018, 0x0a0007dd,
+ 0x8f620148, 0x8f830018, 0x8f62005c, 0xac620008, 0x8f830018, 0x8f620060,
+ 0xac62000c, 0x8f840018, 0x8f620064, 0xac820010, 0x97630068, 0x9762006a,
+ 0x8f840018, 0x00031c00, 0x00431025, 0xac820014, 0x8f850018, 0x00002021,
+ 0x2402ffff, 0x260358c0, 0xaca20018, 0x9462000e, 0x8f850018, 0x3c03c00c,
+ 0x00431025, 0x0e0014cc, 0xaca2001c, 0x8f840018, 0x8f630018, 0xac830000,
+ 0x936200c4, 0x30420002, 0x10400006, 0x00000000, 0x976200c8, 0x8f830018,
+ 0x3042ffff, 0x0a000803, 0xac620004, 0x8f820018, 0xac400004, 0x8f830018,
+ 0x8f62006c, 0xac620008, 0x8f840018, 0x8f6200dc, 0xac82000c, 0x8f830018,
+ 0xac600010, 0x93620005, 0x8f830018, 0x00021600, 0x00541025, 0xac620014,
+ 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x260258c0, 0xaca30018,
+ 0x9443000e, 0x8f850018, 0x3c02400d, 0x00621825, 0x0e0014cc, 0xaca3001c,
+ 0x0e00122e, 0x02602021, 0x8fbf0024, 0x8fb40020, 0x8fb3001c, 0x8fb20018,
+ 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0028, 0x27bdffe0, 0xafb00010,
+ 0x27500100, 0xafbf0018, 0xafb10014, 0x9603000c, 0x240200c1, 0x54620024,
+ 0x8e040000, 0x3c029000, 0x8f450100, 0x34420001, 0x3c038000, 0x00a21025,
+ 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x9362007d,
+ 0x3c038000, 0x34420004, 0xa362007d, 0x8f640074, 0x34630001, 0x00a31825,
+ 0xaf430020, 0x04810006, 0x3c038000, 0x00a02021, 0x0e000470, 0x240505b2,
+ 0x0a000878, 0x8fbf0018, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002,
+ 0x3c031000, 0xaf4501c0, 0xa34201c4, 0xaf4301f8, 0x0a000878, 0x8fbf0018,
+ 0x8f65004c, 0x24060001, 0x0e0012a3, 0x240705be, 0x3c020800, 0x8c430020,
+ 0x9611000c, 0x1060001d, 0x8e100000, 0x0e00148e, 0x00000000, 0x8f820018,
+ 0xac500000, 0x8f840018, 0x00111400, 0xac820004, 0x8f830018, 0xac600008,
+ 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f840018, 0x240205c1,
+ 0xac820014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800,
+ 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024019, 0x00621825, 0x0e0014cc,
+ 0xaca3001c, 0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020,
+ 0x27bdffb0, 0xafb5003c, 0x0000a821, 0xafbe0048, 0x0000f021, 0xafb70044,
+ 0x0000b821, 0xafb30034, 0x00009821, 0xafb60040, 0x0080b021, 0xafbf004c,
+ 0xafb40038, 0xafb20030, 0xafb1002c, 0xafb00028, 0xafa00010, 0x8f620040,
+ 0x8ec30014, 0x96d1000c, 0x00431023, 0x04410025, 0x8ed40000, 0x32220401,
+ 0x1040030c, 0x3c029000, 0x34420001, 0x02821025, 0xaf420020, 0x3c038000,
+ 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000,
+ 0x34420004, 0xa362007d, 0x8f640074, 0x34630001, 0x02831825, 0xaf430020,
+ 0x04810006, 0x3c038000, 0x02802021, 0x0e000470, 0x24050664, 0x0a000ba2,
+ 0x8fbf004c, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000,
+ 0xaf5401c0, 0xa34201c4, 0xaf4301f8, 0x0a000ba2, 0x8fbf004c, 0x32220010,
+ 0x1040006b, 0x00003021, 0x9362003f, 0x92c6000f, 0x304500ff, 0x24c3fff8,
+ 0x2c62000f, 0x10400057, 0x3c020800, 0x244257c0, 0x00031880, 0x00621821,
+ 0x8c640000, 0x00800008, 0x00000000, 0x38a20012, 0x0a000924, 0x0002a82b,
+ 0x2402000e, 0x14a20004, 0x2402000c, 0x24150001, 0x0a000924, 0x24060010,
+ 0x10a20049, 0x38a30010, 0x2c630001, 0x38a20016, 0x2c420001, 0x00621825,
+ 0x1460004d, 0x0000a821, 0x24020014, 0x10a2004a, 0x00000000, 0x0000000d,
+ 0x00000000, 0x2400069c, 0x0a000924, 0x0000a821, 0x24020016, 0x14a20005,
+ 0x2402000c, 0x24150001, 0x24060010, 0x0a000924, 0x3231fffd, 0x10a20032,
+ 0x38a30010, 0x2c630001, 0x38a2000e, 0x2c420001, 0x00621825, 0x14600036,
+ 0x0000a821, 0x24020014, 0x14a20003, 0x24150001, 0x0a000924, 0x24060012,
+ 0x0000000d, 0x00000000, 0x240006bc, 0x0a000924, 0x0000a821, 0x2402000e,
+ 0x14a20004, 0x24020016, 0x24150001, 0x0a000924, 0x3231fffb, 0x14a20004,
+ 0x24020014, 0x24150001, 0x0a000924, 0x3231fffd, 0x54a20013, 0x92c2000e,
+ 0x24150001, 0x24060012, 0x0a000924, 0x3231fffd, 0x2402000c, 0x54a2000c,
+ 0x92c2000e, 0x92c3000e, 0x2402000a, 0x10620005, 0x24150001, 0x0000000d,
+ 0x00000000, 0x240006e8, 0x24150001, 0x0a000924, 0x24060014, 0x92c2000e,
+ 0x14a20003, 0x00000000, 0x0a000924, 0x24150001, 0x10a6ffc1, 0x24020012,
+ 0x10a20005, 0x0000a821, 0x0000000d, 0x00000000, 0x24000704, 0x0000a821,
+ 0x12a00022, 0x32220004, 0x10400002, 0x24020001, 0xafa20010, 0x32230102,
+ 0x24020002, 0x1462000f, 0x00000000, 0x92c2000a, 0x30420020, 0x1440000b,
+ 0x00000000, 0x8f630048, 0x8f620040, 0x14620004, 0x00000000, 0x8f620048,
+ 0x24420001, 0xaf620048, 0x8f620040, 0x24420001, 0xaf620040, 0xa366003f,
+ 0x38c30012, 0x2c630001, 0x38c20010, 0x2c420001, 0x00621825, 0x10600005,
+ 0x3c030800, 0x8c620074, 0x24420001, 0x0e00140d, 0xac620074, 0x32220040,
+ 0x32230020, 0xafa30020, 0x32230080, 0xafa30024, 0x32230001, 0xafa30018,
+ 0x32230008, 0xafa3001c, 0x32230100, 0x104000c4, 0xafa30014, 0x8ec60010,
+ 0x8f630054, 0x24c2ffff, 0x00431023, 0x18400006, 0x00000000, 0x0000000d,
+ 0x00000000, 0x2400015c, 0x0a000989, 0x00009021, 0x8f62004c, 0x00c21023,
+ 0x18400028, 0x00009021, 0x93650120, 0x93640121, 0x3c030800, 0x8c62008c,
+ 0x308400ff, 0x24420001, 0x30a500ff, 0x00804021, 0x1485000b, 0xac62008c,
+ 0x3c040800, 0x8c830090, 0x24630001, 0xac830090, 0x93620122, 0x30420001,
+ 0x00021023, 0x30420005, 0x0a000989, 0x34520004, 0x27670100, 0x00041080,
+ 0x00e21021, 0x8c430000, 0x00c31823, 0x04600004, 0x24820001, 0x30440007,
+ 0x1485fff9, 0x00041080, 0x10880007, 0x3c030800, 0xa3640121, 0x8c620094,
+ 0x24120005, 0x24420001, 0x0a000989, 0xac620094, 0x24120004, 0x32420001,
+ 0x10400021, 0x3c020800, 0x8c430020, 0x8ed00000, 0x1060001c, 0x8ed30010,
+ 0x0e00148e, 0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x24020001,
+ 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018,
+ 0xac600010, 0x8f820018, 0xac530014, 0x8f850018, 0x3c026000, 0x8c434448,
+ 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024010,
+ 0x00621825, 0x0e0014cc, 0xaca3001c, 0x24130001, 0x32420004, 0x10400068,
+ 0x00003821, 0x3c029000, 0x8ec60010, 0x34420001, 0x3c038000, 0x02821025,
+ 0xa360007c, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000,
+ 0x93620023, 0x30420080, 0x10400011, 0x00000000, 0x8f65005c, 0x8f63004c,
+ 0x9764003c, 0x8f620064, 0x00a32823, 0x00852821, 0x00a2102b, 0x54400006,
+ 0x3c023fff, 0x93620023, 0x3042007f, 0xa3620023, 0xaf660064, 0x3c023fff,
+ 0x0a0009da, 0x3442ffff, 0x8f62005c, 0x00c21023, 0x04400011, 0x00000000,
+ 0x8f65005c, 0x8f630064, 0x9764003c, 0x3c023fff, 0x3442ffff, 0xaf660064,
+ 0x00a32823, 0x00852821, 0x0045102b, 0x10400004, 0x00c51021, 0x3c053fff,
+ 0x34a5ffff, 0x00c51021, 0xaf62005c, 0x24070001, 0xaf66004c, 0x8fa20010,
+ 0x10400003, 0x00000000, 0xaf660050, 0xaf660054, 0x8f620054, 0x14c20005,
+ 0x00000000, 0x93620023, 0x30420040, 0x10400017, 0x24020001, 0x9762006a,
+ 0x00022880, 0x50a00001, 0x24050001, 0x97630068, 0x93640081, 0x3c020800,
+ 0x8c46004c, 0x00652821, 0x00852804, 0x00c5102b, 0x54400001, 0x00a03021,
+ 0x3c020800, 0x8c440050, 0x00c4182b, 0x54600001, 0x00c02021, 0x8f420074,
+ 0x2403fffe, 0x00832824, 0x00a21021, 0xaf62000c, 0x93620082, 0x30420080,
+ 0x50400001, 0xa3600081, 0x3c028000, 0x34420001, 0x02821025, 0xaf420020,
+ 0x9363007e, 0x9362007a, 0x10620005, 0x00e0b821, 0x0e0013c4, 0x00000000,
+ 0x00403821, 0x00e0b821, 0x8fa30020, 0x10600009, 0x8fa20010, 0x8ec20018,
+ 0xaf620018, 0x8ec3001c, 0xaf63001c, 0x8ec20020, 0x24170001, 0xaf620058,
+ 0x8fa20010, 0x10400057, 0x8fa30024, 0x93620023, 0x30420040, 0x10400053,
+ 0x00000000, 0x16600021, 0x3c120800, 0x8e420020, 0x8f70004c, 0x1040001e,
+ 0x24130001, 0x0e00148e, 0x00000000, 0x8f820018, 0xac540000, 0x8f840018,
+ 0x24020001, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c,
+ 0x8f830018, 0xac600010, 0x8f820018, 0xac500014, 0x8f850018, 0x3c026000,
+ 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018,
+ 0x3c024010, 0x00621825, 0xaca3001c, 0x0e0014cc, 0x24130001, 0x8e420020,
+ 0x1040001c, 0x8ed00000, 0x0e00148e, 0x00000000, 0x8f820018, 0xac500000,
+ 0x8f830018, 0xac600004, 0x8f820018, 0xac400008, 0x8f830018, 0xac60000c,
+ 0x8f820018, 0xac400010, 0x8f830018, 0x24020798, 0xac620014, 0x8f850018,
+ 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce,
+ 0x8f850018, 0x3c024019, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x3c029000,
+ 0x34420001, 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024,
+ 0x1440fffd, 0x24020001, 0xaf62000c, 0x93630023, 0x3c028000, 0x34420001,
+ 0x02821025, 0x306300bf, 0xa3630023, 0xaf420020, 0x8fa30024, 0x10600012,
+ 0x8fa30018, 0x9362007c, 0x24420001, 0xa362007c, 0x9363007e, 0x9362007a,
+ 0x1462000b, 0x8fa30018, 0x9362007c, 0x3c030800, 0x8c640024, 0x0044102b,
+ 0x14400005, 0x8fa30018, 0x0e0013c4, 0x00000000, 0x02e2b825, 0x8fa30018,
+ 0x3062ffff, 0x10400003, 0x32220200, 0x0a000a94, 0x241e0004, 0x10400003,
+ 0x00000000, 0x241e0040, 0x24170001, 0x12a000d0, 0x32220002, 0x104000cf,
+ 0x8fa2001c, 0x92c2000a, 0x30420002, 0x5040003b, 0x92c2000a, 0x93620023,
+ 0x30420008, 0x54400037, 0x92c2000a, 0x3c020800, 0x8c430020, 0x10600023,
+ 0x3c029000, 0x0e00148e, 0x00000000, 0x8f840018, 0x8ec30000, 0xac830000,
+ 0x92c2000a, 0x8f830018, 0x00021600, 0xac620004, 0x8f840018, 0x8f620040,
+ 0xac820008, 0x8f850018, 0x8f63004c, 0xaca3000c, 0x9362003f, 0x8f840018,
+ 0x304200ff, 0xac820010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f850018,
+ 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018,
+ 0x3c02401a, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x3c029000, 0x34420001,
+ 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+ 0x00000000, 0x93630023, 0x3c028000, 0x34420001, 0x02821025, 0x34630008,
+ 0xa3630023, 0xaf420020, 0x92c2000a, 0x30420020, 0x1040008e, 0x8fa2001c,
+ 0x93620023, 0x30420001, 0x14400035, 0x3c020800, 0x8c430020, 0x10600023,
+ 0x3c029000, 0x0e00148e, 0x00000000, 0x8f840018, 0x8ec30000, 0xac830000,
+ 0x92c2000a, 0x8f830018, 0x00021600, 0xac620004, 0x8f840018, 0x8f620040,
+ 0xac820008, 0x8f850018, 0x8f63004c, 0xaca3000c, 0x9362003f, 0x8f840018,
+ 0x304200ff, 0xac820010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f850018,
+ 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018,
+ 0x3c02401a, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x3c029000, 0x34420001,
+ 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+ 0x00000000, 0x93630023, 0x3c028000, 0x34420001, 0x02821025, 0x34630001,
+ 0xa3630023, 0xaf420020, 0x93620023, 0x30420040, 0x10400052, 0x8fa2001c,
+ 0x16600020, 0x3c120800, 0x8e420020, 0x8f70004c, 0x1040003c, 0x3c029000,
+ 0x0e00148e, 0x00000000, 0x8f820018, 0xac540000, 0x8f840018, 0x24020001,
+ 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018,
+ 0xac600010, 0x8f820018, 0xac500014, 0x8f850018, 0x3c026000, 0x8c434448,
+ 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024010,
+ 0x00621825, 0x0e0014cc, 0xaca3001c, 0x8e420020, 0x1040001e, 0x3c029000,
+ 0x0e00148e, 0x00000000, 0x8f820018, 0xac540000, 0x8f840018, 0x3c02008d,
+ 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018,
+ 0xac600010, 0x8f840018, 0x240207ee, 0xac820014, 0x8f850018, 0x3c026000,
+ 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018,
+ 0x3c024019, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x3c029000, 0x34420001,
+ 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+ 0x00000000, 0x93630023, 0x3c028000, 0x34420001, 0x02821025, 0x306300bf,
+ 0xa3630023, 0xaf420020, 0x8fa2001c, 0x1040000e, 0x8fa20014, 0x92c2000a,
+ 0xa3620082, 0x57c00005, 0x37de0008, 0x8fa30014, 0x10600004, 0x00000000,
+ 0x37de0008, 0x0a000b75, 0x24170001, 0x0e0012cf, 0x02802021, 0x8fa20014,
+ 0x10400003, 0x00000000, 0x37de0010, 0x24170001, 0x12e00020, 0x3c029000,
+ 0x34420001, 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024,
+ 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0x03c21025, 0xa362007d,
+ 0x8f640074, 0x34630001, 0x02831825, 0xaf430020, 0x04810006, 0x3c038000,
+ 0x02802021, 0x0e000470, 0x2405082a, 0x0a000b9b, 0x00000000, 0x8f4201f8,
+ 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf5401c0, 0xa34201c4,
+ 0xaf4301f8, 0x9363003f, 0x24020012, 0x14620004, 0x8fbf004c, 0x0e00140d,
+ 0x00000000, 0x8fbf004c, 0x8fbe0048, 0x8fb70044, 0x8fb60040, 0x8fb5003c,
+ 0x8fb40038, 0x8fb30034, 0x8fb20030, 0x8fb1002c, 0x8fb00028, 0x03e00008,
+ 0x27bd0050, 0x27bdffe8, 0xafbf0014, 0xafb00010, 0x8f500180, 0x97420184,
+ 0x30420200, 0x14400015, 0x00000000, 0x8f430188, 0x3c02ff00, 0x00621824,
+ 0x3c020200, 0x10620031, 0x0043102b, 0x14400007, 0x3c020300, 0x1060000b,
+ 0x3c020100, 0x1062000d, 0x00000000, 0x0a000c2c, 0x00000000, 0x10620027,
+ 0x3c020400, 0x1062003e, 0x02002021, 0x0a000c2c, 0x00000000, 0x0e000c31,
+ 0x02002021, 0x0a000c2e, 0x8fbf0014, 0x93620005, 0x30420020, 0x1440005e,
+ 0x8fbf0014, 0x3c029000, 0x34420001, 0x02021025, 0xaf420020, 0x3c038000,
+ 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620005, 0x3c038000,
+ 0x34630001, 0x02031825, 0x34420020, 0xa3620005, 0xaf430020, 0x93620005,
+ 0x30420020, 0x14400003, 0x02002021, 0x0000000d, 0x02002021, 0x0e000766,
+ 0x24055854, 0x0a000c2e, 0x8fbf0014, 0x93620005, 0x30420001, 0x1040003f,
+ 0x3c029000, 0x34420001, 0x02021025, 0xaf420020, 0x3c038000, 0x8f420020,
+ 0x00431024, 0x1440fffd, 0x00000000, 0x93620023, 0x34420004, 0xa3620023,
+ 0x93630005, 0x3c048000, 0x3c020800, 0x306300fe, 0xa3630005, 0x8c430020,
+ 0x34840001, 0x02042025, 0x0a000c0a, 0xaf440020, 0x00002821, 0x00003021,
+ 0x0e000fb1, 0x240708d9, 0x3c020800, 0x8c430020, 0x10600023, 0x8fbf0014,
+ 0x0e00148e, 0x00000000, 0x8f820018, 0xac500000, 0x93630082, 0x9362003f,
+ 0x8f840018, 0x00031a00, 0x00431025, 0xac820004, 0x8f830018, 0xac600008,
+ 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018, 0xac400014,
+ 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018,
+ 0x944358ce, 0x8f850018, 0x3c02400a, 0x00621825, 0x0e0014cc, 0xaca3001c,
+ 0x0a000c2e, 0x8fbf0014, 0x0000000d, 0x8fbf0014, 0x8fb00010, 0x03e00008,
+ 0x27bd0018, 0x27bdffe8, 0xafbf0010, 0x8f420188, 0x00803021, 0x93640000,
+ 0x24030020, 0x00021402, 0x10830008, 0x304500ff, 0x3c036018, 0x8c625000,
+ 0x34420400, 0xac625000, 0x0000000d, 0x00000000, 0x24000955, 0x9363003f,
+ 0x24020012, 0x14620023, 0x3c029000, 0x34420001, 0x3c038000, 0x00c21025,
+ 0xaf650178, 0xa365007a, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd,
+ 0x00000000, 0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074, 0x34630001,
+ 0x00c31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00c02021, 0x0e000470,
+ 0x24050963, 0x0a000c79, 0x8fbf0010, 0x8f4201f8, 0x00431024, 0x1440fffd,
+ 0x24020002, 0x3c031000, 0xaf4601c0, 0xa34201c4, 0xaf4301f8, 0x0a000c79,
+ 0x8fbf0010, 0x9362007e, 0x1445000e, 0x00000000, 0x8f620178, 0x1045000b,
+ 0x00000000, 0x8f820000, 0xaf650178, 0x8f660178, 0x8f440180, 0x8f65004c,
+ 0x8c430000, 0x0060f809, 0x30c600ff, 0x0a000c79, 0x8fbf0010, 0xaf650178,
+ 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x27bdffe8, 0xafbf0010, 0x93630000,
+ 0x24020020, 0x10620005, 0x00000000, 0x93630000, 0x24020030, 0x1462004d,
+ 0x8fbf0010, 0x93420148, 0x2444ffff, 0x2c830005, 0x10600047, 0x3c020800,
+ 0x24425800, 0x00041880, 0x00621821, 0x8c640000, 0x00800008, 0x00000000,
+ 0x8f430144, 0x8f62000c, 0x14620006, 0x24020001, 0xaf62000c, 0x0e000d59,
+ 0x00000000, 0x0a000cd1, 0x8fbf0010, 0x8f62000c, 0x0a000cca, 0x00000000,
+ 0x97630010, 0x8f420144, 0x14430006, 0x24020001, 0xa7620010, 0x0e00137a,
+ 0x00000000, 0x0a000cd1, 0x8fbf0010, 0x97620010, 0x0a000cca, 0x00000000,
+ 0x97630012, 0x8f420144, 0x14430006, 0x24020001, 0xa7620012, 0x0e001395,
+ 0x00000000, 0x0a000cd1, 0x8fbf0010, 0x97620012, 0x0a000cca, 0x00000000,
+ 0x97630014, 0x8f420144, 0x14430006, 0x24020001, 0xa7620014, 0x0e0013bb,
+ 0x00000000, 0x0a000cd1, 0x8fbf0010, 0x97620014, 0x0a000cca, 0x00000000,
+ 0x97630016, 0x8f420144, 0x14430006, 0x24020001, 0xa7620016, 0x0e0013be,
+ 0x00000000, 0x0a000cd1, 0x8fbf0010, 0x97620016, 0x14400006, 0x8fbf0010,
+ 0x3c030800, 0x8c620070, 0x24420001, 0xac620070, 0x8fbf0010, 0x03e00008,
+ 0x27bd0018, 0x27bdffe0, 0x3c029000, 0xafbf001c, 0xafb20018, 0xafb10014,
+ 0xafb00010, 0x8f500140, 0x34420001, 0x3c038000, 0x02021025, 0xaf420020,
+ 0x8f420020, 0x00431024, 0x1440fffd, 0x24020012, 0x24030080, 0xa362003f,
+ 0xa3630082, 0x93620023, 0x30420040, 0x10400007, 0x00008821, 0x93620023,
+ 0x24110001, 0x304200bf, 0xa3620023, 0x0a000cf0, 0x3c028000, 0x3c028000,
+ 0x34420001, 0x3c039000, 0x34630001, 0x3c048000, 0x02021025, 0x02031825,
+ 0xaf420020, 0xaf430020, 0x8f420020, 0x00441024, 0x1440fffd, 0x00000000,
+ 0x9362007d, 0x3c038000, 0x34420020, 0xa362007d, 0x8f640074, 0x34630001,
+ 0x02031825, 0xaf430020, 0x04810006, 0x3c038000, 0x02002021, 0x0e000470,
+ 0x24050a63, 0x0a000d13, 0x00000000, 0x8f4201f8, 0x00431024, 0x1440fffd,
+ 0x24020002, 0x3c031000, 0xaf5001c0, 0xa34201c4, 0xaf4301f8, 0x1220003f,
+ 0x3c120800, 0x8e420020, 0x8f71004c, 0x1040003c, 0x8fbf001c, 0x0e00148e,
+ 0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x24020001, 0xac820004,
+ 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+ 0x8f820018, 0xac510014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001,
+ 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024010, 0x00621825,
+ 0x0e0014cc, 0xaca3001c, 0x8e420020, 0x1040001e, 0x8fbf001c, 0x0e00148e,
+ 0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x3c02008d, 0xac820004,
+ 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+ 0x8f840018, 0x24020a6a, 0xac820014, 0x8f850018, 0x3c026000, 0x8c434448,
+ 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024019,
+ 0x00621825, 0x0e0014cc, 0xaca3001c, 0x8fbf001c, 0x8fb20018, 0x8fb10014,
+ 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0xafbf0010, 0x93620081,
+ 0x3c030800, 0x8c640048, 0x0044102b, 0x14400005, 0x00000000, 0x0e000cd3,
+ 0x00000000, 0x0a000da4, 0x8fbf0010, 0x93620081, 0x24420001, 0x0e0013c4,
+ 0xa3620081, 0x9763006a, 0x00032880, 0x14a00002, 0x00403821, 0x24050001,
+ 0x97630068, 0x93640081, 0x3c020800, 0x8c46004c, 0x00652821, 0x00852804,
+ 0x00c5102b, 0x54400001, 0x00a03021, 0x3c020800, 0x8c440050, 0x00c4182b,
+ 0x54600001, 0x00c02021, 0x8f420074, 0x2403fffe, 0x00832824, 0x00a21021,
+ 0xaf62000c, 0x10e00021, 0x3c029000, 0x8f450140, 0x34420001, 0x3c038000,
+ 0x00a21025, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000,
+ 0x9362007d, 0x3c038000, 0x34420004, 0xa362007d, 0x8f640074, 0x34630001,
+ 0x00a31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00a02021, 0x0e000470,
+ 0x24050a92, 0x0a000da4, 0x8fbf0010, 0x8f4201f8, 0x00431024, 0x1440fffd,
+ 0x24020002, 0x3c031000, 0xaf4501c0, 0xa34201c4, 0xaf4301f8, 0x8fbf0010,
+ 0x03e00008, 0x27bd0018, 0x27bdffd8, 0xafb3001c, 0x27530100, 0xafbf0024,
+ 0xafb40020, 0xafb20018, 0xafb10014, 0xafb00010, 0x96620008, 0x3c140800,
+ 0x8f520100, 0x30420001, 0x104000da, 0x00000000, 0x8e700018, 0x8f630054,
+ 0x2602ffff, 0x00431023, 0x18400006, 0x00000000, 0x0000000d, 0x00000000,
+ 0x2400015c, 0x0a000dea, 0x00008821, 0x8f62004c, 0x02021023, 0x18400028,
+ 0x00008821, 0x93650120, 0x93640121, 0x3c030800, 0x8c62008c, 0x308400ff,
+ 0x24420001, 0x30a500ff, 0x00803821, 0x1485000b, 0xac62008c, 0x3c040800,
+ 0x8c830090, 0x24630001, 0xac830090, 0x93620122, 0x30420001, 0x00021023,
+ 0x30420005, 0x0a000dea, 0x34510004, 0x27660100, 0x00041080, 0x00c21021,
+ 0x8c430000, 0x02031823, 0x04600004, 0x24820001, 0x30440007, 0x1485fff9,
+ 0x00041080, 0x10870007, 0x3c030800, 0xa3640121, 0x8c620094, 0x24110005,
+ 0x24420001, 0x0a000dea, 0xac620094, 0x24110004, 0x32220001, 0x1040001e,
+ 0x8e820020, 0x1040001d, 0x32220004, 0x0e00148e, 0x00000000, 0x8f820018,
+ 0xac520000, 0x8f840018, 0x24020001, 0xac820004, 0x8f830018, 0xac600008,
+ 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018, 0xac500014,
+ 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018,
+ 0x944358ce, 0x8f850018, 0x3c024010, 0x00621825, 0x0e0014cc, 0xaca3001c,
+ 0x32220004, 0x10400081, 0x00003821, 0x3c029000, 0x34420001, 0x3c038000,
+ 0x02421025, 0xa360007c, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd,
+ 0x00000000, 0x93620023, 0x30420080, 0x10400011, 0x00000000, 0x8f65005c,
+ 0x8f63004c, 0x9764003c, 0x8f620064, 0x00a32823, 0x00852821, 0x00a2102b,
+ 0x54400006, 0x3c023fff, 0x93620023, 0x3042007f, 0xa3620023, 0xaf700064,
+ 0x3c023fff, 0x0a000e37, 0x3442ffff, 0x8f62005c, 0x02021023, 0x04400011,
+ 0x00000000, 0x8f65005c, 0x8f630064, 0x9764003c, 0x3c023fff, 0x3442ffff,
+ 0xaf700064, 0x00a32823, 0x00852821, 0x0045102b, 0x10400004, 0x02051021,
+ 0x3c053fff, 0x34a5ffff, 0x02051021, 0xaf62005c, 0x24070001, 0xaf70004c,
+ 0x8f620054, 0x16020005, 0x00000000, 0x93620023, 0x30420040, 0x10400017,
+ 0x24020001, 0x9762006a, 0x00022880, 0x50a00001, 0x24050001, 0x97630068,
+ 0x93640081, 0x3c020800, 0x8c46004c, 0x00652821, 0x00852804, 0x00c5102b,
+ 0x54400001, 0x00a03021, 0x3c020800, 0x8c440050, 0x00c4182b, 0x54600001,
+ 0x00c02021, 0x8f420074, 0x2403fffe, 0x00832824, 0x00a21021, 0xaf62000c,
+ 0x93620082, 0x30420080, 0x50400001, 0xa3600081, 0x3c028000, 0x34420001,
+ 0x02421025, 0xaf420020, 0x9363007e, 0x9362007a, 0x10620004, 0x00000000,
+ 0x0e0013c4, 0x00000000, 0x00403821, 0x10e0001f, 0x3c029000, 0x34420001,
+ 0x02421025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+ 0x00000000, 0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074, 0x34630001,
+ 0x02431825, 0xaf430020, 0x04810006, 0x3c038000, 0x02402021, 0x0e000470,
+ 0x24050b3d, 0x0a000e8d, 0x00000000, 0x8f4201f8, 0x00431024, 0x1440fffd,
+ 0x24020002, 0x3c031000, 0xaf5201c0, 0xa34201c4, 0xaf4301f8, 0x9342010b,
+ 0x9343010b, 0x8e820020, 0x27500100, 0x38630006, 0x10400029, 0x2c710001,
+ 0x0e00148e, 0x00000000, 0x8f830018, 0x8e020000, 0xac620000, 0x8f840018,
+ 0x96020008, 0xac820004, 0x8f830018, 0x8e020014, 0xac620008, 0x8f850018,
+ 0x3c026000, 0x8c434448, 0xaca3000c, 0x8f840018, 0x96020012, 0xac820010,
+ 0x8f850018, 0x8e030020, 0xaca30014, 0x9602000c, 0x9603000e, 0x8f840018,
+ 0x00021400, 0x00431025, 0xac820018, 0x12200005, 0x3c020800, 0x944358ce,
+ 0x8f840018, 0x0a000eb8, 0x3c024013, 0x944358ce, 0x8f840018, 0x3c024014,
+ 0x00621825, 0xac83001c, 0x0e0014cc, 0x24040001, 0x8e700014, 0x8f620040,
+ 0x14500003, 0x00501023, 0x0a000ec3, 0x00001021, 0x28420001, 0x1040003a,
+ 0x00000000, 0x0e000fae, 0x02002021, 0xaf700040, 0x9362003e, 0x30420001,
+ 0x1440000b, 0x3c029000, 0x93620022, 0x24420001, 0xa3620022, 0x93630022,
+ 0x3c020800, 0x8c440098, 0x0064182b, 0x14600025, 0x3c020800, 0x3c029000,
+ 0x34420001, 0x02421025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024,
+ 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0x34420001, 0xa362007d,
+ 0x8f640074, 0x34630001, 0x02431825, 0xaf430020, 0x04810006, 0x3c038000,
+ 0x02402021, 0x0e000470, 0x24050273, 0x0a000ef6, 0x24020001, 0x8f4201f8,
+ 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf5201c0, 0xa34201c4,
+ 0xaf4301f8, 0x24020001, 0xa7620012, 0x0a000efe, 0xa3600022, 0x9743007a,
+ 0x9444002a, 0x00641821, 0x3063fffe, 0xa7630012, 0x97420108, 0x8fbf0024,
+ 0x8fb40020, 0x8fb3001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x00021042,
+ 0x30420001, 0x03e00008, 0x27bd0028, 0x27bdffe0, 0xafb20018, 0x3c120800,
+ 0x8e420020, 0xafb00010, 0x27500100, 0xafbf001c, 0x10400046, 0xafb10014,
+ 0x0e00148e, 0x00000000, 0x8f840018, 0x8e020000, 0xac820000, 0x936300b1,
+ 0x936200c5, 0x8f850018, 0x00031e00, 0x00021400, 0x34420100, 0x00621825,
+ 0xaca30004, 0x8f840018, 0x8e02001c, 0xac820008, 0x8f830018, 0x8f620048,
+ 0xac62000c, 0x8f840018, 0x96020012, 0xac820010, 0x8f830018, 0x8f620040,
+ 0x24040001, 0xac620014, 0x8f850018, 0x3c026000, 0x8c434448, 0x3c020800,
+ 0x245158c0, 0xaca30018, 0x9623000e, 0x8f850018, 0x3c024016, 0x00621825,
+ 0x0e0014cc, 0xaca3001c, 0x96030008, 0x30630010, 0x1060001c, 0x8e420020,
+ 0x1040001a, 0x8e100000, 0x0e00148e, 0x00000000, 0x8f820018, 0xac500000,
+ 0x8f830018, 0xac600004, 0x8f820018, 0xac400008, 0x8f830018, 0xac60000c,
+ 0x8f820018, 0xac400010, 0x8f830018, 0xac600014, 0x8f850018, 0x3c036000,
+ 0x8c634448, 0x24040001, 0xaca30018, 0x9622000e, 0x8f850018, 0x3c034015,
+ 0x00431025, 0x0e0014cc, 0xaca2001c, 0x00001021, 0x8fbf001c, 0x8fb20018,
+ 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe0, 0xafb20018,
+ 0x3c120800, 0x8e420020, 0xafb00010, 0x27500100, 0xafbf001c, 0x10400041,
+ 0xafb10014, 0x0e00148e, 0x00000000, 0x8f830018, 0x8e020000, 0xac620000,
+ 0x8f840018, 0x24020100, 0xac820004, 0x8f830018, 0x8e02001c, 0xac620008,
+ 0x8f840018, 0x8e020018, 0xac82000c, 0x8f830018, 0x96020012, 0xac620010,
+ 0x8f840018, 0x96020008, 0xac820014, 0x8f850018, 0x3c026000, 0x8c434448,
+ 0x24040001, 0x3c020800, 0x245158c0, 0xaca30018, 0x9623000e, 0x8f850018,
+ 0x3c024017, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x96030008, 0x30630010,
+ 0x1060001c, 0x8e420020, 0x1040001a, 0x8e100000, 0x0e00148e, 0x00000000,
+ 0x8f820018, 0xac500000, 0x8f830018, 0xac600004, 0x8f820018, 0xac400008,
+ 0x8f830018, 0xac60000c, 0x8f820018, 0xac400010, 0x8f830018, 0xac600014,
+ 0x8f850018, 0x3c036000, 0x8c634448, 0x24040001, 0xaca30018, 0x9622000e,
+ 0x8f850018, 0x3c034015, 0x00431025, 0x0e0014cc, 0xaca2001c, 0x00001021,
+ 0x8fbf001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020,
+ 0x27bdfff0, 0x03e00008, 0x27bd0010, 0x27bdffd0, 0xafb10014, 0x00808821,
+ 0xafb40020, 0x00c0a021, 0xafbf0028, 0xafb50024, 0xafb3001c, 0xafb20018,
+ 0xafb00010, 0x93620023, 0x00e0a821, 0x30420040, 0x1040003e, 0x30b3ffff,
+ 0x3c120800, 0x8e420020, 0x1040003a, 0x8f70004c, 0x0e00148e, 0x00000000,
+ 0x8f820018, 0xac510000, 0x8f840018, 0x24020001, 0xac820004, 0x8f830018,
+ 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018,
+ 0x24040001, 0xac500014, 0x8f850018, 0x3c026000, 0x8c434448, 0x3c020800,
+ 0x245058c0, 0xaca30018, 0x9603000e, 0x8f850018, 0x3c024010, 0x00621825,
+ 0x0e0014cc, 0xaca3001c, 0x8e430020, 0x1060001b, 0x00000000, 0x0e00148e,
+ 0x00000000, 0x8f820018, 0xac510000, 0x8f840018, 0x3c02008d, 0xac820004,
+ 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+ 0x8f820018, 0xac550014, 0x8f850018, 0x3c036000, 0x8c634448, 0x24040001,
+ 0xaca30018, 0x9602000e, 0x8f850018, 0x3c034019, 0x00431025, 0x0e0014cc,
+ 0xaca2001c, 0x93620023, 0x30420020, 0x14400003, 0x3c120800, 0x1280003f,
+ 0x3c029000, 0x8e420020, 0x8f70004c, 0x1040003b, 0x3c029000, 0x0e00148e,
+ 0x00000000, 0x8f820018, 0xac510000, 0x8f840018, 0x24020001, 0xac820004,
+ 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+ 0x8f820018, 0x24040001, 0xac500014, 0x8f850018, 0x3c026000, 0x8c434448,
+ 0x3c020800, 0x245058c0, 0xaca30018, 0x9603000e, 0x8f850018, 0x3c024010,
+ 0x00621825, 0x0e0014cc, 0xaca3001c, 0x8e430020, 0x1060001c, 0x3c029000,
+ 0x0e00148e, 0x00000000, 0x8f820018, 0xac510000, 0x8f840018, 0x00131400,
+ 0xac820004, 0x8f830018, 0xac750008, 0x8f820018, 0xac40000c, 0x8f830018,
+ 0xac600010, 0x8f820018, 0xac400014, 0x8f850018, 0x3c036000, 0x8c634448,
+ 0x24040001, 0xaca30018, 0x9602000e, 0x8f850018, 0x3c03401b, 0x00431025,
+ 0x0e0014cc, 0xaca2001c, 0x3c029000, 0x34420001, 0x02221025, 0xaf420020,
+ 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93630023,
+ 0x3c028000, 0x34420001, 0x02221025, 0x8fbf0028, 0x8fb50024, 0x8fb40020,
+ 0x8fb3001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x3063009f, 0xa3630023,
+ 0xaf420020, 0x03e00008, 0x27bd0030, 0x27bdffe0, 0xafb10014, 0x27510100,
+ 0x3c029000, 0x34420001, 0xafb00010, 0x00808021, 0x02021025, 0x3c038000,
+ 0xafbf0018, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000,
+ 0xa7600008, 0x8f63005c, 0x3c028000, 0x34420001, 0xaf630148, 0x8f640050,
+ 0x02021025, 0x3c039000, 0xaf64017c, 0xaf420020, 0x8f450100, 0x34630001,
+ 0x3c048000, 0x00a31825, 0xaf430020, 0x8f420020, 0x00441024, 0x1440fffd,
+ 0x00000000, 0x9362007d, 0x3c038000, 0x34420001, 0xa362007d, 0x8f640074,
+ 0x34630001, 0x00a31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00a02021,
+ 0x0e000470, 0x24050de5, 0x0a001093, 0x3c020800, 0x8f4201f8, 0x00431024,
+ 0x1440fffd, 0x24020002, 0x3c031000, 0xaf4501c0, 0xa34201c4, 0xaf4301f8,
+ 0x3c020800, 0x8c430020, 0x1060001e, 0x8fbf0018, 0x0e00148e, 0x00000000,
+ 0x8f830018, 0xac700000, 0x9622000c, 0x8f840018, 0x00021400, 0xac820004,
+ 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+ 0x8f820018, 0xac400014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001,
+ 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c02401f, 0x00621825,
+ 0x0e0014cc, 0xaca3001c, 0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x03e00008,
+ 0x27bd0020, 0x3c020800, 0x24424c3c, 0xaf82000c, 0x03e00008, 0x00000000,
+ 0x27bdffe8, 0xafb00010, 0x27500100, 0xafbf0014, 0x8e02001c, 0x14400003,
+ 0x3c020800, 0x0000000d, 0x3c020800, 0x8c430020, 0x10600020, 0x00001021,
+ 0x0e00148e, 0x00000000, 0x8f830018, 0x8e020000, 0xac620000, 0x8f840018,
+ 0x8e02001c, 0xac820004, 0x8f830018, 0xac600008, 0x8f840018, 0x8e020018,
+ 0xac82000c, 0x8f850018, 0x96020012, 0xaca20010, 0x8f830018, 0x3c026000,
+ 0xac600014, 0x8f840018, 0x8c434448, 0x3c020800, 0xac830018, 0x944358ce,
+ 0x8f840018, 0x3c024012, 0x00621825, 0xac83001c, 0x0e0014cc, 0x24040001,
+ 0x00001021, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c020800,
+ 0x97430078, 0x9444002e, 0x00001021, 0x00641821, 0x3063fffe, 0x03e00008,
+ 0xa7630010, 0x27bdfff0, 0x00001021, 0x03e00008, 0x27bd0010, 0x8f420100,
+ 0x34420001, 0xaf4200a4, 0x03e00008, 0x00001021, 0x27bdffe0, 0xafbf0018,
+ 0xafb10014, 0xafb00010, 0x9362007e, 0x30d000ff, 0x16020031, 0x00808821,
+ 0x8f620178, 0x1602002e, 0x00000000, 0x9362007f, 0x1602002b, 0x00000000,
+ 0x9362007a, 0x16020004, 0x00000000, 0x0000000d, 0x00000000, 0x240009d2,
+ 0x0e0013e6, 0x00000000, 0x3c039000, 0x34630001, 0x3c048000, 0x02231825,
+ 0xa370007a, 0xaf430020, 0x8f420020, 0x00441024, 0x1440fffd, 0x00000000,
+ 0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074, 0x34630001, 0x02231825,
+ 0xaf430020, 0x04810006, 0x3c038000, 0x02202021, 0x0e000470, 0x240509dd,
+ 0x0a001138, 0x8fbf0018, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002,
+ 0x3c031000, 0xaf5101c0, 0xa34201c4, 0xaf4301f8, 0x0a001138, 0x8fbf0018,
+ 0x0000000d, 0x00000000, 0x240009e2, 0x8fbf0018, 0x8fb10014, 0x8fb00010,
+ 0x03e00008, 0x27bd0020, 0x27bdffe8, 0x30a500ff, 0x3c029000, 0x34420001,
+ 0x00803821, 0x00e21025, 0x3c038000, 0xafbf0010, 0xaf420020, 0x8f420020,
+ 0x00431024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0x00a21025,
+ 0xa362007d, 0x8f640074, 0x34630001, 0x00e31825, 0xaf430020, 0x04810006,
+ 0x3c038000, 0x00e02021, 0x0e000470, 0x00c02821, 0x0a001161, 0x8fbf0010,
+ 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf4701c0,
+ 0xa34201c4, 0xaf4301f8, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x3c020800,
+ 0x8c430020, 0x27bdffe8, 0xafb00010, 0x27500100, 0x10600024, 0xafbf0014,
+ 0x0e00148e, 0x00000000, 0x8f830018, 0x8e020000, 0xac620000, 0x8f840018,
+ 0x8e020004, 0xac820004, 0x8f830018, 0x8e020018, 0xac620008, 0x8f840018,
+ 0x8e03001c, 0xac83000c, 0x9602000c, 0x9203000a, 0x8f840018, 0x00021400,
+ 0x00431025, 0xac820010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f840018,
+ 0x8c434448, 0xac830018, 0x96020008, 0x3c030800, 0x946458ce, 0x8f850018,
+ 0x00021400, 0x00441025, 0x24040001, 0x0e0014cc, 0xaca2001c, 0x8fbf0014,
+ 0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c020800, 0x8c430020, 0x27bdffe8,
+ 0xafb00010, 0x27500100, 0x10600020, 0xafbf0014, 0x0e00148e, 0x00000000,
+ 0x8f820018, 0xac400000, 0x8f830018, 0xac600004, 0x8f820018, 0xac400008,
+ 0x8f830018, 0xac60000c, 0x9602000c, 0x9603000e, 0x8f840018, 0x00021400,
+ 0x00431025, 0xac820010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f840018,
+ 0x8c434448, 0xac830018, 0x96020008, 0x3c030800, 0x946458ce, 0x8f850018,
+ 0x00021400, 0x00441025, 0x24040001, 0x0e0014cc, 0xaca2001c, 0x8fbf0014,
+ 0x8fb00010, 0x03e00008, 0x27bd0018, 0x27bdffe8, 0xafb00010, 0x27500100,
+ 0xafbf0014, 0x9602000c, 0x10400024, 0x00802821, 0x3c020800, 0x8c430020,
+ 0x1060003a, 0x8fbf0014, 0x0e00148e, 0x00000000, 0x8f840018, 0x8e030000,
+ 0xac830000, 0x9602000c, 0x8f840018, 0x00021400, 0xac820004, 0x8f830018,
+ 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018,
+ 0xac400014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800,
+ 0xaca30018, 0x944358ce, 0x8f850018, 0x3c02400b, 0x00621825, 0x0e0014cc,
+ 0xaca3001c, 0x0a0011ff, 0x8fbf0014, 0x93620005, 0x30420010, 0x14400015,
+ 0x3c029000, 0x34420001, 0x00a21025, 0xaf420020, 0x3c038000, 0x8f420020,
+ 0x00431024, 0x1440fffd, 0x00000000, 0x3c038000, 0x93620005, 0x34630001,
+ 0x00a02021, 0x00a31825, 0x24055852, 0x34420010, 0xa3620005, 0x0e000766,
+ 0xaf430020, 0x0a0011ff, 0x8fbf0014, 0x0000000d, 0x8fbf0014, 0x8fb00010,
+ 0x03e00008, 0x27bd0018, 0x3c020800, 0x8c430020, 0x27bdffe8, 0xafb00010,
+ 0x27500100, 0x10600022, 0xafbf0014, 0x0e00148e, 0x00000000, 0x8f840018,
+ 0x8e020004, 0xac820000, 0x9603000c, 0x9762002c, 0x8f840018, 0x00031c00,
+ 0x00431025, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c,
+ 0x8f830018, 0xac600010, 0x8f820018, 0xac400014, 0x8f850018, 0x3c026000,
+ 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018,
+ 0x3c02400e, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x0e00122e, 0x8e040000,
+ 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c038000, 0x8f420278,
+ 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf440240, 0xa3420244,
+ 0x03e00008, 0xaf430278, 0x3c020800, 0x8c430020, 0x27bdffe0, 0xafb10014,
+ 0x00808821, 0xafb20018, 0x00c09021, 0xafb00010, 0x30b0ffff, 0x1060001c,
+ 0xafbf001c, 0x0e00148e, 0x00000000, 0x8f820018, 0xac510000, 0x8f840018,
+ 0x00101400, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c,
+ 0x8f830018, 0xac600010, 0x8f820018, 0xac520014, 0x8f840018, 0x3c026000,
+ 0x8c434448, 0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c024019,
+ 0x00621825, 0xac83001c, 0x0e0014cc, 0x24040001, 0x8fbf001c, 0x8fb20018,
+ 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0x27450100,
+ 0xafbf0010, 0x94a3000c, 0x240200c1, 0x14620031, 0x00803021, 0x3c029000,
+ 0x34420001, 0x00c21025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024,
+ 0x1440fffd, 0x3c028000, 0x34420001, 0x3c049000, 0x34840001, 0x3c058000,
+ 0x24030012, 0x00c21025, 0x00c42025, 0xa363003f, 0xaf420020, 0xaf440020,
+ 0x8f420020, 0x00451024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000,
+ 0x34420020, 0xa362007d, 0x8f640074, 0x34630001, 0x00c31825, 0xaf430020,
+ 0x04810006, 0x3c038000, 0x00c02021, 0x0e000470, 0x24050906, 0x0a0012a1,
+ 0x8fbf0010, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000,
+ 0xaf4601c0, 0xa34201c4, 0xaf4301f8, 0x0a0012a1, 0x8fbf0010, 0x00c02021,
+ 0x94a5000c, 0x24060001, 0x0e000fb1, 0x2407090e, 0x8fbf0010, 0x03e00008,
+ 0x27bd0018, 0x3c020800, 0x8c430020, 0x27bdffe0, 0xafb00010, 0x00808021,
+ 0xafb20018, 0x00a09021, 0xafb10014, 0x30d100ff, 0x1060001c, 0xafbf001c,
+ 0x0e00148e, 0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x24020001,
+ 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018,
+ 0xac600010, 0x8f820018, 0xac520014, 0x8f840018, 0x3c026000, 0x8c434448,
+ 0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c024010, 0x00621825,
+ 0xac83001c, 0x0e0014cc, 0x02202021, 0x8fbf001c, 0x8fb20018, 0x8fb10014,
+ 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0xafbf0014, 0xafb00010,
+ 0x93620005, 0x30420001, 0x10400036, 0x00808021, 0x3c029000, 0x34420001,
+ 0x02021025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+ 0x00000000, 0x93620023, 0x34420004, 0xa3620023, 0x93630005, 0x3c048000,
+ 0x3c020800, 0x306300fe, 0xa3630005, 0x8c430020, 0x34840001, 0x02042025,
+ 0xaf440020, 0x10600020, 0x8fbf0014, 0x0e00148e, 0x00000000, 0x8f820018,
+ 0xac500000, 0x93630082, 0x9362003f, 0x8f840018, 0x00031a00, 0x00431025,
+ 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018,
+ 0xac600010, 0x8f820018, 0xac400014, 0x8f840018, 0x3c026000, 0x8c434448,
+ 0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c02400a, 0x00621825,
+ 0xac83001c, 0x0e0014cc, 0x24040001, 0x8fbf0014, 0x8fb00010, 0x03e00008,
+ 0x27bd0018, 0x3c020800, 0x8c430020, 0x27bdffe0, 0xafb10014, 0x00808821,
+ 0xafb20018, 0x00a09021, 0xafb00010, 0x30d000ff, 0x1060002f, 0xafbf001c,
+ 0x0e00148e, 0x00000000, 0x8f820018, 0xac510000, 0x8f830018, 0xac700004,
+ 0x8f820018, 0xac520008, 0x8f830018, 0xac60000c, 0x8f820018, 0xac400010,
+ 0x9763006a, 0x00032880, 0x50a00001, 0x24050001, 0x97630068, 0x93640081,
+ 0x3c020800, 0x8c46004c, 0x00652821, 0x00852804, 0x00c5102b, 0x54400001,
+ 0x00a03021, 0x3c020800, 0x8c440050, 0x00c4182b, 0x54600001, 0x00c02021,
+ 0x8f830018, 0x2402fffe, 0x00822824, 0x3c026000, 0xac650014, 0x8f840018,
+ 0x8c434448, 0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c024011,
+ 0x00621825, 0xac83001c, 0x0e0014cc, 0x24040001, 0x8fbf001c, 0x8fb20018,
+ 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0xafbf0014,
+ 0xafb00010, 0x8f440100, 0x27500100, 0x8f650050, 0x0e0010fc, 0x9206001b,
+ 0x3c020800, 0x8c430020, 0x1060001d, 0x8e100018, 0x0e00148e, 0x00000000,
+ 0x8f840018, 0x8f420100, 0xac820000, 0x8f830018, 0xac700004, 0x8f840018,
+ 0x8f620050, 0xac820008, 0x8f830018, 0xac60000c, 0x8f820018, 0xac400010,
+ 0x8f830018, 0x3c026000, 0xac600014, 0x8f850018, 0x8c434448, 0x24040001,
+ 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c02401c, 0x00621825,
+ 0x0e0014cc, 0xaca3001c, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018,
+ 0x8f430238, 0x3c020800, 0x04610013, 0x8c44009c, 0x2406fffe, 0x3c050800,
+ 0x3c038000, 0x2484ffff, 0x14800009, 0x00000000, 0x97420078, 0x8ca3007c,
+ 0x24420001, 0x00461024, 0x24630001, 0xa7620010, 0x03e00008, 0xaca3007c,
+ 0x8f420238, 0x00431024, 0x1440fff3, 0x2484ffff, 0x8f420140, 0x3c031000,
+ 0xaf420200, 0x03e00008, 0xaf430238, 0x27bdffe8, 0x3c029000, 0xafbf0010,
+ 0x8f450140, 0x34420001, 0x3c038000, 0x00a21025, 0xaf420020, 0x8f420020,
+ 0x00431024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0x34420001,
+ 0xa362007d, 0x8f640074, 0x34630001, 0x00a31825, 0xaf430020, 0x04810006,
+ 0x3c038000, 0x00a02021, 0x0e000470, 0x24050ac7, 0x0a0013b9, 0x8fbf0010,
+ 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf4501c0,
+ 0xa34201c4, 0xaf4301f8, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x0000000d,
+ 0x03e00008, 0x00000000, 0x0000000d, 0x03e00008, 0x00000000, 0x24020001,
+ 0x03e00008, 0xa7620010, 0x9362003f, 0x304400ff, 0x3883000e, 0x2c630001,
+ 0x38820010, 0x2c420001, 0x00621825, 0x14600003, 0x24020012, 0x14820003,
+ 0x00000000, 0x03e00008, 0x00001021, 0x9363007e, 0x9362007a, 0x14620006,
+ 0x00000000, 0x9363007e, 0x24020001, 0x24630001, 0x03e00008, 0xa363007e,
+ 0x9362007e, 0x8f630178, 0x304200ff, 0x14430006, 0x00000000, 0x9363000b,
+ 0x24020001, 0x24630001, 0x03e00008, 0xa363000b, 0x03e00008, 0x00001021,
+ 0x9362000b, 0x10400023, 0x00001021, 0xa360000b, 0x9362003f, 0x304400ff,
+ 0x3883000e, 0x2c630001, 0x38820010, 0x2c420001, 0x00621825, 0x14600017,
+ 0x00001821, 0x24020012, 0x10820014, 0x00000000, 0x9363007e, 0x9362007a,
+ 0x14620007, 0x00000000, 0x9362007e, 0x24030001, 0x24420001, 0xa362007e,
+ 0x03e00008, 0x00601021, 0x9362007e, 0x8f630178, 0x304200ff, 0x14430005,
+ 0x00001821, 0x9362000b, 0x24030001, 0x24420001, 0xa362000b, 0x03e00008,
+ 0x00601021, 0x03e00008, 0x00000000, 0x24040001, 0xaf64000c, 0x8f6300dc,
+ 0x8f6200cc, 0x50620001, 0xa7640010, 0xa7640012, 0xa7640014, 0x03e00008,
+ 0xa7640016, 0x3c020800, 0x8c430020, 0x27bdffe8, 0x1060001b, 0xafbf0010,
+ 0x0e00148e, 0x00000000, 0x8f820018, 0xac400000, 0x8f830018, 0xac600004,
+ 0x8f820018, 0xac400008, 0x8f830018, 0xac60000c, 0x8f820018, 0xac400010,
+ 0x8f830018, 0x3c026000, 0xac600014, 0x8f840018, 0x8c434448, 0x3c020800,
+ 0xac830018, 0x944358ce, 0x8f840018, 0x3c024020, 0x00621825, 0xac83001c,
+ 0x0e0014cc, 0x24040001, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x3c020800,
+ 0x8c430020, 0x27bdffe0, 0xafb00010, 0x00a08021, 0xafb10014, 0x00c08821,
+ 0xafb20018, 0x00e09021, 0x1060001e, 0xafbf001c, 0x0e00148e, 0x00000000,
+ 0x8f840018, 0x8f420100, 0xac820000, 0x8f830018, 0xac700004, 0x8f820018,
+ 0xac510008, 0x8f830018, 0xac72000c, 0x8f840018, 0x8fa20030, 0xac820010,
+ 0x8f830018, 0x8fa20034, 0xac620014, 0x8f840018, 0x3c026000, 0x8c434448,
+ 0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c0240c9, 0x00621825,
+ 0xac83001c, 0x0e0014cc, 0x24040001, 0x8fbf001c, 0x8fb20018, 0x8fb10014,
+ 0x8fb00010, 0x03e00008, 0x27bd0020, 0x3c020800, 0x8c430020, 0x27bdffe8,
+ 0xafb00010, 0x27500100, 0x1060001d, 0xafbf0014, 0x0e00148e, 0x00000000,
+ 0x8f830018, 0x8e020004, 0xac620000, 0x8f840018, 0x8e020018, 0xac820004,
+ 0x8f850018, 0x8e020000, 0xaca20008, 0x8f830018, 0xac60000c, 0x8f820018,
+ 0xac400010, 0x8f830018, 0xac600014, 0x8f820018, 0xac400018, 0x96030008,
+ 0x3c020800, 0x944458ce, 0x8f850018, 0x00031c00, 0x00641825, 0x24040001,
+ 0x0e0014cc, 0xaca3001c, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018,
+ 0x3c060800, 0x24c558c0, 0x3c02000a, 0x03421821, 0x94640006, 0x94a2000a,
+ 0x00441023, 0x00021400, 0x00021c03, 0x04610006, 0xa4a40006, 0x0000000d,
+ 0x00000000, 0x2400005a, 0x0a0014a3, 0x24020001, 0x8f820014, 0x0062102b,
+ 0x14400002, 0x00001021, 0x24020001, 0x304200ff, 0x1040001c, 0x274a0400,
+ 0x3c07000a, 0x3c020800, 0x244558c0, 0x94a9000a, 0x8f880014, 0x03471021,
+ 0x94430006, 0x00402021, 0xa4a30006, 0x94820006, 0xa4a20006, 0x01221023,
+ 0x00021400, 0x00021403, 0x04410006, 0x0048102b, 0x0000000d, 0x00000000,
+ 0x2400005a, 0x0a0014be, 0x24020001, 0x14400002, 0x00001021, 0x24020001,
+ 0x304200ff, 0x1440ffec, 0x03471021, 0x24c458c0, 0x8c820010, 0xaf420038,
+ 0x8c830014, 0x3c020005, 0xaf43003c, 0xaf420030, 0xaf800010, 0xaf8a0018,
+ 0x03e00008, 0x00000000, 0x27bdffe0, 0x8f820010, 0x8f850018, 0x3c070800,
+ 0x24e858c0, 0xafbf001c, 0xafb20018, 0xafb10014, 0xafb00010, 0x9503000a,
+ 0x8d060014, 0x00009021, 0x309000ff, 0x00e08821, 0x24420001, 0x24a50020,
+ 0x24630001, 0xaf820010, 0xaf850018, 0xa503000a, 0x24c30020, 0x3c028000,
+ 0x04c10007, 0xad030014, 0x00621024, 0x14400005, 0x262258c0, 0x8d020010,
+ 0x24420001, 0xad020010, 0x262258c0, 0x9444000a, 0x94450018, 0x0010102b,
+ 0x00a41826, 0x2c630001, 0x00621825, 0x1060001c, 0x3c030006, 0x8f820010,
+ 0x24120001, 0x00021140, 0x00431025, 0xaf420030, 0x00000000, 0x00000000,
+ 0x00000000, 0x27450400, 0x8f420000, 0x30420010, 0x1040fffd, 0x262258c0,
+ 0x9444000a, 0x94430018, 0xaf800010, 0xaf850018, 0x14830012, 0x262758c0,
+ 0x0e00155a, 0x00000000, 0x1600000e, 0x262758c0, 0x0e00148e, 0x00000000,
+ 0x0a001517, 0x262758c0, 0x00041c00, 0x00031c03, 0x00051400, 0x00021403,
+ 0x00621823, 0x18600002, 0x3c026000, 0xac400808, 0x262758c0, 0x94e2000e,
+ 0x94e3000c, 0x24420001, 0xa4e2000e, 0x3042ffff, 0x50430001, 0xa4e0000e,
+ 0x12000005, 0x3c02000a, 0x94e2000a, 0xa74200a2, 0x0a001554, 0x02401021,
+ 0x03421821, 0x94640006, 0x94e2000a, 0x00441023, 0x00021400, 0x00021c03,
+ 0x04610006, 0xa4e40006, 0x0000000d, 0x00000000, 0x2400005a, 0x0a001536,
+ 0x24020001, 0x8f820014, 0x0062102b, 0x14400002, 0x00001021, 0x24020001,
+ 0x304200ff, 0x1040001b, 0x3c020800, 0x3c06000a, 0x244558c0, 0x94a8000a,
+ 0x8f870014, 0x03461021, 0x94430006, 0x00402021, 0xa4a30006, 0x94820006,
+ 0xa4a20006, 0x01021023, 0x00021400, 0x00021403, 0x04410006, 0x0047102b,
+ 0x0000000d, 0x00000000, 0x2400005a, 0x0a001550, 0x24020001, 0x14400002,
+ 0x00001021, 0x24020001, 0x304200ff, 0x1440ffec, 0x03461021, 0x02401021,
+ 0x8fbf001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020,
+ 0x3c020800, 0x244558c0, 0x94a3001a, 0x8ca40024, 0x00403021, 0x000318c0,
+ 0x00832021, 0xaf44003c, 0x8ca20020, 0xaf420038, 0x3c020050, 0x34420008,
+ 0xaf420030, 0x00000000, 0x00000000, 0x00000000, 0x8f420000, 0x30420020,
+ 0x1040fffd, 0x00000000, 0x8f430400, 0x24c658c0, 0xacc30010, 0x8f420404,
+ 0x3c030020, 0xacc20014, 0xaf430030, 0x94c40018, 0x94c3001c, 0x94c2001a,
+ 0x94c5001e, 0x00832021, 0x24420001, 0xa4c2001a, 0x3042ffff, 0x14450002,
+ 0xa4c40018, 0xa4c0001a, 0x03e00008, 0x00000000, 0x8f820010, 0x3c030006,
+ 0x00021140, 0x00431025, 0xaf420030, 0x00000000, 0x00000000, 0x00000000,
+ 0x27430400, 0x8f420000, 0x30420010, 0x1040fffd, 0x00000000, 0xaf800010,
+ 0xaf830018, 0x03e00008, 0x00000000, 0x27bdffe8, 0xafb00010, 0x3c100800,
+ 0x261058c0, 0x3c05000a, 0x02002021, 0x03452821, 0xafbf0014, 0x0e0015b0,
+ 0x2406000a, 0x96020002, 0x9603001e, 0x3042000f, 0x24420003, 0x00431804,
+ 0x24027fff, 0x0043102b, 0xaf830014, 0x10400004, 0x00000000, 0x0000000d,
+ 0x00000000, 0x24000043, 0x0e00155a, 0x00000000, 0x8fbf0014, 0x8fb00010,
+ 0x03e00008, 0x27bd0018, 0x10c00007, 0x00000000, 0x8ca20000, 0x24c6ffff,
+ 0x24a50004, 0xac820000, 0x14c0fffb, 0x24840004, 0x03e00008, 0x00000000,
+ 0x0a0015c1, 0x00a01021, 0xac860000, 0x00000000, 0x00000000, 0x24840004,
+ 0x00a01021, 0x1440fffa, 0x24a5ffff, 0x03e00008, 0x00000000, 0x3c036000,
+ 0x8c642b7c, 0x3c036010, 0x8c6553fc, 0x00041582, 0x00042302, 0x308403ff,
+ 0x00052d82, 0x00441026, 0x0002102b, 0x0005282b, 0x00451025, 0x1440000d,
+ 0x3c020050, 0x34420004, 0xaf400038, 0xaf40003c, 0xaf420030, 0x00000000,
+ 0x00000000, 0x8f420000, 0x30420020, 0x1040fffd, 0x3c020020, 0xaf420030,
+ 0x0000000d, 0x03e00008, 0x00000000, 0x3c020050, 0x34420004, 0xaf440038,
+ 0xaf45003c, 0xaf420030, 0x00000000, 0x00000000, 0x8f420000, 0x30420020,
+ 0x1040fffd, 0x3c020020, 0xaf420030, 0x03e00008, 0x00000000, 0x00000000};
+
+static u32 bce_COM_b06FwData[(0x0/4) + 1] = { 0x0 };
+static u32 bce_COM_b06FwRodata[(0x58/4) + 1] = {
+ 0x08002428, 0x0800245c, 0x0800245c, 0x0800245c, 0x0800245c, 0x0800245c,
+ 0x08002380, 0x0800245c, 0x080023e4, 0x0800245c, 0x0800231c, 0x0800245c,
+ 0x0800245c, 0x0800245c, 0x08002328, 0x00000000, 0x08003240, 0x08003270,
+ 0x080032a0, 0x080032d0, 0x08003300, 0x00000000, 0x00000000 };
+static u32 bce_COM_b06FwBss[(0x88/4) + 1] = { 0x0 };
+static u32 bce_COM_b06FwSbss[(0x1c/4) + 1] = { 0x0 };
+
+static int bce_RXP_b06FwReleaseMajor = 0x1;
+static int bce_RXP_b06FwReleaseMinor = 0x0;
+static int bce_RXP_b06FwReleaseFix = 0x0;
+static u32 bce_RXP_b06FwStartAddr = 0x08003184;
+static u32 bce_RXP_b06FwTextAddr = 0x08000000;
+static int bce_RXP_b06FwTextLen = 0x588c;
+static u32 bce_RXP_b06FwDataAddr = 0x080058e0;
+static int bce_RXP_b06FwDataLen = 0x0;
+static u32 bce_RXP_b06FwRodataAddr = 0x08005890;
+static int bce_RXP_b06FwRodataLen = 0x28;
+static u32 bce_RXP_b06FwBssAddr = 0x08005900;
+static int bce_RXP_b06FwBssLen = 0x13a4;
+static u32 bce_RXP_b06FwSbssAddr = 0x080058e0;
+static int bce_RXP_b06FwSbssLen = 0x1c;
+static u32 bce_RXP_b06FwText[(0x588c/4) + 1] = {
+ 0x0a000c61, 0x00000000, 0x00000000, 0x0000000d, 0x72787020, 0x322e362e,
+ 0x31000000, 0x02060103, 0x00000000, 0x0000000d, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x10000003, 0x00000000, 0x0000000d, 0x0000000d,
+ 0x3c020800, 0x244258e0, 0x3c030800, 0x24636ca4, 0xac400000, 0x0043202b,
+ 0x1480fffd, 0x24420004, 0x3c1d0800, 0x37bd7ffc, 0x03a0f021, 0x3c100800,
+ 0x26103184, 0x3c1c0800, 0x279c58e0, 0x0e00104a, 0x00000000, 0x0000000d,
+ 0x27bdffe8, 0xafb00010, 0xafbf0014, 0x0e000f1d, 0x00808021, 0x1440000d,
+ 0x00000000, 0x8f820010, 0x10400005, 0x00000000, 0x9743011c, 0x9742011e,
+ 0x0a000c89, 0x00021400, 0x9743011e, 0x9742011c, 0x00021400, 0x00621825,
+ 0xaf830004, 0x8f840008, 0x3c020020, 0x34424000, 0x00821824, 0x54620004,
+ 0x3c020020, 0x8f820014, 0x0a000c9a, 0x34421000, 0x34428000, 0x00821824,
+ 0x14620004, 0x00000000, 0x8f820014, 0x34428000, 0xaf820014, 0x8f820008,
+ 0x9743010c, 0x00403021, 0x30421000, 0x10400010, 0x3069ffff, 0x30c20020,
+ 0x1440000e, 0x24070005, 0x3c021000, 0x00c21024, 0x10400009, 0x3c030dff,
+ 0x3463ffff, 0x3c020e00, 0x00c21024, 0x0062182b, 0x50600004, 0x24070001,
+ 0x0a000cb2, 0x3c020800, 0x24070001, 0x3c020800, 0x8c430034, 0x1460001d,
+ 0x00405821, 0x8f820014, 0x30424000, 0x1440001a, 0x3c020001, 0x3c021f01,
+ 0x00c24024, 0x3c031000, 0x15030015, 0x3c020001, 0x31220200, 0x14400012,
+ 0x3c020001, 0x9744010e, 0x24020003, 0xa342018b, 0x97850016, 0x24020002,
+ 0x34e30002, 0xaf400180, 0xa742018c, 0xa7430188, 0x24840004, 0x30a5bfff,
+ 0xa744018e, 0xa74501a6, 0xaf4801b8, 0x0a000f19, 0x00001021, 0x3c020001,
+ 0x00c21024, 0x1040002f, 0x00000000, 0x9742010e, 0x3c038000, 0x3046ffff,
+ 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, 0x9784000a,
+ 0x8f850004, 0x8f870014, 0x24020080, 0x24030002, 0xaf420180, 0x24020003,
+ 0xa743018c, 0xa746018e, 0xa7420188, 0x30e28000, 0xa7440190, 0x1040000c,
+ 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021, 0x24424004, 0x8c430000,
+ 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, 0x00e21024, 0xaf820014,
+ 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff,
+ 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x0a000f19,
+ 0x00001021, 0x8f820014, 0x30434000, 0x10600016, 0x00404021, 0x3c020f00,
+ 0x00c21024, 0x14400012, 0x00000000, 0x93420116, 0x34424000, 0x03421821,
+ 0x94650002, 0x2ca21389, 0x1040000b, 0x3c020800, 0x24425900, 0x00051942,
+ 0x00031880, 0x00621821, 0x30a5001f, 0x8c640000, 0x24020001, 0x00a21004,
+ 0x00822024, 0x02048025, 0x12000030, 0x3c021000, 0x9742010e, 0x34e80002,
+ 0x3c038000, 0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd,
+ 0x24020003, 0xa342018b, 0x9784000a, 0x8f850004, 0x8f870014, 0x24020180,
+ 0x24030002, 0xaf420180, 0xa743018c, 0xa746018e, 0xa7480188, 0x30e28000,
+ 0xa7440190, 0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021,
+ 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff,
+ 0x00e21024, 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff,
+ 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000,
+ 0xaf4201b8, 0x0a000f19, 0x00001021, 0x00c21024, 0x104000c0, 0x3c020800,
+ 0x8c430030, 0x10600037, 0x31024000, 0x10400035, 0x3c030f00, 0x00c31824,
+ 0x3c020100, 0x0043102b, 0x14400031, 0x3c030800, 0x9742010e, 0x34e80002,
+ 0x3c038000, 0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd,
+ 0x24020003, 0xa342018b, 0x9784000a, 0x8f850004, 0x8f870014, 0x24020080,
+ 0x24030002, 0xaf420180, 0xa743018c, 0xa746018e, 0xa7480188, 0x30e28000,
+ 0xa7440190, 0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021,
+ 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff,
+ 0x00e21024, 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff,
+ 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000,
+ 0xaf4201b8, 0x0a000f19, 0x00001021, 0x3c030800, 0x8c620024, 0x30420008,
+ 0x10400035, 0x34ea0002, 0x3c020f00, 0x00c21024, 0x14400032, 0x8d620034,
+ 0x31220200, 0x1040002f, 0x8d620034, 0x9742010e, 0x30e8fffb, 0x3c038000,
+ 0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003,
+ 0xa342018b, 0x9784000a, 0x8f850004, 0x8f870014, 0x24020180, 0x24030002,
+ 0xaf420180, 0xa743018c, 0xa746018e, 0xa7480188, 0x30e28000, 0xa7440190,
+ 0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021, 0x24424004,
+ 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, 0x00e21024,
+ 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00,
+ 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8,
+ 0x8d620034, 0x8f860008, 0x10400012, 0x30c20100, 0x10400010, 0x3c020f00,
+ 0x00c21024, 0x3c030200, 0x1043000c, 0x3c020800, 0x8c430038, 0x8f840004,
+ 0x3c020800, 0x2442003c, 0x2463ffff, 0x00832024, 0x00822021, 0x90830000,
+ 0x24630004, 0x0a000de1, 0x000329c0, 0x00000000, 0x00061602, 0x3042000f,
+ 0x000229c0, 0x3c04fc00, 0x00441021, 0x3c030300, 0x0062182b, 0x50600001,
+ 0x24050800, 0x9742010e, 0x3148ffff, 0x3c038000, 0x24420004, 0x3046ffff,
+ 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, 0x9783000a,
+ 0x8f840004, 0x8f870014, 0x24020002, 0xaf450180, 0xa742018c, 0xa746018e,
+ 0xa7480188, 0x30e28000, 0xa7430190, 0x1040000c, 0xaf4401a8, 0x93420116,
+ 0x304200fc, 0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004,
+ 0x3c02ffff, 0x34427fff, 0x00e21024, 0xaf820014, 0x97820016, 0x9743010c,
+ 0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6,
+ 0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x0a000f19, 0x00001021, 0x8f424000,
+ 0x30420100, 0x104000d5, 0x3c020800, 0x8c440024, 0x24030001, 0x1483002f,
+ 0x00405021, 0x9742010e, 0x34e70002, 0x3c038000, 0x24420004, 0x3045ffff,
+ 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, 0x9783000a,
+ 0x8f840004, 0x8f860014, 0x24020002, 0xaf400180, 0xa742018c, 0xa745018e,
+ 0xa7470188, 0x30c28000, 0xa7430190, 0x1040000c, 0xaf4401a8, 0x93420116,
+ 0x304200fc, 0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004,
+ 0x3c02ffff, 0x34427fff, 0x00c21024, 0xaf820014, 0x97820016, 0x9743010c,
+ 0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6,
+ 0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x0a000f19, 0x00001021, 0x30820001,
+ 0x1040002e, 0x30eb0004, 0x9742010e, 0x30e9fffb, 0x3c038000, 0x24420004,
+ 0x3045ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b,
+ 0x9783000a, 0x8f840004, 0x8f860014, 0x24020002, 0xaf400180, 0xa742018c,
+ 0xa745018e, 0xa7470188, 0x30c28000, 0xa7430190, 0x1040000c, 0xaf4401a8,
+ 0x93420116, 0x304200fc, 0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff,
+ 0x14600004, 0x3c02ffff, 0x34427fff, 0x00c21024, 0xaf820014, 0x97820016,
+ 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825,
+ 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x3127ffff, 0x8d420024,
+ 0x30420004, 0x10400030, 0x8d420024, 0x9742010e, 0x30e9fffb, 0x3c038000,
+ 0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003,
+ 0xa342018b, 0x9784000a, 0x8f850004, 0x8f880014, 0x24020100, 0x24030002,
+ 0xaf420180, 0xa743018c, 0xa746018e, 0xa7470188, 0x31028000, 0xa7440190,
+ 0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021, 0x24424004,
+ 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, 0x01021024,
+ 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00,
+ 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8,
+ 0x3127ffff, 0x8d420024, 0x30420008, 0x1040002d, 0x00000000, 0x9742010e,
+ 0x3c038000, 0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd,
+ 0x24020003, 0xa342018b, 0x9784000a, 0x8f850004, 0x8f880014, 0x24020180,
+ 0x24030002, 0xaf420180, 0xa743018c, 0xa746018e, 0xa7470188, 0x31028000,
+ 0xa7440190, 0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021,
+ 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff,
+ 0x01021024, 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff,
+ 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000,
+ 0xaf4201b8, 0x15600041, 0x00001021, 0x27440180, 0x3c038000, 0x8f4201b8,
+ 0x00431024, 0x1440fffd, 0x24022000, 0x24030002, 0xa4820008, 0xa083000b,
+ 0xa4800010, 0x3c021000, 0xaf4201b8, 0x0a000f19, 0x00001021, 0x3c030800,
+ 0x8c620024, 0x30420001, 0x1040002e, 0x00001021, 0x9742010e, 0x34e70002,
+ 0x3c038000, 0x24420004, 0x3045ffff, 0x8f4201b8, 0x00431024, 0x1440fffd,
+ 0x24020003, 0xa342018b, 0x9783000a, 0x8f840004, 0x8f860014, 0x24020002,
+ 0xaf400180, 0xa742018c, 0xa745018e, 0xa7470188, 0x30c28000, 0xa7430190,
+ 0x1040000c, 0xaf4401a8, 0x93420116, 0x304200fc, 0x005a1021, 0x24424004,
+ 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, 0x00c21024,
+ 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00,
+ 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8,
+ 0x00001021, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x8f4b0070,
+ 0x93420112, 0x8f840008, 0x00022882, 0x30820100, 0x14400003, 0x24a30003,
+ 0x03e00008, 0x00001021, 0x30824000, 0x10400010, 0x27424000, 0x00031880,
+ 0x00431021, 0x8c470000, 0x24a30004, 0x00031880, 0x27424000, 0x00431021,
+ 0x8c490000, 0x93430116, 0x27424000, 0x306300fc, 0x00431021, 0x8c4a0000,
+ 0x0a000f45, 0x3c030800, 0x30822000, 0x1040ffea, 0x00031880, 0x27424000,
+ 0x00431021, 0x8c470000, 0x24a30004, 0x00031880, 0x27424000, 0x00431021,
+ 0x8c490000, 0x00005021, 0x3c030800, 0x24680100, 0x00071602, 0x00021080,
+ 0x00481021, 0x8c460000, 0x00071b82, 0x306303fc, 0x01031821, 0x8c640400,
+ 0x00071182, 0x304203fc, 0x01021021, 0x8c450800, 0x30e300ff, 0x00031880,
+ 0x01031821, 0x00091602, 0x00021080, 0x01021021, 0x00c43026, 0x8c640c00,
+ 0x8c431000, 0x00c53026, 0x00091382, 0x304203fc, 0x01021021, 0x8c451400,
+ 0x312200ff, 0x00021080, 0x01021021, 0x00c43026, 0x00c33026, 0x00091982,
+ 0x306303fc, 0x01031821, 0x8c641800, 0x8c431c00, 0x00c53026, 0x00c43026,
+ 0x11400015, 0x00c33026, 0x000a1602, 0x00021080, 0x01021021, 0x8c432000,
+ 0x000a1382, 0x304203fc, 0x01021021, 0x8c452400, 0x314200ff, 0x00021080,
+ 0x01021021, 0x00c33026, 0x000a1982, 0x306303fc, 0x01031821, 0x8c642800,
+ 0x8c432c00, 0x00c53026, 0x00c43026, 0x00c33026, 0x8f430070, 0x3c050800,
+ 0x8ca43100, 0x2c820020, 0x10400008, 0x006b5823, 0x3c020800, 0x24423104,
+ 0x00041880, 0x00621821, 0x24820001, 0xac6b0000, 0xaca23100, 0xaf860004,
+ 0x03e00008, 0x24020001, 0x27bdffe8, 0xafbf0010, 0x8f460128, 0x8f840010,
+ 0xaf460020, 0x8f450104, 0x8f420100, 0x24030800, 0xaf850008, 0xaf820014,
+ 0xaf4301b8, 0x1080000a, 0x3c020800, 0x8c430034, 0x10600007, 0x30a22000,
+ 0x10400005, 0x34a30100, 0x8f82000c, 0xaf830008, 0x24420001, 0xaf82000c,
+ 0x3c020800, 0x8c4300c0, 0x10600006, 0x3c030800, 0x8c6200c4, 0x24040001,
+ 0x24420001, 0x0a000fd5, 0xac6200c4, 0x8f820008, 0x3c030010, 0x00431024,
+ 0x14400009, 0x3c02001f, 0x3c030800, 0x8c620020, 0x00002021, 0x24420001,
+ 0x0e000c78, 0xac620020, 0x0a000fd5, 0x00402021, 0x3442ff00, 0x14c20009,
+ 0x2403bfff, 0x3c030800, 0x8c620020, 0x24040001, 0x24420001, 0x0e000c78,
+ 0xac620020, 0x0a000fd5, 0x00402021, 0x8f820014, 0x00431024, 0x14400006,
+ 0x00000000, 0xaf400048, 0x0e0011a9, 0xaf400040, 0x0a000fd5, 0x00402021,
+ 0x0e001563, 0x00000000, 0x00402021, 0x10800005, 0x3c024000, 0x8f430124,
+ 0x3c026020, 0xac430014, 0x3c024000, 0xaf420138, 0x00000000, 0x8fbf0010,
+ 0x03e00008, 0x27bd0018, 0x27bdffe0, 0xafbf0018, 0xafb10014, 0xafb00010,
+ 0x8f420140, 0xaf420020, 0x8f430148, 0x3c027000, 0x00621824, 0x3c023000,
+ 0x10620021, 0x0043102b, 0x14400006, 0x3c024000, 0x3c022000, 0x10620009,
+ 0x3c024000, 0x0a001040, 0x00000000, 0x10620045, 0x3c025000, 0x10620047,
+ 0x3c024000, 0x0a001040, 0x00000000, 0x27440180, 0x3c038000, 0x8f4201b8,
+ 0x00431024, 0x1440fffd, 0x00000000, 0x8f420148, 0x24030002, 0xa083000b,
+ 0x00021402, 0xa4820008, 0x8f430148, 0xa4830010, 0x8f420144, 0x3c031000,
+ 0xac820024, 0xaf4301b8, 0x0a001040, 0x3c024000, 0x8f420148, 0x24030002,
+ 0x3044ffff, 0x00021402, 0x305000ff, 0x1203000c, 0x27510180, 0x2a020003,
+ 0x10400005, 0x24020003, 0x0600001d, 0x36053000, 0x0a001027, 0x3c038000,
+ 0x12020007, 0x00000000, 0x0a001034, 0x00000000, 0x0e00112c, 0x00000000,
+ 0x0a001025, 0x00402021, 0x0e00113e, 0x00000000, 0x00402021, 0x36053000,
+ 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020002, 0xa6250008,
+ 0xa222000b, 0xa6240010, 0x8f420144, 0x3c031000, 0xae220024, 0xaf4301b8,
+ 0x0a001040, 0x3c024000, 0x0000000d, 0x00000000, 0x240002bf, 0x0a001040,
+ 0x3c024000, 0x0e001441, 0x00000000, 0x0a001040, 0x3c024000, 0x0e0015ea,
+ 0x00000000, 0x3c024000, 0xaf420178, 0x00000000, 0x8fbf0018, 0x8fb10014,
+ 0x8fb00010, 0x03e00008, 0x27bd0020, 0x24020800, 0x03e00008, 0xaf4201b8,
+ 0x27bdffe8, 0x3c04600c, 0xafbf0014, 0xafb00010, 0x8c825000, 0x3c1a8000,
+ 0x2403ff7f, 0x3c106000, 0x00431024, 0x3442380c, 0x24030003, 0xac825000,
+ 0x3c020008, 0xaf430008, 0x8e040808, 0x0342d825, 0x8e020808, 0x3c030800,
+ 0xac600020, 0x3084fff0, 0x2c840001, 0x3042fff0, 0x38420010, 0x2c420001,
+ 0xaf840010, 0xaf820000, 0x0e00160c, 0x00000000, 0x0e001561, 0x00000000,
+ 0x3c020400, 0x3442000c, 0x3c03ffff, 0x34630806, 0xae021948, 0xae03194c,
+ 0x8e021980, 0x34420200, 0xae021980, 0x8f500000, 0x32020003, 0x1040fffd,
+ 0x32020001, 0x10400004, 0x32020002, 0x0e000f92, 0x00000000, 0x32020002,
+ 0x1040fff6, 0x00000000, 0x0e000fe0, 0x00000000, 0x0a001071, 0x00000000,
+ 0x27bdffe8, 0x3c04600c, 0xafbf0014, 0xafb00010, 0x8c825000, 0x3c1a8000,
+ 0x2403ff7f, 0x3c106000, 0x00431024, 0x3442380c, 0x24030003, 0xac825000,
+ 0x3c020008, 0xaf430008, 0x8e040808, 0x0342d825, 0x8e020808, 0x3c030800,
+ 0xac600020, 0x3084fff0, 0x2c840001, 0x3042fff0, 0x38420010, 0x2c420001,
+ 0xaf840010, 0xaf820000, 0x0e00160c, 0x00000000, 0x0e001561, 0x00000000,
+ 0x3c020400, 0x3442000c, 0x3c03ffff, 0x34630806, 0xae021948, 0xae03194c,
+ 0x8e021980, 0x8fbf0014, 0x34420200, 0xae021980, 0x8fb00010, 0x03e00008,
+ 0x27bd0018, 0x00804821, 0x30a5ffff, 0x30c6ffff, 0x30e7ffff, 0x3c038000,
+ 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, 0x9783000a,
+ 0x8f840004, 0x8f880014, 0xaf490180, 0xa745018c, 0xa746018e, 0xa7470188,
+ 0x31028000, 0xa7430190, 0x1040000c, 0xaf4401a8, 0x93420116, 0x304200fc,
+ 0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff,
+ 0x34427fff, 0x01021024, 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104,
+ 0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac,
+ 0x3c021000, 0xaf4201b8, 0x03e00008, 0x00000000, 0x27440180, 0x3c038000,
+ 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24022000, 0x24030002, 0xa4820008,
+ 0xa083000b, 0xa4800010, 0x3c021000, 0xaf4201b8, 0x03e00008, 0x00000000,
+ 0x27440180, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000,
+ 0x8f420148, 0x24030002, 0xa083000b, 0x00021402, 0xa4820008, 0x8f430148,
+ 0xa4830010, 0x8f420144, 0x3c031000, 0xac820024, 0x03e00008, 0xaf4301b8,
+ 0x27bdffe0, 0xafbf0018, 0xafb10014, 0xafb00010, 0x8f420148, 0x24030002,
+ 0x3044ffff, 0x00021402, 0x305000ff, 0x1203000c, 0x27510180, 0x2a020003,
+ 0x10400005, 0x24020003, 0x0600001d, 0x36053000, 0x0a001117, 0x3c038000,
+ 0x12020007, 0x00000000, 0x0a001124, 0x00000000, 0x0e00112c, 0x00000000,
+ 0x0a001115, 0x00402021, 0x0e00113e, 0x00000000, 0x00402021, 0x36053000,
+ 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020002, 0xa6250008,
+ 0xa222000b, 0xa6240010, 0x8f420144, 0x3c031000, 0xae220024, 0xaf4301b8,
+ 0x0a001128, 0x8fbf0018, 0x0000000d, 0x00000000, 0x240002bf, 0x8fbf0018,
+ 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x3084ffff, 0x2c821389,
+ 0x1040000d, 0x00001021, 0x3c030800, 0x24635900, 0x00042942, 0x00052880,
+ 0x00a32821, 0x3086001f, 0x8ca40000, 0x24030001, 0x00c31804, 0x00832025,
+ 0x03e00008, 0xaca40000, 0x03e00008, 0x24020091, 0x3084ffff, 0x2c821389,
+ 0x1040000e, 0x00001021, 0x3c030800, 0x24635900, 0x00042942, 0x00052880,
+ 0x00a32821, 0x3086001f, 0x24030001, 0x8ca40000, 0x00c31804, 0x00031827,
+ 0x00832024, 0x03e00008, 0xaca40000, 0x03e00008, 0x24020091, 0x9482000c,
+ 0x24870014, 0x00021302, 0x00021080, 0x00824021, 0x00e8182b, 0x1060004f,
+ 0x00000000, 0x90e30000, 0x2c620009, 0x10400047, 0x3c020800, 0x24425890,
+ 0x00031880, 0x00621821, 0x8c640000, 0x00800008, 0x00000000, 0x0a0011a4,
+ 0x24e70001, 0x90e30001, 0x2402000a, 0x54620024, 0x01003821, 0x01071023,
+ 0x2c42000a, 0x54400020, 0x01003821, 0x3c050800, 0x8ca26c98, 0x24e70002,
+ 0x34420100, 0xaca26c98, 0x90e30000, 0x90e20001, 0x90e40002, 0x90e60003,
+ 0x24e70004, 0x24a56c98, 0x00031e00, 0x00021400, 0x00621825, 0x00042200,
+ 0x00641825, 0x00661825, 0xaca30004, 0x90e20000, 0x90e30001, 0x90e40002,
+ 0x90e60003, 0x24e70004, 0x00021600, 0x00031c00, 0x00431025, 0x00042200,
+ 0x00441025, 0x00461025, 0x0a0011a4, 0xaca20008, 0x90e30001, 0x24020004,
+ 0x1062000e, 0x00601021, 0x0a00119e, 0x01001021, 0x90e30001, 0x24020003,
+ 0x10620008, 0x00601021, 0x0a00119e, 0x01001021, 0x90e30001, 0x24020002,
+ 0x14620003, 0x01001021, 0x00601021, 0x00e21021, 0x0a0011a4, 0x00403821,
+ 0x90e20001, 0x0a0011a4, 0x00e23821, 0x01003821, 0x00e8102b, 0x5440ffb4,
+ 0x90e30000, 0x03e00008, 0x24020001, 0x27bdff90, 0x3c030800, 0xafbf006c,
+ 0xafbe0068, 0xafb70064, 0xafb60060, 0xafb5005c, 0xafb40058, 0xafb30054,
+ 0xafb20050, 0xafb1004c, 0xafb00048, 0xac606c98, 0x93620023, 0x30420010,
+ 0x1440027c, 0x24020001, 0x93420116, 0x93630005, 0x34424000, 0x30630001,
+ 0x14600005, 0x0342b021, 0x0e0015e0, 0x00000000, 0x0a001436, 0x8fbf006c,
+ 0x93420112, 0x8f430104, 0x3c040020, 0x34424000, 0x00641824, 0x10600012,
+ 0x03422821, 0x27450180, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd,
+ 0x00000000, 0x8f420128, 0xaca20000, 0x8f640040, 0x24030008, 0x240240c1,
+ 0xa4a20008, 0x24020002, 0xa0a2000b, 0x3c021000, 0x0a0011f1, 0xa0a3000a,
+ 0x8f420104, 0x3c030040, 0x00431024, 0x1040001d, 0x3c038000, 0x27450180,
+ 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x8f420128, 0xaca20000,
+ 0x8f640040, 0x24030010, 0x240240c1, 0xa4a20008, 0x24020002, 0xa0a3000a,
+ 0x24030008, 0xa0a2000b, 0x3c021000, 0xa4a30010, 0xa0a00012, 0xa0a00013,
+ 0xaca00014, 0xaca00024, 0xaca00028, 0xaca0002c, 0xaca40018, 0x0e0015e0,
+ 0xaf4201b8, 0x0a001436, 0x8fbf006c, 0x8f820000, 0x10400016, 0x00000000,
+ 0x8f420104, 0x3c030001, 0x00431024, 0x10400011, 0x00000000, 0x8ca3000c,
+ 0x8f620030, 0x1462022d, 0x24020001, 0x8ca30010, 0x8f62002c, 0x14620229,
+ 0x24020001, 0x9763003a, 0x96c20000, 0x14430225, 0x24020001, 0x97630038,
+ 0x96c20002, 0x14430221, 0x24020001, 0xaf400048, 0xaf400054, 0xaf400040,
+ 0x8f740040, 0x8f650048, 0x00b43023, 0x04c10004, 0x00000000, 0x0000000d,
+ 0x00000000, 0x240001af, 0x9742011a, 0x3052ffff, 0x12400004, 0x8ed30004,
+ 0x02721021, 0x0a001228, 0x2451ffff, 0x02608821, 0x92d7000d, 0xa7a00020,
+ 0xa3a0001a, 0xafa00028, 0x9362003f, 0x32e30004, 0x1060003a, 0x305000ff,
+ 0x24040012, 0x16040006, 0x24020001, 0x3c040800, 0x8c830028, 0x24630001,
+ 0x0a001328, 0xac830028, 0x8f620044, 0x16620010, 0x27a60010, 0x27450180,
+ 0x3c038000, 0x2402001a, 0xa7a20020, 0x24020020, 0xafb40028, 0xa3b00022,
+ 0xa3a40023, 0xa3a2001a, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000,
+ 0x0a00130d, 0x00000000, 0x8f620044, 0x02621023, 0x0440001a, 0x02651023,
+ 0x044100d9, 0x24020001, 0x3c020800, 0x8c4300d8, 0x10600004, 0x24020001,
+ 0xa7a20020, 0x0a00125e, 0xafb40028, 0x2402001a, 0xa7a20020, 0x24020020,
+ 0xafb40028, 0xa3b00022, 0xa3a40023, 0xa3a2001a, 0x27a60010, 0x27450180,
+ 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x0a00130d,
+ 0x00000000, 0x0a001328, 0x24020001, 0x0293f023, 0x1bc00016, 0x025e102a,
+ 0x54400007, 0x32f700fe, 0x57d2000f, 0x027e9821, 0x32e20001, 0x5440000c,
+ 0x027e9821, 0x32f700fe, 0x0240f021, 0x3c040800, 0x8c8300c8, 0x00009021,
+ 0x24020001, 0xa7a20020, 0xafb40028, 0x24630001, 0x0a001282, 0xac8300c8,
+ 0x025e1023, 0x0a001282, 0x3052ffff, 0x0000f021, 0x24a2ffff, 0x02221823,
+ 0x1860001f, 0x0072102a, 0x54400019, 0x00a08821, 0x97a20020, 0x3c040800,
+ 0x8c8300cc, 0xafb40028, 0x34420001, 0x24630001, 0xa7a20020, 0x02741026,
+ 0x2c420001, 0xac8300cc, 0x2cc30001, 0x00431024, 0x1440000a, 0x02401821,
+ 0x27a60010, 0x27450180, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd,
+ 0x00000000, 0x0a00130d, 0x00000000, 0x00a08821, 0x02431023, 0x3052ffff,
+ 0x0a0012ae, 0x32f700f6, 0x02741023, 0x18400008, 0x97a20020, 0x3c040800,
+ 0x8c8300d4, 0xafb30028, 0x34420400, 0x24630001, 0xa7a20020, 0xac8300d4,
+ 0x32e20002, 0x1040001c, 0x32e20010, 0x8f620044, 0x1662000d, 0x27a60010,
+ 0x97a20020, 0x27450180, 0x3c038000, 0xafb40028, 0x34420001, 0xa7a20020,
+ 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x0a00130d, 0x00000000,
+ 0x97a20020, 0x27450180, 0x3c038000, 0xafb40028, 0x34420001, 0xa7a20020,
+ 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x0a00130d, 0x00000000,
+ 0x54400003, 0x8ed50008, 0x0a001328, 0x24020001, 0x8f630054, 0x26a2ffff,
+ 0x00431023, 0x18400011, 0x27a60010, 0x97a20020, 0x3c040800, 0x8c8300d0,
+ 0x27450180, 0x3c078000, 0xafb40028, 0x34420001, 0x24630001, 0xa7a20020,
+ 0xac8300d0, 0x8f4201b8, 0x00471024, 0x1440fffd, 0x00000000, 0x0a00130d,
+ 0x00000000, 0x32e20020, 0x10400011, 0x00000000, 0x96c20012, 0x0052102b,
+ 0x10400008, 0x97a20020, 0x96d20012, 0x12400003, 0x02721021, 0x0a0012f2,
+ 0x2451ffff, 0x02608821, 0x97a20020, 0x93a3001a, 0x34420008, 0x34630004,
+ 0xa7a20020, 0xa3a3001a, 0x8f420104, 0x3c030080, 0x00431024, 0x10400037,
+ 0x3a03000a, 0x0e001151, 0x02c02021, 0x24030002, 0x1443002b, 0x3c030800,
+ 0x27a60010, 0x97a20020, 0x27450180, 0x3c038000, 0xafb40028, 0x34420001,
+ 0xa7a20020, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x8f420128,
+ 0xaca20000, 0x8cc30018, 0x240240c1, 0xa4a20008, 0xaca30018, 0x90c4000a,
+ 0x24020002, 0xa0a2000b, 0xa0a4000a, 0x94c20010, 0xa4a20010, 0x90c30012,
+ 0xa0a30012, 0x90c20013, 0xa0a20013, 0x8cc30014, 0xaca30014, 0x8cc20024,
+ 0xaca20024, 0x8cc30028, 0xaca30028, 0x8cc4002c, 0x24020001, 0x3c031000,
+ 0xaca4002c, 0xaf4301b8, 0xaf400044, 0xaf400050, 0x0a001436, 0x8fbf006c,
+ 0x8c626c98, 0x30420100, 0x10400003, 0x24636c98, 0x8c620004, 0xaf62017c,
+ 0x3a03000a, 0x2c630001, 0x3a02000c, 0x2c420001, 0x00621825, 0x14600003,
+ 0x2402000e, 0x56020030, 0x00009021, 0x52400008, 0x96c4000e, 0x12400004,
+ 0xa7b20040, 0x02721021, 0x0a001343, 0x2451ffff, 0x02608821, 0x96c4000e,
+ 0x93630035, 0x8f62004c, 0x00642004, 0x00952021, 0x00821023, 0x18400015,
+ 0x00000000, 0x8f620018, 0x02621023, 0x1c400015, 0x97a20020, 0x8f620018,
+ 0x1662001c, 0x00000000, 0x8f62001c, 0x02a21023, 0x1c40000e, 0x97a20020,
+ 0x8f62001c, 0x16a20015, 0x00000000, 0x8f620058, 0x00821023, 0x18400011,
+ 0x97a20020, 0x0a001364, 0xafb10028, 0x8f620058, 0x00821023, 0x0441000b,
+ 0x97a20020, 0xafb10028, 0xafb30034, 0xafb50038, 0xafa4003c, 0x34420020,
+ 0x0a00136d, 0xa7a20020, 0x02809821, 0x02608821, 0x8f640058, 0x8f62004c,
+ 0x02a21023, 0x18400009, 0x00000000, 0x8f620054, 0x02a21023, 0x1c400005,
+ 0x97a20020, 0xafb10028, 0xafb50024, 0x0a001385, 0x34420040, 0x9742011a,
+ 0x1440000c, 0x24020014, 0x8f620058, 0x14820009, 0x24020014, 0x8f63004c,
+ 0x8f620054, 0x10620004, 0x97a20020, 0xafb10028, 0x34420080, 0xa7a20020,
+ 0x24020014, 0x1202000a, 0x2a020015, 0x10400005, 0x2402000c, 0x12020006,
+ 0x32e20001, 0x0a0013c6, 0x00000000, 0x24020016, 0x16020035, 0x32e20001,
+ 0x8f620084, 0x24420001, 0x16a20031, 0x32e20001, 0x24020014, 0x12020021,
+ 0x2a020015, 0x10400005, 0x2402000c, 0x12020008, 0x32e20001, 0x0a0013c6,
+ 0x00000000, 0x24020016, 0x1202000c, 0x32e20001, 0x0a0013c6, 0x00000000,
+ 0x97a30020, 0x2402000e, 0xafb10028, 0xa3b00022, 0xa3a20023, 0xafb50024,
+ 0x34630054, 0x0a0013c5, 0xa7a30020, 0x97a20020, 0x93a4001a, 0x24030010,
+ 0xafb10028, 0xa3b00022, 0xa3a30023, 0xafb50024, 0x3442005d, 0x34840002,
+ 0xa7a20020, 0x0a0013c5, 0xa3a4001a, 0x97a20020, 0x24030012, 0xa3a30023,
+ 0x93a3001a, 0xafb10028, 0xa3b00022, 0xafb50024, 0x3042fffe, 0x3442005c,
+ 0x34630002, 0xa7a20020, 0xa3a3001a, 0x32e20001, 0x10400030, 0x2402000c,
+ 0x12020013, 0x2a02000d, 0x10400005, 0x2402000a, 0x12020008, 0x97a20020,
+ 0x0a0013f8, 0x32e20009, 0x2402000e, 0x1202001b, 0x32e20009, 0x0a0013f9,
+ 0x0002102b, 0x93a4001a, 0x24030008, 0xafb10028, 0xa3b00022, 0xa3a30023,
+ 0x0a0013f4, 0x34420013, 0x97a30020, 0x30620004, 0x14400005, 0x93a2001a,
+ 0x3463001b, 0xa7a30020, 0x0a0013e7, 0x24030016, 0x3463001b, 0xa7a30020,
+ 0x24030010, 0xafb10028, 0xa3b00022, 0xa3a30023, 0x34420002, 0x0a0013f7,
+ 0xa3a2001a, 0x97a20020, 0x93a4001a, 0x24030010, 0xafb10028, 0xa3b00022,
+ 0xa3a30023, 0x3442001b, 0x34840002, 0xa7a20020, 0xa3a4001a, 0x32e20009,
+ 0x0002102b, 0x00021023, 0x30420007, 0x12400015, 0x34450003, 0x8f820018,
+ 0x24030800, 0x27440180, 0x24420001, 0xaf820018, 0x24020004, 0xaf4301b8,
+ 0xa4850008, 0xa082000b, 0x93430120, 0x00003021, 0x3c021000, 0xa492000e,
+ 0xac950024, 0xac930028, 0x007e1821, 0xa483000c, 0xaf4201b8, 0x0a001413,
+ 0x97a20020, 0x24060001, 0x97a20020, 0x10400020, 0x27450180, 0x3c038000,
+ 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x8f420128, 0xaca20000,
+ 0x8fa30028, 0x240240c1, 0xa4a20008, 0xaca30018, 0x93a4001a, 0x24020002,
+ 0xa0a2000b, 0xa0a4000a, 0x97a20020, 0xa4a20010, 0x93a30022, 0xa0a30012,
+ 0x93a20023, 0xa0a20013, 0x8fa30024, 0xaca30014, 0x8fa20034, 0xaca20024,
+ 0x8fa30038, 0xaca30028, 0x8fa2003c, 0x3c031000, 0xaca2002c, 0xaf4301b8,
+ 0x00c01021, 0x8fbf006c, 0x8fbe0068, 0x8fb70064, 0x8fb60060, 0x8fb5005c,
+ 0x8fb40058, 0x8fb30054, 0x8fb20050, 0x8fb1004c, 0x8fb00048, 0x03e00008,
+ 0x27bd0070, 0x8f470140, 0x8f460148, 0x3c028000, 0x00c24024, 0x00062c02,
+ 0x30a300ff, 0x24020019, 0x106200e7, 0x27440180, 0x2862001a, 0x1040001f,
+ 0x24020008, 0x106200be, 0x28620009, 0x1040000d, 0x24020001, 0x10620046,
+ 0x28620002, 0x50400005, 0x24020006, 0x1060002e, 0x00a01821, 0x0a00155e,
+ 0x00000000, 0x1062005b, 0x00a01821, 0x0a00155e, 0x00000000, 0x2402000b,
+ 0x10620084, 0x2862000c, 0x10400005, 0x24020009, 0x106200bc, 0x00061c02,
+ 0x0a00155e, 0x00000000, 0x2402000e, 0x106200b7, 0x00061c02, 0x0a00155e,
+ 0x00000000, 0x28620021, 0x10400009, 0x2862001f, 0x104000c1, 0x2402001b,
+ 0x106200bf, 0x2402001c, 0x1062009a, 0x00061c02, 0x0a00155e, 0x00000000,
+ 0x240200c2, 0x106200ca, 0x286200c3, 0x10400005, 0x24020080, 0x1062005a,
+ 0x00a01821, 0x0a00155e, 0x00000000, 0x240200c9, 0x106200cd, 0x30c5ffff,
+ 0x0a00155e, 0x00000000, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd,
+ 0x24020001, 0xa4830008, 0x24030002, 0xac870000, 0xac800004, 0xa082000a,
+ 0xa083000b, 0xa4860010, 0x8f430144, 0x3c021000, 0xac800028, 0xac830024,
+ 0x3c036000, 0xaf4201b8, 0x03e00008, 0xac600808, 0x11000009, 0x00a01821,
+ 0x3c020800, 0x24030002, 0xa0436c88, 0x24426c88, 0xac470008, 0x8f430144,
+ 0x03e00008, 0xac430004, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd,
+ 0x24020002, 0xac800000, 0xac870004, 0xa4830008, 0xa082000a, 0xa082000b,
+ 0xa4860010, 0xac800024, 0x8f420144, 0x3c031000, 0xac820028, 0x3c026000,
+ 0xaf4301b8, 0x03e00008, 0xac400808, 0x3c080800, 0x3c058000, 0x8f4201b8,
+ 0x00451024, 0x1440fffd, 0x00000000, 0xac870000, 0x91026c88, 0x00002821,
+ 0x10400002, 0x25076c88, 0x8ce50008, 0xac850004, 0xa4830008, 0x91036c88,
+ 0x24020002, 0xa082000b, 0xa4860010, 0x34630001, 0xa083000a, 0x8f420144,
+ 0xac820024, 0x91036c88, 0x10600002, 0x00001021, 0x8ce20004, 0xac820028,
+ 0x3c021000, 0xaf4201b8, 0x3c026000, 0xa1006c88, 0x03e00008, 0xac400808,
+ 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020002, 0xa082000b,
+ 0xa4830008, 0xa4860010, 0x8f420144, 0x3c031000, 0xa4820012, 0x03e00008,
+ 0xaf4301b8, 0x30c2ffff, 0x14400028, 0x00061c02, 0x93620005, 0x30420004,
+ 0x14400020, 0x3c029000, 0x34420001, 0x00e21025, 0xaf420020, 0x3c038000,
+ 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620005, 0x3c038000,
+ 0x34630001, 0x00e31825, 0x34420004, 0xa3620005, 0xaf430020, 0x93620005,
+ 0x30420004, 0x14400003, 0x3c038000, 0x0000000d, 0x3c038000, 0x8f4201b8,
+ 0x00431024, 0x1440fffd, 0x24020005, 0x3c031000, 0xac870000, 0xa082000b,
+ 0xaf4301b8, 0x0a00150d, 0x00061c02, 0x0000000d, 0x03e00008, 0x00000000,
+ 0x00061c02, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020001,
+ 0xa4830008, 0x24030002, 0xac870000, 0xac800004, 0xa082000a, 0xa083000b,
+ 0xa4860010, 0x8f430144, 0x3c021000, 0xac800028, 0xac830024, 0x03e00008,
+ 0xaf4201b8, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020002,
+ 0xac800000, 0xac870004, 0xa4830008, 0xa082000a, 0xa082000b, 0xa4860010,
+ 0xac800024, 0x8f420144, 0x3c031000, 0xac820028, 0x03e00008, 0xaf4301b8,
+ 0x00061c02, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020001,
+ 0xa4830008, 0x24030002, 0xa082000a, 0x3c021000, 0xac870000, 0xac800004,
+ 0xa083000b, 0xa4860010, 0xac800024, 0xac800028, 0x03e00008, 0xaf4201b8,
+ 0x00a01821, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020002,
+ 0xac870000, 0xac800004, 0xa4830008, 0xa080000a, 0x0a001518, 0xa082000b,
+ 0x8f440144, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020002,
+ 0x240340c9, 0xaf470180, 0xa342018b, 0x3c021000, 0xa7430188, 0xaf4401a4,
+ 0xaf4501a8, 0xaf4001ac, 0x03e00008, 0xaf4201b8, 0x0000000d, 0x03e00008,
+ 0x00000000, 0x03e00008, 0x00000000, 0x8f420100, 0x3042003e, 0x14400011,
+ 0x24020001, 0xaf400048, 0x8f420100, 0x304207c0, 0x10400005, 0x00000000,
+ 0xaf40004c, 0xaf400050, 0x03e00008, 0x24020001, 0xaf400054, 0xaf400040,
+ 0x8f420100, 0x30423800, 0x54400001, 0xaf400044, 0x24020001, 0x03e00008,
+ 0x00000000, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020002,
+ 0x240340c9, 0xaf440180, 0xa342018b, 0x3c021000, 0xa7430188, 0xaf4501a4,
+ 0xaf4601a8, 0xaf4701ac, 0x03e00008, 0xaf4201b8, 0x3c029000, 0x34420001,
+ 0x00822025, 0xaf440020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+ 0x00000000, 0x03e00008, 0x00000000, 0x3c028000, 0x34420001, 0x00822025,
+ 0x03e00008, 0xaf440020, 0x308600ff, 0x27450180, 0x3c038000, 0x8f4201b8,
+ 0x00431024, 0x1440fffd, 0x00000000, 0x8f420128, 0xaca20000, 0x8f640040,
+ 0x24030008, 0x240240c1, 0xa4a20008, 0x24020002, 0xa0a2000b, 0x3c021000,
+ 0xa0a6000a, 0xa4a30010, 0xa0a00012, 0xa0a00013, 0xaca00014, 0xaca00024,
+ 0xaca00028, 0xaca0002c, 0xaca40018, 0x03e00008, 0xaf4201b8, 0x24020001,
+ 0xacc40000, 0x03e00008, 0xa4e50000, 0x24020001, 0xaf400044, 0x03e00008,
+ 0xaf400050, 0x00803021, 0x27450180, 0x3c038000, 0x8f4201b8, 0x00431024,
+ 0x1440fffd, 0x00000000, 0x8f420128, 0xaca20000, 0x8cc30018, 0x240240c1,
+ 0xa4a20008, 0xaca30018, 0x90c4000a, 0x24020002, 0xa0a2000b, 0xa0a4000a,
+ 0x94c20010, 0xa4a20010, 0x90c30012, 0xa0a30012, 0x90c20013, 0xa0a20013,
+ 0x8cc30014, 0xaca30014, 0x8cc20024, 0xaca20024, 0x8cc30028, 0xaca30028,
+ 0x8cc2002c, 0x3c031000, 0xaca2002c, 0x24020001, 0xaf4301b8, 0xaf400044,
+ 0x03e00008, 0xaf400050, 0x27bdffe8, 0xafbf0010, 0x0e001047, 0x00000000,
+ 0x00002021, 0x0e000c78, 0xaf400180, 0x8fbf0010, 0x03e00008, 0x27bd0018,
+ 0x8f460148, 0x27450180, 0x3c038000, 0x00061402, 0x304700ff, 0x8f4201b8,
+ 0x00431024, 0x1440fffd, 0x00000000, 0x8f440140, 0x00061202, 0x304200ff,
+ 0x00061c02, 0xaca20004, 0x24020002, 0xa4a30008, 0x30c300ff, 0xa0a2000b,
+ 0xaca30024, 0x10e0000a, 0xaca40000, 0x28e20004, 0x14400005, 0x24020001,
+ 0x24020005, 0x54e20005, 0xa0a0000a, 0x24020001, 0x0a001609, 0xa0a2000a,
+ 0xa0a0000a, 0x3c021000, 0x03e00008, 0xaf4201b8, 0x03e00008, 0x00001021,
+ 0x10c00007, 0x00000000, 0x8ca20000, 0x24c6ffff, 0x24a50004, 0xac820000,
+ 0x14c0fffb, 0x24840004, 0x03e00008, 0x00000000, 0x0a00161f, 0x00a01021,
+ 0xac860000, 0x00000000, 0x00000000, 0x24840004, 0x00a01021, 0x1440fffa,
+ 0x24a5ffff, 0x03e00008, 0x00000000, 0x00000000 };
+
+static u32 bce_RXP_b06FwData[(0x0/4) + 1] = { 0x0 };
+static u32 bce_RXP_b06FwRodata[(0x28/4) + 1] = {
+ 0x0800468c, 0x0800458c, 0x08004630, 0x08004648, 0x08004660, 0x08004680,
+ 0x0800468c, 0x0800468c, 0x08004594, 0x00000000, 0x00000000 };
+static u32 bce_RXP_b06FwBss[(0x13a4/4) + 1] = { 0x0 };
+static u32 bce_RXP_b06FwSbss[(0x1c/4) + 1] = { 0x0 };
+
+static u32 bce_rv2p_proc1[] = {
+ 0x00000008, 0xac000001, 0x0000000c, 0x2f800001, 0x00000010, 0x203f0146,
+ 0x00000010, 0x213f0003, 0x00000010, 0x20bf002b, 0x00000018, 0x8000fffd,
+ 0x00000010, 0xb1b8b017, 0x0000000b, 0x2fdf0002, 0x00000000, 0x03d80000,
+ 0x00000000, 0x2c380000, 0x00000008, 0x2c800000, 0x00000008, 0x2d000000,
+ 0x00000010, 0x91d40000, 0x00000008, 0x2d800108, 0x00000008, 0x02000002,
+ 0x00000010, 0x91de0000, 0x0000000f, 0x42e0001c, 0x00000010, 0x91840a08,
+ 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008, 0x00000008, 0x2d800150,
+ 0x00000000, 0x00000000, 0x00000010, 0x91de0000, 0x00000010, 0x2c620002,
+ 0x00000018, 0x80000012, 0x0000000b, 0x2fdf0002, 0x0000000c, 0x1f800002,
+ 0x00000000, 0x2c070000, 0x00000018, 0x8000ffe6, 0x00000008, 0x02000002,
+ 0x0000000f, 0x42e0001c, 0x00000010, 0x91840a08, 0x00000008, 0x2c8000b0,
+ 0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800108,
+ 0x00000000, 0x00000000, 0x00000010, 0x91de0000, 0x00000018, 0x80000004,
+ 0x0000000c, 0x1f800002, 0x00000000, 0x00000000, 0x00000018, 0x8000ffd9,
+ 0x0000000c, 0x29800002, 0x0000000c, 0x1f800002, 0x00000000, 0x2adf0000,
+ 0x00000008, 0x2a000005, 0x00000018, 0x8000ffd4, 0x00000008, 0x02240030,
+ 0x00000018, 0x00040000, 0x00000018, 0x80000016, 0x00000018, 0x80000018,
+ 0x00000018, 0x8000001c, 0x00000018, 0x8000004d, 0x00000018, 0x8000008d,
+ 0x00000018, 0x80000010, 0x00000018, 0x8000000f, 0x00000018, 0x8000000e,
+ 0x00000018, 0x8000000d, 0x00000018, 0x800000c3, 0x00000018, 0x8000000b,
+ 0x00000018, 0x8000000a, 0x00000018, 0x80000009, 0x00000018, 0x800000fe,
+ 0x00000018, 0x80000007, 0x00000018, 0x80000006, 0x00000018, 0x80000100,
+ 0x00000018, 0x80000105, 0x00000018, 0x80000003, 0x00000018, 0x80000099,
+ 0x00000018, 0x80000123, 0x00000018, 0x80000000, 0x0000000c, 0x1f800001,
+ 0x00000000, 0x00000000, 0x00000018, 0x8000ffb9, 0x00000010, 0x91d40000,
+ 0x0000000c, 0x29800001, 0x0000000c, 0x1f800001, 0x00000008, 0x2a000002,
+ 0x00000018, 0x8000ffb4, 0x00000010, 0xb1a0b012, 0x0000000b, 0x2fdf0002,
+ 0x00000000, 0x2c200000, 0x00000008, 0x2c800000, 0x00000008, 0x2d000000,
+ 0x00000010, 0x91d40000, 0x00000008, 0x2d80011c, 0x00000000, 0x00000000,
+ 0x00000010, 0x91de0000, 0x0000000f, 0x47600008, 0x0000000f, 0x060e0001,
+ 0x00000010, 0x001f0000, 0x00000000, 0x0f580000, 0x00000000, 0x0a640000,
+ 0x00000000, 0x0ae50000, 0x00000000, 0x0b660000, 0x00000000, 0x0d610000,
+ 0x00000018, 0x80000013, 0x0000000f, 0x47600008, 0x0000000b, 0x2fdf0002,
+ 0x00000008, 0x2c800000, 0x00000008, 0x2d000000, 0x00000010, 0x91d40000,
+ 0x00000008, 0x2d80011c, 0x0000000f, 0x060e0001, 0x00000010, 0x001f0000,
+ 0x00000000, 0x0f580000, 0x00000010, 0x91de0000, 0x00000000, 0x0a640000,
+ 0x00000000, 0x0ae50000, 0x00000000, 0x0b660000, 0x00000000, 0x0d610000,
+ 0x00000000, 0x02620000, 0x0000000b, 0x2fdf0002, 0x00000000, 0x309a0000,
+ 0x00000000, 0x31040000, 0x00000000, 0x0c961800, 0x00000009, 0x0c99ffff,
+ 0x00000004, 0xcc993400, 0x00000010, 0xb1963202, 0x00000008, 0x0f800000,
+ 0x0000000c, 0x29800001, 0x00000010, 0x00220002, 0x0000000c, 0x29520001,
+ 0x0000000c, 0x29520000, 0x00000008, 0x22000001, 0x0000000c, 0x1f800001,
+ 0x00000000, 0x2adf0000, 0x00000008, 0x2a000003, 0x00000018, 0x8000ff82,
+ 0x00000010, 0xb1a0b01d, 0x0000000b, 0x2fdf0002, 0x00000000, 0x2c200000,
+ 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008, 0x00000010, 0x91d40000,
+ 0x00000008, 0x2d800150, 0x00000000, 0x00000000, 0x00000010, 0x205f0000,
+ 0x00000008, 0x2c800000, 0x00000008, 0x2d000000, 0x00000008, 0x2d800108,
+ 0x00000000, 0x00000000, 0x00000010, 0x91de0000, 0x0000000f, 0x47600008,
+ 0x00000000, 0x060e0000, 0x00000010, 0x001f0000, 0x00000000, 0x0f580000,
+ 0x00000010, 0x91de0000, 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000,
+ 0x00000000, 0x0b670000, 0x00000000, 0x0d620000, 0x00000000, 0x0ce71800,
+ 0x00000009, 0x0c99ffff, 0x00000004, 0xcc993400, 0x00000010, 0xb1963220,
+ 0x00000008, 0x0f800000, 0x00000018, 0x8000001e, 0x0000000f, 0x47600008,
+ 0x0000000b, 0x2fdf0002, 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008,
+ 0x00000010, 0x91d40000, 0x00000008, 0x2d80012c, 0x0000000f, 0x060e0001,
+ 0x00000010, 0x001f0000, 0x00000000, 0x0f580000, 0x00000010, 0x91de0000,
+ 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000, 0x00000000, 0x0b670000,
+ 0x00000000, 0x0d620000, 0x00000000, 0x02630000, 0x0000000f, 0x47620010,
+ 0x00000000, 0x0ce71800, 0x0000000b, 0x2fdf0002, 0x00000000, 0x311a0000,
+ 0x00000000, 0x31840000, 0x0000000b, 0xc20000ff, 0x00000002, 0x42040000,
+ 0x00000001, 0x31620800, 0x0000000f, 0x020e0010, 0x00000002, 0x31620800,
+ 0x00000009, 0x0c99ffff, 0x00000004, 0xcc993400, 0x00000010, 0xb1963202,
+ 0x00000008, 0x0f800000, 0x0000000c, 0x29800001, 0x0000000c, 0x1f800001,
+ 0x0000000c, 0x61420006, 0x00000008, 0x22000008, 0x00000000, 0x2adf0000,
+ 0x00000008, 0x2a000004, 0x00000018, 0x8000ff41, 0x00000008, 0x2c8000b0,
+ 0x00000008, 0x2d000008, 0x00000010, 0x91a0b008, 0x00000010, 0x91d40000,
+ 0x0000000c, 0x31620018, 0x00000008, 0x2d800001, 0x00000000, 0x00000000,
+ 0x00000010, 0x91de0000, 0x00000008, 0xac000001, 0x00000018, 0x8000000e,
+ 0x00000000, 0x0380b000, 0x0000000b, 0x2fdf0002, 0x00000000, 0x2c004000,
+ 0x00000010, 0x91d40000, 0x00000008, 0x2d800101, 0x00000000, 0x00000000,
+ 0x00000010, 0x91de0000, 0x0000000c, 0x31620018, 0x00000008, 0x2d800001,
+ 0x00000000, 0x00000000, 0x00000010, 0x91de0000, 0x0000000b, 0x2fdf0002,
+ 0x00000000, 0x2c000e00, 0x0000000c, 0x29800001, 0x0000000c, 0x1f800001,
+ 0x00000008, 0x2a000007, 0x00000018, 0x8000ff26, 0x00000010, 0xb1a0b016,
+ 0x0000000b, 0x2fdf0002, 0x00000000, 0x03d80000, 0x00000000, 0x2c200000,
+ 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008, 0x00000010, 0x91d40000,
+ 0x00000008, 0x2d800150, 0x00000000, 0x00000000, 0x00000010, 0x205f0000,
+ 0x00000008, 0x2c800000, 0x00000008, 0x2d000000, 0x00000008, 0x2d800108,
+ 0x00000008, 0x07000001, 0x00000010, 0xb5de1c00, 0x00000010, 0x2c620002,
+ 0x00000018, 0x8000000a, 0x0000000b, 0x2fdf0002, 0x00000000, 0x2c070000,
+ 0x0000000c, 0x1f800001, 0x00000010, 0x91de0000, 0x00000018, 0x8000ff10,
+ 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008, 0x00000010, 0x91d40000,
+ 0x00000008, 0x2d800108, 0x0000000c, 0x29800001, 0x0000000c, 0x1f800001,
+ 0x00000010, 0x91de0000, 0x00000000, 0x2adf0000, 0x00000008, 0x2a00000a,
+ 0x00000018, 0x8000ff06, 0x00000000, 0x82265600, 0x0000000f, 0x47220008,
+ 0x00000009, 0x070e000f, 0x00000008, 0x070e0008, 0x00000008, 0x02800001,
+ 0x00000007, 0x02851c00, 0x00000008, 0x82850001, 0x00000000, 0x02840a00,
+ 0x00000007, 0x42851c00, 0x00000003, 0xc3aa5200, 0x00000000, 0x03b10e00,
+ 0x00000010, 0x001f0000, 0x0000000f, 0x0f280007, 0x00000007, 0x4b071c00,
+ 0x00000000, 0x00000000, 0x0000000f, 0x0a960003, 0x00000000, 0x0a955c00,
+ 0x00000000, 0x4a005a00, 0x00000000, 0x0c960a00, 0x00000009, 0x0c99ffff,
+ 0x00000008, 0x0d00ffff, 0x00000010, 0xb1963202, 0x00000008, 0x0f800005,
+ 0x00000010, 0x00220020, 0x00000000, 0x02a70000, 0x00000010, 0xb1850002,
+ 0x00000008, 0x82850200, 0x00000000, 0x02000000, 0x00000000, 0x03a60000,
+ 0x00000018, 0x80000053, 0x00000000, 0x072b0000, 0x00000001, 0x878c1c00,
+ 0x00000000, 0x870e1e00, 0x00000000, 0x860c1e00, 0x00000000, 0x03061e00,
+ 0x00000010, 0xb18e0003, 0x00000018, 0x8000004c, 0x00000018, 0x8000fffa,
+ 0x00000010, 0x918c0003, 0x00000010, 0xb1870002, 0x00000018, 0x80000048,
+ 0x00000010, 0x91d40000, 0x0000000c, 0x29800001, 0x00000000, 0x2a860000,
+ 0x00000000, 0x230c0000, 0x00000000, 0x2b070000, 0x00000010, 0xb187000e,
+ 0x00000008, 0x2a000008, 0x00000018, 0x80000040, 0x00000010, 0x91d40000,
+ 0x00000000, 0x28d18c00, 0x00000000, 0x2a860000, 0x00000000, 0x230c0000,
+ 0x00000000, 0x2b070000, 0x00000018, 0x8000fff8, 0x00000010, 0x91d40000,
+ 0x0000000c, 0x29800001, 0x00000000, 0x2aab0000, 0x00000000, 0xa3265600,
+ 0x00000000, 0x2b000000, 0x0000000c, 0x1f800001, 0x00000008, 0x2a000008,
+ 0x00000018, 0x8000fec7, 0x00000010, 0x91d40000, 0x0000000c, 0x29800001,
+ 0x0000000c, 0x1f800001, 0x00000008, 0x2a000009, 0x00000018, 0x8000fec2,
+ 0x00000010, 0x91d40000, 0x0000000c, 0x29800001, 0x0000000c, 0x1f800001,
+ 0x00000000, 0x29420000, 0x00000008, 0x2a000002, 0x00000018, 0x8000febc,
+ 0x00000018, 0x8000febb, 0x00000010, 0xb1bcb016, 0x0000000b, 0x2fdf0002,
+ 0x00000000, 0x03d80000, 0x00000000, 0x2c3c0000, 0x00000008, 0x2c8000b0,
+ 0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800150,
+ 0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000008, 0x2c800000,
+ 0x00000008, 0x2d000000, 0x00000008, 0x2d800108, 0x00000008, 0x07000001,
+ 0x00000010, 0xb5de1c00, 0x00000010, 0x2c620002, 0x00000018, 0x8000000a,
+ 0x0000000b, 0x2fdf0002, 0x00000000, 0x2c070000, 0x0000000c, 0x1f800000,
+ 0x00000010, 0x91de0000, 0x00000018, 0x8000fea5, 0x00000008, 0x2c8000b0,
+ 0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800108,
+ 0x0000000c, 0x29800000, 0x0000000c, 0x1f800000, 0x00000010, 0x91de0000,
+ 0x00000000, 0x2adf0000, 0x00000008, 0x2a000006, 0x00000018, 0x8000fe9b,
+ 0x00000010, 0x91d40000, 0x0000000c, 0x29800001, 0x0000000c, 0x1f800001,
+ 0x00000008, 0x2a00000b, 0x00000018, 0x8000fe96, 0x00000008, 0x03050004,
+ 0x00000006, 0x83040c00, 0x00000008, 0x02850200, 0x00000000, 0x86050c00,
+ 0x00000001, 0x860c0e00, 0x00000008, 0x02040004, 0x00000000, 0x02041800,
+ 0x00000000, 0x83871800, 0x00000018, 0x00020000
+};
+
+static u32 bce_rv2p_proc2[] = {
+ 0x00000000, 0x2a000000,
+ 0x00000010, 0xb1d40000, 0x00000008, 0x02540003, 0x00000018, 0x00040000,
+ 0x00000018, 0x8000000b, 0x00000018, 0x8000000b, 0x00000018, 0x8000000f,
+ 0x00000018, 0x8000004c, 0x00000018, 0x800001bd, 0x00000018, 0x800001e5,
+ 0x00000018, 0x8000019f, 0x00000018, 0x800001fd, 0x00000018, 0x800001a3,
+ 0x00000018, 0x800001aa, 0x00000018, 0x8000022f, 0x00000018, 0x80000000,
+ 0x0000000c, 0x29800001, 0x00000000, 0x2a000000, 0x0000000c, 0x29800000,
+ 0x00000010, 0x20530000, 0x00000018, 0x8000ffed, 0x0000000c, 0x29800001,
+ 0x00000010, 0x91de0000, 0x00000010, 0x001f0000, 0x00000000, 0x2f80aa00,
+ 0x00000000, 0x2a000000, 0x00000000, 0x0d610000, 0x00000000, 0x03620000,
+ 0x00000000, 0x2c400000, 0x00000000, 0x02638c00, 0x00000000, 0x26460000,
+ 0x00000008, 0x02040012, 0x00000010, 0xb906082c, 0x00000000, 0x0f580000,
+ 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000, 0x00000000, 0x0b660000,
+ 0x00000000, 0x0c000000, 0x00000000, 0x0b800000, 0x00000008, 0x0cc60012,
+ 0x00000008, 0x0f800003, 0x00000000, 0x00000000, 0x00000010, 0x009f0000,
+ 0x00000008, 0x27110012, 0x00000000, 0x66900000, 0x00000008, 0xa31b0012,
+ 0x00000010, 0xb197320d, 0x00000000, 0x25960000, 0x00000010, 0x001f0000,
+ 0x00000008, 0x0f800003, 0x0000000c, 0x29800000, 0x00000010, 0x20530000,
+ 0x00000000, 0x22c58c00, 0x00000010, 0x009f0000, 0x00000000, 0x27002200,
+ 0x00000000, 0x26802000, 0x00000000, 0x231b0000, 0x0000000c, 0x69520001,
+ 0x00000018, 0x8000fff4, 0x00000010, 0x01130002, 0x00000010, 0xb1980003,
+ 0x00000010, 0x001f0000, 0x00000008, 0x0f800004, 0x00000008, 0x22000003,
+ 0x00000008, 0x2c80000c, 0x00000008, 0x2d00000c, 0x00000010, 0x009f0000,
+ 0x00000000, 0x25960000, 0x0000000c, 0x29800000, 0x00000000, 0x32140000,
+ 0x00000000, 0x32950000, 0x00000000, 0x33160000, 0x00000000, 0x31e32e00,
+ 0x00000008, 0x2d800010, 0x00000010, 0x20530000, 0x00000018, 0x8000ffb6,
+ 0x00000000, 0x23000000, 0x00000000, 0x25e60000, 0x00000008, 0x2200000b,
+ 0x0000000c, 0x69520000, 0x0000000c, 0x29800000, 0x00000010, 0x20530000,
+ 0x00000018, 0x8000ffaf, 0x0000000c, 0x29800001, 0x00000010, 0x91de0000,
+ 0x00000000, 0x2fd50000, 0x00000010, 0x001f0000, 0x00000000, 0x02700000,
+ 0x00000000, 0x0d620000, 0x00000000, 0xbb630800, 0x00000000, 0x2a000000,
+ 0x00000009, 0x076000ff, 0x0000000f, 0x2c0e0007, 0x00000008, 0x2c800000,
+ 0x00000008, 0x2d000064, 0x00000008, 0x2d80011c, 0x00000009, 0x06420002,
+ 0x0000000c, 0x61420001, 0x00000000, 0x0f400000, 0x00000000, 0x02d08c00,
+ 0x00000000, 0x23000000, 0x00000004, 0x826da000, 0x00000000, 0x8304a000,
+ 0x00000000, 0x22c50c00, 0x00000000, 0x03760000, 0x00000004, 0x83860a00,
+ 0x00000000, 0x83870c00, 0x00000010, 0x91de0000, 0x00000000, 0x037c0000,
+ 0x00000000, 0x837b0c00, 0x00000001, 0x83060e00, 0x00000000, 0x83870c00,
+ 0x00000000, 0x82850e00, 0x00000010, 0xb1860016, 0x0000000f, 0x47610018,
+ 0x00000000, 0x068e0000, 0x0000000f, 0x47670010, 0x0000000f, 0x47e20010,
+ 0x00000000, 0x870e1e00, 0x00000010, 0xb70e1a10, 0x00000010, 0x0ce7000e,
+ 0x00000008, 0x22000009, 0x00000000, 0x286d0000, 0x0000000f, 0x65680010,
+ 0x00000003, 0xf66c9400, 0x00000010, 0xb972a003, 0x0000000c, 0x73e70019,
+ 0x0000000c, 0x21420004, 0x0000000c, 0x29800000, 0x00000000, 0x37ed0000,
+ 0x0000000c, 0x73e7001a, 0x00000010, 0x20530000, 0x00000008, 0x22000008,
+ 0x0000000c, 0x61420004, 0x00000000, 0x02f60000, 0x00000004, 0x82840a00,
+ 0x00000010, 0xb1840a2b, 0x00000010, 0x2d67000a, 0x00000010, 0xb96d0804,
+ 0x00000004, 0xb6ed0a00, 0x00000000, 0x37ed0000, 0x00000018, 0x80000029,
+ 0x0000000c, 0x61420000, 0x00000000, 0x37040000, 0x00000000, 0x37850000,
+ 0x0000000c, 0x33e7001a, 0x00000018, 0x80000024, 0x00000010, 0xb96d0809,
+ 0x00000004, 0xb6ed0a00, 0x00000000, 0x036d0000, 0x00000004, 0xb76e0c00,
+ 0x00000010, 0x91ee0c1f, 0x0000000c, 0x73e7001a, 0x00000004, 0xb6ef0c00,
+ 0x00000000, 0x37ed0000, 0x00000018, 0x8000001b, 0x0000000c, 0x61420000,
+ 0x00000010, 0xb7ee0a05, 0x00000010, 0xb96f0815, 0x00000003, 0xb76e0800,
+ 0x00000004, 0xb7ef0a00, 0x00000018, 0x80000015, 0x00000010, 0x0ce7000c,
+ 0x00000008, 0x22000009, 0x00000000, 0x286d0000, 0x0000000f, 0x65680010,
+ 0x00000003, 0xf66c9400, 0x00000010, 0xb972a003, 0x0000000c, 0x73e70019,
+ 0x0000000c, 0x21420004, 0x0000000c, 0x29800000, 0x00000010, 0x20530000,
+ 0x00000008, 0x22000008, 0x0000000c, 0x61420004, 0x00000000, 0x37040000,
+ 0x00000000, 0x37850000, 0x00000000, 0x036d0000, 0x00000003, 0xb8f10c00,
+ 0x00000018, 0x80000004, 0x00000000, 0x02840000, 0x00000002, 0x21421800,
+ 0x0000000c, 0x61420000, 0x00000000, 0x286d0000, 0x0000000f, 0x65ed0010,
+ 0x00000009, 0x266dffff, 0x00000000, 0x23000000, 0x00000010, 0xb1840a40,
+ 0x00000010, 0x01420002, 0x00000004, 0xb8f10a00, 0x00000003, 0x83760a00,
+ 0x00000010, 0xb8040c3c, 0x00000010, 0xb7e6080a, 0x00000000, 0x0a640000,
+ 0x00000000, 0x0ae50000, 0x00000009, 0x0c68ffff, 0x00000009, 0x0b67ffff,
+ 0x00000000, 0x0be60000, 0x00000000, 0x0c840000, 0x00000010, 0xb197320b,
+ 0x00000008, 0x0f800002, 0x00000018, 0x80000009, 0x00000000, 0x0a6a0000,
+ 0x00000000, 0x0aeb0000, 0x00000000, 0x0c000000, 0x00000009, 0x0b6cffff,
+ 0x00000000, 0x0be90000, 0x00000000, 0x0c840000, 0x00000010, 0xb1973202,
+ 0x00000008, 0x0f800002, 0x00000010, 0x001f0000, 0x00000000, 0x0c860000,
+ 0x00000000, 0x06980000, 0x00000008, 0x0f800003, 0x00000000, 0x00000000,
+ 0x00000010, 0x009f0000, 0x00000010, 0xb1973212, 0x00000000, 0x231b0000,
+ 0x00000000, 0x28840000, 0x00000000, 0x02043600, 0x00000003, 0x8384a000,
+ 0x0000000f, 0x65870010, 0x00000009, 0x2607ffff, 0x00000000, 0x27111a00,
+ 0x00000000, 0x66900000, 0x0000000c, 0x29000000, 0x00000000, 0x24c60000,
+ 0x0000000c, 0x29800000, 0x00000000, 0x06980000, 0x00000010, 0x20530000,
+ 0x00000000, 0x22c58c00, 0x00000010, 0x001f0000, 0x00000008, 0x0f800003,
+ 0x00000018, 0x8000ffee, 0x00000000, 0x02043600, 0x00000000, 0x231b0000,
+ 0x00000000, 0x03840000, 0x00000010, 0x91870a03, 0x00000000, 0x03d00000,
+ 0x00000002, 0x21421800, 0x00000003, 0x8387a000, 0x0000000f, 0x65870010,
+ 0x00000009, 0x2607ffff, 0x00000000, 0x27111a00, 0x00000000, 0x66900000,
+ 0x0000000c, 0x29000000, 0x00000000, 0x32140000, 0x00000000, 0x32950000,
+ 0x00000005, 0x73e72c00, 0x00000005, 0x74683000, 0x00000000, 0x33170000,
+ 0x00000018, 0x80000146, 0x00000010, 0x91c60005, 0x00000008, 0x07000004,
+ 0x00000010, 0xb1c41c03, 0x00000010, 0x91840a06, 0x00000000, 0x28840000,
+ 0x00000000, 0x24c60000, 0x0000000c, 0x29800000, 0x00000010, 0x20530000,
+ 0x00000000, 0x22c58c00, 0x00000010, 0xb1840a97, 0x0000000c, 0x21420006,
+ 0x00000010, 0x0ce7001d, 0x0000000f, 0x43680010, 0x00000000, 0x03f30c00,
+ 0x00000010, 0x91870856, 0x0000000f, 0x46ec0010, 0x00000010, 0xb68d0c54,
+ 0x00000000, 0x838d0c00, 0x00000000, 0xa3050800, 0x00000001, 0xa3460e00,
+ 0x00000000, 0x28840000, 0x00000000, 0x02048c00, 0x00000008, 0x22000008,
+ 0x00000000, 0x03840000, 0x00000010, 0x91870a03, 0x00000000, 0x03d00000,
+ 0x00000002, 0x21421800, 0x00000003, 0x8387a000, 0x0000000f, 0x65870010,
+ 0x00000009, 0x2607ffff, 0x00000000, 0x27750c00, 0x00000000, 0x66f40000,
+ 0x0000000c, 0x29000000, 0x00000000, 0x24c60000, 0x0000000c, 0x29800000,
+ 0x00000000, 0x03068c00, 0x00000003, 0xf4680c00, 0x00000010, 0x20530000,
+ 0x00000000, 0x22c58c00, 0x00000018, 0x8000ffe2, 0x00000000, 0x39760000,
+ 0x00000000, 0x39840000, 0x0000000c, 0x33e70019, 0x00000000, 0x031e0000,
+ 0x00000009, 0x076000ff, 0x00000010, 0x001f0000, 0x0000000f, 0x0f0e0007,
+ 0x00000000, 0x83850800, 0x00000000, 0x0a7d0000, 0x00000000, 0x0afe0000,
+ 0x00000000, 0x0b7f0000, 0x00000000, 0x0d7a0000, 0x00000000, 0x0c000000,
+ 0x00000000, 0x0bfc0000, 0x00000000, 0x0c970e00, 0x00000008, 0x0f800003,
+ 0x0000000f, 0x47670010, 0x00000008, 0x070e0001, 0x0000000b, 0xc38000ff,
+ 0x00000002, 0x43870000, 0x00000001, 0x33e70e00, 0x0000000f, 0x038e0010,
+ 0x00000002, 0x33e70e00, 0x00000000, 0x28f30000, 0x00000010, 0x009f0000,
+ 0x00000000, 0x02043600, 0x00000008, 0x22000006, 0x00000000, 0x231b0000,
+ 0x00000000, 0x23ff0000, 0x00000000, 0x241b0000, 0x00000000, 0x03840000,
+ 0x00000010, 0x91870a03, 0x00000000, 0x03d00000, 0x00000002, 0x21421800,
+ 0x00000003, 0x8387a000, 0x0000000f, 0x65870010, 0x00000009, 0x2607ffff,
+ 0x00000000, 0x27110000, 0x00000000, 0x26900000, 0x0000000c, 0x29000000,
+ 0x00000000, 0x24c60000, 0x0000000c, 0x29800000, 0x00000003, 0xf4683600,
+ 0x00000000, 0x3a100000, 0x00000000, 0x3a910000, 0x00000003, 0xf66c2400,
+ 0x00000010, 0xb1923605, 0x00000010, 0x001f0000, 0x00000008, 0x0f800004,
+ 0x00000000, 0x00000000, 0x00000010, 0x009f0000, 0x00000000, 0x3e170000,
+ 0x00000000, 0x3e940000, 0x00000000, 0x3f150000, 0x00000000, 0x3f960000,
+ 0x00000010, 0x001f0000, 0x00000000, 0x0f060000, 0x00000010, 0x20530000,
+ 0x00000000, 0x22c53600, 0x00000018, 0x8000ffa6, 0x00000000, 0x031e0000,
+ 0x00000000, 0x83850800, 0x00000009, 0x076000ff, 0x00000010, 0x001f0000,
+ 0x0000000f, 0x0f0e0007, 0x00000000, 0x0c000000, 0x00000000, 0x0a7d0000,
+ 0x00000000, 0x0afe0000, 0x00000000, 0x0b7f0000, 0x00000000, 0x0d7a0000,
+ 0x00000000, 0x0bfc0000, 0x00000000, 0x0c970e00, 0x00000008, 0x0f800003,
+ 0x0000000f, 0x47670010, 0x00000008, 0x070e0001, 0x0000000b, 0xc38000ff,
+ 0x00000002, 0x43870000, 0x00000001, 0x33e70e00, 0x0000000f, 0x038e0010,
+ 0x00000002, 0x33e70e00, 0x00000000, 0x39840000, 0x00000003, 0xb9720800,
+ 0x00000000, 0x28f30000, 0x0000000f, 0x65680010, 0x00000010, 0x009f0000,
+ 0x00000000, 0x02043600, 0x00000008, 0x22000007, 0x00000000, 0x231b0000,
+ 0x00000000, 0x23ff0000, 0x00000000, 0x241b0000, 0x00000000, 0x03840000,
+ 0x00000010, 0x91870a03, 0x00000000, 0x03d00000, 0x00000002, 0x21421800,
+ 0x00000003, 0x8387a000, 0x0000000f, 0x65870010, 0x00000009, 0x2607ffff,
+ 0x00000000, 0x27110000, 0x00000000, 0x26900000, 0x0000000c, 0x29000000,
+ 0x00000000, 0x24c60000, 0x0000000c, 0x29800000, 0x00000003, 0xf4683600,
+ 0x00000000, 0x3a100000, 0x00000000, 0x3a910000, 0x00000003, 0xf66c2400,
+ 0x00000010, 0xb1923605, 0x00000010, 0x001f0000, 0x00000008, 0x0f800004,
+ 0x00000000, 0x00000000, 0x00000010, 0x009f0000, 0x00000000, 0x3e170000,
+ 0x00000000, 0x3e940000, 0x00000000, 0x3f150000, 0x00000000, 0x3f960000,
+ 0x00000010, 0x001f0000, 0x00000000, 0x0f060000, 0x00000010, 0x20530000,
+ 0x00000000, 0x22c53600, 0x00000018, 0x8000ff6a, 0x00000010, 0x0ce70005,
+ 0x00000008, 0x2c80000c, 0x00000008, 0x2d000070, 0x00000008, 0x2d800010,
+ 0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000018, 0x80000121,
+ 0x00000000, 0x2c1e0000, 0x00000008, 0x2c8000b8, 0x00000008, 0x2d000010,
+ 0x00000008, 0x2d800048, 0x00000000, 0x00000000, 0x00000010, 0x91de0000,
+ 0x00000018, 0x8000fe59, 0x0000000c, 0x29800001, 0x00000000, 0x2a000000,
+ 0x00000010, 0x001f0000, 0x00000000, 0x0f008000, 0x00000008, 0x0f800007,
+ 0x00000018, 0x80000006, 0x0000000c, 0x29800001, 0x00000000, 0x2a000000,
+ 0x00000010, 0x001f0000, 0x0000000f, 0x0f470007, 0x00000008, 0x0f800008,
+ 0x0000000c, 0x29800000, 0x00000010, 0x20530000, 0x00000018, 0x8000fe4b,
+ 0x0000000c, 0x29800001, 0x00000010, 0x91de0000, 0x00000000, 0x2fd50000,
+ 0x00000000, 0x2a000000, 0x00000009, 0x0261ffff, 0x0000000d, 0x70e10001,
+ 0x00000018, 0x80000105, 0x00000000, 0x2c400000, 0x00000008, 0x2c8000c4,
+ 0x00000008, 0x2d00001c, 0x00000008, 0x2d800001, 0x00000005, 0x70e10800,
+ 0x00000010, 0x91de0000, 0x00000018, 0x8000fe3d, 0x0000000c, 0x29800001,
+ 0x00000010, 0x91de0000, 0x00000000, 0x2fd50000, 0x00000010, 0x001f0000,
+ 0x00000000, 0x02700000, 0x00000000, 0x0d620000, 0x00000000, 0xbb630800,
+ 0x00000000, 0x2a000000, 0x00000000, 0x0f400000, 0x00000000, 0x2c400000,
+ 0x0000000c, 0x73e7001b, 0x00000010, 0x0ce7000e, 0x00000000, 0x286d0000,
+ 0x0000000f, 0x65ed0010, 0x00000009, 0x266dffff, 0x00000018, 0x8000006c,
+ 0x00000008, 0x02000004, 0x00000010, 0x91c40803, 0x0000000c, 0x29800000,
+ 0x00000010, 0x20530000, 0x00000018, 0x800000e9, 0x00000008, 0x2c8000b8,
+ 0x00000008, 0x2d000010, 0x00000008, 0x2d800048, 0x00000018, 0x80000005,
+ 0x00000008, 0x2c8000c4, 0x00000008, 0x2d00001c, 0x00000008, 0x2d800001,
+ 0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000008, 0x2c800048,
+ 0x00000008, 0x2d000068, 0x00000008, 0x2d800104, 0x00000000, 0x00000000,
+ 0x00000010, 0x91de0000, 0x00000000, 0x27f60000, 0x00000010, 0xb87a9e04,
+ 0x00000008, 0x2200000d, 0x0000000c, 0x29800000, 0x00000010, 0x20530000,
+ 0x00000018, 0x8000fe14, 0x0000000c, 0x29800001, 0x00000010, 0x91de0000,
+ 0x00000000, 0x2fd50000, 0x00000010, 0x001f0000, 0x00000000, 0x02700000,
+ 0x00000000, 0x0d620000, 0x00000000, 0xbb630800, 0x00000000, 0x2a000000,
+ 0x00000010, 0x0e670011, 0x00000000, 0x286d0000, 0x0000000f, 0x65ed0010,
+ 0x00000009, 0x266dffff, 0x00000004, 0xb8f1a000, 0x00000000, 0x0f400000,
+ 0x0000000c, 0x73e7001c, 0x00000018, 0x80000043, 0x00000008, 0x02000004,
+ 0x00000010, 0x91c40802, 0x0000000c, 0x29800000, 0x00000000, 0x2c1e0000,
+ 0x00000008, 0x2c8000b8, 0x00000008, 0x2d000010, 0x00000008, 0x2d800048,
+ 0x00000010, 0x20530000, 0x00000010, 0x91de0000, 0x00000018, 0x8000fdfa,
+ 0x0000000c, 0x29800001, 0x00000000, 0x03550000, 0x00000000, 0x06460000,
+ 0x00000000, 0x03d60000, 0x00000000, 0x2a000000, 0x0000000f, 0x0f480007,
+ 0x00000010, 0xb18c0027, 0x0000000f, 0x47420008, 0x00000009, 0x070e000f,
+ 0x00000008, 0x070e0008, 0x00000010, 0x001f0000, 0x00000008, 0x09000001,
+ 0x00000007, 0x09121c00, 0x00000003, 0xcbca9200, 0x00000000, 0x0b97a200,
+ 0x00000007, 0x4b171c00, 0x0000000f, 0x0a960003, 0x00000000, 0x0a959c00,
+ 0x00000000, 0x4a009a00, 0x00000008, 0x82120001, 0x00000001, 0x0c170800,
+ 0x00000000, 0x02180000, 0x00000000, 0x0c971800, 0x00000008, 0x0d00ffff,
+ 0x00000008, 0x0f800006, 0x0000000c, 0x29000000, 0x00000008, 0x22000001,
+ 0x00000000, 0x22c50c00, 0x00000010, 0x009f0000, 0x00000010, 0xb197320b,
+ 0x00000000, 0x231b0000, 0x00000000, 0x27110800, 0x00000000, 0x66900000,
+ 0x0000000c, 0x29800000, 0x00000000, 0x02180000, 0x00000010, 0x20530000,
+ 0x00000000, 0x22c53600, 0x00000010, 0x001f0000, 0x00000008, 0x0f800006,
+ 0x00000018, 0x8000fff5, 0x00000010, 0x91870002, 0x00000008, 0x2200000a,
+ 0x00000000, 0x231b0000, 0x00000000, 0x27110800, 0x00000000, 0x66900000,
+ 0x0000000c, 0x29800000, 0x00000008, 0x0200000a, 0x00000010, 0x91c40804,
+ 0x00000010, 0x02c20003, 0x00000010, 0x001f0000, 0x00000008, 0x0f800008,
+ 0x00000010, 0x20530000, 0x00000018, 0x8000fdc5, 0x0000000c, 0x29800001,
+ 0x00000000, 0x2a000000, 0x00000018, 0x8000fdc2, 0x00000000, 0x06820000,
+ 0x00000010, 0x001f0000, 0x00000010, 0x0ce70028, 0x00000000, 0x03720000,
+ 0x00000000, 0xa8760c00, 0x00000000, 0x0cf60000, 0x00000010, 0xb8723224,
+ 0x00000000, 0x03440000, 0x00000008, 0x22000010, 0x00000000, 0x03ca0000,
+ 0x0000000f, 0x65680010, 0x00000000, 0x0bcf0000, 0x00000000, 0x27f20000,
+ 0x00000010, 0xb7ef3203, 0x0000000c, 0x21420004, 0x0000000c, 0x73e70019,
+ 0x00000000, 0x07520000, 0x00000000, 0x29000000, 0x0000000c, 0x29800000,
+ 0x00000004, 0xb9723200, 0x00000010, 0x20530000, 0x00000000, 0x22060000,
+ 0x0000000c, 0x61420004, 0x00000000, 0x25070000, 0x00000000, 0x27970000,
+ 0x00000000, 0x290e0000, 0x00000010, 0x0ce70010, 0x00000010, 0xb873320f,
+ 0x0000000f, 0x436c0010, 0x00000000, 0x03f30c00, 0x00000000, 0x03f30000,
+ 0x00000000, 0x83990e00, 0x00000001, 0x83860e00, 0x00000000, 0x83060e00,
+ 0x00000003, 0xf66c0c00, 0x00000000, 0x39f30e00, 0x00000000, 0x3af50e00,
+ 0x00000000, 0x7a740000, 0x0000000f, 0x43680010, 0x00000001, 0x83860e00,
+ 0x00000000, 0x83060e00, 0x00000003, 0xf4680c00, 0x00000000, 0x286d0000,
+ 0x00000010, 0xb1e9a056, 0x00000000, 0x03690000, 0x00000010, 0xb1f60c54,
+ 0x00000000, 0x0a6a0000, 0x00000000, 0x0aeb0000, 0x00000009, 0x0b6cffff,
+ 0x00000000, 0x0c000000, 0x00000000, 0x0be90000, 0x00000003, 0x8cf6a000,
+ 0x0000000c, 0x09800002, 0x00000010, 0x009f0000, 0x00000010, 0xb8173209,
+ 0x00000000, 0x35140000, 0x00000000, 0x35950000, 0x00000005, 0x766c2c00,
+ 0x00000000, 0x34970000, 0x00000004, 0xb8f12e00, 0x00000010, 0x001f0000,
+ 0x00000008, 0x0f800004, 0x00000018, 0x8000fff7, 0x00000000, 0x03e90000,
+ 0x00000010, 0xb8f6a01a, 0x00000010, 0x20130019, 0x00000010, 0xb1f10e18,
+ 0x00000000, 0x83973200, 0x00000000, 0x38700e00, 0x00000000, 0xbb760e00,
+ 0x00000000, 0x37d00000, 0x0000000c, 0x73e7001a, 0x00000003, 0xb8f1a000,
+ 0x00000000, 0x32140000, 0x00000000, 0x32950000, 0x00000005, 0x73e72c00,
+ 0x00000000, 0x33190000, 0x00000005, 0x74680000, 0x00000010, 0x0ce7000d,
+ 0x00000008, 0x22000009, 0x00000000, 0x07520000, 0x00000000, 0x29000000,
+ 0x0000000c, 0x73e70019, 0x0000000f, 0x65680010, 0x0000000c, 0x21420004,
+ 0x0000000c, 0x29800000, 0x00000010, 0x20530000, 0x0000000c, 0x61420004,
+ 0x00000000, 0x290e0000, 0x00000018, 0x80000002, 0x00000010, 0x91973206,
+ 0x00000000, 0x35140000, 0x00000000, 0x35950000, 0x00000005, 0x766c2c00,
+ 0x00000000, 0x34990000, 0x00000004, 0xb8f13200, 0x00000000, 0x83690c00,
+ 0x00000010, 0xb1860013, 0x00000000, 0x28e90000, 0x00000008, 0x22000004,
+ 0x00000000, 0x23ec0000, 0x00000000, 0x03690000, 0x00000010, 0xb8660c07,
+ 0x00000009, 0x036cffff, 0x00000000, 0x326a0000, 0x00000000, 0x32eb0000,
+ 0x00000005, 0x73e70c00, 0x00000000, 0x33690000, 0x00000005, 0x74680000,
+ 0x0000000c, 0x73e7001c, 0x00000000, 0x03690000, 0x00000010, 0xb1f60c12,
+ 0x00000010, 0xb1d00c11, 0x0000000c, 0x21420005, 0x0000000c, 0x33e7001c,
+ 0x00000018, 0x8000000e, 0x00000010, 0x2e67000d, 0x00000000, 0x03690000,
+ 0x00000010, 0xb1f60c0b, 0x00000010, 0xb1d00c0a, 0x00000000, 0x03440000,
+ 0x00000008, 0x2200000c, 0x00000000, 0x07520000, 0x00000000, 0x29000000,
+ 0x0000000c, 0x29800000, 0x0000000c, 0x33e7001c, 0x00000010, 0x20530000,
+ 0x00000000, 0x22060000, 0x00000000, 0x290e0000, 0x00000018, 0x000d0000,
+ 0x00000000, 0x06820000, 0x00000010, 0x2de7000d, 0x00000010, 0x0ce7000c,
+ 0x00000000, 0x27f20000, 0x00000010, 0xb96d9e0a, 0x00000000, 0xa86d9e00,
+ 0x00000009, 0x0361ffff, 0x00000010, 0xb7500c07, 0x00000008, 0x2200000f,
+ 0x0000000f, 0x65680010, 0x00000000, 0x29000000, 0x0000000c, 0x29800000,
+ 0x0000000c, 0x33e7001b, 0x00000010, 0x20530000, 0x00000018, 0x000d0000
+};
+
+static int bce_TPAT_b06FwReleaseMajor = 0x1;
+static int bce_TPAT_b06FwReleaseMinor = 0x0;
+static int bce_TPAT_b06FwReleaseFix = 0x0;
+static u32 bce_TPAT_b06FwStartAddr = 0x08000860;
+static u32 bce_TPAT_b06FwTextAddr = 0x08000800;
+static int bce_TPAT_b06FwTextLen = 0x122c;
+static u32 bce_TPAT_b06FwDataAddr = 0x08001a60;
+static int bce_TPAT_b06FwDataLen = 0x0;
+static u32 bce_TPAT_b06FwRodataAddr = 0x00000000;
+static int bce_TPAT_b06FwRodataLen = 0x0;
+static u32 bce_TPAT_b06FwBssAddr = 0x08001aa0;
+static int bce_TPAT_b06FwBssLen = 0x250;
+static u32 bce_TPAT_b06FwSbssAddr = 0x08001a60;
+static int bce_TPAT_b06FwSbssLen = 0x34;
+static u32 bce_TPAT_b06FwText[(0x122c/4) + 1] = {
+ 0x0a000218, 0x00000000, 0x00000000, 0x0000000d, 0x74706174, 0x20322e36,
+ 0x2e320000, 0x02060201, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x10000003, 0x00000000, 0x0000000d, 0x0000000d, 0x3c020800,
+ 0x24421a60, 0x3c030800, 0x24631cf0, 0xac400000, 0x0043202b, 0x1480fffd,
+ 0x24420004, 0x3c1d0800, 0x37bd2ffc, 0x03a0f021, 0x3c100800, 0x26100860,
+ 0x3c1c0800, 0x279c1a60, 0x0e000546, 0x00000000, 0x0000000d, 0x8f820010,
+ 0x8c450008, 0x24030800, 0xaf430178, 0x97430104, 0x3c020008, 0xaf420140,
+ 0x8f820024, 0x30420001, 0x10400007, 0x3069ffff, 0x24020002, 0x2523fffe,
+ 0xa7420146, 0xa7430148, 0x0a000242, 0x3c020800, 0xa7400146, 0x3c020800,
+ 0x8c43083c, 0x1460000e, 0x24020f00, 0x8f820024, 0x30430020, 0x0003182b,
+ 0x00031823, 0x30650009, 0x30420c00, 0x24030400, 0x14430002, 0x34a40001,
+ 0x34a40005, 0xa744014a, 0x0a000264, 0x3c020800, 0x8f830014, 0x14620008,
+ 0x00000000, 0x8f820024, 0x30420020, 0x0002102b, 0x00021023, 0x3042000d,
+ 0x0a000262, 0x34420005, 0x8f820024, 0x30420020, 0x0002102b, 0x00021023,
+ 0x30420009, 0x34420001, 0xa742014a, 0x3c020800, 0x8c430820, 0x8f840024,
+ 0x3c020048, 0x00621825, 0x30840006, 0x24020002, 0x1082000d, 0x2c820003,
+ 0x50400005, 0x24020004, 0x10800012, 0x3c020001, 0x0a000284, 0x00000000,
+ 0x10820007, 0x24020006, 0x1482000f, 0x3c020111, 0x0a00027c, 0x00621025,
+ 0x0a00027b, 0x3c020101, 0x3c020011, 0x00621025, 0x24030001, 0xaf421000,
+ 0xaf830020, 0x0a000284, 0x00000000, 0x00621025, 0xaf421000, 0xaf800020,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8f830020, 0x1060003f,
+ 0x3c048000, 0x8f421000, 0x00441024, 0x1040fffd, 0x00000000, 0x10600039,
+ 0x00000000, 0x8f421000, 0x3c030020, 0x00431024, 0x10400034, 0x00000000,
+ 0x97421014, 0x14400031, 0x00000000, 0x97421008, 0x8f840010, 0x24420006,
+ 0x00024082, 0x00081880, 0x00643821, 0x8ce50000, 0x30430003, 0x30420001,
+ 0x10400004, 0x00000000, 0x0000000d, 0x0a0002c3, 0x00081080, 0x5460000f,
+ 0x30a5ffff, 0x3c06ffff, 0x00a62824, 0x0005182b, 0x00a61026, 0x0002102b,
+ 0x00621824, 0x10600004, 0x00000000, 0x0000000d, 0x00000000, 0x240001fb,
+ 0x8ce20000, 0x0a0002c2, 0x00462825, 0x0005182b, 0x38a2ffff, 0x0002102b,
+ 0x00621824, 0x10600004, 0x00000000, 0x0000000d, 0x00000000, 0x24000205,
+ 0x8ce20000, 0x3445ffff, 0x00081080, 0x00441021, 0x3c030800, 0xac450000,
+ 0x8c620830, 0x24420001, 0xac620830, 0x8f840018, 0x01202821, 0x24820008,
+ 0x30421fff, 0x24434000, 0x0343d821, 0x30a30007, 0xaf84000c, 0xaf820018,
+ 0xaf420084, 0x10600002, 0x24a20007, 0x3045fff8, 0x8f820030, 0x8f840000,
+ 0x00451821, 0xaf82001c, 0x0064102b, 0xaf830030, 0x14400002, 0x00641023,
+ 0xaf820030, 0x8f840030, 0x34028000, 0x00821021, 0x03421821, 0x3c021000,
+ 0xaf830010, 0xaf440080, 0x03e00008, 0xaf420178, 0x8f830024, 0x27bdffe0,
+ 0xafbf0018, 0xafb10014, 0x30620200, 0x14400004, 0xafb00010, 0x0000000d,
+ 0x00000000, 0x24000242, 0x00031a82, 0x30630003, 0x000310c0, 0x00431021,
+ 0x00021080, 0x00431021, 0x00021080, 0x3c030800, 0x24631aa0, 0x00438821,
+ 0x8e240000, 0x10800004, 0x00000000, 0x0000000d, 0x00000000, 0x2400024d,
+ 0x8f850010, 0x24020001, 0xae220000, 0x8ca70008, 0xa2200007, 0x8f620004,
+ 0x26300014, 0x02002021, 0x00021402, 0xa2220004, 0x304600ff, 0x24c60005,
+ 0x0e000673, 0x00063082, 0x8f620004, 0xa6220008, 0x8f430108, 0x3c021000,
+ 0x00621824, 0x10600008, 0x00000000, 0x97420104, 0x92230007, 0x2442ffec,
+ 0x3045ffff, 0x34630002, 0x0a000321, 0xa2230007, 0x97420104, 0x2442fff0,
+ 0x3045ffff, 0x8f620004, 0x3042ffff, 0x2c420013, 0x54400005, 0x92230007,
+ 0x92220007, 0x34420001, 0xa2220007, 0x92230007, 0x24020001, 0x10620009,
+ 0x28620002, 0x14400014, 0x24020002, 0x10620012, 0x24020003, 0x1062000a,
+ 0x00000000, 0x0a000342, 0x00000000, 0x8f820010, 0x8c43000c, 0x3c04ffff,
+ 0x00641824, 0x00651825, 0x0a000342, 0xac43000c, 0x8f820010, 0x8c430010,
+ 0x3c04ffff, 0x00641824, 0x00651825, 0xac430010, 0x8f620004, 0x3042ffff,
+ 0x24420002, 0x00021083, 0xa2220005, 0x304500ff, 0x8f820010, 0x3c04ffff,
+ 0x00052880, 0x00a22821, 0x8ca70000, 0x96220008, 0x97430104, 0x00e42024,
+ 0x24420002, 0x00621823, 0x00833825, 0xaca70000, 0x92240005, 0x00041080,
+ 0x02021021, 0x90430000, 0x3c05fff6, 0x34a5ffff, 0x3063000f, 0x00832021,
+ 0xa2240006, 0x308200ff, 0x24420003, 0x00021080, 0x02021021, 0x8c460000,
+ 0x308300ff, 0x8f820010, 0x3c04ff7f, 0x00031880, 0x00c53824, 0x00621821,
+ 0xae26000c, 0xac67000c, 0x8e22000c, 0x92230006, 0x3484ffff, 0x00441024,
+ 0x24630003, 0x00031880, 0x02031821, 0x00e42024, 0xae22000c, 0xac640000,
+ 0x92220006, 0x24420004, 0x00021080, 0x02021021, 0x94470002, 0xac470000,
+ 0x92230006, 0x8f820010, 0x00031880, 0x00621821, 0x24020010, 0xac670010,
+ 0x24030002, 0xa7420140, 0xa7400142, 0xa7400144, 0xa7430146, 0x97420104,
+ 0x24030001, 0x2442fffe, 0xa7420148, 0xa743014a, 0x8f820024, 0x24030002,
+ 0x30440006, 0x1083000d, 0x2c820003, 0x10400005, 0x24020004, 0x10800011,
+ 0x3c020009, 0x0a0003a5, 0x00000000, 0x10820007, 0x24020006, 0x1482000d,
+ 0x3c020119, 0x0a00039f, 0x24030001, 0x0a00039e, 0x3c020109, 0x3c020019,
+ 0x24030001, 0xaf421000, 0xaf830020, 0x0a0003a5, 0x00000000, 0xaf421000,
+ 0xaf800020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x92220004,
+ 0x24030008, 0x8f840020, 0x24420002, 0x30420007, 0x00621823, 0x30630007,
+ 0x10800006, 0xae230010, 0x3c038000, 0x8f421000, 0x00431024, 0x1040fffd,
+ 0x00000000, 0x8f820018, 0xaf82000c, 0x24420010, 0x30421fff, 0xaf820018,
+ 0xaf420084, 0x97430104, 0x24424000, 0x0342d821, 0x3063ffff, 0x30620007,
+ 0x10400002, 0x24620007, 0x3043fff8, 0x8f820030, 0x8f840000, 0x00431821,
+ 0xaf82001c, 0x0064102b, 0xaf830030, 0x14400002, 0x00641023, 0xaf820030,
+ 0x8f840030, 0x34028000, 0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x00821021,
+ 0x03421821, 0x3c021000, 0xaf830010, 0xaf440080, 0xaf420178, 0x03e00008,
+ 0x27bd0020, 0x8f830024, 0x27bdffe0, 0xafbf0018, 0xafb10014, 0x30620200,
+ 0x14400004, 0xafb00010, 0x0000000d, 0x00000000, 0x240002e9, 0x00031a82,
+ 0x30630003, 0x000310c0, 0x00431021, 0x00021080, 0x00431021, 0x00021080,
+ 0x3c030800, 0x24631aa0, 0x00438021, 0x8e040000, 0x14800004, 0x00000000,
+ 0x0000000d, 0x00000000, 0x240002ee, 0x8f620004, 0x04410008, 0x26050014,
+ 0x92020006, 0x8e03000c, 0x24420003, 0x00021080, 0x00a21021, 0xac430000,
+ 0xae000000, 0x92020005, 0x24420001, 0x00021080, 0x00a21021, 0x8c430000,
+ 0x3c040001, 0x00641821, 0xac430000, 0x92060004, 0x27710008, 0x02202021,
+ 0x24c60005, 0x0e000673, 0x00063082, 0x92040006, 0x3c057fff, 0x8f620004,
+ 0x00042080, 0x00912021, 0x8c830004, 0x34a5ffff, 0x00451024, 0x00621821,
+ 0xac830004, 0x92050005, 0x3c07ffff, 0x92040004, 0x00052880, 0x00b12821,
+ 0x8ca30000, 0x97420104, 0x96060008, 0x00671824, 0x00441021, 0x00461023,
+ 0x3042ffff, 0x00621825, 0xaca30000, 0x92030007, 0x24020001, 0x1062000a,
+ 0x28620002, 0x1440001d, 0x2402000a, 0x24020002, 0x10620019, 0x24020003,
+ 0x1062000e, 0x2402000a, 0x0a000447, 0x00000000, 0x92020004, 0x97430104,
+ 0x8e24000c, 0x00621821, 0x2463fff2, 0x3063ffff, 0x00872024, 0x00832025,
+ 0xae24000c, 0x0a000447, 0x2402000a, 0x92020004, 0x97430104, 0x8e240010,
+ 0x00621821, 0x2463ffee, 0x3063ffff, 0x00872024, 0x00832025, 0xae240010,
+ 0x2402000a, 0xa7420140, 0x96030012, 0x8f840024, 0xa7430142, 0x92020004,
+ 0xa7420144, 0xa7400146, 0x97430104, 0x30840006, 0x24020001, 0xa7430148,
+ 0xa742014a, 0x24020002, 0x1082000d, 0x2c820003, 0x10400005, 0x24020004,
+ 0x10800011, 0x3c020041, 0x0a00046c, 0x00000000, 0x10820007, 0x24020006,
+ 0x1482000d, 0x3c020151, 0x0a000466, 0x24030001, 0x0a000465, 0x3c020141,
+ 0x3c020051, 0x24030001, 0xaf421000, 0xaf830020, 0x0a00046c, 0x00000000,
+ 0xaf421000, 0xaf800020, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x8f820020, 0x8f840018, 0x10400006, 0x92030004, 0x3c058000, 0x8f421000,
+ 0x00451024, 0x1040fffd, 0x00000000, 0x2463000a, 0x30620007, 0x10400002,
+ 0x24620007, 0x304303f8, 0x00831021, 0x30421fff, 0xaf84000c, 0xaf820018,
+ 0xaf420084, 0x97430104, 0x24424000, 0x0342d821, 0x3063ffff, 0x30620007,
+ 0x10400002, 0x24620007, 0x3043fff8, 0x8f820030, 0x8f840000, 0x00431821,
+ 0xaf82001c, 0x0064102b, 0xaf830030, 0x14400002, 0x00641023, 0xaf820030,
+ 0x8f840030, 0x34028000, 0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x00821021,
+ 0x03421821, 0x3c021000, 0xaf830010, 0xaf440080, 0xaf420178, 0x03e00008,
+ 0x27bd0020, 0x8f620000, 0x97430104, 0x3c048000, 0x3045ffff, 0x3066ffff,
+ 0x8f420178, 0x00441024, 0x1440fffd, 0x2402000a, 0x30a30007, 0xa7420140,
+ 0x24020008, 0x00431023, 0x30420007, 0x24a3fffe, 0xa7420142, 0xa7430144,
+ 0xa7400146, 0xa7460148, 0x8f420108, 0x8f830024, 0x30420020, 0x0002102b,
+ 0x00021023, 0x30420009, 0x34420001, 0x30630006, 0xa742014a, 0x24020002,
+ 0x1062000d, 0x2c620003, 0x10400005, 0x24020004, 0x10600011, 0x3c020041,
+ 0x0a0004d6, 0x00000000, 0x10620007, 0x24020006, 0x1462000d, 0x3c020151,
+ 0x0a0004d0, 0x24030001, 0x0a0004cf, 0x3c020141, 0x3c020051, 0x24030001,
+ 0xaf421000, 0xaf830020, 0x0a0004d6, 0x00000000, 0xaf421000, 0xaf800020,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8f820020, 0x24a30008,
+ 0x8f850018, 0x10400006, 0x30c6ffff, 0x3c048000, 0x8f421000, 0x00441024,
+ 0x1040fffd, 0x00000000, 0x3063ffff, 0x30620007, 0x10400002, 0x24620007,
+ 0x3043fff8, 0x00a31021, 0x30421fff, 0x24434000, 0x0343d821, 0x00c02021,
+ 0x30830007, 0xaf85000c, 0xaf820018, 0xaf420084, 0x10600002, 0x24820007,
+ 0x3044fff8, 0x8f820030, 0x8f850000, 0x00441821, 0xaf82001c, 0x0065102b,
+ 0xaf830030, 0x14400002, 0x00651023, 0xaf820030, 0x8f840030, 0x34028000,
+ 0x3c030800, 0x8c650834, 0x00821021, 0x03421821, 0xaf830010, 0xaf440080,
+ 0x10a00006, 0x2402000e, 0x9383002f, 0x14620004, 0x3c021000, 0x2402043f,
+ 0xa7420148, 0x3c021000, 0x03e00008, 0xaf420178, 0x8f820024, 0x30424000,
+ 0x10400005, 0x24020800, 0x0000000d, 0x00000000, 0x24000413, 0x24020800,
+ 0xaf420178, 0x97440104, 0x3c030008, 0xaf430140, 0x8f820024, 0x30420001,
+ 0x10400006, 0x3085ffff, 0x24020002, 0x24a3fffe, 0xa7420146, 0x0a000526,
+ 0xa7430148, 0xa7400146, 0x8f840018, 0x2402000d, 0xa742014a, 0x24830008,
+ 0x30631fff, 0x24624000, 0x0342d821, 0x30a20007, 0xaf84000c, 0xaf830018,
+ 0xaf430084, 0x10400002, 0x24a20007, 0x3045fff8, 0x8f820030, 0x8f840000,
+ 0x00451821, 0xaf82001c, 0x0064102b, 0xaf830030, 0x14400002, 0x00641023,
+ 0xaf820030, 0x8f840030, 0x34028000, 0x00821021, 0x03421821, 0x3c021000,
+ 0xaf830010, 0xaf440080, 0x03e00008, 0xaf420178, 0x27bdffe8, 0x3c046008,
+ 0xafbf0014, 0xafb00010, 0x8c825000, 0x3c1a8000, 0x2403ff7f, 0x375b4000,
+ 0x00431024, 0x3442380c, 0xac825000, 0x8f430008, 0x3c100800, 0x37428000,
+ 0x34630001, 0xaf430008, 0xaf820010, 0x3c02601c, 0xaf800018, 0xaf400080,
+ 0xaf400084, 0x8c450008, 0x3c036000, 0x8c620808, 0x3c040800, 0x3c030080,
+ 0xac830820, 0x3042fff0, 0x38420010, 0x2c420001, 0xaf850000, 0xaf820004,
+ 0x0e000658, 0x00000000, 0x8f420000, 0x30420001, 0x1040fffb, 0x00000000,
+ 0x8f430108, 0x8f440100, 0x30622000, 0xaf830024, 0xaf840014, 0x10400004,
+ 0x8e02082c, 0x24420001, 0x0a0005c6, 0xae02082c, 0x30620200, 0x14400003,
+ 0x24020f00, 0x14820027, 0x24020d00, 0x97420104, 0x1040001c, 0x30624000,
+ 0x14400005, 0x00000000, 0x0e00022f, 0x00000000, 0x0a0005bb, 0x00000000,
+ 0x8f620008, 0x8f630000, 0x24020030, 0x00031e02, 0x306300f0, 0x10620007,
+ 0x28620031, 0x1440002f, 0x24020040, 0x10620007, 0x00000000, 0x0a0005bb,
+ 0x00000000, 0x0e0002e8, 0x00000000, 0x0a0005bb, 0x00000000, 0x0e0003db,
+ 0x00000000, 0x0a0005bb, 0x00000000, 0x30620040, 0x1440002b, 0x00000000,
+ 0x0000000d, 0x00000000, 0x240004b7, 0x0a0005c6, 0x00000000, 0x1482000f,
+ 0x30620006, 0x97420104, 0x10400005, 0x30620040, 0x0e000510, 0x00000000,
+ 0x0a0005bb, 0x00000000, 0x1440001b, 0x00000000, 0x0000000d, 0x00000000,
+ 0x240004c9, 0x0a0005c6, 0x00000000, 0x1040000e, 0x30621000, 0x10400005,
+ 0x00000000, 0x0e000688, 0x00000000, 0x0a0005bb, 0x00000000, 0x0e0004a1,
+ 0x00000000, 0x8f82002c, 0x24420001, 0xaf82002c, 0x0a0005c6, 0x00000000,
+ 0x30620040, 0x14400004, 0x00000000, 0x0000000d, 0x00000000, 0x240004e0,
+ 0x8f420138, 0x3c034000, 0x00431025, 0xaf420138, 0x0a000566, 0x00000000,
+ 0x3c046008, 0x8c835000, 0x3c1a8000, 0x2402ff7f, 0x375b4000, 0x00621824,
+ 0x3463380c, 0xac835000, 0x8f420008, 0x3c056000, 0x3c03601c, 0x34420001,
+ 0xaf420008, 0x37428000, 0xaf800018, 0xaf820010, 0xaf400080, 0xaf400084,
+ 0x8c660008, 0x8ca20808, 0x3c040800, 0x3c030080, 0xac830820, 0x3042fff0,
+ 0x38420010, 0x2c420001, 0xaf860000, 0xaf820004, 0x03e00008, 0x00000000,
+ 0x3084ffff, 0x30820007, 0x10400002, 0x24820007, 0x3044fff8, 0x8f820018,
+ 0x00441821, 0x30631fff, 0x24644000, 0x0344d821, 0xaf82000c, 0xaf830018,
+ 0x03e00008, 0xaf430084, 0x3084ffff, 0x30820007, 0x10400002, 0x24820007,
+ 0x3044fff8, 0x8f820030, 0x8f830000, 0x00442021, 0xaf82001c, 0x0083102b,
+ 0xaf840030, 0x14400002, 0x00831023, 0xaf820030, 0x8f820030, 0x34038000,
+ 0x00431821, 0x03432021, 0xaf840010, 0x03e00008, 0xaf420080, 0x8f830024,
+ 0x24020002, 0x30630006, 0x1062000d, 0x2c620003, 0x50400005, 0x24020004,
+ 0x10600012, 0x3c020001, 0x0a00062a, 0x00000000, 0x10620007, 0x24020006,
+ 0x1462000f, 0x3c020111, 0x0a000622, 0x00821025, 0x0a000621, 0x3c020101,
+ 0x3c020011, 0x00821025, 0x24030001, 0xaf421000, 0xaf830020, 0x0a00062a,
+ 0x00000000, 0x00821025, 0xaf421000, 0xaf800020, 0x00000000, 0x00000000,
+ 0x00000000, 0x03e00008, 0x00000000, 0x8f820020, 0x10400005, 0x3c038000,
+ 0x8f421000, 0x00431024, 0x1040fffd, 0x00000000, 0x03e00008, 0x00000000,
+ 0x8f820024, 0x27bdffe8, 0x30424000, 0x14400005, 0xafbf0010, 0x0e00022f,
+ 0x00000000, 0x0a000656, 0x8fbf0010, 0x8f620008, 0x8f630000, 0x24020030,
+ 0x00031e02, 0x306300f0, 0x10620008, 0x28620031, 0x1440000d, 0x8fbf0010,
+ 0x24020040, 0x10620007, 0x00000000, 0x0a000656, 0x00000000, 0x0e0002e8,
+ 0x00000000, 0x0a000656, 0x8fbf0010, 0x0e0003db, 0x00000000, 0x8fbf0010,
+ 0x03e00008, 0x27bd0018, 0x8f840028, 0x1080000f, 0x3c026000, 0x8c430c3c,
+ 0x30630fff, 0xaf830008, 0x14600011, 0x3082000f, 0x10400005, 0x308200f0,
+ 0x10400003, 0x30820f00, 0x14400006, 0x00000000, 0x0000000d, 0x00000000,
+ 0x2400051f, 0x03e00008, 0x00000000, 0x0000000d, 0x00000000, 0x24000524,
+ 0x03e00008, 0x00000000, 0xaf830028, 0x03e00008, 0x00000000, 0x10c00007,
+ 0x00000000, 0x8ca20000, 0x24c6ffff, 0x24a50004, 0xac820000, 0x14c0fffb,
+ 0x24840004, 0x03e00008, 0x00000000, 0x0a000684, 0x00a01021, 0xac860000,
+ 0x00000000, 0x00000000, 0x24840004, 0x00a01021, 0x1440fffa, 0x24a5ffff,
+ 0x03e00008, 0x00000000, 0x0000000d, 0x03e00008, 0x00000000, 0x00000000};
+
+static u32 bce_TPAT_b06FwData[(0x0/4) + 1] = { 0x0 };
+static u32 bce_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 };
+static u32 bce_TPAT_b06FwBss[(0x250/4) + 1] = { 0x0 };
+static u32 bce_TPAT_b06FwSbss[(0x34/4) + 1] = { 0x0 };
+
+static int bce_TXP_b06FwReleaseMajor = 0x1;
+static int bce_TXP_b06FwReleaseMinor = 0x0;
+static int bce_TXP_b06FwReleaseFix = 0x0;
+static u32 bce_TXP_b06FwStartAddr = 0x080034b0;
+static u32 bce_TXP_b06FwTextAddr = 0x08000000;
+static int bce_TXP_b06FwTextLen = 0x5748;
+static u32 bce_TXP_b06FwDataAddr = 0x08005760;
+static int bce_TXP_b06FwDataLen = 0x0;
+static u32 bce_TXP_b06FwRodataAddr = 0x00000000;
+static int bce_TXP_b06FwRodataLen = 0x0;
+static u32 bce_TXP_b06FwBssAddr = 0x080057a0;
+static int bce_TXP_b06FwBssLen = 0x1c4;
+static u32 bce_TXP_b06FwSbssAddr = 0x08005760;
+static int bce_TXP_b06FwSbssLen = 0x38;
+static u32 bce_TXP_b06FwText[(0x5748/4) + 1] = {
+ 0x0a000d2c, 0x00000000, 0x00000000, 0x0000000d, 0x74787020, 0x322e352e,
+ 0x38000000, 0x02050800, 0x0000000a, 0x000003e8, 0x0000ea60, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x10000003, 0x00000000, 0x0000000d, 0x0000000d, 0x3c020800,
+ 0x24425760, 0x3c030800, 0x24635964, 0xac400000, 0x0043202b, 0x1480fffd,
+ 0x24420004, 0x3c1d0800, 0x37bd7ffc, 0x03a0f021, 0x3c100800, 0x261034b0,
+ 0x3c1c0800, 0x279c5760, 0x0e000f5b, 0x00000000, 0x0000000d, 0x8f840014,
+ 0x27bdffe8, 0xafb10014, 0xafb00010, 0x8f460104, 0x8f830008, 0x8c8500ac,
+ 0xaf430080, 0x948200a8, 0xa7420e10, 0x948300aa, 0xa7430e12, 0x8c8200ac,
+ 0xaf420e18, 0x97430e10, 0xa7430e14, 0x97420e12, 0x00008021, 0xa7420e16,
+ 0x8f430e18, 0x00006021, 0x00c53023, 0xaf430e1c, 0x10c001a2, 0x2d820001,
+ 0x3c0e1000, 0x2419fff8, 0x24110010, 0x240f0f00, 0x3c188100, 0x93620008,
+ 0x10400009, 0x00000000, 0x97620010, 0x00c2102b, 0x14400005, 0x00000000,
+ 0x97620010, 0x3042ffff, 0x0a000d6d, 0xaf420e00, 0xaf460e00, 0x8f420000,
+ 0x30420008, 0x1040fffd, 0x00000000, 0x97420e08, 0x8f450e04, 0x3044ffff,
+ 0x30820001, 0x14400005, 0x00000000, 0x14a00005, 0x3083a040, 0x0a000f34,
+ 0x00000000, 0x0000000d, 0x3083a040, 0x24020040, 0x1462004f, 0x3082a000,
+ 0x308a0036, 0x8f88000c, 0x30890008, 0x24020800, 0xaf420178, 0x01001821,
+ 0x9742008a, 0x00431023, 0x2442ffff, 0x30421fff, 0x2c420008, 0x1440fffa,
+ 0x00a06021, 0x8f820018, 0x00cc3023, 0x24070001, 0x8f830008, 0x304b00ff,
+ 0x24420001, 0xaf820018, 0x25024000, 0x106f0005, 0x03422021, 0x93820012,
+ 0x30420007, 0x00021240, 0x34470001, 0x000b1400, 0x3c030100, 0x00431025,
+ 0xac820000, 0x8f830018, 0x00ea3825, 0x1120000f, 0xac830004, 0x97430e0a,
+ 0x8f84000c, 0x00ee3825, 0x2402000e, 0x00781825, 0xaf430160, 0x25830006,
+ 0x24840008, 0x30841fff, 0xa742015a, 0xa7430158, 0xaf84000c, 0x0a000db7,
+ 0x00000000, 0x8f83000c, 0x25820002, 0xa7420158, 0x24630008, 0x30631fff,
+ 0xaf83000c, 0x54c0000f, 0x8f420e14, 0x8f820008, 0x504f0002, 0x24100001,
+ 0x34e70040, 0x97420e10, 0x97430e12, 0x8f850014, 0x00021400, 0x00621825,
+ 0xaca300a8, 0x8f840014, 0x8f420e18, 0xac8200ac, 0x8f420e14, 0x8f430e1c,
+ 0xaf420144, 0xaf430148, 0xa34b0152, 0xaf470154, 0x0a000efb, 0xaf4e0178,
+ 0x10400165, 0x00000000, 0x93620008, 0x50400008, 0xafa60008, 0x97620010,
+ 0x00a2102b, 0x10400003, 0x30820040, 0x1040015c, 0x00000000, 0xafa60008,
+ 0xa7840010, 0xaf850004, 0x93620008, 0x1440005f, 0x27ac0008, 0xaf60000c,
+ 0x97820010, 0x30424000, 0x10400002, 0x2403000e, 0x24030016, 0xa363000a,
+ 0x24034007, 0xaf630014, 0x93820012, 0x8f630014, 0x30420007, 0x00021240,
+ 0x00621825, 0xaf630014, 0x97820010, 0x8f630014, 0x30420010, 0x00621825,
+ 0xaf630014, 0x97820010, 0x30420008, 0x5040000e, 0x00002821, 0x8f620014,
+ 0x004e1025, 0xaf620014, 0x97430e0a, 0x2402000e, 0x00781825, 0xaf630004,
+ 0xa3620002, 0x9363000a, 0x3405fffc, 0x24630004, 0x0a000e06, 0xa363000a,
+ 0xaf600004, 0xa3600002, 0x97820010, 0x9363000a, 0x30421f00, 0x00021182,
+ 0x24420028, 0x00621821, 0xa3630009, 0x97420e0c, 0xa7620010, 0x93630009,
+ 0x24020008, 0x24630002, 0x30630007, 0x00431023, 0x30420007, 0xa362000b,
+ 0x93640009, 0x97620010, 0x8f890004, 0x97830010, 0x00441021, 0x00a21021,
+ 0x30630040, 0x10600007, 0x3045ffff, 0x00a9102b, 0x14400005, 0x0125102b,
+ 0x3c068000, 0x0a000e3a, 0x00005821, 0x0125102b, 0x544000c7, 0x00006021,
+ 0x97420e14, 0xa7420e10, 0x97430e16, 0xa7430e12, 0x8f420e1c, 0xaf420e18,
+ 0xaf450e00, 0x8f420000, 0x30420008, 0x1040fffd, 0x00000000, 0x97420e08,
+ 0x00a04821, 0xa7820010, 0x8f430e04, 0x00003021, 0x240b0001, 0xaf830004,
+ 0x97620010, 0x0a000e4c, 0x304dffff, 0x8f890004, 0x97820010, 0x30420040,
+ 0x10400004, 0x01206821, 0x3c068000, 0x0a000e4c, 0x00005821, 0x97630010,
+ 0x8f820004, 0x10430003, 0x00003021, 0x0a000eee, 0x00006021, 0x240b0001,
+ 0x8d820000, 0x00491023, 0x1440000d, 0xad820000, 0x8f620014, 0x34420040,
+ 0xaf620014, 0x97430e10, 0x97420e12, 0x8f840014, 0x00031c00, 0x00431025,
+ 0xac8200a8, 0x8f830014, 0x8f420e18, 0xac6200ac, 0x93620008, 0x1440003e,
+ 0x00000000, 0x25260002, 0x8f84000c, 0x9743008a, 0x3063ffff, 0xafa30000,
+ 0x8fa20000, 0x00441023, 0x2442ffff, 0x30421fff, 0x2c420010, 0x1440fff7,
+ 0x00000000, 0x8f82000c, 0x8f830018, 0x00021082, 0x00021080, 0x24424000,
+ 0x03422821, 0x00605021, 0x24630001, 0x314200ff, 0x00021400, 0xaf830018,
+ 0x3c033200, 0x00431025, 0xaca20000, 0x93630009, 0x9362000a, 0x00031c00,
+ 0x00431025, 0xaca20004, 0x8f830018, 0xaca30008, 0x97820010, 0x30420008,
+ 0x10400002, 0x00c04021, 0x25280006, 0x97430e14, 0x93640002, 0x8f450e1c,
+ 0x8f660004, 0x8f670014, 0x3063ffff, 0xa7430144, 0x97420e16, 0xa7420146,
+ 0xaf450148, 0xa34a0152, 0x8f82000c, 0x308400ff, 0xa744015a, 0xaf460160,
+ 0xa7480158, 0xaf470154, 0xaf4e0178, 0x00511021, 0x30421fff, 0xaf82000c,
+ 0x0a000ed9, 0x8d820000, 0x93620009, 0x9363000b, 0x8f85000c, 0x2463000a,
+ 0x00435021, 0x25440007, 0x00992024, 0x9743008a, 0x3063ffff, 0xafa30000,
+ 0x8fa20000, 0x00451023, 0x2442ffff, 0x30421fff, 0x0044102b, 0x1440fff7,
+ 0x00000000, 0x8f82000c, 0x8f840018, 0x00021082, 0x00021080, 0x24424000,
+ 0x03422821, 0x00804021, 0x24840001, 0xaf840018, 0x93630009, 0x310200ff,
+ 0x00022400, 0x3c024100, 0x24630002, 0x00621825, 0x00832025, 0xaca40000,
+ 0x8f62000c, 0x00461025, 0xaca20004, 0x97430e14, 0x93640002, 0x8f450e1c,
+ 0x8f660004, 0x8f670014, 0x3063ffff, 0xa7430144, 0x97420e16, 0x308400ff,
+ 0xa7420146, 0xaf450148, 0xa3480152, 0x8f83000c, 0x25420007, 0x00591024,
+ 0xa744015a, 0xaf460160, 0xa7490158, 0xaf470154, 0xaf4e0178, 0x00621821,
+ 0x30631fff, 0xaf83000c, 0x8d820000, 0x14400005, 0x00000000, 0x8f620014,
+ 0x2403ffbf, 0x00431024, 0xaf620014, 0x8f62000c, 0x004d1021, 0xaf62000c,
+ 0x93630008, 0x14600008, 0x00000000, 0x11600006, 0x00000000, 0x8f630014,
+ 0x3c02efff, 0x3442fffe, 0x00621824, 0xaf630014, 0xa36b0008, 0x01206021,
+ 0x1580000c, 0x8fa60008, 0x97420e14, 0x97430e16, 0x8f850014, 0x00021400,
+ 0x00621825, 0xaca300a8, 0x8f840014, 0x8f420e1c, 0xac8200ac, 0x0a000efd,
+ 0x2d820001, 0x14c0fe65, 0x2d820001, 0x00501025, 0x10400058, 0x24020f00,
+ 0x8f830008, 0x14620023, 0x3c048000, 0x11800009, 0x3c038000, 0x97420e08,
+ 0x30420040, 0x14400005, 0x00000000, 0x0000000d, 0x00000000, 0x2400032c,
+ 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, 0x00000000, 0x97420e10,
+ 0x3c030500, 0x00431025, 0xaf42014c, 0x97430e14, 0xa7430144, 0x97420e16,
+ 0xa7420146, 0x8f430e1c, 0x24022000, 0xaf430148, 0x3c031000, 0xa3400152,
+ 0xa740015a, 0xaf400160, 0xa7400158, 0xaf420154, 0xaf430178, 0x8f830008,
+ 0x3c048000, 0x8f420178, 0x00441024, 0x1440fffd, 0x24020f00, 0x10620016,
+ 0x00000000, 0x97420e14, 0xa7420144, 0x97430e16, 0xa7430146, 0x8f420e1c,
+ 0x3c031000, 0xaf420148, 0x0a000f51, 0x24020240, 0x97420e14, 0x97430e16,
+ 0x8f840014, 0x00021400, 0x00621825, 0xac8300a8, 0x8f850014, 0x8f420e1c,
+ 0x00006021, 0xaca200ac, 0x0a000efd, 0x2d820001, 0xaf40014c, 0x11800007,
+ 0x00000000, 0x97420e10, 0xa7420144, 0x97430e12, 0xa7430146, 0x0a000f4e,
+ 0x8f420e18, 0x97420e14, 0xa7420144, 0x97430e16, 0xa7430146, 0x8f420e1c,
+ 0xaf420148, 0x24020040, 0x3c031000, 0xa3400152, 0xa740015a, 0xaf400160,
+ 0xa7400158, 0xaf420154, 0xaf430178, 0x8fb10014, 0x8fb00010, 0x03e00008,
+ 0x27bd0018, 0x27bdffd0, 0x3c1a8000, 0x3c0420ff, 0x3484fffd, 0x3c020008,
+ 0x03421821, 0xafbf002c, 0xafb60028, 0xafb50024, 0xafb40020, 0xafb3001c,
+ 0xafb20018, 0xafb10014, 0xafb00010, 0xaf830014, 0xaf440e00, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3c0200ff, 0x3442fffd,
+ 0x3c046004, 0xaf420e00, 0x8c835000, 0x24160800, 0x24150d00, 0x3c140800,
+ 0x24130f00, 0x3c120800, 0x3c114000, 0x2402ff7f, 0x00621824, 0x3463380c,
+ 0x24020009, 0xac835000, 0xaf420008, 0xaf800018, 0xaf80000c, 0x0e001559,
+ 0x00000000, 0x0e000ff0, 0x00000000, 0x3c020800, 0x245057c0, 0x8f420000,
+ 0x30420001, 0x1040fffd, 0x00000000, 0x8f440100, 0xaf840008, 0xaf440020,
+ 0xaf560178, 0x93430108, 0xa3830012, 0x93820012, 0x30420001, 0x10400008,
+ 0x00000000, 0x93820012, 0x30420006, 0x00021100, 0x0e000d43, 0x0050d821,
+ 0x0a000fac, 0x00000000, 0x14950005, 0x00000000, 0x0e000d43, 0x269b5840,
+ 0x0a000fac, 0x00000000, 0x14930005, 0x00000000, 0x0e000d43, 0x265b5860,
+ 0x0a000fac, 0x00000000, 0x0e0010ea, 0x00000000, 0xaf510138, 0x0a000f89,
+ 0x00000000, 0x27bdfff8, 0x3084ffff, 0x24820007, 0x3044fff8, 0x8f85000c,
+ 0x9743008a, 0x3063ffff, 0xafa30000, 0x8fa20000, 0x00451023, 0x2442ffff,
+ 0x30421fff, 0x0044102b, 0x1440fff7, 0x00000000, 0x8f82000c, 0x00021082,
+ 0x00021080, 0x24424000, 0x03421021, 0x03e00008, 0x27bd0008, 0x3084ffff,
+ 0x8f82000c, 0x24840007, 0x3084fff8, 0x00441021, 0x30421fff, 0xaf82000c,
+ 0x03e00008, 0x00000000, 0x27bdffe8, 0x3c1a8000, 0x3c0420ff, 0x3484fffd,
+ 0x3c020008, 0x03421821, 0xafbf0010, 0xaf830014, 0xaf440e00, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3c0200ff, 0x3442fffd,
+ 0x3c046004, 0xaf420e00, 0x8c825000, 0x2403ff7f, 0x00431024, 0x3442380c,
+ 0x24030009, 0xac825000, 0xaf430008, 0xaf800018, 0xaf80000c, 0x0e001559,
+ 0x00000000, 0x0e000ff0, 0x00000000, 0x8fbf0010, 0x03e00008, 0x27bd0018,
+ 0x27bdffe8, 0x3c02000a, 0x03421821, 0x3c040800, 0x24845880, 0x24050019,
+ 0xafbf0010, 0xaf830024, 0x0e001565, 0x00003021, 0x3c050800, 0x3c020800,
+ 0x24425330, 0xaca258e8, 0x24a558e8, 0x3c020800, 0x244254f8, 0x3c030800,
+ 0x2463550c, 0x3c040800, 0xaca20004, 0x3c020800, 0x24425338, 0xaca30008,
+ 0xac825900, 0x24845900, 0x3c020800, 0x244253c4, 0x3c070800, 0x24e75404,
+ 0x3c060800, 0x24c65520, 0x3c050800, 0x24a55438, 0x3c030800, 0xac820004,
+ 0x3c020800, 0x24425528, 0xac870008, 0xac86000c, 0xac850010, 0xac625920,
+ 0x24635920, 0x8fbf0010, 0x3c020800, 0x24425540, 0xac620004, 0x3c020800,
+ 0xac670008, 0xac66000c, 0xac650010, 0xac400048, 0x03e00008, 0x27bd0018,
+ 0x974309da, 0x00804021, 0xad030000, 0x8f4209dc, 0xad020004, 0x8f4309e0,
+ 0xad030008, 0x934409d9, 0x24020001, 0x30840003, 0x1082001f, 0x30a900ff,
+ 0x28820002, 0x10400005, 0x24020002, 0x10800009, 0x3c0a0800, 0x0a001078,
+ 0x93420934, 0x1082000b, 0x24020003, 0x10820026, 0x3c0a0800, 0x0a001078,
+ 0x93420934, 0x974209e4, 0x00021400, 0x34420800, 0xad02000c, 0x0a001077,
+ 0x25080010, 0x974209e4, 0x00021400, 0x34428100, 0xad02000c, 0x974309e8,
+ 0x3c0a0800, 0x00031c00, 0x34630800, 0xad030010, 0x0a001077, 0x25080014,
+ 0x974409e4, 0x3c050800, 0x24a25880, 0x9443001c, 0x94460014, 0x94470010,
+ 0x00a05021, 0x24020800, 0xad000010, 0xad020014, 0x00042400, 0x00661821,
+ 0x00671823, 0x2463fff2, 0x00832025, 0xad04000c, 0x0a001077, 0x25080018,
+ 0x974209e4, 0x3c050800, 0x00021400, 0x34428100, 0xad02000c, 0x974409e8,
+ 0x24a25880, 0x9443001c, 0x94460014, 0x94470010, 0x00a05021, 0x24020800,
+ 0xad000014, 0xad020018, 0x00042400, 0x00661821, 0x00671823, 0x2463ffee,
+ 0x00832025, 0xad040010, 0x2508001c, 0x93420934, 0x93450921, 0x3c074000,
+ 0x25445880, 0x94830018, 0x94860014, 0x00021082, 0x00021600, 0x00052c00,
+ 0x00a72825, 0x00451025, 0x00661821, 0x00431025, 0xad020000, 0x9783002c,
+ 0x974209ea, 0x00621821, 0x00031c00, 0xad030004, 0x9782002c, 0x24420001,
+ 0x30427fff, 0xa782002c, 0x93430920, 0x3c020006, 0x00031e00, 0x00621825,
+ 0xad030008, 0x8f42092c, 0xad02000c, 0x8f430930, 0xad030010, 0x8f440938,
+ 0x25080014, 0xad040000, 0x8f820020, 0x11200004, 0xad020004, 0x8f420940,
+ 0x0a0010a1, 0x2442ffff, 0x8f420940, 0xad020008, 0x8f440948, 0x8f420940,
+ 0x93430936, 0x00823023, 0x00663006, 0x3402ffff, 0x0046102b, 0x54400001,
+ 0x3406ffff, 0x93420937, 0x25445880, 0x90830024, 0xad000010, 0x00021700,
+ 0x34630010, 0x00031c00, 0x00431025, 0x00461025, 0xad02000c, 0x8c830008,
+ 0x14600031, 0x25080014, 0x3c020800, 0x8c430048, 0x1060002d, 0x00000000,
+ 0x9342010b, 0xad020000, 0x8f830000, 0x8c6200b0, 0xad020004, 0x8f830000,
+ 0x8c6200b4, 0xad020008, 0x8f830000, 0x8c6200c0, 0xad02000c, 0x8f830000,
+ 0x8c6200c4, 0xad020010, 0x8f830000, 0x8c6200c8, 0xad020014, 0x8f830000,
+ 0x8c6200cc, 0xad020018, 0x8f830000, 0x8c6200e0, 0xad02001c, 0x8f830000,
+ 0x8c6200e8, 0xad020020, 0x8f830000, 0x8c6200f0, 0x3c04600e, 0xad020024,
+ 0x8c8200d0, 0xad020028, 0x8c8300d4, 0xad03002c, 0x8f820028, 0x3c046012,
+ 0xad020030, 0x8c8200a8, 0xad020034, 0x8c8300ac, 0x3c026000, 0xad030038,
+ 0x8c434448, 0xad03003c, 0x03e00008, 0x01001021, 0x27bdffa8, 0x3c020008,
+ 0x03423021, 0xafbf0054, 0xafbe0050, 0xafb7004c, 0xafb60048, 0xafb50044,
+ 0xafb40040, 0xafb3003c, 0xafb20038, 0xafb10034, 0xafb00030, 0xaf860000,
+ 0x24020040, 0xaf420814, 0xaf400810, 0x8f420944, 0x8f430950, 0x8f440954,
+ 0x8f45095c, 0xaf820034, 0xaf830020, 0xaf84001c, 0xaf850030, 0x90c20000,
+ 0x24030020, 0x304400ff, 0x10830005, 0x24020030, 0x10820022, 0x3c030800,
+ 0x0a001139, 0x8c62002c, 0x24020088, 0xaf420818, 0x3c020800, 0x244258e8,
+ 0xafa20020, 0x93430109, 0x3c020800, 0x10600009, 0x24575900, 0x3c026000,
+ 0x24030100, 0xac43081c, 0x3c030001, 0xac43081c, 0x0000000d, 0x00000000,
+ 0x24000376, 0x9342010a, 0x30420080, 0x14400021, 0x24020800, 0x3c026000,
+ 0x24030100, 0xac43081c, 0x3c030001, 0xac43081c, 0x0000000d, 0x00000000,
+ 0x2400037d, 0x0a001141, 0x24020800, 0x93430109, 0x3063007f, 0x00031140,
+ 0x000318c0, 0x00431021, 0x24430088, 0xaf430818, 0x0000000d, 0x3c020800,
+ 0x24425940, 0x3c030800, 0x24775950, 0x0a001140, 0xafa20020, 0x24420001,
+ 0xac62002c, 0x0000000d, 0x00000000, 0x24000395, 0x0a0014c1, 0x8fbf0054,
+ 0x24020800, 0xaf420178, 0x8f450104, 0x8f420988, 0x00a21023, 0x58400005,
+ 0x8f4309a0, 0x0000000d, 0x00000000, 0x240003b1, 0x8f4309a0, 0x3c100800,
+ 0xae0358b0, 0x8f4209a4, 0x8f830020, 0x260458b0, 0x2491ffd0, 0xae220034,
+ 0x00a21023, 0xae230028, 0xac82ffd0, 0x8fa30020, 0x8c620000, 0x0040f809,
+ 0x0200b021, 0x00409021, 0x32440010, 0x32420002, 0x10400007, 0xafa40024,
+ 0x8e220020, 0x32530040, 0x2403ffbf, 0x00431024, 0x0a001493, 0xae220020,
+ 0x32420020, 0x10400002, 0x3c020800, 0x24575920, 0x32420001, 0x14400007,
+ 0x00000000, 0x8f820008, 0xaf420080, 0x8ec358b0, 0xaf430e10, 0x8e220034,
+ 0xaf420e18, 0x9343010b, 0x93420905, 0x30420008, 0x1040003c, 0x307400ff,
+ 0x8f820000, 0x8c430074, 0x0460000a, 0x00000000, 0x3c026000, 0x24030100,
+ 0xac43081c, 0x3c030001, 0xac43081c, 0x0000000d, 0x00000000, 0x240003ed,
+ 0x8f820000, 0x9044007b, 0x9343010a, 0x14830027, 0x32530040, 0x00003821,
+ 0x24052000, 0x3c090800, 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd,
+ 0x8ec258b0, 0x26c458b0, 0x2484ffd0, 0xaf420144, 0x8c820034, 0x3c030100,
+ 0xaf420148, 0x24020047, 0xaf43014c, 0xa3420152, 0x8d230030, 0x3c021000,
+ 0xa7470158, 0xaf450154, 0xaf420178, 0x8c860034, 0x24630001, 0xad230030,
+ 0x9342010a, 0x3c030047, 0xafa50014, 0x00021600, 0x00431025, 0x00471025,
+ 0xafa20010, 0x9343010b, 0xafa30018, 0x8f440100, 0x8f450104, 0x0e00159b,
+ 0x3c070100, 0x3c050800, 0x24a25880, 0x0a001250, 0x8c430020, 0x32820002,
+ 0x10400050, 0x00000000, 0x0e0015b9, 0x32530040, 0x3c039000, 0x34630001,
+ 0x8f820008, 0x3c048000, 0x00431025, 0xaf420020, 0x8f420020, 0x00441024,
+ 0x1440fffd, 0x00000000, 0x8f830000, 0x90620005, 0x34420008, 0xa0620005,
+ 0x8f840000, 0x8c820074, 0x3c038000, 0x00431025, 0xac820074, 0x90830000,
+ 0x24020020, 0x10620004, 0x00000000, 0x0000000d, 0x00000000, 0x2400040b,
+ 0x8f830008, 0x3c028000, 0x34420001, 0x00621825, 0xaf430020, 0x9084007b,
+ 0x9342010a, 0x14820028, 0x3c030800, 0x00003821, 0x24052000, 0x3c090800,
+ 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, 0x8ec258b0, 0x26c458b0,
+ 0x2484ffd0, 0xaf420144, 0x8c820034, 0x3c030100, 0xaf420148, 0x24020046,
+ 0xaf43014c, 0xa3420152, 0x8d230030, 0x3c021000, 0xa7470158, 0xaf450154,
+ 0xaf420178, 0x8c860034, 0x24630001, 0xad230030, 0x9342010a, 0x3c030046,
+ 0xafa50014, 0x00021600, 0x00431025, 0x00471025, 0xafa20010, 0x9343010b,
+ 0xafa30018, 0x8f440100, 0x8f450104, 0x0e00159b, 0x3c070100, 0x3c030800,
+ 0x24625880, 0x0a001250, 0x8c430020, 0x93420108, 0x30420010, 0x50400056,
+ 0x9343093f, 0x8f860000, 0x90c2007f, 0x8cc30178, 0x304800ff, 0x15030004,
+ 0x00000000, 0x0000000d, 0x00000000, 0x24000425, 0x90c2007e, 0x90c40080,
+ 0x00081c00, 0x00021600, 0x00431025, 0x00042200, 0x90c3007a, 0x90c5000a,
+ 0x00441025, 0x11050028, 0x00623825, 0xa0c8000a, 0x00004021, 0x24056000,
+ 0x3c090800, 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, 0x8ec258b0,
+ 0x26c458b0, 0x2484ffd0, 0xaf420144, 0x8c820034, 0xaf420148, 0x24020052,
+ 0xaf47014c, 0xa3420152, 0x8d230030, 0x3c021000, 0xa7480158, 0xaf450154,
+ 0xaf420178, 0x8c860034, 0x24630001, 0xad230030, 0x9342010a, 0x3c030052,
+ 0xafa50014, 0x00021600, 0x00431025, 0x00481025, 0xafa20010, 0x9343010b,
+ 0xafa30018, 0x8f440100, 0x0e00159b, 0x8f450104, 0x0a00124a, 0x00000000,
+ 0x3c026000, 0x24030100, 0xac43081c, 0x3c030001, 0xac43081c, 0x0000000d,
+ 0x00000000, 0x2400043e, 0x16800009, 0x3c050800, 0x3c040800, 0x24825880,
+ 0x8c430020, 0x32530040, 0x2404ffbf, 0x00641824, 0x0a001493, 0xac430020,
+ 0x8ca25880, 0x10400005, 0x3c030800, 0x8c620034, 0xaca05880, 0x24420001,
+ 0xac620034, 0x9343093f, 0x24020012, 0x5462000e, 0x97420908, 0x32820038,
+ 0x14400009, 0x3c030800, 0x8f830000, 0x8c62004c, 0xac62005c, 0x3c020800,
+ 0x24445880, 0x8c820020, 0x0a001285, 0x32530040, 0xac605880, 0x97420908,
+ 0x5440001c, 0x97420908, 0x3c039000, 0x34630001, 0x8f820008, 0x32530040,
+ 0x3c048000, 0x00431025, 0xaf420020, 0x8f420020, 0x00441024, 0x1440fffd,
+ 0x3c028000, 0x8f840000, 0x8f850008, 0x8c830050, 0x34420001, 0x00a22825,
+ 0xaf830020, 0xac830070, 0xac83005c, 0xaf450020, 0x3c050800, 0x24a45880,
+ 0x8c820020, 0x2403ffbf, 0x00431024, 0x0a001493, 0xac820020, 0x000211c0,
+ 0xaf420024, 0x97420908, 0x3c030080, 0x34630003, 0x000211c0, 0xaf42080c,
+ 0xaf43081c, 0x974209ec, 0x8f4309a4, 0xa782002c, 0x3c020800, 0x24445880,
+ 0xac83002c, 0x93420937, 0x93430934, 0x00021080, 0x00621821, 0xa4830018,
+ 0x934209d8, 0x32850038, 0xafa50028, 0x00621821, 0xa483001a, 0x934209d8,
+ 0x93430934, 0x3c1e0800, 0x00809821, 0x00431021, 0x24420010, 0xa4820016,
+ 0x24020006, 0xae620020, 0x8fa20028, 0x10400003, 0x0000a821, 0x0a0012f0,
+ 0x24120008, 0x8f420958, 0x8f830020, 0x8f840030, 0x00431023, 0x00832023,
+ 0x04800003, 0xae620004, 0x04410003, 0x0082102b, 0x0a0012bc, 0xae600004,
+ 0x54400001, 0xae640004, 0x8ee20000, 0x0040f809, 0x00000000, 0x00409021,
+ 0x32420001, 0x5440001e, 0x8ee20004, 0x8e630008, 0x1060002b, 0x3c02c000,
+ 0x00621025, 0xaf420e00, 0x8f420000, 0x30420008, 0x1040fffd, 0x00000000,
+ 0x97420e08, 0xa7820010, 0x8f430e04, 0x8e620008, 0xaf830004, 0x8f840004,
+ 0x0044102b, 0x1040000b, 0x24150001, 0x24020100, 0x3c016000, 0xac22081c,
+ 0x3c020001, 0x3c016000, 0xac22081c, 0x0000000d, 0x00000000, 0x240004cd,
+ 0x24150001, 0x8ee20004, 0x0040f809, 0x00000000, 0x02429025, 0x32420002,
+ 0x5040001d, 0x8f470940, 0x12a00006, 0x8ec258b0, 0x8f830000, 0xac6200a8,
+ 0x8f840000, 0x8e620034, 0xac8200ac, 0x32420004, 0x50400013, 0x8f470940,
+ 0x3c020800, 0x3283007d, 0x10600110, 0x24575920, 0x32820001, 0x50400006,
+ 0x36520002, 0x8f830034, 0x8f420940, 0x10620109, 0x00000000, 0x36520002,
+ 0x24020008, 0xa6600010, 0xa6620012, 0xae600008, 0xa2600024, 0x8f470940,
+ 0x3c030800, 0x24685880, 0x8d02002c, 0x8d050008, 0x95040010, 0x9506000a,
+ 0x95030026, 0x00451021, 0x00862021, 0x00641821, 0xaf870034, 0xad02002c,
+ 0x32820030, 0x10400008, 0xa5030014, 0x91020024, 0x32910040, 0x34420004,
+ 0xa1020024, 0xaf400048, 0x0a001345, 0x3c040800, 0x93420923, 0x30420002,
+ 0x10400029, 0x32910040, 0x8f830000, 0x8f840020, 0x8c620084, 0x00441023,
+ 0x0442000a, 0x3c039000, 0x95020014, 0x8c630084, 0x00821021, 0x00621823,
+ 0x1c600004, 0x3c039000, 0x91020024, 0x34420001, 0xa1020024, 0x34630001,
+ 0x8f820008, 0x32910040, 0x3c048000, 0x00431025, 0xaf420020, 0x8f420020,
+ 0x00441024, 0x1440fffd, 0x00000000, 0x8f840000, 0x9083003f, 0x2402000a,
+ 0x10620005, 0x2402000c, 0x9083003f, 0x24020008, 0x14620002, 0x24020014,
+ 0xa082003f, 0x8f830008, 0x3c028000, 0x34420001, 0x00621825, 0xaf430020,
+ 0x3c040800, 0x24865880, 0x94c20010, 0x94c3001a, 0x8cc40008, 0x00432821,
+ 0x14800006, 0xa4c5001c, 0x3c020800, 0x8c430048, 0x10600002, 0x24a20040,
+ 0xa4c2001c, 0x27d05880, 0x9604001c, 0x96020012, 0x00822021, 0x24840002,
+ 0x0e000faf, 0x3084ffff, 0x8f850018, 0x00a01821, 0xa2030025, 0x8ee60008,
+ 0x00402021, 0x24a50001, 0xaf850018, 0x00c0f809, 0x00000000, 0x00402021,
+ 0x0e001026, 0x02202821, 0x8ee3000c, 0x0060f809, 0x00402021, 0x9604001c,
+ 0x96020012, 0x00822021, 0x24840002, 0x0e000fc5, 0x3084ffff, 0x8fc25880,
+ 0x8e030008, 0x00431023, 0x14400012, 0xafc25880, 0x54600006, 0x8e020020,
+ 0x3243004a, 0x24020002, 0x14620005, 0x00000000, 0x8e020020, 0x34420040,
+ 0x0a001382, 0xae020020, 0x52a00006, 0x36520002, 0x8e020030, 0xaf420e10,
+ 0x8e030034, 0xaf430e18, 0x36520002, 0x52a00008, 0x96670014, 0x8f830000,
+ 0x8f420e10, 0xac6200a8, 0x8f840000, 0x8f420e18, 0xac8200ac, 0x96670014,
+ 0x92680024, 0x24020040, 0xaf420814, 0x8f830020, 0x8f82001c, 0x00671821,
+ 0x00621023, 0xaf830020, 0x18400008, 0x00000000, 0x8f820000, 0xaf83001c,
+ 0xac430054, 0x54e00005, 0xaf400040, 0x0a0013a0, 0x8f42095c, 0x54e00001,
+ 0xaf400044, 0x8f42095c, 0x31030008, 0xaf820030, 0x1060001a, 0x00000000,
+ 0x8f840000, 0x90820120, 0x90830121, 0x304600ff, 0x00c31823, 0x30630007,
+ 0x24020007, 0x1062000e, 0x00000000, 0x90820122, 0x304200fe, 0xa0820122,
+ 0x8f850000, 0x00061880, 0x8f840020, 0x24a20100, 0x00431021, 0x24c30001,
+ 0x30630007, 0xac440000, 0x0a0013bd, 0xa0a30120, 0x90820122, 0x34420001,
+ 0xa0820122, 0x14e00003, 0x31020001, 0x10400031, 0x32510002, 0x8f820000,
+ 0x8c43000c, 0x30630001, 0x1060002c, 0x32510002, 0x3c029000, 0x8f830008,
+ 0x34420001, 0x3c048000, 0x00621825, 0xaf430020, 0x8f420020, 0x00441024,
+ 0x1440fffd, 0x00000000, 0x8f870000, 0x8ce2000c, 0x30420001, 0x10400018,
+ 0x00000000, 0x94e2006a, 0x00022880, 0x50a00001, 0x24050001, 0x94e30068,
+ 0x90e40081, 0x3c020800, 0x8c460024, 0x00652821, 0x00852804, 0x00c5102b,
+ 0x54400001, 0x00a03021, 0x3c020800, 0x8c440028, 0x00c4182b, 0x54600001,
+ 0x00c02021, 0x8f430074, 0x2402fffe, 0x00822824, 0x00a31821, 0xace3000c,
+ 0x8f830008, 0x3c028000, 0x34420001, 0x00621825, 0xaf430020, 0x8f820020,
+ 0x3c050800, 0x24b05880, 0xae020028, 0x8ee30010, 0x0060f809, 0x00000000,
+ 0x8f820028, 0x24420001, 0xaf820028, 0x12a00005, 0xaf40004c, 0x8f420e10,
+ 0xae020030, 0x8f430e18, 0xae030034, 0x1220fea7, 0x24020006, 0x8f870024,
+ 0x9786002c, 0x8f830000, 0x8f820034, 0x8f840020, 0x8f85001c, 0x32530040,
+ 0xa4e6002c, 0xac620044, 0x32420008, 0xac640050, 0xac650054, 0x1040007a,
+ 0x32820020, 0x10400027, 0x32910010, 0x00003821, 0x24052000, 0x3c090800,
+ 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, 0x8ec258b0, 0x26c458b0,
+ 0x2484ffd0, 0xaf420144, 0x8c820034, 0x3c030400, 0xaf420148, 0x24020041,
+ 0xaf43014c, 0xa3420152, 0x8d230030, 0x3c021000, 0xa7470158, 0xaf450154,
+ 0xaf420178, 0x8c860034, 0x24630001, 0xad230030, 0x9342010a, 0x3c030041,
+ 0xafa50014, 0x00021600, 0x00431025, 0x00471025, 0xafa20010, 0x9343010b,
+ 0xafa30018, 0x8f440100, 0x8f450104, 0x0e00159b, 0x3c070400, 0x12200028,
+ 0x00003821, 0x24052000, 0x3c090800, 0x3c038000, 0x8f420178, 0x00431024,
+ 0x1440fffd, 0x8ec258b0, 0x26c458b0, 0x2484ffd0, 0xaf420144, 0x8c820034,
+ 0x3c030300, 0xaf420148, 0x2402004e, 0xaf43014c, 0xa3420152, 0x8d230030,
+ 0x3c021000, 0xa7470158, 0xaf450154, 0xaf420178, 0x8c860034, 0x24630001,
+ 0xad230030, 0x9342010a, 0x3c03004e, 0xafa50014, 0x00021600, 0x00431025,
+ 0x00471025, 0xafa20010, 0x9343010b, 0xafa30018, 0x8f440100, 0x8f450104,
+ 0x0e00159b, 0x3c070300, 0x0a00148b, 0x8fa20024, 0x32820008, 0x10400026,
+ 0x24052000, 0x00003821, 0x3c090800, 0x3c038000, 0x8f420178, 0x00431024,
+ 0x1440fffd, 0x8ec258b0, 0x26c458b0, 0x2484ffd0, 0xaf420144, 0x8c820034,
+ 0x3c030200, 0xaf420148, 0x2402004b, 0xaf43014c, 0xa3420152, 0x8d230030,
+ 0x3c021000, 0xa7470158, 0xaf450154, 0xaf420178, 0x8c860034, 0x24630001,
+ 0xad230030, 0x9342010a, 0x3c03004b, 0xafa50014, 0x00021600, 0x00431025,
+ 0x00471025, 0xafa20010, 0x9343010b, 0xafa30018, 0x8f440100, 0x8f450104,
+ 0x0e00159b, 0x3c070200, 0x8fa20024, 0x14400004, 0x8fa30020, 0x32420010,
+ 0x10400004, 0x00000000, 0x8c620004, 0x0040f809, 0x00000000, 0x12600006,
+ 0x8fa40020, 0x8c820008, 0x0040f809, 0x00000000, 0x0a0014c1, 0x8fbf0054,
+ 0x3c030800, 0x8c6258a0, 0x30420040, 0x14400023, 0x8fbf0054, 0x00002821,
+ 0x24040040, 0x8f870020, 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd,
+ 0x8ec258b0, 0x26c358b0, 0x2463ffd0, 0xaf420144, 0x8c620034, 0xaf420148,
+ 0x24020049, 0xaf47014c, 0xa3420152, 0x3c021000, 0xa7450158, 0xaf440154,
+ 0xaf420178, 0x8c660034, 0x9342010a, 0x3c030049, 0xafa40014, 0x00021600,
+ 0x00431025, 0x00451025, 0xafa20010, 0x9343010b, 0xafa30018, 0x8f440100,
+ 0x0e00159b, 0x8f450104, 0x8fbf0054, 0x8fbe0050, 0x8fb7004c, 0x8fb60048,
+ 0x8fb50044, 0x8fb40040, 0x8fb3003c, 0x8fb20038, 0x8fb10034, 0x8fb00030,
+ 0x03e00008, 0x27bd0058, 0x03e00008, 0x00001021, 0x3c020800, 0x24435880,
+ 0x8c650004, 0x8c445880, 0x0085182b, 0x10600002, 0x00403021, 0x00802821,
+ 0x9744093c, 0x00a4102b, 0x54400001, 0x00a02021, 0x93420923, 0x0004182b,
+ 0x00021042, 0x30420001, 0x00431024, 0x1040000d, 0x24c25880, 0x8f850000,
+ 0x8f830020, 0x8ca20084, 0x00431023, 0x04420007, 0x24c25880, 0x8ca20084,
+ 0x00641821, 0x00431023, 0x28420001, 0x00822023, 0x24c25880, 0xac440008,
+ 0xa4400026, 0x03e00008, 0x00001021, 0x8f850004, 0x97840010, 0x3c030800,
+ 0x24635880, 0x24020008, 0xa4620012, 0x8f820004, 0xa4600010, 0x000420c2,
+ 0x30840008, 0x2c420001, 0x00021023, 0x30420006, 0xac650008, 0x03e00008,
+ 0xa0640024, 0x3c020800, 0x24425880, 0x90450025, 0x9443001c, 0x3c021100,
+ 0xac800004, 0x00052c00, 0x24630002, 0x00621825, 0x00a32825, 0x24820008,
+ 0x03e00008, 0xac850000, 0x27bdffd8, 0x3c020800, 0x24425880, 0xafbf0020,
+ 0x90480025, 0x8c440008, 0x8c460020, 0x8f870020, 0x3c030800, 0x3c058000,
+ 0x8f420178, 0x00451024, 0x1440fffd, 0x8c6258b0, 0x246358b0, 0x2469ffd0,
+ 0xaf420144, 0x8d220034, 0x30c32000, 0xaf420148, 0x3c021000, 0xaf47014c,
+ 0xa3480152, 0xa7440158, 0xaf460154, 0xaf420178, 0x10600004, 0x3c030800,
+ 0x8c620030, 0x24420001, 0xac620030, 0x9342010a, 0x00081c00, 0x3084ffff,
+ 0xafa60014, 0x00021600, 0x00431025, 0x00441025, 0xafa20010, 0x9343010b,
+ 0xafa30018, 0x8f440100, 0x8f450104, 0x0e00159b, 0x8d260034, 0x8fbf0020,
+ 0x03e00008, 0x27bd0028, 0x0000000d, 0x00000000, 0x2400019d, 0x03e00008,
+ 0x00000000, 0x0000000d, 0x00000000, 0x240001a9, 0x03e00008, 0x00000000,
+ 0x03e00008, 0x00000000, 0x3c020800, 0x24425880, 0xac400008, 0xa4400026,
+ 0x03e00008, 0x24020001, 0x3c020800, 0x24425880, 0x24030008, 0xac400008,
+ 0xa4400010, 0xa4430012, 0xa0400024, 0x03e00008, 0x24020004, 0x03e00008,
+ 0x00001021, 0x10c00007, 0x00000000, 0x8ca20000, 0x24c6ffff, 0x24a50004,
+ 0xac820000, 0x14c0fffb, 0x24840004, 0x03e00008, 0x00000000, 0x0a00156c,
+ 0x00a01021, 0xac860000, 0x00000000, 0x00000000, 0x24840004, 0x00a01021,
+ 0x1440fffa, 0x24a5ffff, 0x03e00008, 0x00000000, 0x3c0a0800, 0x8d490068,
+ 0x3c050800, 0x24a52098, 0x00093140, 0x00c51021, 0xac440000, 0x8f440e04,
+ 0x00a61021, 0xac440004, 0x97430e08, 0x97420e0c, 0x00a62021, 0x00031c00,
+ 0x00431025, 0xac820008, 0x8f430e10, 0x00801021, 0xac43000c, 0x8f440e14,
+ 0xac440010, 0x8f430e18, 0x3c0800ff, 0xac430014, 0x8f470e1c, 0x3508ffff,
+ 0x25290001, 0xac470018, 0x3c070800, 0x8ce3006c, 0x9344010a, 0x3c026000,
+ 0x24630001, 0xace3006c, 0x8c434448, 0x3129007f, 0x00a62821, 0xad490068,
+ 0x00042600, 0x00681824, 0x00832025, 0x03e00008, 0xaca4001c, 0x8fac0010,
+ 0x8fad0014, 0x8fae0018, 0x3c0b0800, 0x8d6a0060, 0x3c080800, 0x25080080,
+ 0x000a4940, 0x01281021, 0x01091821, 0xac440000, 0x00601021, 0xac650004,
+ 0xac460008, 0xac67000c, 0xac4c0010, 0xac6d0014, 0x3c036000, 0xac4e0018,
+ 0x8c654448, 0x3c040800, 0x8c820064, 0x254a0001, 0x314a00ff, 0x01094021,
+ 0xad6a0060, 0x24420001, 0xac820064, 0x03e00008, 0xad05001c, 0x3c030800,
+ 0x3c090800, 0x8d250070, 0x246330b0, 0x8f460100, 0x00053900, 0x00e31021,
+ 0xac460000, 0x8f440104, 0x00671021, 0xac440004, 0x8f460108, 0x8f840014,
+ 0x24a50001, 0xac460008, 0x8c880074, 0x3c060800, 0x8cc20074, 0x30a5003f,
+ 0x00671821, 0xad250070, 0x24420001, 0xacc20074, 0x03e00008, 0xac68000c,
+ 0x00000000 };
+
+static u32 bce_TXP_b06FwData[(0x0/4) + 1] = { 0x0 };
+static u32 bce_TXP_b06FwRodata[(0x0/4) + 1] = { 0x0 };
+static u32 bce_TXP_b06FwBss[(0x1c4/4) + 1] = { 0x0 };
+static u32 bce_TXP_b06FwSbss[(0x38/4) + 1] = { 0x0 };
diff --git a/sys/dev/bce/if_bcereg.h b/sys/dev/bce/if_bcereg.h
new file mode 100644
index 0000000..d4cad02
--- /dev/null
+++ b/sys/dev/bce/if_bcereg.h
@@ -0,0 +1,4904 @@
+/*-
+ * Copyright (c) 2006 Broadcom Corporation
+ * David Christensen <davidch@broadcom.com>. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Broadcom Corporation nor the name of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written consent.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _BCE_H_DEFINED
+#define _BCE_H_DEFINED
+
+#ifdef HAVE_KERNEL_OPTION_HEADERS
+#include "opt_device_polling.h"
+#endif
+
+#include <sys/param.h>
+#include <sys/endian.h>
+#include <sys/systm.h>
+#include <sys/sockio.h>
+#include <sys/mbuf.h>
+#include <sys/malloc.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/socket.h>
+#include <sys/sysctl.h>
+#include <sys/queue.h>
+
+#include <net/if.h>
+#include <net/if_arp.h>
+#include <net/ethernet.h>
+#include <net/if_dl.h>
+#include <net/if_media.h>
+
+#include <net/bpf.h>
+
+#include <net/if_types.h>
+#include <net/if_vlan_var.h>
+
+#include <netinet/in_systm.h>
+#include <netinet/in.h>
+#include <netinet/ip.h>
+
+#include <machine/clock.h> /* for DELAY */
+#include <machine/bus.h>
+#include <machine/resource.h>
+#include <sys/bus.h>
+#include <sys/rman.h>
+
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+#include "miidevs.h"
+#include <dev/mii/brgphyreg.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+
+#include "miibus_if.h"
+
+/****************************************************************************/
+/* Conversion to FreeBSD type definitions. */
+/****************************************************************************/
+#define u64 uint64_t
+#define u32 uint32_t
+#define u16 uint16_t
+#define u8 uint8_t
+
+#if BYTE_ORDER == BIG_ENDIAN
+#define __BIG_ENDIAN 1
+#undef __LITTLE_ENDIAN
+#else
+#undef __BIG_ENDIAN
+#define __LITTLE_ENDIAN 1
+#endif
+
+/****************************************************************************/
+/* Debugging macros and definitions. */
+/****************************************************************************/
+#define BCE_CP_LOAD 0x00000001
+#define BCE_CP_SEND 0x00000002
+#define BCE_CP_RECV 0x00000004
+#define BCE_CP_INTR 0x00000008
+#define BCE_CP_UNLOAD 0x00000010
+#define BCE_CP_RESET 0x00000020
+#define BCE_CP_ALL 0x00FFFFFF
+
+#define BCE_CP_MASK 0x00FFFFFF
+
+#define BCE_LEVEL_FATAL 0x00000000
+#define BCE_LEVEL_WARN 0x01000000
+#define BCE_LEVEL_INFO 0x02000000
+#define BCE_LEVEL_VERBOSE 0x03000000
+#define BCE_LEVEL_EXCESSIVE 0x04000000
+
+#define BCE_LEVEL_MASK 0xFF000000
+
+#define BCE_WARN_LOAD (BCE_CP_LOAD | BCE_LEVEL_WARN)
+#define BCE_INFO_LOAD (BCE_CP_LOAD | BCE_LEVEL_INFO)
+#define BCE_VERBOSE_LOAD (BCE_CP_LOAD | BCE_LEVEL_VERBOSE)
+#define BCE_EXCESSIVE_LOAD (BCE_CP_LOAD | BCE_LEVEL_EXCESSIVE)
+
+#define BCE_WARN_SEND (BCE_CP_SEND | BCE_LEVEL_WARN)
+#define BCE_INFO_SEND (BCE_CP_SEND | BCE_LEVEL_INFO)
+#define BCE_VERBOSE_SEND (BCE_CP_SEND | BCE_LEVEL_VERBOSE)
+#define BCE_EXCESSIVE_SEND (BCE_CP_SEND | BCE_LEVEL_EXCESSIVE)
+
+#define BCE_WARN_RECV (BCE_CP_RECV | BCE_LEVEL_WARN)
+#define BCE_INFO_RECV (BCE_CP_RECV | BCE_LEVEL_INFO)
+#define BCE_VERBOSE_RECV (BCE_CP_RECV | BCE_LEVEL_VERBOSE)
+#define BCE_EXCESSIVE_RECV (BCE_CP_RECV | BCE_LEVEL_EXCESSIVE)
+
+#define BCE_WARN_INTR (BCE_CP_INTR | BCE_LEVEL_WARN)
+#define BCE_INFO_INTR (BCE_CP_INTR | BCE_LEVEL_INFO)
+#define BCE_VERBOSE_INTR (BCE_CP_INTR | BCE_LEVEL_VERBOSE)
+#define BCE_EXCESSIVE_INTR (BCE_CP_INTR | BCE_LEVEL_EXCESSIVE)
+
+#define BCE_WARN_UNLOAD (BCE_CP_UNLOAD | BCE_LEVEL_WARN)
+#define BCE_INFO_UNLOAD (BCE_CP_UNLOAD | BCE_LEVEL_INFO)
+#define BCE_VERBOSE_UNLOAD (BCE_CP_UNLOAD | BCE_LEVEL_VERBOSE)
+#define BCE_EXCESSIVE_UNLOAD (BCE_CP_UNLOAD | BCE_LEVEL_EXCESSIVE)
+
+#define BCE_WARN_RESET (BCE_CP_RESET | BCE_LEVEL_WARN)
+#define BCE_INFO_RESET (BCE_CP_RESET | BCE_LEVEL_INFO)
+#define BCE_VERBOSE_RESET (BCE_CP_RESET | BCE_LEVEL_VERBOSE)
+#define BCE_EXCESSIVE_RESET (BCE_CP_RESET | BCE_LEVEL_EXCESSIVE)
+
+#define BCE_FATAL (BCE_CP_ALL | BCE_LEVEL_FATAL)
+#define BCE_WARN (BCE_CP_ALL | BCE_LEVEL_WARN)
+#define BCE_INFO (BCE_CP_ALL | BCE_LEVEL_INFO)
+#define BCE_VERBOSE (BCE_CP_ALL | BCE_LEVEL_VERBOSE)
+#define BCE_EXCESSIVE (BCE_CP_ALL | BCE_LEVEL_EXCESSIVE)
+
+#define BCE_CODE_PATH(cp) ((cp & BCE_CP_MASK) & bce_debug)
+#define BCE_MSG_LEVEL(lv) ((lv & BCE_LEVEL_MASK) <= (bce_debug & BCE_LEVEL_MASK))
+#define BCE_LOG_MSG(m) (BCE_CODE_PATH(m) && BCE_MSG_LEVEL(m))
+
+#ifdef BCE_DEBUG
+
+/* Print a message based on the logging level and code path. */
+#define DBPRINT(sc, level, format, args...) \
+ if (BCE_LOG_MSG(level)) { \
+ device_printf(sc->bce_dev, format, ## args); \
+ }
+
+/* Runs a particular command based on the logging level and code path. */
+#define DBRUN(m, args...) \
+ if (BCE_LOG_MSG(m)) { \
+ args; \
+ }
+
+/* Runs a particular command based on the logging level. */
+#define DBRUNLV(level, args...) \
+ if (BCE_MSG_LEVEL(level)) { \
+ args; \
+ }
+
+/* Runs a particular command based on the code path. */
+#define DBRUNCP(cp, args...) \
+ if (BCE_CODE_PATH(cp)) { \
+ args; \
+ }
+
+/* Runs a particular command based on a condition. */
+#define DBRUNIF(cond, args...) \
+ if (cond) { \
+ args; \
+ }
+
+/* Needed for random() function which is only used in debugging. */
+#include <sys/random.h>
+
+/* Returns FALSE in "defects" per 2^31 - 1 calls, otherwise returns TRUE. */
+#define DB_RANDOMFALSE(defects) (random() > defects)
+#define DB_OR_RANDOMFALSE(defects) || (random() > defects)
+#define DB_AND_RANDOMFALSE(defects) && (random() > ddfects)
+
+/* Returns TRUE in "defects" per 2^31 - 1 calls, otherwise returns FALSE. */
+#define DB_RANDOMTRUE(defects) (random() < defects)
+#define DB_OR_RANDOMTRUE(defects) || (random() < defects)
+#define DB_AND_RANDOMTRUE(defects) && (random() < defects)
+
+#else
+
+#define DBPRINT(level, format, args...)
+#define DBRUN(m, args...)
+#define DBRUNLV(level, args...)
+#define DBRUNCP(cp, args...)
+#define DBRUNIF(cond, args...)
+#define DB_RANDOMFALSE(defects)
+#define DB_OR_RANDOMFALSE(percent)
+#define DB_AND_RANDOMFALSE(percent)
+#define DB_RANDOMTRUE(defects)
+#define DB_OR_RANDOMTRUE(percent)
+#define DB_AND_RANDOMTRUE(percent)
+
+#endif /* BCE_DEBUG */
+
+
+/****************************************************************************/
+/* Device identification definitions. */
+/****************************************************************************/
+#define BRCM_VENDORID 0x14E4
+#define BRCM_DEVICEID_BCM5706 0x164A
+#define BRCM_DEVICEID_BCM5706S 0x16AA
+#define BRCM_DEVICEID_BCM5708 0x164C
+#define BRCM_DEVICEID_BCM5708S 0x16AC
+
+#define HP_VENDORID 0x103C
+
+#define PCI_ANY_ID (u_int16_t) (~0U)
+
+/* chip num:16-31, rev:12-15, metal:4-11, bond_id:0-3 */
+
+#define BCE_CHIP_NUM(sc) (((sc)->bce_chipid) & 0xffff0000)
+#define BCE_CHIP_NUM_5706 0x57060000
+#define BCE_CHIP_NUM_5708 0x57080000
+
+#define BCE_CHIP_REV(sc) (((sc)->bce_chipid) & 0x0000f000)
+#define BCE_CHIP_REV_Ax 0x00000000
+#define BCE_CHIP_REV_Bx 0x00001000
+#define BCE_CHIP_REV_Cx 0x00002000
+
+#define BCE_CHIP_METAL(sc) (((sc)->bce_chipid) & 0x00000ff0)
+#define BCE_CHIP_BOND(bp) (((sc)->bce_chipid) & 0x0000000f)
+
+#define BCE_CHIP_ID(sc) (((sc)->bce_chipid) & 0xfffffff0)
+#define BCE_CHIP_ID_5706_A0 0x57060000
+#define BCE_CHIP_ID_5706_A1 0x57060010
+#define BCE_CHIP_ID_5706_A2 0x57060020
+#define BCE_CHIP_ID_5708_A0 0x57080000
+#define BCE_CHIP_ID_5708_B0 0x57081000
+#define BCE_CHIP_ID_5708_B1 0x57081010
+
+#define BCE_CHIP_BOND_ID(sc) (((sc)->bce_chipid) & 0xf)
+
+/* A serdes chip will have the first bit of the bond id set. */
+#define BCE_CHIP_BOND_ID_SERDES_BIT 0x01
+
+
+/* shorthand one */
+#define BCE_ASICREV(x) ((x) >> 28)
+#define BCE_ASICREV_BCM5700 0x06
+
+/* chip revisions */
+#define BCE_CHIPREV(x) ((x) >> 24)
+#define BCE_CHIPREV_5700_AX 0x70
+#define BCE_CHIPREV_5700_BX 0x71
+#define BCE_CHIPREV_5700_CX 0x72
+#define BCE_CHIPREV_5701_AX 0x00
+
+struct bce_type {
+ u_int16_t bce_vid;
+ u_int16_t bce_did;
+ u_int16_t bce_svid;
+ u_int16_t bce_sdid;
+ char *bce_name;
+};
+
+/****************************************************************************/
+/* Byte order conversions. */
+/****************************************************************************/
+#if __FreeBSD_version >= 500000
+#define bce_htobe16(x) htobe16(x)
+#define bce_htobe32(x) htobe32(x)
+#define bce_htobe64(x) htobe64(x)
+#define bce_htole16(x) htole16(x)
+#define bce_htole32(x) htole32(x)
+#define bce_htole64(x) htole64(x)
+
+#define bce_be16toh(x) be16toh(x)
+#define bce_be32toh(x) be32toh(x)
+#define bce_be64toh(x) be64toh(x)
+#define bce_le16toh(x) le16toh(x)
+#define bce_le32toh(x) le32toh(x)
+#define bce_le64toh(x) le64toh(x)
+#else
+#define bce_htobe16(x) (x)
+#define bce_htobe32(x) (x)
+#define bce_htobe64(x) (x)
+#define bce_htole16(x) (x)
+#define bce_htole32(x) (x)
+#define bce_htole64(x) (x)
+
+#define bce_be16toh(x) (x)
+#define bce_be32toh(x) (x)
+#define bce_be64toh(x) (x)
+#define bce_le16toh(x) (x)
+#define bce_le32toh(x) (x)
+#define bce_le64toh(x) (x)
+#endif
+
+
+/****************************************************************************/
+/* NVRAM Access */
+/****************************************************************************/
+
+/* Buffered flash (Atmel: AT45DB011B) specific information */
+#define SEEPROM_PAGE_BITS 2
+#define SEEPROM_PHY_PAGE_SIZE (1 << SEEPROM_PAGE_BITS)
+#define SEEPROM_BYTE_ADDR_MASK (SEEPROM_PHY_PAGE_SIZE-1)
+#define SEEPROM_PAGE_SIZE 4
+#define SEEPROM_TOTAL_SIZE 65536
+
+#define BUFFERED_FLASH_PAGE_BITS 9
+#define BUFFERED_FLASH_PHY_PAGE_SIZE (1 << BUFFERED_FLASH_PAGE_BITS)
+#define BUFFERED_FLASH_BYTE_ADDR_MASK (BUFFERED_FLASH_PHY_PAGE_SIZE-1)
+#define BUFFERED_FLASH_PAGE_SIZE 264
+#define BUFFERED_FLASH_TOTAL_SIZE 0x21000
+
+#define SAIFUN_FLASH_PAGE_BITS 8
+#define SAIFUN_FLASH_PHY_PAGE_SIZE (1 << SAIFUN_FLASH_PAGE_BITS)
+#define SAIFUN_FLASH_BYTE_ADDR_MASK (SAIFUN_FLASH_PHY_PAGE_SIZE-1)
+#define SAIFUN_FLASH_PAGE_SIZE 256
+#define SAIFUN_FLASH_BASE_TOTAL_SIZE 65536
+
+#define ST_MICRO_FLASH_PAGE_BITS 8
+#define ST_MICRO_FLASH_PHY_PAGE_SIZE (1 << ST_MICRO_FLASH_PAGE_BITS)
+#define ST_MICRO_FLASH_BYTE_ADDR_MASK (ST_MICRO_FLASH_PHY_PAGE_SIZE-1)
+#define ST_MICRO_FLASH_PAGE_SIZE 256
+#define ST_MICRO_FLASH_BASE_TOTAL_SIZE 65536
+
+#define NVRAM_TIMEOUT_COUNT 30000
+#define BCE_FLASHDESC_MAX 64
+
+#define FLASH_STRAP_MASK (BCE_NVM_CFG1_FLASH_MODE | \
+ BCE_NVM_CFG1_BUFFER_MODE | \
+ BCE_NVM_CFG1_PROTECT_MODE | \
+ BCE_NVM_CFG1_FLASH_SIZE)
+
+#define FLASH_BACKUP_STRAP_MASK (0xf << 26)
+
+struct flash_spec {
+ u32 strapping;
+ u32 config1;
+ u32 config2;
+ u32 config3;
+ u32 write1;
+ u32 buffered;
+ u32 page_bits;
+ u32 page_size;
+ u32 addr_mask;
+ u32 total_size;
+ u8 *name;
+};
+
+
+/****************************************************************************/
+/* Shared Memory layout */
+/* The BCE bootcode will initialize this data area with port configurtion */
+/* information which can be accessed by the driver. */
+/****************************************************************************/
+
+/*
+ * This value (in milliseconds) determines the frequency of the driver
+ * issuing the PULSE message code. The firmware monitors this periodic
+ * pulse to determine when to switch to an OS-absent mode.
+ */
+#define DRV_PULSE_PERIOD_MS 250
+
+/*
+ * This value (in milliseconds) determines how long the driver should
+ * wait for an acknowledgement from the firmware before timing out. Once
+ * the firmware has timed out, the driver will assume there is no firmware
+ * running and there won't be any firmware-driver synchronization during a
+ * driver reset.
+ */
+#define FW_ACK_TIME_OUT_MS 100
+
+
+#define BCE_DRV_RESET_SIGNATURE 0x00000000
+#define BCE_DRV_RESET_SIGNATURE_MAGIC 0x4841564b /* HAVK */
+
+#define BCE_DRV_MB 0x00000004
+#define BCE_DRV_MSG_CODE 0xff000000
+#define BCE_DRV_MSG_CODE_RESET 0x01000000
+#define BCE_DRV_MSG_CODE_UNLOAD 0x02000000
+#define BCE_DRV_MSG_CODE_SHUTDOWN 0x03000000
+#define BCE_DRV_MSG_CODE_SUSPEND_WOL 0x04000000
+#define BCE_DRV_MSG_CODE_FW_TIMEOUT 0x05000000
+#define BCE_DRV_MSG_CODE_PULSE 0x06000000
+#define BCE_DRV_MSG_CODE_DIAG 0x07000000
+#define BCE_DRV_MSG_CODE_SUSPEND_NO_WOL 0x09000000
+
+#define BCE_DRV_MSG_DATA 0x00ff0000
+#define BCE_DRV_MSG_DATA_WAIT0 0x00010000
+#define BCE_DRV_MSG_DATA_WAIT1 0x00020000
+#define BCE_DRV_MSG_DATA_WAIT2 0x00030000
+#define BCE_DRV_MSG_DATA_WAIT3 0x00040000
+
+#define BCE_DRV_MSG_SEQ 0x0000ffff
+
+#define BCE_FW_MB 0x00000008
+#define BCE_FW_MSG_ACK 0x0000ffff
+#define BCE_FW_MSG_STATUS_MASK 0x00ff0000
+#define BCE_FW_MSG_STATUS_OK 0x00000000
+#define BCE_FW_MSG_STATUS_FAILURE 0x00ff0000
+
+#define BCE_LINK_STATUS 0x0000000c
+#define BCE_LINK_STATUS_INIT_VALUE 0xffffffff
+#define BCE_LINK_STATUS_LINK_UP 0x1
+#define BCE_LINK_STATUS_LINK_DOWN 0x0
+#define BCE_LINK_STATUS_SPEED_MASK 0x1e
+#define BCE_LINK_STATUS_AN_INCOMPLETE (0<<1)
+#define BCE_LINK_STATUS_10HALF (1<<1)
+#define BCE_LINK_STATUS_10FULL (2<<1)
+#define BCE_LINK_STATUS_100HALF (3<<1)
+#define BCE_LINK_STATUS_100BASE_T4 (4<<1)
+#define BCE_LINK_STATUS_100FULL (5<<1)
+#define BCE_LINK_STATUS_1000HALF (6<<1)
+#define BCE_LINK_STATUS_1000FULL (7<<1)
+#define BCE_LINK_STATUS_2500HALF (8<<1)
+#define BCE_LINK_STATUS_2500FULL (9<<1)
+#define BCE_LINK_STATUS_AN_ENABLED (1<<5)
+#define BCE_LINK_STATUS_AN_COMPLETE (1<<6)
+#define BCE_LINK_STATUS_PARALLEL_DET (1<<7)
+#define BCE_LINK_STATUS_RESERVED (1<<8)
+#define BCE_LINK_STATUS_PARTNER_AD_1000FULL (1<<9)
+#define BCE_LINK_STATUS_PARTNER_AD_1000HALF (1<<10)
+#define BCE_LINK_STATUS_PARTNER_AD_100BT4 (1<<11)
+#define BCE_LINK_STATUS_PARTNER_AD_100FULL (1<<12)
+#define BCE_LINK_STATUS_PARTNER_AD_100HALF (1<<13)
+#define BCE_LINK_STATUS_PARTNER_AD_10FULL (1<<14)
+#define BCE_LINK_STATUS_PARTNER_AD_10HALF (1<<15)
+#define BCE_LINK_STATUS_TX_FC_ENABLED (1<<16)
+#define BCE_LINK_STATUS_RX_FC_ENABLED (1<<17)
+#define BCE_LINK_STATUS_PARTNER_SYM_PAUSE_CAP (1<<18)
+#define BCE_LINK_STATUS_PARTNER_ASYM_PAUSE_CAP (1<<19)
+#define BCE_LINK_STATUS_SERDES_LINK (1<<20)
+#define BCE_LINK_STATUS_PARTNER_AD_2500FULL (1<<21)
+#define BCE_LINK_STATUS_PARTNER_AD_2500HALF (1<<22)
+
+#define BCE_DRV_PULSE_MB 0x00000010
+#define BCE_DRV_PULSE_SEQ_MASK 0x00007fff
+
+/* Indicate to the firmware not to go into the
+ * OS absent when it is not getting driver pulse.
+ * This is used for debugging. */
+#define BCE_DRV_MSG_DATA_PULSE_CODE_ALWAYS_ALIVE 0x00080000
+
+#define BCE_DEV_INFO_SIGNATURE 0x00000020
+#define BCE_DEV_INFO_SIGNATURE_MAGIC 0x44564900
+#define BCE_DEV_INFO_SIGNATURE_MAGIC_MASK 0xffffff00
+#define BCE_DEV_INFO_FEATURE_CFG_VALID 0x01
+#define BCE_DEV_INFO_SECONDARY_PORT 0x80
+#define BCE_DEV_INFO_DRV_ALWAYS_ALIVE 0x40
+
+#define BCE_SHARED_HW_CFG_PART_NUM 0x00000024
+
+#define BCE_SHARED_HW_CFG_POWER_DISSIPATED 0x00000034
+#define BCE_SHARED_HW_CFG_POWER_STATE_D3_MASK 0xff000000
+#define BCE_SHARED_HW_CFG_POWER_STATE_D2_MASK 0xff0000
+#define BCE_SHARED_HW_CFG_POWER_STATE_D1_MASK 0xff00
+#define BCE_SHARED_HW_CFG_POWER_STATE_D0_MASK 0xff
+
+#define BCE_SHARED_HW_CFG_POWER_CONSUMED 0x00000038
+#define BCE_SHARED_HW_CFG_CONFIG 0x0000003c
+#define BCE_SHARED_HW_CFG_DESIGN_NIC 0
+#define BCE_SHARED_HW_CFG_DESIGN_LOM 0x1
+#define BCE_SHARED_HW_CFG_PHY_COPPER 0
+#define BCE_SHARED_HW_CFG_PHY_FIBER 0x2
+#define BCE_SHARED_HW_CFG_PHY_2_5G 0x20
+#define BCE_SHARED_HW_CFG_PHY_BACKPLANE 0x40
+#define BCE_SHARED_HW_CFG_LED_MODE_SHIFT_BITS 8
+#define BCE_SHARED_HW_CFG_LED_MODE_MASK 0x300
+#define BCE_SHARED_HW_CFG_LED_MODE_MAC 0
+#define BCE_SHARED_HW_CFG_LED_MODE_GPHY1 0x100
+#define BCE_SHARED_HW_CFG_LED_MODE_GPHY2 0x200
+
+#define BCE_SHARED_HW_CFG_CONFIG2 0x00000040
+#define BCE_SHARED_HW_CFG2_NVM_SIZE_MASK 0x00fff000
+
+#define BCE_DEV_INFO_BC_REV 0x0000004c
+
+#define BCE_PORT_HW_CFG_MAC_UPPER 0x00000050
+#define BCE_PORT_HW_CFG_UPPERMAC_MASK 0xffff
+
+#define BCE_PORT_HW_CFG_MAC_LOWER 0x00000054
+#define BCE_PORT_HW_CFG_CONFIG 0x00000058
+#define BCE_PORT_HW_CFG_CFG_TXCTL3_MASK 0x0000ffff
+#define BCE_PORT_HW_CFG_CFG_DFLT_LINK_MASK 0x001f0000
+#define BCE_PORT_HW_CFG_CFG_DFLT_LINK_AN 0x00000000
+#define BCE_PORT_HW_CFG_CFG_DFLT_LINK_1G 0x00030000
+#define BCE_PORT_HW_CFG_CFG_DFLT_LINK_2_5G 0x00040000
+
+#define BCE_PORT_HW_CFG_IMD_MAC_A_UPPER 0x00000068
+#define BCE_PORT_HW_CFG_IMD_MAC_A_LOWER 0x0000006c
+#define BCE_PORT_HW_CFG_IMD_MAC_B_UPPER 0x00000070
+#define BCE_PORT_HW_CFG_IMD_MAC_B_LOWER 0x00000074
+#define BCE_PORT_HW_CFG_ISCSI_MAC_UPPER 0x00000078
+#define BCE_PORT_HW_CFG_ISCSI_MAC_LOWER 0x0000007c
+
+#define BCE_DEV_INFO_PER_PORT_HW_CONFIG2 0x000000b4
+
+#define BCE_DEV_INFO_FORMAT_REV 0x000000c4
+#define BCE_DEV_INFO_FORMAT_REV_MASK 0xff000000
+#define BCE_DEV_INFO_FORMAT_REV_ID ('A' << 24)
+
+#define BCE_SHARED_FEATURE 0x000000c8
+#define BCE_SHARED_FEATURE_MASK 0xffffffff
+
+#define BCE_PORT_FEATURE 0x000000d8
+#define BCE_PORT2_FEATURE 0x00000014c
+#define BCE_PORT_FEATURE_WOL_ENABLED 0x01000000
+#define BCE_PORT_FEATURE_MBA_ENABLED 0x02000000
+#define BCE_PORT_FEATURE_ASF_ENABLED 0x04000000
+#define BCE_PORT_FEATURE_IMD_ENABLED 0x08000000
+#define BCE_PORT_FEATURE_BAR1_SIZE_MASK 0xf
+#define BCE_PORT_FEATURE_BAR1_SIZE_DISABLED 0x0
+#define BCE_PORT_FEATURE_BAR1_SIZE_64K 0x1
+#define BCE_PORT_FEATURE_BAR1_SIZE_128K 0x2
+#define BCE_PORT_FEATURE_BAR1_SIZE_256K 0x3
+#define BCE_PORT_FEATURE_BAR1_SIZE_512K 0x4
+#define BCE_PORT_FEATURE_BAR1_SIZE_1M 0x5
+#define BCE_PORT_FEATURE_BAR1_SIZE_2M 0x6
+#define BCE_PORT_FEATURE_BAR1_SIZE_4M 0x7
+#define BCE_PORT_FEATURE_BAR1_SIZE_8M 0x8
+#define BCE_PORT_FEATURE_BAR1_SIZE_16M 0x9
+#define BCE_PORT_FEATURE_BAR1_SIZE_32M 0xa
+#define BCE_PORT_FEATURE_BAR1_SIZE_64M 0xb
+#define BCE_PORT_FEATURE_BAR1_SIZE_128M 0xc
+#define BCE_PORT_FEATURE_BAR1_SIZE_256M 0xd
+#define BCE_PORT_FEATURE_BAR1_SIZE_512M 0xe
+#define BCE_PORT_FEATURE_BAR1_SIZE_1G 0xf
+
+#define BCE_PORT_FEATURE_WOL 0xdc
+#define BCE_PORT2_FEATURE_WOL 0x150
+#define BCE_PORT_FEATURE_WOL_DEFAULT_SHIFT_BITS 4
+#define BCE_PORT_FEATURE_WOL_DEFAULT_MASK 0x30
+#define BCE_PORT_FEATURE_WOL_DEFAULT_DISABLE 0
+#define BCE_PORT_FEATURE_WOL_DEFAULT_MAGIC 0x10
+#define BCE_PORT_FEATURE_WOL_DEFAULT_ACPI 0x20
+#define BCE_PORT_FEATURE_WOL_DEFAULT_MAGIC_AND_ACPI 0x30
+#define BCE_PORT_FEATURE_WOL_LINK_SPEED_MASK 0xf
+#define BCE_PORT_FEATURE_WOL_LINK_SPEED_AUTONEG 0
+#define BCE_PORT_FEATURE_WOL_LINK_SPEED_10HALF 1
+#define BCE_PORT_FEATURE_WOL_LINK_SPEED_10FULL 2
+#define BCE_PORT_FEATURE_WOL_LINK_SPEED_100HALF 3
+#define BCE_PORT_FEATURE_WOL_LINK_SPEED_100FULL 4
+#define BCE_PORT_FEATURE_WOL_LINK_SPEED_1000HALF 5
+#define BCE_PORT_FEATURE_WOL_LINK_SPEED_1000FULL 6
+#define BCE_PORT_FEATURE_WOL_AUTONEG_ADVERTISE_1000 0x40
+#define BCE_PORT_FEATURE_WOL_RESERVED_PAUSE_CAP 0x400
+#define BCE_PORT_FEATURE_WOL_RESERVED_ASYM_PAUSE_CAP 0x800
+
+#define BCE_PORT_FEATURE_MBA 0xe0
+#define BCE_PORT2_FEATURE_MBA 0x154
+#define BCE_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_SHIFT_BITS 0
+#define BCE_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_MASK 0x3
+#define BCE_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_PXE 0
+#define BCE_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_RPL 1
+#define BCE_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_BOOTP 2
+#define BCE_PORT_FEATURE_MBA_LINK_SPEED_SHIFT_BITS 2
+#define BCE_PORT_FEATURE_MBA_LINK_SPEED_MASK 0x3c
+#define BCE_PORT_FEATURE_MBA_LINK_SPEED_AUTONEG 0
+#define BCE_PORT_FEATURE_MBA_LINK_SPEED_10HALF 0x4
+#define BCE_PORT_FEATURE_MBA_LINK_SPEED_10FULL 0x8
+#define BCE_PORT_FEATURE_MBA_LINK_SPEED_100HALF 0xc
+#define BCE_PORT_FEATURE_MBA_LINK_SPEED_100FULL 0x10
+#define BCE_PORT_FEATURE_MBA_LINK_SPEED_1000HALF 0x14
+#define BCE_PORT_FEATURE_MBA_LINK_SPEED_1000FULL 0x18
+#define BCE_PORT_FEATURE_MBA_SETUP_PROMPT_ENABLE 0x40
+#define BCE_PORT_FEATURE_MBA_HOTKEY_CTRL_S 0
+#define BCE_PORT_FEATURE_MBA_HOTKEY_CTRL_B 0x80
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_SHIFT_BITS 8
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_MASK 0xff00
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_DISABLED 0
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_1K 0x100
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_2K 0x200
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_4K 0x300
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_8K 0x400
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_16K 0x500
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_32K 0x600
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_64K 0x700
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_128K 0x800
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_256K 0x900
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_512K 0xa00
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_1M 0xb00
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_2M 0xc00
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_4M 0xd00
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_8M 0xe00
+#define BCE_PORT_FEATURE_MBA_EXP_ROM_SIZE_16M 0xf00
+#define BCE_PORT_FEATURE_MBA_MSG_TIMEOUT_SHIFT_BITS 16
+#define BCE_PORT_FEATURE_MBA_MSG_TIMEOUT_MASK 0xf0000
+#define BCE_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_SHIFT_BITS 20
+#define BCE_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_MASK 0x300000
+#define BCE_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_AUTO 0
+#define BCE_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_BBS 0x100000
+#define BCE_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_INT18H 0x200000
+#define BCE_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_INT19H 0x300000
+
+#define BCE_PORT_FEATURE_IMD 0xe4
+#define BCE_PORT2_FEATURE_IMD 0x158
+#define BCE_PORT_FEATURE_IMD_LINK_OVERRIDE_DEFAULT 0
+#define BCE_PORT_FEATURE_IMD_LINK_OVERRIDE_ENABLE 1
+
+#define BCE_PORT_FEATURE_VLAN 0xe8
+#define BCE_PORT2_FEATURE_VLAN 0x15c
+#define BCE_PORT_FEATURE_MBA_VLAN_TAG_MASK 0xffff
+#define BCE_PORT_FEATURE_MBA_VLAN_ENABLE 0x10000
+
+#define BCE_BC_STATE_RESET_TYPE 0x000001c0
+#define BCE_BC_STATE_RESET_TYPE_SIG 0x00005254
+#define BCE_BC_STATE_RESET_TYPE_SIG_MASK 0x0000ffff
+#define BCE_BC_STATE_RESET_TYPE_NONE (BCE_BC_STATE_RESET_TYPE_SIG | \
+ 0x00010000)
+#define BCE_BC_STATE_RESET_TYPE_PCI (BCE_BC_STATE_RESET_TYPE_SIG | \
+ 0x00020000)
+#define BCE_BC_STATE_RESET_TYPE_VAUX (BCE_BC_STATE_RESET_TYPE_SIG | \
+ 0x00030000)
+#define BCE_BC_STATE_RESET_TYPE_DRV_MASK DRV_MSG_CODE
+#define BCE_BC_STATE_RESET_TYPE_DRV_RESET (BCE_BC_STATE_RESET_TYPE_SIG | \
+ DRV_MSG_CODE_RESET)
+#define BCE_BC_STATE_RESET_TYPE_DRV_UNLOAD (BCE_BC_STATE_RESET_TYPE_SIG | \
+ DRV_MSG_CODE_UNLOAD)
+#define BCE_BC_STATE_RESET_TYPE_DRV_SHUTDOWN (BCE_BC_STATE_RESET_TYPE_SIG | \
+ DRV_MSG_CODE_SHUTDOWN)
+#define BCE_BC_STATE_RESET_TYPE_DRV_WOL (BCE_BC_STATE_RESET_TYPE_SIG | \
+ DRV_MSG_CODE_WOL)
+#define BCE_BC_STATE_RESET_TYPE_DRV_DIAG (BCE_BC_STATE_RESET_TYPE_SIG | \
+ DRV_MSG_CODE_DIAG)
+#define BCE_BC_STATE_RESET_TYPE_VALUE(msg) (BCE_BC_STATE_RESET_TYPE_SIG | \
+ (msg))
+
+#define BCE_BC_STATE 0x000001c4
+#define BCE_BC_STATE_ERR_MASK 0x0000ff00
+#define BCE_BC_STATE_SIGN 0x42530000
+#define BCE_BC_STATE_SIGN_MASK 0xffff0000
+#define BCE_BC_STATE_BC1_START (BCE_BC_STATE_SIGN | 0x1)
+#define BCE_BC_STATE_GET_NVM_CFG1 (BCE_BC_STATE_SIGN | 0x2)
+#define BCE_BC_STATE_PROG_BAR (BCE_BC_STATE_SIGN | 0x3)
+#define BCE_BC_STATE_INIT_VID (BCE_BC_STATE_SIGN | 0x4)
+#define BCE_BC_STATE_GET_NVM_CFG2 (BCE_BC_STATE_SIGN | 0x5)
+#define BCE_BC_STATE_APPLY_WKARND (BCE_BC_STATE_SIGN | 0x6)
+#define BCE_BC_STATE_LOAD_BC2 (BCE_BC_STATE_SIGN | 0x7)
+#define BCE_BC_STATE_GOING_BC2 (BCE_BC_STATE_SIGN | 0x8)
+#define BCE_BC_STATE_GOING_DIAG (BCE_BC_STATE_SIGN | 0x9)
+#define BCE_BC_STATE_RT_FINAL_INIT (BCE_BC_STATE_SIGN | 0x81)
+#define BCE_BC_STATE_RT_WKARND (BCE_BC_STATE_SIGN | 0x82)
+#define BCE_BC_STATE_RT_DRV_PULSE (BCE_BC_STATE_SIGN | 0x83)
+#define BCE_BC_STATE_RT_FIOEVTS (BCE_BC_STATE_SIGN | 0x84)
+#define BCE_BC_STATE_RT_DRV_CMD (BCE_BC_STATE_SIGN | 0x85)
+#define BCE_BC_STATE_RT_LOW_POWER (BCE_BC_STATE_SIGN | 0x86)
+#define BCE_BC_STATE_RT_SET_WOL (BCE_BC_STATE_SIGN | 0x87)
+#define BCE_BC_STATE_RT_OTHER_FW (BCE_BC_STATE_SIGN | 0x88)
+#define BCE_BC_STATE_RT_GOING_D3 (BCE_BC_STATE_SIGN | 0x89)
+#define BCE_BC_STATE_ERR_BAD_VERSION (BCE_BC_STATE_SIGN | 0x0100)
+#define BCE_BC_STATE_ERR_BAD_BC2_CRC (BCE_BC_STATE_SIGN | 0x0200)
+#define BCE_BC_STATE_ERR_BC1_LOOP (BCE_BC_STATE_SIGN | 0x0300)
+#define BCE_BC_STATE_ERR_UNKNOWN_CMD (BCE_BC_STATE_SIGN | 0x0400)
+#define BCE_BC_STATE_ERR_DRV_DEAD (BCE_BC_STATE_SIGN | 0x0500)
+#define BCE_BC_STATE_ERR_NO_RXP (BCE_BC_STATE_SIGN | 0x0600)
+#define BCE_BC_STATE_ERR_TOO_MANY_RBUF (BCE_BC_STATE_SIGN | 0x0700)
+
+#define BCE_BC_STATE_DEBUG_CMD 0x1dc
+#define BCE_BC_STATE_BC_DBG_CMD_SIGNATURE 0x42440000
+#define BCE_BC_STATE_BC_DBG_CMD_SIGNATURE_MASK 0xffff0000
+#define BCE_BC_STATE_BC_DBG_CMD_LOOP_CNT_MASK 0xffff
+#define BCE_BC_STATE_BC_DBG_CMD_LOOP_INFINITE 0xffff
+
+#define HOST_VIEW_SHMEM_BASE 0x167c00
+
+/*
+ * PCI registers defined in the PCI 2.2 spec.
+ */
+#define BCE_PCI_PCIX_CMD 0x42
+
+
+/****************************************************************************/
+/* Convenience definitions. */
+/****************************************************************************/
+#define BCE_PRINTF(sc, fmt, args...) device_printf(sc->bce_dev, fmt, ##args)
+
+#define BCE_LOCK_INIT(_sc, _name) mtx_init(&(_sc)->bce_mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
+#define BCE_LOCK(_sc) mtx_lock(&(_sc)->bce_mtx)
+#define BCE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->bce_mtx, MA_OWNED)
+#define BCE_UNLOCK(_sc) mtx_unlock(&(_sc)->bce_mtx)
+#define BCE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->bce_mtx)
+
+#define REG_WR(sc, reg, val) bus_space_write_4(sc->bce_btag, sc->bce_bhandle, reg, val)
+#define REG_WR16(sc, reg, val) bus_space_write_2(sc->bce_btag, sc->bce_bhandle, reg, val)
+#define REG_RD(sc, reg) bus_space_read_4(sc->bce_btag, sc->bce_bhandle, reg)
+#define REG_RD_IND(sc, offset) bce_reg_rd_ind(sc, offset)
+#define REG_WR_IND(sc, offset, val) bce_reg_wr_ind(sc, offset, val)
+#define CTX_WR(sc, cid_addr, offset, val) bce_ctx_wr(sc, cid_addr, offset, val)
+#define BCE_SETBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) | (x)))
+#define BCE_CLRBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) & ~(x)))
+#define PCI_SETBIT(dev, reg, x, s) pci_write_config(dev, reg, (pci_read_config(dev, reg, s) | (x)), s)
+#define PCI_CLRBIT(dev, reg, x, s) pci_write_config(dev, reg, (pci_read_config(dev, reg, s) & ~(x)), s)
+
+#if (BUS_SPACE_MAXADDR > 0xFFFFFFFF)
+#define BCE_STATS(x) ((u_long) stats->stat_ ## x ## _hi << 32) + \
+ (u_long) stats->stat_ ## x ## _lo
+#define BCE_ADDR_LO(y) ((u64) (y) & 0xFFFFFFFF)
+#define BCE_ADDR_HI(y) ((u64) (y) >> 32)
+#else
+#define BCE_STATS(x) (u_long) stats->stat_ ## x ## _lo
+#define BCE_ADDR_LO(y) ((u32)y)
+#define BCE_ADDR_HI(y) (0)
+#endif
+
+
+/*
+ * The following data structures are generated from RTL code.
+ * Do not modify any values below this line.
+ */
+
+/****************************************************************************/
+/* Do not modify any of the following data structures, they are generated */
+/* from RTL code. */
+/* */
+/* Begin machine generated definitions. */
+/****************************************************************************/
+
+/*
+ * tx_bd definition
+ */
+struct tx_bd {
+ u32 tx_bd_haddr_hi;
+ u32 tx_bd_haddr_lo;
+ u32 tx_bd_mss_nbytes;
+ u32 tx_bd_vlan_tag_flags;
+ #define TX_BD_FLAGS_CONN_FAULT (1<<0)
+ #define TX_BD_FLAGS_TCP_UDP_CKSUM (1<<1)
+ #define TX_BD_FLAGS_IP_CKSUM (1<<2)
+ #define TX_BD_FLAGS_VLAN_TAG (1<<3)
+ #define TX_BD_FLAGS_COAL_NOW (1<<4)
+ #define TX_BD_FLAGS_DONT_GEN_CRC (1<<5)
+ #define TX_BD_FLAGS_END (1<<6)
+ #define TX_BD_FLAGS_START (1<<7)
+ #define TX_BD_FLAGS_SW_OPTION_WORD (0x1f<<8)
+ #define TX_BD_FLAGS_SW_FLAGS (1<<13)
+ #define TX_BD_FLAGS_SW_SNAP (1<<14)
+ #define TX_BD_FLAGS_SW_LSO (1<<15)
+
+};
+
+
+/*
+ * rx_bd definition
+ */
+struct rx_bd {
+ u32 rx_bd_haddr_hi;
+ u32 rx_bd_haddr_lo;
+ u32 rx_bd_len;
+ u32 rx_bd_flags;
+ #define RX_BD_FLAGS_NOPUSH (1<<0)
+ #define RX_BD_FLAGS_DUMMY (1<<1)
+ #define RX_BD_FLAGS_END (1<<2)
+ #define RX_BD_FLAGS_START (1<<3)
+
+};
+
+
+/*
+ * status_block definition
+ */
+struct status_block {
+ u32 status_attn_bits;
+ #define STATUS_ATTN_BITS_LINK_STATE (1L<<0)
+ #define STATUS_ATTN_BITS_TX_SCHEDULER_ABORT (1L<<1)
+ #define STATUS_ATTN_BITS_TX_BD_READ_ABORT (1L<<2)
+ #define STATUS_ATTN_BITS_TX_BD_CACHE_ABORT (1L<<3)
+ #define STATUS_ATTN_BITS_TX_PROCESSOR_ABORT (1L<<4)
+ #define STATUS_ATTN_BITS_TX_DMA_ABORT (1L<<5)
+ #define STATUS_ATTN_BITS_TX_PATCHUP_ABORT (1L<<6)
+ #define STATUS_ATTN_BITS_TX_ASSEMBLER_ABORT (1L<<7)
+ #define STATUS_ATTN_BITS_RX_PARSER_MAC_ABORT (1L<<8)
+ #define STATUS_ATTN_BITS_RX_PARSER_CATCHUP_ABORT (1L<<9)
+ #define STATUS_ATTN_BITS_RX_MBUF_ABORT (1L<<10)
+ #define STATUS_ATTN_BITS_RX_LOOKUP_ABORT (1L<<11)
+ #define STATUS_ATTN_BITS_RX_PROCESSOR_ABORT (1L<<12)
+ #define STATUS_ATTN_BITS_RX_V2P_ABORT (1L<<13)
+ #define STATUS_ATTN_BITS_RX_BD_CACHE_ABORT (1L<<14)
+ #define STATUS_ATTN_BITS_RX_DMA_ABORT (1L<<15)
+ #define STATUS_ATTN_BITS_COMPLETION_ABORT (1L<<16)
+ #define STATUS_ATTN_BITS_HOST_COALESCE_ABORT (1L<<17)
+ #define STATUS_ATTN_BITS_MAILBOX_QUEUE_ABORT (1L<<18)
+ #define STATUS_ATTN_BITS_CONTEXT_ABORT (1L<<19)
+ #define STATUS_ATTN_BITS_CMD_SCHEDULER_ABORT (1L<<20)
+ #define STATUS_ATTN_BITS_CMD_PROCESSOR_ABORT (1L<<21)
+ #define STATUS_ATTN_BITS_MGMT_PROCESSOR_ABORT (1L<<22)
+ #define STATUS_ATTN_BITS_MAC_ABORT (1L<<23)
+ #define STATUS_ATTN_BITS_TIMER_ABORT (1L<<24)
+ #define STATUS_ATTN_BITS_DMAE_ABORT (1L<<25)
+ #define STATUS_ATTN_BITS_FLSH_ABORT (1L<<26)
+ #define STATUS_ATTN_BITS_GRC_ABORT (1L<<27)
+ #define STATUS_ATTN_BITS_PARITY_ERROR (1L<<31)
+
+ u32 status_attn_bits_ack;
+#if defined(__BIG_ENDIAN)
+ u16 status_tx_quick_consumer_index0;
+ u16 status_tx_quick_consumer_index1;
+ u16 status_tx_quick_consumer_index2;
+ u16 status_tx_quick_consumer_index3;
+ u16 status_rx_quick_consumer_index0;
+ u16 status_rx_quick_consumer_index1;
+ u16 status_rx_quick_consumer_index2;
+ u16 status_rx_quick_consumer_index3;
+ u16 status_rx_quick_consumer_index4;
+ u16 status_rx_quick_consumer_index5;
+ u16 status_rx_quick_consumer_index6;
+ u16 status_rx_quick_consumer_index7;
+ u16 status_rx_quick_consumer_index8;
+ u16 status_rx_quick_consumer_index9;
+ u16 status_rx_quick_consumer_index10;
+ u16 status_rx_quick_consumer_index11;
+ u16 status_rx_quick_consumer_index12;
+ u16 status_rx_quick_consumer_index13;
+ u16 status_rx_quick_consumer_index14;
+ u16 status_rx_quick_consumer_index15;
+ u16 status_completion_producer_index;
+ u16 status_cmd_consumer_index;
+ u16 status_idx;
+ u16 status_unused;
+#elif defined(__LITTLE_ENDIAN)
+ u16 status_tx_quick_consumer_index1;
+ u16 status_tx_quick_consumer_index0;
+ u16 status_tx_quick_consumer_index3;
+ u16 status_tx_quick_consumer_index2;
+ u16 status_rx_quick_consumer_index1;
+ u16 status_rx_quick_consumer_index0;
+ u16 status_rx_quick_consumer_index3;
+ u16 status_rx_quick_consumer_index2;
+ u16 status_rx_quick_consumer_index5;
+ u16 status_rx_quick_consumer_index4;
+ u16 status_rx_quick_consumer_index7;
+ u16 status_rx_quick_consumer_index6;
+ u16 status_rx_quick_consumer_index9;
+ u16 status_rx_quick_consumer_index8;
+ u16 status_rx_quick_consumer_index11;
+ u16 status_rx_quick_consumer_index10;
+ u16 status_rx_quick_consumer_index13;
+ u16 status_rx_quick_consumer_index12;
+ u16 status_rx_quick_consumer_index15;
+ u16 status_rx_quick_consumer_index14;
+ u16 status_cmd_consumer_index;
+ u16 status_completion_producer_index;
+ u16 status_unused;
+ u16 status_idx;
+#endif
+};
+
+
+/*
+ * statistics_block definition
+ */
+struct statistics_block {
+ u32 stat_IfHCInOctets_hi;
+ u32 stat_IfHCInOctets_lo;
+ u32 stat_IfHCInBadOctets_hi;
+ u32 stat_IfHCInBadOctets_lo;
+ u32 stat_IfHCOutOctets_hi;
+ u32 stat_IfHCOutOctets_lo;
+ u32 stat_IfHCOutBadOctets_hi;
+ u32 stat_IfHCOutBadOctets_lo;
+ u32 stat_IfHCInUcastPkts_hi;
+ u32 stat_IfHCInUcastPkts_lo;
+ u32 stat_IfHCInMulticastPkts_hi;
+ u32 stat_IfHCInMulticastPkts_lo;
+ u32 stat_IfHCInBroadcastPkts_hi;
+ u32 stat_IfHCInBroadcastPkts_lo;
+ u32 stat_IfHCOutUcastPkts_hi;
+ u32 stat_IfHCOutUcastPkts_lo;
+ u32 stat_IfHCOutMulticastPkts_hi;
+ u32 stat_IfHCOutMulticastPkts_lo;
+ u32 stat_IfHCOutBroadcastPkts_hi;
+ u32 stat_IfHCOutBroadcastPkts_lo;
+ u32 stat_emac_tx_stat_dot3statsinternalmactransmiterrors;
+ u32 stat_Dot3StatsCarrierSenseErrors;
+ u32 stat_Dot3StatsFCSErrors;
+ u32 stat_Dot3StatsAlignmentErrors;
+ u32 stat_Dot3StatsSingleCollisionFrames;
+ u32 stat_Dot3StatsMultipleCollisionFrames;
+ u32 stat_Dot3StatsDeferredTransmissions;
+ u32 stat_Dot3StatsExcessiveCollisions;
+ u32 stat_Dot3StatsLateCollisions;
+ u32 stat_EtherStatsCollisions;
+ u32 stat_EtherStatsFragments;
+ u32 stat_EtherStatsJabbers;
+ u32 stat_EtherStatsUndersizePkts;
+ u32 stat_EtherStatsOverrsizePkts;
+ u32 stat_EtherStatsPktsRx64Octets;
+ u32 stat_EtherStatsPktsRx65Octetsto127Octets;
+ u32 stat_EtherStatsPktsRx128Octetsto255Octets;
+ u32 stat_EtherStatsPktsRx256Octetsto511Octets;
+ u32 stat_EtherStatsPktsRx512Octetsto1023Octets;
+ u32 stat_EtherStatsPktsRx1024Octetsto1522Octets;
+ u32 stat_EtherStatsPktsRx1523Octetsto9022Octets;
+ u32 stat_EtherStatsPktsTx64Octets;
+ u32 stat_EtherStatsPktsTx65Octetsto127Octets;
+ u32 stat_EtherStatsPktsTx128Octetsto255Octets;
+ u32 stat_EtherStatsPktsTx256Octetsto511Octets;
+ u32 stat_EtherStatsPktsTx512Octetsto1023Octets;
+ u32 stat_EtherStatsPktsTx1024Octetsto1522Octets;
+ u32 stat_EtherStatsPktsTx1523Octetsto9022Octets;
+ u32 stat_XonPauseFramesReceived;
+ u32 stat_XoffPauseFramesReceived;
+ u32 stat_OutXonSent;
+ u32 stat_OutXoffSent;
+ u32 stat_FlowControlDone;
+ u32 stat_MacControlFramesReceived;
+ u32 stat_XoffStateEntered;
+ u32 stat_IfInFramesL2FilterDiscards;
+ u32 stat_IfInRuleCheckerDiscards;
+ u32 stat_IfInFTQDiscards;
+ u32 stat_IfInMBUFDiscards;
+ u32 stat_IfInRuleCheckerP4Hit;
+ u32 stat_CatchupInRuleCheckerDiscards;
+ u32 stat_CatchupInFTQDiscards;
+ u32 stat_CatchupInMBUFDiscards;
+ u32 stat_CatchupInRuleCheckerP4Hit;
+ u32 stat_GenStat00;
+ u32 stat_GenStat01;
+ u32 stat_GenStat02;
+ u32 stat_GenStat03;
+ u32 stat_GenStat04;
+ u32 stat_GenStat05;
+ u32 stat_GenStat06;
+ u32 stat_GenStat07;
+ u32 stat_GenStat08;
+ u32 stat_GenStat09;
+ u32 stat_GenStat10;
+ u32 stat_GenStat11;
+ u32 stat_GenStat12;
+ u32 stat_GenStat13;
+ u32 stat_GenStat14;
+ u32 stat_GenStat15;
+};
+
+
+/*
+ * l2_fhdr definition
+ */
+struct l2_fhdr {
+ u32 l2_fhdr_status;
+ #define L2_FHDR_STATUS_RULE_CLASS (0x7<<0)
+ #define L2_FHDR_STATUS_RULE_P2 (1<<3)
+ #define L2_FHDR_STATUS_RULE_P3 (1<<4)
+ #define L2_FHDR_STATUS_RULE_P4 (1<<5)
+ #define L2_FHDR_STATUS_L2_VLAN_TAG (1<<6)
+ #define L2_FHDR_STATUS_L2_LLC_SNAP (1<<7)
+ #define L2_FHDR_STATUS_RSS_HASH (1<<8)
+ #define L2_FHDR_STATUS_IP_DATAGRAM (1<<13)
+ #define L2_FHDR_STATUS_TCP_SEGMENT (1<<14)
+ #define L2_FHDR_STATUS_UDP_DATAGRAM (1<<15)
+
+ #define L2_FHDR_ERRORS_BAD_CRC (1<<17)
+ #define L2_FHDR_ERRORS_PHY_DECODE (1<<18)
+ #define L2_FHDR_ERRORS_ALIGNMENT (1<<19)
+ #define L2_FHDR_ERRORS_TOO_SHORT (1<<20)
+ #define L2_FHDR_ERRORS_GIANT_FRAME (1<<21)
+ #define L2_FHDR_ERRORS_TCP_XSUM (1<<28)
+ #define L2_FHDR_ERRORS_UDP_XSUM (1<<31)
+
+ u32 l2_fhdr_hash;
+#if defined(__BIG_ENDIAN)
+ u16 l2_fhdr_pkt_len;
+ u16 l2_fhdr_vlan_tag;
+ u16 l2_fhdr_ip_xsum;
+ u16 l2_fhdr_tcp_udp_xsum;
+#elif defined(__LITTLE_ENDIAN)
+ u16 l2_fhdr_vlan_tag;
+ u16 l2_fhdr_pkt_len;
+ u16 l2_fhdr_tcp_udp_xsum;
+ u16 l2_fhdr_ip_xsum;
+#endif
+};
+
+
+/*
+ * l2_context definition
+ */
+#define BCE_L2CTX_TYPE 0x00000000
+#define BCE_L2CTX_TYPE_SIZE_L2 ((0xc0/0x20)<<16)
+#define BCE_L2CTX_TYPE_TYPE (0xf<<28)
+#define BCE_L2CTX_TYPE_TYPE_EMPTY (0<<28)
+#define BCE_L2CTX_TYPE_TYPE_L2 (1<<28)
+
+#define BCE_L2CTX_TX_HOST_BIDX 0x00000088
+#define BCE_L2CTX_EST_NBD 0x00000088
+#define BCE_L2CTX_CMD_TYPE 0x00000088
+#define BCE_L2CTX_CMD_TYPE_TYPE (0xf<<24)
+#define BCE_L2CTX_CMD_TYPE_TYPE_L2 (0<<24)
+#define BCE_L2CTX_CMD_TYPE_TYPE_TCP (1<<24)
+
+#define BCE_L2CTX_TX_HOST_BSEQ 0x00000090
+#define BCE_L2CTX_TSCH_BSEQ 0x00000094
+#define BCE_L2CTX_TBDR_BSEQ 0x00000098
+#define BCE_L2CTX_TBDR_BOFF 0x0000009c
+#define BCE_L2CTX_TBDR_BIDX 0x0000009c
+#define BCE_L2CTX_TBDR_BHADDR_HI 0x000000a0
+#define BCE_L2CTX_TBDR_BHADDR_LO 0x000000a4
+#define BCE_L2CTX_TXP_BOFF 0x000000a8
+#define BCE_L2CTX_TXP_BIDX 0x000000a8
+#define BCE_L2CTX_TXP_BSEQ 0x000000ac
+
+
+/*
+ * l2_bd_chain_context definition
+ */
+#define BCE_L2CTX_BD_PRE_READ 0x00000000
+#define BCE_L2CTX_CTX_SIZE 0x00000000
+#define BCE_L2CTX_CTX_TYPE 0x00000000
+#define BCE_L2CTX_CTX_TYPE_SIZE_L2 ((0x20/20)<<16)
+#define BCE_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE (0xf<<28)
+#define BCE_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_UNDEFINED (0<<28)
+#define BCE_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE (1<<28)
+
+#define BCE_L2CTX_HOST_BDIDX 0x00000004
+#define BCE_L2CTX_HOST_BSEQ 0x00000008
+#define BCE_L2CTX_NX_BSEQ 0x0000000c
+#define BCE_L2CTX_NX_BDHADDR_HI 0x00000010
+#define BCE_L2CTX_NX_BDHADDR_LO 0x00000014
+#define BCE_L2CTX_NX_BDIDX 0x00000018
+
+
+/*
+ * pci_config_l definition
+ * offset: 0000
+ */
+#define BCE_PCICFG_MISC_CONFIG 0x00000068
+#define BCE_PCICFG_MISC_CONFIG_TARGET_BYTE_SWAP (1L<<2)
+#define BCE_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP (1L<<3)
+#define BCE_PCICFG_MISC_CONFIG_CLOCK_CTL_ENA (1L<<5)
+#define BCE_PCICFG_MISC_CONFIG_TARGET_GRC_WORD_SWAP (1L<<6)
+#define BCE_PCICFG_MISC_CONFIG_REG_WINDOW_ENA (1L<<7)
+#define BCE_PCICFG_MISC_CONFIG_CORE_RST_REQ (1L<<8)
+#define BCE_PCICFG_MISC_CONFIG_CORE_RST_BSY (1L<<9)
+#define BCE_PCICFG_MISC_CONFIG_ASIC_METAL_REV (0xffL<<16)
+#define BCE_PCICFG_MISC_CONFIG_ASIC_BASE_REV (0xfL<<24)
+#define BCE_PCICFG_MISC_CONFIG_ASIC_ID (0xfL<<28)
+#define BCE_PCICFG_MISC_CONFIG_ASIC_REV (0xffffL<<16)
+
+#define BCE_PCICFG_MISC_STATUS 0x0000006c
+#define BCE_PCICFG_MISC_STATUS_INTA_VALUE (1L<<0)
+#define BCE_PCICFG_MISC_STATUS_32BIT_DET (1L<<1)
+#define BCE_PCICFG_MISC_STATUS_M66EN (1L<<2)
+#define BCE_PCICFG_MISC_STATUS_PCIX_DET (1L<<3)
+#define BCE_PCICFG_MISC_STATUS_PCIX_SPEED (0x3L<<4)
+#define BCE_PCICFG_MISC_STATUS_PCIX_SPEED_66 (0L<<4)
+#define BCE_PCICFG_MISC_STATUS_PCIX_SPEED_100 (1L<<4)
+#define BCE_PCICFG_MISC_STATUS_PCIX_SPEED_133 (2L<<4)
+#define BCE_PCICFG_MISC_STATUS_PCIX_SPEED_PCI_MODE (3L<<4)
+
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS 0x00000070
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET (0xfL<<0)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ (0L<<0)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ (1L<<0)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ (2L<<0)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ (3L<<0)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ (4L<<0)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ (5L<<0)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ (6L<<0)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ (7L<<0)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW (0xfL<<0)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_DISABLE (1L<<6)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT (1L<<7)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC (0x7L<<8)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_UNDEF (0L<<8)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_12 (1L<<8)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_6 (2L<<8)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_62 (4L<<8)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PLAY_DEAD (1L<<11)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED (0xfL<<12)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_100 (0L<<12)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_80 (1L<<12)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_50 (2L<<12)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_40 (4L<<12)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_25 (8L<<12)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_STOP (1L<<16)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_PLL_STOP (1L<<17)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_RESERVED_18 (1L<<18)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_USE_SPD_DET (1L<<19)
+#define BCE_PCICFG_PCI_CLOCK_CONTROL_BITS_RESERVED (0xfffL<<20)
+
+#define BCE_PCICFG_REG_WINDOW_ADDRESS 0x00000078
+#define BCE_PCICFG_REG_WINDOW 0x00000080
+#define BCE_PCICFG_INT_ACK_CMD 0x00000084
+#define BCE_PCICFG_INT_ACK_CMD_INDEX (0xffffL<<0)
+#define BCE_PCICFG_INT_ACK_CMD_INDEX_VALID (1L<<16)
+#define BCE_PCICFG_INT_ACK_CMD_USE_INT_HC_PARAM (1L<<17)
+#define BCE_PCICFG_INT_ACK_CMD_MASK_INT (1L<<18)
+
+#define BCE_PCICFG_STATUS_BIT_SET_CMD 0x00000088
+#define BCE_PCICFG_STATUS_BIT_CLEAR_CMD 0x0000008c
+#define BCE_PCICFG_MAILBOX_QUEUE_ADDR 0x00000090
+#define BCE_PCICFG_MAILBOX_QUEUE_DATA 0x00000094
+
+
+/*
+ * pci_reg definition
+ * offset: 0x400
+ */
+#define BCE_PCI_GRC_WINDOW_ADDR 0x00000400
+#define BCE_PCI_GRC_WINDOW_ADDR_PCI_GRC_WINDOW_ADDR_VALUE (0x3ffffL<<8)
+
+#define BCE_PCI_CONFIG_1 0x00000404
+#define BCE_PCI_CONFIG_1_READ_BOUNDARY (0x7L<<8)
+#define BCE_PCI_CONFIG_1_READ_BOUNDARY_OFF (0L<<8)
+#define BCE_PCI_CONFIG_1_READ_BOUNDARY_16 (1L<<8)
+#define BCE_PCI_CONFIG_1_READ_BOUNDARY_32 (2L<<8)
+#define BCE_PCI_CONFIG_1_READ_BOUNDARY_64 (3L<<8)
+#define BCE_PCI_CONFIG_1_READ_BOUNDARY_128 (4L<<8)
+#define BCE_PCI_CONFIG_1_READ_BOUNDARY_256 (5L<<8)
+#define BCE_PCI_CONFIG_1_READ_BOUNDARY_512 (6L<<8)
+#define BCE_PCI_CONFIG_1_READ_BOUNDARY_1024 (7L<<8)
+#define BCE_PCI_CONFIG_1_WRITE_BOUNDARY (0x7L<<11)
+#define BCE_PCI_CONFIG_1_WRITE_BOUNDARY_OFF (0L<<11)
+#define BCE_PCI_CONFIG_1_WRITE_BOUNDARY_16 (1L<<11)
+#define BCE_PCI_CONFIG_1_WRITE_BOUNDARY_32 (2L<<11)
+#define BCE_PCI_CONFIG_1_WRITE_BOUNDARY_64 (3L<<11)
+#define BCE_PCI_CONFIG_1_WRITE_BOUNDARY_128 (4L<<11)
+#define BCE_PCI_CONFIG_1_WRITE_BOUNDARY_256 (5L<<11)
+#define BCE_PCI_CONFIG_1_WRITE_BOUNDARY_512 (6L<<11)
+#define BCE_PCI_CONFIG_1_WRITE_BOUNDARY_1024 (7L<<11)
+
+#define BCE_PCI_CONFIG_2 0x00000408
+#define BCE_PCI_CONFIG_2_BAR1_SIZE (0xfL<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_DISABLED (0L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_64K (1L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_128K (2L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_256K (3L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_512K (4L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_1M (5L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_2M (6L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_4M (7L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_8M (8L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_16M (9L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_32M (10L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_64M (11L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_128M (12L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_256M (13L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_512M (14L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_SIZE_1G (15L<<0)
+#define BCE_PCI_CONFIG_2_BAR1_64ENA (1L<<4)
+#define BCE_PCI_CONFIG_2_EXP_ROM_RETRY (1L<<5)
+#define BCE_PCI_CONFIG_2_CFG_CYCLE_RETRY (1L<<6)
+#define BCE_PCI_CONFIG_2_FIRST_CFG_DONE (1L<<7)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE (0xffL<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_DISABLED (0L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_1K (1L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_2K (2L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_4K (3L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_8K (4L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_16K (5L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_32K (6L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_64K (7L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_128K (8L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_256K (9L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_512K (10L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_1M (11L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_2M (12L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_4M (13L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_8M (14L<<8)
+#define BCE_PCI_CONFIG_2_EXP_ROM_SIZE_16M (15L<<8)
+#define BCE_PCI_CONFIG_2_MAX_SPLIT_LIMIT (0x1fL<<16)
+#define BCE_PCI_CONFIG_2_MAX_READ_LIMIT (0x3L<<21)
+#define BCE_PCI_CONFIG_2_MAX_READ_LIMIT_512 (0L<<21)
+#define BCE_PCI_CONFIG_2_MAX_READ_LIMIT_1K (1L<<21)
+#define BCE_PCI_CONFIG_2_MAX_READ_LIMIT_2K (2L<<21)
+#define BCE_PCI_CONFIG_2_MAX_READ_LIMIT_4K (3L<<21)
+#define BCE_PCI_CONFIG_2_FORCE_32_BIT_MSTR (1L<<23)
+#define BCE_PCI_CONFIG_2_FORCE_32_BIT_TGT (1L<<24)
+#define BCE_PCI_CONFIG_2_KEEP_REQ_ASSERT (1L<<25)
+
+#define BCE_PCI_CONFIG_3 0x0000040c
+#define BCE_PCI_CONFIG_3_STICKY_BYTE (0xffL<<0)
+#define BCE_PCI_CONFIG_3_FORCE_PME (1L<<24)
+#define BCE_PCI_CONFIG_3_PME_STATUS (1L<<25)
+#define BCE_PCI_CONFIG_3_PME_ENABLE (1L<<26)
+#define BCE_PCI_CONFIG_3_PM_STATE (0x3L<<27)
+#define BCE_PCI_CONFIG_3_VAUX_PRESET (1L<<30)
+#define BCE_PCI_CONFIG_3_PCI_POWER (1L<<31)
+
+#define BCE_PCI_PM_DATA_A 0x00000410
+#define BCE_PCI_PM_DATA_A_PM_DATA_0_PRG (0xffL<<0)
+#define BCE_PCI_PM_DATA_A_PM_DATA_1_PRG (0xffL<<8)
+#define BCE_PCI_PM_DATA_A_PM_DATA_2_PRG (0xffL<<16)
+#define BCE_PCI_PM_DATA_A_PM_DATA_3_PRG (0xffL<<24)
+
+#define BCE_PCI_PM_DATA_B 0x00000414
+#define BCE_PCI_PM_DATA_B_PM_DATA_4_PRG (0xffL<<0)
+#define BCE_PCI_PM_DATA_B_PM_DATA_5_PRG (0xffL<<8)
+#define BCE_PCI_PM_DATA_B_PM_DATA_6_PRG (0xffL<<16)
+#define BCE_PCI_PM_DATA_B_PM_DATA_7_PRG (0xffL<<24)
+
+#define BCE_PCI_SWAP_DIAG0 0x00000418
+#define BCE_PCI_SWAP_DIAG1 0x0000041c
+#define BCE_PCI_EXP_ROM_ADDR 0x00000420
+#define BCE_PCI_EXP_ROM_ADDR_ADDRESS (0x3fffffL<<2)
+#define BCE_PCI_EXP_ROM_ADDR_REQ (1L<<31)
+
+#define BCE_PCI_EXP_ROM_DATA 0x00000424
+#define BCE_PCI_VPD_INTF 0x00000428
+#define BCE_PCI_VPD_INTF_INTF_REQ (1L<<0)
+
+#define BCE_PCI_VPD_ADDR_FLAG 0x0000042c
+#define BCE_PCI_VPD_ADDR_FLAG_ADDRESS (0x1fff<<2)
+#define BCE_PCI_VPD_ADDR_FLAG_WR (1<<15)
+
+#define BCE_PCI_VPD_DATA 0x00000430
+#define BCE_PCI_ID_VAL1 0x00000434
+#define BCE_PCI_ID_VAL1_DEVICE_ID (0xffffL<<0)
+#define BCE_PCI_ID_VAL1_VENDOR_ID (0xffffL<<16)
+
+#define BCE_PCI_ID_VAL2 0x00000438
+#define BCE_PCI_ID_VAL2_SUBSYSTEM_VENDOR_ID (0xffffL<<0)
+#define BCE_PCI_ID_VAL2_SUBSYSTEM_ID (0xffffL<<16)
+
+#define BCE_PCI_ID_VAL3 0x0000043c
+#define BCE_PCI_ID_VAL3_CLASS_CODE (0xffffffL<<0)
+#define BCE_PCI_ID_VAL3_REVISION_ID (0xffL<<24)
+
+#define BCE_PCI_ID_VAL4 0x00000440
+#define BCE_PCI_ID_VAL4_CAP_ENA (0xfL<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_0 (0L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_1 (1L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_2 (2L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_3 (3L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_4 (4L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_5 (5L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_6 (6L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_7 (7L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_8 (8L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_9 (9L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_10 (10L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_11 (11L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_12 (12L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_13 (13L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_14 (14L<<0)
+#define BCE_PCI_ID_VAL4_CAP_ENA_15 (15L<<0)
+#define BCE_PCI_ID_VAL4_PM_SCALE_PRG (0x3L<<6)
+#define BCE_PCI_ID_VAL4_PM_SCALE_PRG_0 (0L<<6)
+#define BCE_PCI_ID_VAL4_PM_SCALE_PRG_1 (1L<<6)
+#define BCE_PCI_ID_VAL4_PM_SCALE_PRG_2 (2L<<6)
+#define BCE_PCI_ID_VAL4_PM_SCALE_PRG_3 (3L<<6)
+#define BCE_PCI_ID_VAL4_MSI_LIMIT (0x7L<<9)
+#define BCE_PCI_ID_VAL4_MSI_ADVERTIZE (0x7L<<12)
+#define BCE_PCI_ID_VAL4_MSI_ENABLE (1L<<15)
+#define BCE_PCI_ID_VAL4_MAX_64_ADVERTIZE (1L<<16)
+#define BCE_PCI_ID_VAL4_MAX_133_ADVERTIZE (1L<<17)
+#define BCE_PCI_ID_VAL4_MAX_MEM_READ_SIZE (0x3L<<21)
+#define BCE_PCI_ID_VAL4_MAX_SPLIT_SIZE (0x7L<<23)
+#define BCE_PCI_ID_VAL4_MAX_CUMULATIVE_SIZE (0x7L<<26)
+
+#define BCE_PCI_ID_VAL5 0x00000444
+#define BCE_PCI_ID_VAL5_D1_SUPPORT (1L<<0)
+#define BCE_PCI_ID_VAL5_D2_SUPPORT (1L<<1)
+#define BCE_PCI_ID_VAL5_PME_IN_D0 (1L<<2)
+#define BCE_PCI_ID_VAL5_PME_IN_D1 (1L<<3)
+#define BCE_PCI_ID_VAL5_PME_IN_D2 (1L<<4)
+#define BCE_PCI_ID_VAL5_PME_IN_D3_HOT (1L<<5)
+
+#define BCE_PCI_PCIX_EXTENDED_STATUS 0x00000448
+#define BCE_PCI_PCIX_EXTENDED_STATUS_NO_SNOOP (1L<<8)
+#define BCE_PCI_PCIX_EXTENDED_STATUS_LONG_BURST (1L<<9)
+#define BCE_PCI_PCIX_EXTENDED_STATUS_SPLIT_COMP_MSG_CLASS (0xfL<<16)
+#define BCE_PCI_PCIX_EXTENDED_STATUS_SPLIT_COMP_MSG_IDX (0xffL<<24)
+
+#define BCE_PCI_ID_VAL6 0x0000044c
+#define BCE_PCI_ID_VAL6_MAX_LAT (0xffL<<0)
+#define BCE_PCI_ID_VAL6_MIN_GNT (0xffL<<8)
+#define BCE_PCI_ID_VAL6_BIST (0xffL<<16)
+
+#define BCE_PCI_MSI_DATA 0x00000450
+#define BCE_PCI_MSI_DATA_PCI_MSI_DATA (0xffffL<<0)
+
+#define BCE_PCI_MSI_ADDR_H 0x00000454
+#define BCE_PCI_MSI_ADDR_L 0x00000458
+
+
+/*
+ * misc_reg definition
+ * offset: 0x800
+ */
+#define BCE_MISC_COMMAND 0x00000800
+#define BCE_MISC_COMMAND_ENABLE_ALL (1L<<0)
+#define BCE_MISC_COMMAND_DISABLE_ALL (1L<<1)
+#define BCE_MISC_COMMAND_CORE_RESET (1L<<4)
+#define BCE_MISC_COMMAND_HARD_RESET (1L<<5)
+#define BCE_MISC_COMMAND_PAR_ERROR (1L<<8)
+#define BCE_MISC_COMMAND_PAR_ERR_RAM (0x7fL<<16)
+
+#define BCE_MISC_CFG 0x00000804
+#define BCE_MISC_CFG_PCI_GRC_TMOUT (1L<<0)
+#define BCE_MISC_CFG_NVM_WR_EN (0x3L<<1)
+#define BCE_MISC_CFG_NVM_WR_EN_PROTECT (0L<<1)
+#define BCE_MISC_CFG_NVM_WR_EN_PCI (1L<<1)
+#define BCE_MISC_CFG_NVM_WR_EN_ALLOW (2L<<1)
+#define BCE_MISC_CFG_NVM_WR_EN_ALLOW2 (3L<<1)
+#define BCE_MISC_CFG_BIST_EN (1L<<3)
+#define BCE_MISC_CFG_CK25_OUT_ALT_SRC (1L<<4)
+#define BCE_MISC_CFG_BYPASS_BSCAN (1L<<5)
+#define BCE_MISC_CFG_BYPASS_EJTAG (1L<<6)
+#define BCE_MISC_CFG_CLK_CTL_OVERRIDE (1L<<7)
+#define BCE_MISC_CFG_LEDMODE (0x3L<<8)
+#define BCE_MISC_CFG_LEDMODE_MAC (0L<<8)
+#define BCE_MISC_CFG_LEDMODE_GPHY1 (1L<<8)
+#define BCE_MISC_CFG_LEDMODE_GPHY2 (2L<<8)
+
+#define BCE_MISC_ID 0x00000808
+#define BCE_MISC_ID_BOND_ID (0xfL<<0)
+#define BCE_MISC_ID_CHIP_METAL (0xffL<<4)
+#define BCE_MISC_ID_CHIP_REV (0xfL<<12)
+#define BCE_MISC_ID_CHIP_NUM (0xffffL<<16)
+
+#define BCE_MISC_ENABLE_STATUS_BITS 0x0000080c
+#define BCE_MISC_ENABLE_STATUS_BITS_TX_SCHEDULER_ENABLE (1L<<0)
+#define BCE_MISC_ENABLE_STATUS_BITS_TX_BD_READ_ENABLE (1L<<1)
+#define BCE_MISC_ENABLE_STATUS_BITS_TX_BD_CACHE_ENABLE (1L<<2)
+#define BCE_MISC_ENABLE_STATUS_BITS_TX_PROCESSOR_ENABLE (1L<<3)
+#define BCE_MISC_ENABLE_STATUS_BITS_TX_DMA_ENABLE (1L<<4)
+#define BCE_MISC_ENABLE_STATUS_BITS_TX_PATCHUP_ENABLE (1L<<5)
+#define BCE_MISC_ENABLE_STATUS_BITS_TX_PAYLOAD_Q_ENABLE (1L<<6)
+#define BCE_MISC_ENABLE_STATUS_BITS_TX_HEADER_Q_ENABLE (1L<<7)
+#define BCE_MISC_ENABLE_STATUS_BITS_TX_ASSEMBLER_ENABLE (1L<<8)
+#define BCE_MISC_ENABLE_STATUS_BITS_EMAC_ENABLE (1L<<9)
+#define BCE_MISC_ENABLE_STATUS_BITS_RX_PARSER_MAC_ENABLE (1L<<10)
+#define BCE_MISC_ENABLE_STATUS_BITS_RX_PARSER_CATCHUP_ENABLE (1L<<11)
+#define BCE_MISC_ENABLE_STATUS_BITS_RX_MBUF_ENABLE (1L<<12)
+#define BCE_MISC_ENABLE_STATUS_BITS_RX_LOOKUP_ENABLE (1L<<13)
+#define BCE_MISC_ENABLE_STATUS_BITS_RX_PROCESSOR_ENABLE (1L<<14)
+#define BCE_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE (1L<<15)
+#define BCE_MISC_ENABLE_STATUS_BITS_RX_BD_CACHE_ENABLE (1L<<16)
+#define BCE_MISC_ENABLE_STATUS_BITS_RX_DMA_ENABLE (1L<<17)
+#define BCE_MISC_ENABLE_STATUS_BITS_COMPLETION_ENABLE (1L<<18)
+#define BCE_MISC_ENABLE_STATUS_BITS_HOST_COALESCE_ENABLE (1L<<19)
+#define BCE_MISC_ENABLE_STATUS_BITS_MAILBOX_QUEUE_ENABLE (1L<<20)
+#define BCE_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE (1L<<21)
+#define BCE_MISC_ENABLE_STATUS_BITS_CMD_SCHEDULER_ENABLE (1L<<22)
+#define BCE_MISC_ENABLE_STATUS_BITS_CMD_PROCESSOR_ENABLE (1L<<23)
+#define BCE_MISC_ENABLE_STATUS_BITS_MGMT_PROCESSOR_ENABLE (1L<<24)
+#define BCE_MISC_ENABLE_STATUS_BITS_TIMER_ENABLE (1L<<25)
+#define BCE_MISC_ENABLE_STATUS_BITS_DMA_ENGINE_ENABLE (1L<<26)
+#define BCE_MISC_ENABLE_STATUS_BITS_UMP_ENABLE (1L<<27)
+
+#define BCE_MISC_ENABLE_SET_BITS 0x00000810
+#define BCE_MISC_ENABLE_SET_BITS_TX_SCHEDULER_ENABLE (1L<<0)
+#define BCE_MISC_ENABLE_SET_BITS_TX_BD_READ_ENABLE (1L<<1)
+#define BCE_MISC_ENABLE_SET_BITS_TX_BD_CACHE_ENABLE (1L<<2)
+#define BCE_MISC_ENABLE_SET_BITS_TX_PROCESSOR_ENABLE (1L<<3)
+#define BCE_MISC_ENABLE_SET_BITS_TX_DMA_ENABLE (1L<<4)
+#define BCE_MISC_ENABLE_SET_BITS_TX_PATCHUP_ENABLE (1L<<5)
+#define BCE_MISC_ENABLE_SET_BITS_TX_PAYLOAD_Q_ENABLE (1L<<6)
+#define BCE_MISC_ENABLE_SET_BITS_TX_HEADER_Q_ENABLE (1L<<7)
+#define BCE_MISC_ENABLE_SET_BITS_TX_ASSEMBLER_ENABLE (1L<<8)
+#define BCE_MISC_ENABLE_SET_BITS_EMAC_ENABLE (1L<<9)
+#define BCE_MISC_ENABLE_SET_BITS_RX_PARSER_MAC_ENABLE (1L<<10)
+#define BCE_MISC_ENABLE_SET_BITS_RX_PARSER_CATCHUP_ENABLE (1L<<11)
+#define BCE_MISC_ENABLE_SET_BITS_RX_MBUF_ENABLE (1L<<12)
+#define BCE_MISC_ENABLE_SET_BITS_RX_LOOKUP_ENABLE (1L<<13)
+#define BCE_MISC_ENABLE_SET_BITS_RX_PROCESSOR_ENABLE (1L<<14)
+#define BCE_MISC_ENABLE_SET_BITS_RX_V2P_ENABLE (1L<<15)
+#define BCE_MISC_ENABLE_SET_BITS_RX_BD_CACHE_ENABLE (1L<<16)
+#define BCE_MISC_ENABLE_SET_BITS_RX_DMA_ENABLE (1L<<17)
+#define BCE_MISC_ENABLE_SET_BITS_COMPLETION_ENABLE (1L<<18)
+#define BCE_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE (1L<<19)
+#define BCE_MISC_ENABLE_SET_BITS_MAILBOX_QUEUE_ENABLE (1L<<20)
+#define BCE_MISC_ENABLE_SET_BITS_CONTEXT_ENABLE (1L<<21)
+#define BCE_MISC_ENABLE_SET_BITS_CMD_SCHEDULER_ENABLE (1L<<22)
+#define BCE_MISC_ENABLE_SET_BITS_CMD_PROCESSOR_ENABLE (1L<<23)
+#define BCE_MISC_ENABLE_SET_BITS_MGMT_PROCESSOR_ENABLE (1L<<24)
+#define BCE_MISC_ENABLE_SET_BITS_TIMER_ENABLE (1L<<25)
+#define BCE_MISC_ENABLE_SET_BITS_DMA_ENGINE_ENABLE (1L<<26)
+#define BCE_MISC_ENABLE_SET_BITS_UMP_ENABLE (1L<<27)
+
+#define BCE_MISC_ENABLE_CLR_BITS 0x00000814
+#define BCE_MISC_ENABLE_CLR_BITS_TX_SCHEDULER_ENABLE (1L<<0)
+#define BCE_MISC_ENABLE_CLR_BITS_TX_BD_READ_ENABLE (1L<<1)
+#define BCE_MISC_ENABLE_CLR_BITS_TX_BD_CACHE_ENABLE (1L<<2)
+#define BCE_MISC_ENABLE_CLR_BITS_TX_PROCESSOR_ENABLE (1L<<3)
+#define BCE_MISC_ENABLE_CLR_BITS_TX_DMA_ENABLE (1L<<4)
+#define BCE_MISC_ENABLE_CLR_BITS_TX_PATCHUP_ENABLE (1L<<5)
+#define BCE_MISC_ENABLE_CLR_BITS_TX_PAYLOAD_Q_ENABLE (1L<<6)
+#define BCE_MISC_ENABLE_CLR_BITS_TX_HEADER_Q_ENABLE (1L<<7)
+#define BCE_MISC_ENABLE_CLR_BITS_TX_ASSEMBLER_ENABLE (1L<<8)
+#define BCE_MISC_ENABLE_CLR_BITS_EMAC_ENABLE (1L<<9)
+#define BCE_MISC_ENABLE_CLR_BITS_RX_PARSER_MAC_ENABLE (1L<<10)
+#define BCE_MISC_ENABLE_CLR_BITS_RX_PARSER_CATCHUP_ENABLE (1L<<11)
+#define BCE_MISC_ENABLE_CLR_BITS_RX_MBUF_ENABLE (1L<<12)
+#define BCE_MISC_ENABLE_CLR_BITS_RX_LOOKUP_ENABLE (1L<<13)
+#define BCE_MISC_ENABLE_CLR_BITS_RX_PROCESSOR_ENABLE (1L<<14)
+#define BCE_MISC_ENABLE_CLR_BITS_RX_V2P_ENABLE (1L<<15)
+#define BCE_MISC_ENABLE_CLR_BITS_RX_BD_CACHE_ENABLE (1L<<16)
+#define BCE_MISC_ENABLE_CLR_BITS_RX_DMA_ENABLE (1L<<17)
+#define BCE_MISC_ENABLE_CLR_BITS_COMPLETION_ENABLE (1L<<18)
+#define BCE_MISC_ENABLE_CLR_BITS_HOST_COALESCE_ENABLE (1L<<19)
+#define BCE_MISC_ENABLE_CLR_BITS_MAILBOX_QUEUE_ENABLE (1L<<20)
+#define BCE_MISC_ENABLE_CLR_BITS_CONTEXT_ENABLE (1L<<21)
+#define BCE_MISC_ENABLE_CLR_BITS_CMD_SCHEDULER_ENABLE (1L<<22)
+#define BCE_MISC_ENABLE_CLR_BITS_CMD_PROCESSOR_ENABLE (1L<<23)
+#define BCE_MISC_ENABLE_CLR_BITS_MGMT_PROCESSOR_ENABLE (1L<<24)
+#define BCE_MISC_ENABLE_CLR_BITS_TIMER_ENABLE (1L<<25)
+#define BCE_MISC_ENABLE_CLR_BITS_DMA_ENGINE_ENABLE (1L<<26)
+#define BCE_MISC_ENABLE_CLR_BITS_UMP_ENABLE (1L<<27)
+
+#define BCE_MISC_CLOCK_CONTROL_BITS 0x00000818
+#define BCE_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET (0xfL<<0)
+#define BCE_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ (0L<<0)
+#define BCE_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ (1L<<0)
+#define BCE_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ (2L<<0)
+#define BCE_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ (3L<<0)
+#define BCE_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ (4L<<0)
+#define BCE_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ (5L<<0)
+#define BCE_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ (6L<<0)
+#define BCE_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ (7L<<0)
+#define BCE_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW (0xfL<<0)
+#define BCE_MISC_CLOCK_CONTROL_BITS_CORE_CLK_DISABLE (1L<<6)
+#define BCE_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT (1L<<7)
+#define BCE_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC (0x7L<<8)
+#define BCE_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_UNDEF (0L<<8)
+#define BCE_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_12 (1L<<8)
+#define BCE_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_6 (2L<<8)
+#define BCE_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_62 (4L<<8)
+#define BCE_MISC_CLOCK_CONTROL_BITS_PLAY_DEAD (1L<<11)
+#define BCE_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED (0xfL<<12)
+#define BCE_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_100 (0L<<12)
+#define BCE_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_80 (1L<<12)
+#define BCE_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_50 (2L<<12)
+#define BCE_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_40 (4L<<12)
+#define BCE_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_25 (8L<<12)
+#define BCE_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_STOP (1L<<16)
+#define BCE_MISC_CLOCK_CONTROL_BITS_PCI_PLL_STOP (1L<<17)
+#define BCE_MISC_CLOCK_CONTROL_BITS_RESERVED_18 (1L<<18)
+#define BCE_MISC_CLOCK_CONTROL_BITS_USE_SPD_DET (1L<<19)
+#define BCE_MISC_CLOCK_CONTROL_BITS_RESERVED (0xfffL<<20)
+
+#define BCE_MISC_GPIO 0x0000081c
+#define BCE_MISC_GPIO_VALUE (0xffL<<0)
+#define BCE_MISC_GPIO_SET (0xffL<<8)
+#define BCE_MISC_GPIO_CLR (0xffL<<16)
+#define BCE_MISC_GPIO_FLOAT (0xffL<<24)
+
+#define BCE_MISC_GPIO_INT 0x00000820
+#define BCE_MISC_GPIO_INT_INT_STATE (0xfL<<0)
+#define BCE_MISC_GPIO_INT_OLD_VALUE (0xfL<<8)
+#define BCE_MISC_GPIO_INT_OLD_SET (0xfL<<16)
+#define BCE_MISC_GPIO_INT_OLD_CLR (0xfL<<24)
+
+#define BCE_MISC_CONFIG_LFSR 0x00000824
+#define BCE_MISC_CONFIG_LFSR_DIV (0xffffL<<0)
+
+#define BCE_MISC_LFSR_MASK_BITS 0x00000828
+#define BCE_MISC_LFSR_MASK_BITS_TX_SCHEDULER_ENABLE (1L<<0)
+#define BCE_MISC_LFSR_MASK_BITS_TX_BD_READ_ENABLE (1L<<1)
+#define BCE_MISC_LFSR_MASK_BITS_TX_BD_CACHE_ENABLE (1L<<2)
+#define BCE_MISC_LFSR_MASK_BITS_TX_PROCESSOR_ENABLE (1L<<3)
+#define BCE_MISC_LFSR_MASK_BITS_TX_DMA_ENABLE (1L<<4)
+#define BCE_MISC_LFSR_MASK_BITS_TX_PATCHUP_ENABLE (1L<<5)
+#define BCE_MISC_LFSR_MASK_BITS_TX_PAYLOAD_Q_ENABLE (1L<<6)
+#define BCE_MISC_LFSR_MASK_BITS_TX_HEADER_Q_ENABLE (1L<<7)
+#define BCE_MISC_LFSR_MASK_BITS_TX_ASSEMBLER_ENABLE (1L<<8)
+#define BCE_MISC_LFSR_MASK_BITS_EMAC_ENABLE (1L<<9)
+#define BCE_MISC_LFSR_MASK_BITS_RX_PARSER_MAC_ENABLE (1L<<10)
+#define BCE_MISC_LFSR_MASK_BITS_RX_PARSER_CATCHUP_ENABLE (1L<<11)
+#define BCE_MISC_LFSR_MASK_BITS_RX_MBUF_ENABLE (1L<<12)
+#define BCE_MISC_LFSR_MASK_BITS_RX_LOOKUP_ENABLE (1L<<13)
+#define BCE_MISC_LFSR_MASK_BITS_RX_PROCESSOR_ENABLE (1L<<14)
+#define BCE_MISC_LFSR_MASK_BITS_RX_V2P_ENABLE (1L<<15)
+#define BCE_MISC_LFSR_MASK_BITS_RX_BD_CACHE_ENABLE (1L<<16)
+#define BCE_MISC_LFSR_MASK_BITS_RX_DMA_ENABLE (1L<<17)
+#define BCE_MISC_LFSR_MASK_BITS_COMPLETION_ENABLE (1L<<18)
+#define BCE_MISC_LFSR_MASK_BITS_HOST_COALESCE_ENABLE (1L<<19)
+#define BCE_MISC_LFSR_MASK_BITS_MAILBOX_QUEUE_ENABLE (1L<<20)
+#define BCE_MISC_LFSR_MASK_BITS_CONTEXT_ENABLE (1L<<21)
+#define BCE_MISC_LFSR_MASK_BITS_CMD_SCHEDULER_ENABLE (1L<<22)
+#define BCE_MISC_LFSR_MASK_BITS_CMD_PROCESSOR_ENABLE (1L<<23)
+#define BCE_MISC_LFSR_MASK_BITS_MGMT_PROCESSOR_ENABLE (1L<<24)
+#define BCE_MISC_LFSR_MASK_BITS_TIMER_ENABLE (1L<<25)
+#define BCE_MISC_LFSR_MASK_BITS_DMA_ENGINE_ENABLE (1L<<26)
+#define BCE_MISC_LFSR_MASK_BITS_UMP_ENABLE (1L<<27)
+
+#define BCE_MISC_ARB_REQ0 0x0000082c
+#define BCE_MISC_ARB_REQ1 0x00000830
+#define BCE_MISC_ARB_REQ2 0x00000834
+#define BCE_MISC_ARB_REQ3 0x00000838
+#define BCE_MISC_ARB_REQ4 0x0000083c
+#define BCE_MISC_ARB_FREE0 0x00000840
+#define BCE_MISC_ARB_FREE1 0x00000844
+#define BCE_MISC_ARB_FREE2 0x00000848
+#define BCE_MISC_ARB_FREE3 0x0000084c
+#define BCE_MISC_ARB_FREE4 0x00000850
+#define BCE_MISC_ARB_REQ_STATUS0 0x00000854
+#define BCE_MISC_ARB_REQ_STATUS1 0x00000858
+#define BCE_MISC_ARB_REQ_STATUS2 0x0000085c
+#define BCE_MISC_ARB_REQ_STATUS3 0x00000860
+#define BCE_MISC_ARB_REQ_STATUS4 0x00000864
+#define BCE_MISC_ARB_GNT0 0x00000868
+#define BCE_MISC_ARB_GNT0_0 (0x7L<<0)
+#define BCE_MISC_ARB_GNT0_1 (0x7L<<4)
+#define BCE_MISC_ARB_GNT0_2 (0x7L<<8)
+#define BCE_MISC_ARB_GNT0_3 (0x7L<<12)
+#define BCE_MISC_ARB_GNT0_4 (0x7L<<16)
+#define BCE_MISC_ARB_GNT0_5 (0x7L<<20)
+#define BCE_MISC_ARB_GNT0_6 (0x7L<<24)
+#define BCE_MISC_ARB_GNT0_7 (0x7L<<28)
+
+#define BCE_MISC_ARB_GNT1 0x0000086c
+#define BCE_MISC_ARB_GNT1_8 (0x7L<<0)
+#define BCE_MISC_ARB_GNT1_9 (0x7L<<4)
+#define BCE_MISC_ARB_GNT1_10 (0x7L<<8)
+#define BCE_MISC_ARB_GNT1_11 (0x7L<<12)
+#define BCE_MISC_ARB_GNT1_12 (0x7L<<16)
+#define BCE_MISC_ARB_GNT1_13 (0x7L<<20)
+#define BCE_MISC_ARB_GNT1_14 (0x7L<<24)
+#define BCE_MISC_ARB_GNT1_15 (0x7L<<28)
+
+#define BCE_MISC_ARB_GNT2 0x00000870
+#define BCE_MISC_ARB_GNT2_16 (0x7L<<0)
+#define BCE_MISC_ARB_GNT2_17 (0x7L<<4)
+#define BCE_MISC_ARB_GNT2_18 (0x7L<<8)
+#define BCE_MISC_ARB_GNT2_19 (0x7L<<12)
+#define BCE_MISC_ARB_GNT2_20 (0x7L<<16)
+#define BCE_MISC_ARB_GNT2_21 (0x7L<<20)
+#define BCE_MISC_ARB_GNT2_22 (0x7L<<24)
+#define BCE_MISC_ARB_GNT2_23 (0x7L<<28)
+
+#define BCE_MISC_ARB_GNT3 0x00000874
+#define BCE_MISC_ARB_GNT3_24 (0x7L<<0)
+#define BCE_MISC_ARB_GNT3_25 (0x7L<<4)
+#define BCE_MISC_ARB_GNT3_26 (0x7L<<8)
+#define BCE_MISC_ARB_GNT3_27 (0x7L<<12)
+#define BCE_MISC_ARB_GNT3_28 (0x7L<<16)
+#define BCE_MISC_ARB_GNT3_29 (0x7L<<20)
+#define BCE_MISC_ARB_GNT3_30 (0x7L<<24)
+#define BCE_MISC_ARB_GNT3_31 (0x7L<<28)
+
+#define BCE_MISC_PRBS_CONTROL 0x00000878
+#define BCE_MISC_PRBS_CONTROL_EN (1L<<0)
+#define BCE_MISC_PRBS_CONTROL_RSTB (1L<<1)
+#define BCE_MISC_PRBS_CONTROL_INV (1L<<2)
+#define BCE_MISC_PRBS_CONTROL_ERR_CLR (1L<<3)
+#define BCE_MISC_PRBS_CONTROL_ORDER (0x3L<<4)
+#define BCE_MISC_PRBS_CONTROL_ORDER_7TH (0L<<4)
+#define BCE_MISC_PRBS_CONTROL_ORDER_15TH (1L<<4)
+#define BCE_MISC_PRBS_CONTROL_ORDER_23RD (2L<<4)
+#define BCE_MISC_PRBS_CONTROL_ORDER_31ST (3L<<4)
+
+#define BCE_MISC_PRBS_STATUS 0x0000087c
+#define BCE_MISC_PRBS_STATUS_LOCK (1L<<0)
+#define BCE_MISC_PRBS_STATUS_STKY (1L<<1)
+#define BCE_MISC_PRBS_STATUS_ERRORS (0x3fffL<<2)
+#define BCE_MISC_PRBS_STATUS_STATE (0xfL<<16)
+
+#define BCE_MISC_SM_ASF_CONTROL 0x00000880
+#define BCE_MISC_SM_ASF_CONTROL_ASF_RST (1L<<0)
+#define BCE_MISC_SM_ASF_CONTROL_TSC_EN (1L<<1)
+#define BCE_MISC_SM_ASF_CONTROL_WG_TO (1L<<2)
+#define BCE_MISC_SM_ASF_CONTROL_HB_TO (1L<<3)
+#define BCE_MISC_SM_ASF_CONTROL_PA_TO (1L<<4)
+#define BCE_MISC_SM_ASF_CONTROL_PL_TO (1L<<5)
+#define BCE_MISC_SM_ASF_CONTROL_RT_TO (1L<<6)
+#define BCE_MISC_SM_ASF_CONTROL_SMB_EVENT (1L<<7)
+#define BCE_MISC_SM_ASF_CONTROL_RES (0xfL<<8)
+#define BCE_MISC_SM_ASF_CONTROL_SMB_EN (1L<<12)
+#define BCE_MISC_SM_ASF_CONTROL_SMB_BB_EN (1L<<13)
+#define BCE_MISC_SM_ASF_CONTROL_SMB_NO_ADDR_FILT (1L<<14)
+#define BCE_MISC_SM_ASF_CONTROL_SMB_AUTOREAD (1L<<15)
+#define BCE_MISC_SM_ASF_CONTROL_NIC_SMB_ADDR1 (0x3fL<<16)
+#define BCE_MISC_SM_ASF_CONTROL_NIC_SMB_ADDR2 (0x3fL<<24)
+#define BCE_MISC_SM_ASF_CONTROL_EN_NIC_SMB_ADDR_0 (1L<<30)
+#define BCE_MISC_SM_ASF_CONTROL_SMB_EARLY_ATTN (1L<<31)
+
+#define BCE_MISC_SMB_IN 0x00000884
+#define BCE_MISC_SMB_IN_DAT_IN (0xffL<<0)
+#define BCE_MISC_SMB_IN_RDY (1L<<8)
+#define BCE_MISC_SMB_IN_DONE (1L<<9)
+#define BCE_MISC_SMB_IN_FIRSTBYTE (1L<<10)
+#define BCE_MISC_SMB_IN_STATUS (0x7L<<11)
+#define BCE_MISC_SMB_IN_STATUS_OK (0x0L<<11)
+#define BCE_MISC_SMB_IN_STATUS_PEC (0x1L<<11)
+#define BCE_MISC_SMB_IN_STATUS_OFLOW (0x2L<<11)
+#define BCE_MISC_SMB_IN_STATUS_STOP (0x3L<<11)
+#define BCE_MISC_SMB_IN_STATUS_TIMEOUT (0x4L<<11)
+
+#define BCE_MISC_SMB_OUT 0x00000888
+#define BCE_MISC_SMB_OUT_DAT_OUT (0xffL<<0)
+#define BCE_MISC_SMB_OUT_RDY (1L<<8)
+#define BCE_MISC_SMB_OUT_START (1L<<9)
+#define BCE_MISC_SMB_OUT_LAST (1L<<10)
+#define BCE_MISC_SMB_OUT_ACC_TYPE (1L<<11)
+#define BCE_MISC_SMB_OUT_ENB_PEC (1L<<12)
+#define BCE_MISC_SMB_OUT_GET_RX_LEN (1L<<13)
+#define BCE_MISC_SMB_OUT_SMB_READ_LEN (0x3fL<<14)
+#define BCE_MISC_SMB_OUT_SMB_OUT_STATUS (0xfL<<20)
+#define BCE_MISC_SMB_OUT_SMB_OUT_STATUS_OK (0L<<20)
+#define BCE_MISC_SMB_OUT_SMB_OUT_STATUS_FIRST_NACK (1L<<20)
+#define BCE_MISC_SMB_OUT_SMB_OUT_STATUS_SUB_NACK (9L<<20)
+#define BCE_MISC_SMB_OUT_SMB_OUT_STATUS_UFLOW (2L<<20)
+#define BCE_MISC_SMB_OUT_SMB_OUT_STATUS_STOP (3L<<20)
+#define BCE_MISC_SMB_OUT_SMB_OUT_STATUS_TIMEOUT (4L<<20)
+#define BCE_MISC_SMB_OUT_SMB_OUT_STATUS_FIRST_LOST (5L<<20)
+#define BCE_MISC_SMB_OUT_SMB_OUT_STATUS_SUB_LOST (0xdL<<20)
+#define BCE_MISC_SMB_OUT_SMB_OUT_STATUS_BADACK (0x6L<<20)
+#define BCE_MISC_SMB_OUT_SMB_OUT_SLAVEMODE (1L<<24)
+#define BCE_MISC_SMB_OUT_SMB_OUT_DAT_EN (1L<<25)
+#define BCE_MISC_SMB_OUT_SMB_OUT_DAT_IN (1L<<26)
+#define BCE_MISC_SMB_OUT_SMB_OUT_CLK_EN (1L<<27)
+#define BCE_MISC_SMB_OUT_SMB_OUT_CLK_IN (1L<<28)
+
+#define BCE_MISC_SMB_WATCHDOG 0x0000088c
+#define BCE_MISC_SMB_WATCHDOG_WATCHDOG (0xffffL<<0)
+
+#define BCE_MISC_SMB_HEARTBEAT 0x00000890
+#define BCE_MISC_SMB_HEARTBEAT_HEARTBEAT (0xffffL<<0)
+
+#define BCE_MISC_SMB_POLL_ASF 0x00000894
+#define BCE_MISC_SMB_POLL_ASF_POLL_ASF (0xffffL<<0)
+
+#define BCE_MISC_SMB_POLL_LEGACY 0x00000898
+#define BCE_MISC_SMB_POLL_LEGACY_POLL_LEGACY (0xffffL<<0)
+
+#define BCE_MISC_SMB_RETRAN 0x0000089c
+#define BCE_MISC_SMB_RETRAN_RETRAN (0xffL<<0)
+
+#define BCE_MISC_SMB_TIMESTAMP 0x000008a0
+#define BCE_MISC_SMB_TIMESTAMP_TIMESTAMP (0xffffffffL<<0)
+
+#define BCE_MISC_PERR_ENA0 0x000008a4
+#define BCE_MISC_PERR_ENA0_COM_MISC_CTXC (1L<<0)
+#define BCE_MISC_PERR_ENA0_COM_MISC_REGF (1L<<1)
+#define BCE_MISC_PERR_ENA0_COM_MISC_SCPAD (1L<<2)
+#define BCE_MISC_PERR_ENA0_CP_MISC_CTXC (1L<<3)
+#define BCE_MISC_PERR_ENA0_CP_MISC_REGF (1L<<4)
+#define BCE_MISC_PERR_ENA0_CP_MISC_SCPAD (1L<<5)
+#define BCE_MISC_PERR_ENA0_CS_MISC_TMEM (1L<<6)
+#define BCE_MISC_PERR_ENA0_CTX_MISC_ACCM0 (1L<<7)
+#define BCE_MISC_PERR_ENA0_CTX_MISC_ACCM1 (1L<<8)
+#define BCE_MISC_PERR_ENA0_CTX_MISC_ACCM2 (1L<<9)
+#define BCE_MISC_PERR_ENA0_CTX_MISC_ACCM3 (1L<<10)
+#define BCE_MISC_PERR_ENA0_CTX_MISC_ACCM4 (1L<<11)
+#define BCE_MISC_PERR_ENA0_CTX_MISC_ACCM5 (1L<<12)
+#define BCE_MISC_PERR_ENA0_CTX_MISC_PGTBL (1L<<13)
+#define BCE_MISC_PERR_ENA0_DMAE_MISC_DR0 (1L<<14)
+#define BCE_MISC_PERR_ENA0_DMAE_MISC_DR1 (1L<<15)
+#define BCE_MISC_PERR_ENA0_DMAE_MISC_DR2 (1L<<16)
+#define BCE_MISC_PERR_ENA0_DMAE_MISC_DR3 (1L<<17)
+#define BCE_MISC_PERR_ENA0_DMAE_MISC_DR4 (1L<<18)
+#define BCE_MISC_PERR_ENA0_DMAE_MISC_DW0 (1L<<19)
+#define BCE_MISC_PERR_ENA0_DMAE_MISC_DW1 (1L<<20)
+#define BCE_MISC_PERR_ENA0_DMAE_MISC_DW2 (1L<<21)
+#define BCE_MISC_PERR_ENA0_HC_MISC_DMA (1L<<22)
+#define BCE_MISC_PERR_ENA0_MCP_MISC_REGF (1L<<23)
+#define BCE_MISC_PERR_ENA0_MCP_MISC_SCPAD (1L<<24)
+#define BCE_MISC_PERR_ENA0_MQ_MISC_CTX (1L<<25)
+#define BCE_MISC_PERR_ENA0_RBDC_MISC (1L<<26)
+#define BCE_MISC_PERR_ENA0_RBUF_MISC_MB (1L<<27)
+#define BCE_MISC_PERR_ENA0_RBUF_MISC_PTR (1L<<28)
+#define BCE_MISC_PERR_ENA0_RDE_MISC_RPC (1L<<29)
+#define BCE_MISC_PERR_ENA0_RDE_MISC_RPM (1L<<30)
+#define BCE_MISC_PERR_ENA0_RV2P_MISC_CB0REGS (1L<<31)
+
+#define BCE_MISC_PERR_ENA1 0x000008a8
+#define BCE_MISC_PERR_ENA1_RV2P_MISC_CB1REGS (1L<<0)
+#define BCE_MISC_PERR_ENA1_RV2P_MISC_P1IRAM (1L<<1)
+#define BCE_MISC_PERR_ENA1_RV2P_MISC_P2IRAM (1L<<2)
+#define BCE_MISC_PERR_ENA1_RXP_MISC_CTXC (1L<<3)
+#define BCE_MISC_PERR_ENA1_RXP_MISC_REGF (1L<<4)
+#define BCE_MISC_PERR_ENA1_RXP_MISC_SCPAD (1L<<5)
+#define BCE_MISC_PERR_ENA1_RXP_MISC_RBUFC (1L<<6)
+#define BCE_MISC_PERR_ENA1_TBDC_MISC (1L<<7)
+#define BCE_MISC_PERR_ENA1_TDMA_MISC (1L<<8)
+#define BCE_MISC_PERR_ENA1_THBUF_MISC_MB0 (1L<<9)
+#define BCE_MISC_PERR_ENA1_THBUF_MISC_MB1 (1L<<10)
+#define BCE_MISC_PERR_ENA1_TPAT_MISC_REGF (1L<<11)
+#define BCE_MISC_PERR_ENA1_TPAT_MISC_SCPAD (1L<<12)
+#define BCE_MISC_PERR_ENA1_TPBUF_MISC_MB (1L<<13)
+#define BCE_MISC_PERR_ENA1_TSCH_MISC_LR (1L<<14)
+#define BCE_MISC_PERR_ENA1_TXP_MISC_CTXC (1L<<15)
+#define BCE_MISC_PERR_ENA1_TXP_MISC_REGF (1L<<16)
+#define BCE_MISC_PERR_ENA1_TXP_MISC_SCPAD (1L<<17)
+#define BCE_MISC_PERR_ENA1_UMP_MISC_FIORX (1L<<18)
+#define BCE_MISC_PERR_ENA1_UMP_MISC_FIOTX (1L<<19)
+#define BCE_MISC_PERR_ENA1_UMP_MISC_RX (1L<<20)
+#define BCE_MISC_PERR_ENA1_UMP_MISC_TX (1L<<21)
+#define BCE_MISC_PERR_ENA1_RDMAQ_MISC (1L<<22)
+#define BCE_MISC_PERR_ENA1_CSQ_MISC (1L<<23)
+#define BCE_MISC_PERR_ENA1_CPQ_MISC (1L<<24)
+#define BCE_MISC_PERR_ENA1_MCPQ_MISC (1L<<25)
+#define BCE_MISC_PERR_ENA1_RV2PMQ_MISC (1L<<26)
+#define BCE_MISC_PERR_ENA1_RV2PPQ_MISC (1L<<27)
+#define BCE_MISC_PERR_ENA1_RV2PTQ_MISC (1L<<28)
+#define BCE_MISC_PERR_ENA1_RXPQ_MISC (1L<<29)
+#define BCE_MISC_PERR_ENA1_RXPCQ_MISC (1L<<30)
+#define BCE_MISC_PERR_ENA1_RLUPQ_MISC (1L<<31)
+
+#define BCE_MISC_PERR_ENA2 0x000008ac
+#define BCE_MISC_PERR_ENA2_COMQ_MISC (1L<<0)
+#define BCE_MISC_PERR_ENA2_COMXQ_MISC (1L<<1)
+#define BCE_MISC_PERR_ENA2_COMTQ_MISC (1L<<2)
+#define BCE_MISC_PERR_ENA2_TSCHQ_MISC (1L<<3)
+#define BCE_MISC_PERR_ENA2_TBDRQ_MISC (1L<<4)
+#define BCE_MISC_PERR_ENA2_TXPQ_MISC (1L<<5)
+#define BCE_MISC_PERR_ENA2_TDMAQ_MISC (1L<<6)
+#define BCE_MISC_PERR_ENA2_TPATQ_MISC (1L<<7)
+#define BCE_MISC_PERR_ENA2_TASQ_MISC (1L<<8)
+
+#define BCE_MISC_DEBUG_VECTOR_SEL 0x000008b0
+#define BCE_MISC_DEBUG_VECTOR_SEL_0 (0xfffL<<0)
+#define BCE_MISC_DEBUG_VECTOR_SEL_1 (0xfffL<<12)
+
+#define BCE_MISC_VREG_CONTROL 0x000008b4
+#define BCE_MISC_VREG_CONTROL_1_2 (0xfL<<0)
+#define BCE_MISC_VREG_CONTROL_2_5 (0xfL<<4)
+
+#define BCE_MISC_FINAL_CLK_CTL_VAL 0x000008b8
+#define BCE_MISC_FINAL_CLK_CTL_VAL_MISC_FINAL_CLK_CTL_VAL (0x3ffffffL<<6)
+
+#define BCE_MISC_UNUSED0 0x000008bc
+
+
+/*
+ * nvm_reg definition
+ * offset: 0x6400
+ */
+#define BCE_NVM_COMMAND 0x00006400
+#define BCE_NVM_COMMAND_RST (1L<<0)
+#define BCE_NVM_COMMAND_DONE (1L<<3)
+#define BCE_NVM_COMMAND_DOIT (1L<<4)
+#define BCE_NVM_COMMAND_WR (1L<<5)
+#define BCE_NVM_COMMAND_ERASE (1L<<6)
+#define BCE_NVM_COMMAND_FIRST (1L<<7)
+#define BCE_NVM_COMMAND_LAST (1L<<8)
+#define BCE_NVM_COMMAND_WREN (1L<<16)
+#define BCE_NVM_COMMAND_WRDI (1L<<17)
+#define BCE_NVM_COMMAND_EWSR (1L<<18)
+#define BCE_NVM_COMMAND_WRSR (1L<<19)
+
+#define BCE_NVM_STATUS 0x00006404
+#define BCE_NVM_STATUS_PI_FSM_STATE (0xfL<<0)
+#define BCE_NVM_STATUS_EE_FSM_STATE (0xfL<<4)
+#define BCE_NVM_STATUS_EQ_FSM_STATE (0xfL<<8)
+
+#define BCE_NVM_WRITE 0x00006408
+#define BCE_NVM_WRITE_NVM_WRITE_VALUE (0xffffffffL<<0)
+#define BCE_NVM_WRITE_NVM_WRITE_VALUE_BIT_BANG (0L<<0)
+#define BCE_NVM_WRITE_NVM_WRITE_VALUE_EECLK (1L<<0)
+#define BCE_NVM_WRITE_NVM_WRITE_VALUE_EEDATA (2L<<0)
+#define BCE_NVM_WRITE_NVM_WRITE_VALUE_SCLK (4L<<0)
+#define BCE_NVM_WRITE_NVM_WRITE_VALUE_CS_B (8L<<0)
+#define BCE_NVM_WRITE_NVM_WRITE_VALUE_SO (16L<<0)
+#define BCE_NVM_WRITE_NVM_WRITE_VALUE_SI (32L<<0)
+
+#define BCE_NVM_ADDR 0x0000640c
+#define BCE_NVM_ADDR_NVM_ADDR_VALUE (0xffffffL<<0)
+#define BCE_NVM_ADDR_NVM_ADDR_VALUE_BIT_BANG (0L<<0)
+#define BCE_NVM_ADDR_NVM_ADDR_VALUE_EECLK (1L<<0)
+#define BCE_NVM_ADDR_NVM_ADDR_VALUE_EEDATA (2L<<0)
+#define BCE_NVM_ADDR_NVM_ADDR_VALUE_SCLK (4L<<0)
+#define BCE_NVM_ADDR_NVM_ADDR_VALUE_CS_B (8L<<0)
+#define BCE_NVM_ADDR_NVM_ADDR_VALUE_SO (16L<<0)
+#define BCE_NVM_ADDR_NVM_ADDR_VALUE_SI (32L<<0)
+
+#define BCE_NVM_READ 0x00006410
+#define BCE_NVM_READ_NVM_READ_VALUE (0xffffffffL<<0)
+#define BCE_NVM_READ_NVM_READ_VALUE_BIT_BANG (0L<<0)
+#define BCE_NVM_READ_NVM_READ_VALUE_EECLK (1L<<0)
+#define BCE_NVM_READ_NVM_READ_VALUE_EEDATA (2L<<0)
+#define BCE_NVM_READ_NVM_READ_VALUE_SCLK (4L<<0)
+#define BCE_NVM_READ_NVM_READ_VALUE_CS_B (8L<<0)
+#define BCE_NVM_READ_NVM_READ_VALUE_SO (16L<<0)
+#define BCE_NVM_READ_NVM_READ_VALUE_SI (32L<<0)
+
+#define BCE_NVM_CFG1 0x00006414
+#define BCE_NVM_CFG1_FLASH_MODE (1L<<0)
+#define BCE_NVM_CFG1_BUFFER_MODE (1L<<1)
+#define BCE_NVM_CFG1_PASS_MODE (1L<<2)
+#define BCE_NVM_CFG1_BITBANG_MODE (1L<<3)
+#define BCE_NVM_CFG1_STATUS_BIT (0x7L<<4)
+#define BCE_NVM_CFG1_STATUS_BIT_FLASH_RDY (0L<<4)
+#define BCE_NVM_CFG1_STATUS_BIT_BUFFER_RDY (7L<<4)
+#define BCE_NVM_CFG1_SPI_CLK_DIV (0xfL<<7)
+#define BCE_NVM_CFG1_SEE_CLK_DIV (0x7ffL<<11)
+#define BCE_NVM_CFG1_PROTECT_MODE (1L<<24)
+#define BCE_NVM_CFG1_FLASH_SIZE (1L<<25)
+#define BCE_NVM_CFG1_COMPAT_BYPASSS (1L<<31)
+
+#define BCE_NVM_CFG2 0x00006418
+#define BCE_NVM_CFG2_ERASE_CMD (0xffL<<0)
+#define BCE_NVM_CFG2_DUMMY (0xffL<<8)
+#define BCE_NVM_CFG2_STATUS_CMD (0xffL<<16)
+
+#define BCE_NVM_CFG3 0x0000641c
+#define BCE_NVM_CFG3_BUFFER_RD_CMD (0xffL<<0)
+#define BCE_NVM_CFG3_WRITE_CMD (0xffL<<8)
+#define BCE_NVM_CFG3_BUFFER_WRITE_CMD (0xffL<<16)
+#define BCE_NVM_CFG3_READ_CMD (0xffL<<24)
+
+#define BCE_NVM_SW_ARB 0x00006420
+#define BCE_NVM_SW_ARB_ARB_REQ_SET0 (1L<<0)
+#define BCE_NVM_SW_ARB_ARB_REQ_SET1 (1L<<1)
+#define BCE_NVM_SW_ARB_ARB_REQ_SET2 (1L<<2)
+#define BCE_NVM_SW_ARB_ARB_REQ_SET3 (1L<<3)
+#define BCE_NVM_SW_ARB_ARB_REQ_CLR0 (1L<<4)
+#define BCE_NVM_SW_ARB_ARB_REQ_CLR1 (1L<<5)
+#define BCE_NVM_SW_ARB_ARB_REQ_CLR2 (1L<<6)
+#define BCE_NVM_SW_ARB_ARB_REQ_CLR3 (1L<<7)
+#define BCE_NVM_SW_ARB_ARB_ARB0 (1L<<8)
+#define BCE_NVM_SW_ARB_ARB_ARB1 (1L<<9)
+#define BCE_NVM_SW_ARB_ARB_ARB2 (1L<<10)
+#define BCE_NVM_SW_ARB_ARB_ARB3 (1L<<11)
+#define BCE_NVM_SW_ARB_REQ0 (1L<<12)
+#define BCE_NVM_SW_ARB_REQ1 (1L<<13)
+#define BCE_NVM_SW_ARB_REQ2 (1L<<14)
+#define BCE_NVM_SW_ARB_REQ3 (1L<<15)
+
+#define BCE_NVM_ACCESS_ENABLE 0x00006424
+#define BCE_NVM_ACCESS_ENABLE_EN (1L<<0)
+#define BCE_NVM_ACCESS_ENABLE_WR_EN (1L<<1)
+
+#define BCE_NVM_WRITE1 0x00006428
+#define BCE_NVM_WRITE1_WREN_CMD (0xffL<<0)
+#define BCE_NVM_WRITE1_WRDI_CMD (0xffL<<8)
+#define BCE_NVM_WRITE1_SR_DATA (0xffL<<16)
+
+
+
+/*
+ * dma_reg definition
+ * offset: 0xc00
+ */
+#define BCE_DMA_COMMAND 0x00000c00
+#define BCE_DMA_COMMAND_ENABLE (1L<<0)
+
+#define BCE_DMA_STATUS 0x00000c04
+#define BCE_DMA_STATUS_PAR_ERROR_STATE (1L<<0)
+#define BCE_DMA_STATUS_READ_TRANSFERS_STAT (1L<<16)
+#define BCE_DMA_STATUS_READ_DELAY_PCI_CLKS_STAT (1L<<17)
+#define BCE_DMA_STATUS_BIG_READ_TRANSFERS_STAT (1L<<18)
+#define BCE_DMA_STATUS_BIG_READ_DELAY_PCI_CLKS_STAT (1L<<19)
+#define BCE_DMA_STATUS_BIG_READ_RETRY_AFTER_DATA_STAT (1L<<20)
+#define BCE_DMA_STATUS_WRITE_TRANSFERS_STAT (1L<<21)
+#define BCE_DMA_STATUS_WRITE_DELAY_PCI_CLKS_STAT (1L<<22)
+#define BCE_DMA_STATUS_BIG_WRITE_TRANSFERS_STAT (1L<<23)
+#define BCE_DMA_STATUS_BIG_WRITE_DELAY_PCI_CLKS_STAT (1L<<24)
+#define BCE_DMA_STATUS_BIG_WRITE_RETRY_AFTER_DATA_STAT (1L<<25)
+
+#define BCE_DMA_CONFIG 0x00000c08
+#define BCE_DMA_CONFIG_DATA_BYTE_SWAP (1L<<0)
+#define BCE_DMA_CONFIG_DATA_WORD_SWAP (1L<<1)
+#define BCE_DMA_CONFIG_CNTL_BYTE_SWAP (1L<<4)
+#define BCE_DMA_CONFIG_CNTL_WORD_SWAP (1L<<5)
+#define BCE_DMA_CONFIG_ONE_DMA (1L<<6)
+#define BCE_DMA_CONFIG_CNTL_TWO_DMA (1L<<7)
+#define BCE_DMA_CONFIG_CNTL_FPGA_MODE (1L<<8)
+#define BCE_DMA_CONFIG_CNTL_PING_PONG_DMA (1L<<10)
+#define BCE_DMA_CONFIG_CNTL_PCI_COMP_DLY (1L<<11)
+#define BCE_DMA_CONFIG_NO_RCHANS_IN_USE (0xfL<<12)
+#define BCE_DMA_CONFIG_NO_WCHANS_IN_USE (0xfL<<16)
+#define BCE_DMA_CONFIG_PCI_CLK_CMP_BITS (0x7L<<20)
+#define BCE_DMA_CONFIG_PCI_FAST_CLK_CMP (1L<<23)
+#define BCE_DMA_CONFIG_BIG_SIZE (0xfL<<24)
+#define BCE_DMA_CONFIG_BIG_SIZE_NONE (0x0L<<24)
+#define BCE_DMA_CONFIG_BIG_SIZE_64 (0x1L<<24)
+#define BCE_DMA_CONFIG_BIG_SIZE_128 (0x2L<<24)
+#define BCE_DMA_CONFIG_BIG_SIZE_256 (0x4L<<24)
+#define BCE_DMA_CONFIG_BIG_SIZE_512 (0x8L<<24)
+
+#define BCE_DMA_BLACKOUT 0x00000c0c
+#define BCE_DMA_BLACKOUT_RD_RETRY_BLACKOUT (0xffL<<0)
+#define BCE_DMA_BLACKOUT_2ND_RD_RETRY_BLACKOUT (0xffL<<8)
+#define BCE_DMA_BLACKOUT_WR_RETRY_BLACKOUT (0xffL<<16)
+
+#define BCE_DMA_RCHAN_STAT 0x00000c30
+#define BCE_DMA_RCHAN_STAT_COMP_CODE_0 (0x7L<<0)
+#define BCE_DMA_RCHAN_STAT_PAR_ERR_0 (1L<<3)
+#define BCE_DMA_RCHAN_STAT_COMP_CODE_1 (0x7L<<4)
+#define BCE_DMA_RCHAN_STAT_PAR_ERR_1 (1L<<7)
+#define BCE_DMA_RCHAN_STAT_COMP_CODE_2 (0x7L<<8)
+#define BCE_DMA_RCHAN_STAT_PAR_ERR_2 (1L<<11)
+#define BCE_DMA_RCHAN_STAT_COMP_CODE_3 (0x7L<<12)
+#define BCE_DMA_RCHAN_STAT_PAR_ERR_3 (1L<<15)
+#define BCE_DMA_RCHAN_STAT_COMP_CODE_4 (0x7L<<16)
+#define BCE_DMA_RCHAN_STAT_PAR_ERR_4 (1L<<19)
+#define BCE_DMA_RCHAN_STAT_COMP_CODE_5 (0x7L<<20)
+#define BCE_DMA_RCHAN_STAT_PAR_ERR_5 (1L<<23)
+#define BCE_DMA_RCHAN_STAT_COMP_CODE_6 (0x7L<<24)
+#define BCE_DMA_RCHAN_STAT_PAR_ERR_6 (1L<<27)
+#define BCE_DMA_RCHAN_STAT_COMP_CODE_7 (0x7L<<28)
+#define BCE_DMA_RCHAN_STAT_PAR_ERR_7 (1L<<31)
+
+#define BCE_DMA_WCHAN_STAT 0x00000c34
+#define BCE_DMA_WCHAN_STAT_COMP_CODE_0 (0x7L<<0)
+#define BCE_DMA_WCHAN_STAT_PAR_ERR_0 (1L<<3)
+#define BCE_DMA_WCHAN_STAT_COMP_CODE_1 (0x7L<<4)
+#define BCE_DMA_WCHAN_STAT_PAR_ERR_1 (1L<<7)
+#define BCE_DMA_WCHAN_STAT_COMP_CODE_2 (0x7L<<8)
+#define BCE_DMA_WCHAN_STAT_PAR_ERR_2 (1L<<11)
+#define BCE_DMA_WCHAN_STAT_COMP_CODE_3 (0x7L<<12)
+#define BCE_DMA_WCHAN_STAT_PAR_ERR_3 (1L<<15)
+#define BCE_DMA_WCHAN_STAT_COMP_CODE_4 (0x7L<<16)
+#define BCE_DMA_WCHAN_STAT_PAR_ERR_4 (1L<<19)
+#define BCE_DMA_WCHAN_STAT_COMP_CODE_5 (0x7L<<20)
+#define BCE_DMA_WCHAN_STAT_PAR_ERR_5 (1L<<23)
+#define BCE_DMA_WCHAN_STAT_COMP_CODE_6 (0x7L<<24)
+#define BCE_DMA_WCHAN_STAT_PAR_ERR_6 (1L<<27)
+#define BCE_DMA_WCHAN_STAT_COMP_CODE_7 (0x7L<<28)
+#define BCE_DMA_WCHAN_STAT_PAR_ERR_7 (1L<<31)
+
+#define BCE_DMA_RCHAN_ASSIGNMENT 0x00000c38
+#define BCE_DMA_RCHAN_ASSIGNMENT_0 (0xfL<<0)
+#define BCE_DMA_RCHAN_ASSIGNMENT_1 (0xfL<<4)
+#define BCE_DMA_RCHAN_ASSIGNMENT_2 (0xfL<<8)
+#define BCE_DMA_RCHAN_ASSIGNMENT_3 (0xfL<<12)
+#define BCE_DMA_RCHAN_ASSIGNMENT_4 (0xfL<<16)
+#define BCE_DMA_RCHAN_ASSIGNMENT_5 (0xfL<<20)
+#define BCE_DMA_RCHAN_ASSIGNMENT_6 (0xfL<<24)
+#define BCE_DMA_RCHAN_ASSIGNMENT_7 (0xfL<<28)
+
+#define BCE_DMA_WCHAN_ASSIGNMENT 0x00000c3c
+#define BCE_DMA_WCHAN_ASSIGNMENT_0 (0xfL<<0)
+#define BCE_DMA_WCHAN_ASSIGNMENT_1 (0xfL<<4)
+#define BCE_DMA_WCHAN_ASSIGNMENT_2 (0xfL<<8)
+#define BCE_DMA_WCHAN_ASSIGNMENT_3 (0xfL<<12)
+#define BCE_DMA_WCHAN_ASSIGNMENT_4 (0xfL<<16)
+#define BCE_DMA_WCHAN_ASSIGNMENT_5 (0xfL<<20)
+#define BCE_DMA_WCHAN_ASSIGNMENT_6 (0xfL<<24)
+#define BCE_DMA_WCHAN_ASSIGNMENT_7 (0xfL<<28)
+
+#define BCE_DMA_RCHAN_STAT_00 0x00000c40
+#define BCE_DMA_RCHAN_STAT_00_RCHAN_STA_HOST_ADDR_LOW (0xffffffffL<<0)
+
+#define BCE_DMA_RCHAN_STAT_01 0x00000c44
+#define BCE_DMA_RCHAN_STAT_01_RCHAN_STA_HOST_ADDR_HIGH (0xffffffffL<<0)
+
+#define BCE_DMA_RCHAN_STAT_02 0x00000c48
+#define BCE_DMA_RCHAN_STAT_02_LENGTH (0xffffL<<0)
+#define BCE_DMA_RCHAN_STAT_02_WORD_SWAP (1L<<16)
+#define BCE_DMA_RCHAN_STAT_02_BYTE_SWAP (1L<<17)
+#define BCE_DMA_RCHAN_STAT_02_PRIORITY_LVL (1L<<18)
+
+#define BCE_DMA_RCHAN_STAT_10 0x00000c4c
+#define BCE_DMA_RCHAN_STAT_11 0x00000c50
+#define BCE_DMA_RCHAN_STAT_12 0x00000c54
+#define BCE_DMA_RCHAN_STAT_20 0x00000c58
+#define BCE_DMA_RCHAN_STAT_21 0x00000c5c
+#define BCE_DMA_RCHAN_STAT_22 0x00000c60
+#define BCE_DMA_RCHAN_STAT_30 0x00000c64
+#define BCE_DMA_RCHAN_STAT_31 0x00000c68
+#define BCE_DMA_RCHAN_STAT_32 0x00000c6c
+#define BCE_DMA_RCHAN_STAT_40 0x00000c70
+#define BCE_DMA_RCHAN_STAT_41 0x00000c74
+#define BCE_DMA_RCHAN_STAT_42 0x00000c78
+#define BCE_DMA_RCHAN_STAT_50 0x00000c7c
+#define BCE_DMA_RCHAN_STAT_51 0x00000c80
+#define BCE_DMA_RCHAN_STAT_52 0x00000c84
+#define BCE_DMA_RCHAN_STAT_60 0x00000c88
+#define BCE_DMA_RCHAN_STAT_61 0x00000c8c
+#define BCE_DMA_RCHAN_STAT_62 0x00000c90
+#define BCE_DMA_RCHAN_STAT_70 0x00000c94
+#define BCE_DMA_RCHAN_STAT_71 0x00000c98
+#define BCE_DMA_RCHAN_STAT_72 0x00000c9c
+#define BCE_DMA_WCHAN_STAT_00 0x00000ca0
+#define BCE_DMA_WCHAN_STAT_00_WCHAN_STA_HOST_ADDR_LOW (0xffffffffL<<0)
+
+#define BCE_DMA_WCHAN_STAT_01 0x00000ca4
+#define BCE_DMA_WCHAN_STAT_01_WCHAN_STA_HOST_ADDR_HIGH (0xffffffffL<<0)
+
+#define BCE_DMA_WCHAN_STAT_02 0x00000ca8
+#define BCE_DMA_WCHAN_STAT_02_LENGTH (0xffffL<<0)
+#define BCE_DMA_WCHAN_STAT_02_WORD_SWAP (1L<<16)
+#define BCE_DMA_WCHAN_STAT_02_BYTE_SWAP (1L<<17)
+#define BCE_DMA_WCHAN_STAT_02_PRIORITY_LVL (1L<<18)
+
+#define BCE_DMA_WCHAN_STAT_10 0x00000cac
+#define BCE_DMA_WCHAN_STAT_11 0x00000cb0
+#define BCE_DMA_WCHAN_STAT_12 0x00000cb4
+#define BCE_DMA_WCHAN_STAT_20 0x00000cb8
+#define BCE_DMA_WCHAN_STAT_21 0x00000cbc
+#define BCE_DMA_WCHAN_STAT_22 0x00000cc0
+#define BCE_DMA_WCHAN_STAT_30 0x00000cc4
+#define BCE_DMA_WCHAN_STAT_31 0x00000cc8
+#define BCE_DMA_WCHAN_STAT_32 0x00000ccc
+#define BCE_DMA_WCHAN_STAT_40 0x00000cd0
+#define BCE_DMA_WCHAN_STAT_41 0x00000cd4
+#define BCE_DMA_WCHAN_STAT_42 0x00000cd8
+#define BCE_DMA_WCHAN_STAT_50 0x00000cdc
+#define BCE_DMA_WCHAN_STAT_51 0x00000ce0
+#define BCE_DMA_WCHAN_STAT_52 0x00000ce4
+#define BCE_DMA_WCHAN_STAT_60 0x00000ce8
+#define BCE_DMA_WCHAN_STAT_61 0x00000cec
+#define BCE_DMA_WCHAN_STAT_62 0x00000cf0
+#define BCE_DMA_WCHAN_STAT_70 0x00000cf4
+#define BCE_DMA_WCHAN_STAT_71 0x00000cf8
+#define BCE_DMA_WCHAN_STAT_72 0x00000cfc
+#define BCE_DMA_ARB_STAT_00 0x00000d00
+#define BCE_DMA_ARB_STAT_00_MASTER (0xffffL<<0)
+#define BCE_DMA_ARB_STAT_00_MASTER_ENC (0xffL<<16)
+#define BCE_DMA_ARB_STAT_00_CUR_BINMSTR (0xffL<<24)
+
+#define BCE_DMA_ARB_STAT_01 0x00000d04
+#define BCE_DMA_ARB_STAT_01_LPR_RPTR (0xfL<<0)
+#define BCE_DMA_ARB_STAT_01_LPR_WPTR (0xfL<<4)
+#define BCE_DMA_ARB_STAT_01_LPB_RPTR (0xfL<<8)
+#define BCE_DMA_ARB_STAT_01_LPB_WPTR (0xfL<<12)
+#define BCE_DMA_ARB_STAT_01_HPR_RPTR (0xfL<<16)
+#define BCE_DMA_ARB_STAT_01_HPR_WPTR (0xfL<<20)
+#define BCE_DMA_ARB_STAT_01_HPB_RPTR (0xfL<<24)
+#define BCE_DMA_ARB_STAT_01_HPB_WPTR (0xfL<<28)
+
+#define BCE_DMA_FUSE_CTRL0_CMD 0x00000f00
+#define BCE_DMA_FUSE_CTRL0_CMD_PWRUP_DONE (1L<<0)
+#define BCE_DMA_FUSE_CTRL0_CMD_SHIFT_DONE (1L<<1)
+#define BCE_DMA_FUSE_CTRL0_CMD_SHIFT (1L<<2)
+#define BCE_DMA_FUSE_CTRL0_CMD_LOAD (1L<<3)
+#define BCE_DMA_FUSE_CTRL0_CMD_SEL (0xfL<<8)
+
+#define BCE_DMA_FUSE_CTRL0_DATA 0x00000f04
+#define BCE_DMA_FUSE_CTRL1_CMD 0x00000f08
+#define BCE_DMA_FUSE_CTRL1_CMD_PWRUP_DONE (1L<<0)
+#define BCE_DMA_FUSE_CTRL1_CMD_SHIFT_DONE (1L<<1)
+#define BCE_DMA_FUSE_CTRL1_CMD_SHIFT (1L<<2)
+#define BCE_DMA_FUSE_CTRL1_CMD_LOAD (1L<<3)
+#define BCE_DMA_FUSE_CTRL1_CMD_SEL (0xfL<<8)
+
+#define BCE_DMA_FUSE_CTRL1_DATA 0x00000f0c
+#define BCE_DMA_FUSE_CTRL2_CMD 0x00000f10
+#define BCE_DMA_FUSE_CTRL2_CMD_PWRUP_DONE (1L<<0)
+#define BCE_DMA_FUSE_CTRL2_CMD_SHIFT_DONE (1L<<1)
+#define BCE_DMA_FUSE_CTRL2_CMD_SHIFT (1L<<2)
+#define BCE_DMA_FUSE_CTRL2_CMD_LOAD (1L<<3)
+#define BCE_DMA_FUSE_CTRL2_CMD_SEL (0xfL<<8)
+
+#define BCE_DMA_FUSE_CTRL2_DATA 0x00000f14
+
+
+/*
+ * context_reg definition
+ * offset: 0x1000
+ */
+#define BCE_CTX_COMMAND 0x00001000
+#define BCE_CTX_COMMAND_ENABLED (1L<<0)
+
+#define BCE_CTX_STATUS 0x00001004
+#define BCE_CTX_STATUS_LOCK_WAIT (1L<<0)
+#define BCE_CTX_STATUS_READ_STAT (1L<<16)
+#define BCE_CTX_STATUS_WRITE_STAT (1L<<17)
+#define BCE_CTX_STATUS_ACC_STALL_STAT (1L<<18)
+#define BCE_CTX_STATUS_LOCK_STALL_STAT (1L<<19)
+
+#define BCE_CTX_VIRT_ADDR 0x00001008
+#define BCE_CTX_VIRT_ADDR_VIRT_ADDR (0x7fffL<<6)
+
+#define BCE_CTX_PAGE_TBL 0x0000100c
+#define BCE_CTX_PAGE_TBL_PAGE_TBL (0x3fffL<<6)
+
+#define BCE_CTX_DATA_ADR 0x00001010
+#define BCE_CTX_DATA_ADR_DATA_ADR (0x7ffffL<<2)
+
+#define BCE_CTX_DATA 0x00001014
+#define BCE_CTX_LOCK 0x00001018
+#define BCE_CTX_LOCK_TYPE (0x7L<<0)
+#define BCE_CTX_LOCK_TYPE_LOCK_TYPE_VOID (0x0L<<0)
+#define BCE_CTX_LOCK_TYPE_LOCK_TYPE_COMPLETE (0x7L<<0)
+#define BCE_CTX_LOCK_TYPE_LOCK_TYPE_PROTOCOL (0x1L<<0)
+#define BCE_CTX_LOCK_TYPE_LOCK_TYPE_TX (0x2L<<0)
+#define BCE_CTX_LOCK_TYPE_LOCK_TYPE_TIMER (0x4L<<0)
+#define BCE_CTX_LOCK_CID_VALUE (0x3fffL<<7)
+#define BCE_CTX_LOCK_GRANTED (1L<<26)
+#define BCE_CTX_LOCK_MODE (0x7L<<27)
+#define BCE_CTX_LOCK_MODE_UNLOCK (0x0L<<27)
+#define BCE_CTX_LOCK_MODE_IMMEDIATE (0x1L<<27)
+#define BCE_CTX_LOCK_MODE_SURE (0x2L<<27)
+#define BCE_CTX_LOCK_STATUS (1L<<30)
+#define BCE_CTX_LOCK_REQ (1L<<31)
+
+#define BCE_CTX_ACCESS_STATUS 0x00001040
+#define BCE_CTX_ACCESS_STATUS_MASTERENCODED (0xfL<<0)
+#define BCE_CTX_ACCESS_STATUS_ACCESSMEMORYSM (0x3L<<10)
+#define BCE_CTX_ACCESS_STATUS_PAGETABLEINITSM (0x3L<<12)
+#define BCE_CTX_ACCESS_STATUS_ACCESSMEMORYINITSM (0x3L<<14)
+#define BCE_CTX_ACCESS_STATUS_QUALIFIED_REQUEST (0x7ffL<<17)
+
+#define BCE_CTX_DBG_LOCK_STATUS 0x00001044
+#define BCE_CTX_DBG_LOCK_STATUS_SM (0x3ffL<<0)
+#define BCE_CTX_DBG_LOCK_STATUS_MATCH (0x3ffL<<22)
+
+#define BCE_CTX_CHNL_LOCK_STATUS_0 0x00001080
+#define BCE_CTX_CHNL_LOCK_STATUS_0_CID (0x3fffL<<0)
+#define BCE_CTX_CHNL_LOCK_STATUS_0_TYPE (0x3L<<14)
+#define BCE_CTX_CHNL_LOCK_STATUS_0_MODE (1L<<16)
+
+#define BCE_CTX_CHNL_LOCK_STATUS_1 0x00001084
+#define BCE_CTX_CHNL_LOCK_STATUS_2 0x00001088
+#define BCE_CTX_CHNL_LOCK_STATUS_3 0x0000108c
+#define BCE_CTX_CHNL_LOCK_STATUS_4 0x00001090
+#define BCE_CTX_CHNL_LOCK_STATUS_5 0x00001094
+#define BCE_CTX_CHNL_LOCK_STATUS_6 0x00001098
+#define BCE_CTX_CHNL_LOCK_STATUS_7 0x0000109c
+#define BCE_CTX_CHNL_LOCK_STATUS_8 0x000010a0
+
+
+/*
+ * emac_reg definition
+ * offset: 0x1400
+ */
+#define BCE_EMAC_MODE 0x00001400
+#define BCE_EMAC_MODE_RESET (1L<<0)
+#define BCE_EMAC_MODE_HALF_DUPLEX (1L<<1)
+#define BCE_EMAC_MODE_PORT (0x3L<<2)
+#define BCE_EMAC_MODE_PORT_NONE (0L<<2)
+#define BCE_EMAC_MODE_PORT_MII (1L<<2)
+#define BCE_EMAC_MODE_PORT_GMII (2L<<2)
+#define BCE_EMAC_MODE_PORT_MII_10 (3L<<2)
+#define BCE_EMAC_MODE_MAC_LOOP (1L<<4)
+#define BCE_EMAC_MODE_25G (1L<<5)
+#define BCE_EMAC_MODE_TAGGED_MAC_CTL (1L<<7)
+#define BCE_EMAC_MODE_TX_BURST (1L<<8)
+#define BCE_EMAC_MODE_MAX_DEFER_DROP_ENA (1L<<9)
+#define BCE_EMAC_MODE_EXT_LINK_POL (1L<<10)
+#define BCE_EMAC_MODE_FORCE_LINK (1L<<11)
+#define BCE_EMAC_MODE_MPKT (1L<<18)
+#define BCE_EMAC_MODE_MPKT_RCVD (1L<<19)
+#define BCE_EMAC_MODE_ACPI_RCVD (1L<<20)
+
+#define BCE_EMAC_STATUS 0x00001404
+#define BCE_EMAC_STATUS_LINK (1L<<11)
+#define BCE_EMAC_STATUS_LINK_CHANGE (1L<<12)
+#define BCE_EMAC_STATUS_MI_COMPLETE (1L<<22)
+#define BCE_EMAC_STATUS_MI_INT (1L<<23)
+#define BCE_EMAC_STATUS_AP_ERROR (1L<<24)
+#define BCE_EMAC_STATUS_PARITY_ERROR_STATE (1L<<31)
+
+#define BCE_EMAC_ATTENTION_ENA 0x00001408
+#define BCE_EMAC_ATTENTION_ENA_LINK (1L<<11)
+#define BCE_EMAC_ATTENTION_ENA_MI_COMPLETE (1L<<22)
+#define BCE_EMAC_ATTENTION_ENA_MI_INT (1L<<23)
+#define BCE_EMAC_ATTENTION_ENA_AP_ERROR (1L<<24)
+
+#define BCE_EMAC_LED 0x0000140c
+#define BCE_EMAC_LED_OVERRIDE (1L<<0)
+#define BCE_EMAC_LED_1000MB_OVERRIDE (1L<<1)
+#define BCE_EMAC_LED_100MB_OVERRIDE (1L<<2)
+#define BCE_EMAC_LED_10MB_OVERRIDE (1L<<3)
+#define BCE_EMAC_LED_TRAFFIC_OVERRIDE (1L<<4)
+#define BCE_EMAC_LED_BLNK_TRAFFIC (1L<<5)
+#define BCE_EMAC_LED_TRAFFIC (1L<<6)
+#define BCE_EMAC_LED_1000MB (1L<<7)
+#define BCE_EMAC_LED_100MB (1L<<8)
+#define BCE_EMAC_LED_10MB (1L<<9)
+#define BCE_EMAC_LED_TRAFFIC_STAT (1L<<10)
+#define BCE_EMAC_LED_BLNK_RATE (0xfffL<<19)
+#define BCE_EMAC_LED_BLNK_RATE_ENA (1L<<31)
+
+#define BCE_EMAC_MAC_MATCH0 0x00001410
+#define BCE_EMAC_MAC_MATCH1 0x00001414
+#define BCE_EMAC_MAC_MATCH2 0x00001418
+#define BCE_EMAC_MAC_MATCH3 0x0000141c
+#define BCE_EMAC_MAC_MATCH4 0x00001420
+#define BCE_EMAC_MAC_MATCH5 0x00001424
+#define BCE_EMAC_MAC_MATCH6 0x00001428
+#define BCE_EMAC_MAC_MATCH7 0x0000142c
+#define BCE_EMAC_MAC_MATCH8 0x00001430
+#define BCE_EMAC_MAC_MATCH9 0x00001434
+#define BCE_EMAC_MAC_MATCH10 0x00001438
+#define BCE_EMAC_MAC_MATCH11 0x0000143c
+#define BCE_EMAC_MAC_MATCH12 0x00001440
+#define BCE_EMAC_MAC_MATCH13 0x00001444
+#define BCE_EMAC_MAC_MATCH14 0x00001448
+#define BCE_EMAC_MAC_MATCH15 0x0000144c
+#define BCE_EMAC_MAC_MATCH16 0x00001450
+#define BCE_EMAC_MAC_MATCH17 0x00001454
+#define BCE_EMAC_MAC_MATCH18 0x00001458
+#define BCE_EMAC_MAC_MATCH19 0x0000145c
+#define BCE_EMAC_MAC_MATCH20 0x00001460
+#define BCE_EMAC_MAC_MATCH21 0x00001464
+#define BCE_EMAC_MAC_MATCH22 0x00001468
+#define BCE_EMAC_MAC_MATCH23 0x0000146c
+#define BCE_EMAC_MAC_MATCH24 0x00001470
+#define BCE_EMAC_MAC_MATCH25 0x00001474
+#define BCE_EMAC_MAC_MATCH26 0x00001478
+#define BCE_EMAC_MAC_MATCH27 0x0000147c
+#define BCE_EMAC_MAC_MATCH28 0x00001480
+#define BCE_EMAC_MAC_MATCH29 0x00001484
+#define BCE_EMAC_MAC_MATCH30 0x00001488
+#define BCE_EMAC_MAC_MATCH31 0x0000148c
+#define BCE_EMAC_BACKOFF_SEED 0x00001498
+#define BCE_EMAC_BACKOFF_SEED_EMAC_BACKOFF_SEED (0x3ffL<<0)
+
+#define BCE_EMAC_RX_MTU_SIZE 0x0000149c
+#define BCE_EMAC_RX_MTU_SIZE_MTU_SIZE (0xffffL<<0)
+#define BCE_EMAC_RX_MTU_SIZE_JUMBO_ENA (1L<<31)
+
+#define BCE_EMAC_SERDES_CNTL 0x000014a4
+#define BCE_EMAC_SERDES_CNTL_RXR (0x7L<<0)
+#define BCE_EMAC_SERDES_CNTL_RXG (0x3L<<3)
+#define BCE_EMAC_SERDES_CNTL_RXCKSEL (1L<<6)
+#define BCE_EMAC_SERDES_CNTL_TXBIAS (0x7L<<7)
+#define BCE_EMAC_SERDES_CNTL_BGMAX (1L<<10)
+#define BCE_EMAC_SERDES_CNTL_BGMIN (1L<<11)
+#define BCE_EMAC_SERDES_CNTL_TXMODE (1L<<12)
+#define BCE_EMAC_SERDES_CNTL_TXEDGE (1L<<13)
+#define BCE_EMAC_SERDES_CNTL_SERDES_MODE (1L<<14)
+#define BCE_EMAC_SERDES_CNTL_PLLTEST (1L<<15)
+#define BCE_EMAC_SERDES_CNTL_CDET_EN (1L<<16)
+#define BCE_EMAC_SERDES_CNTL_TBI_LBK (1L<<17)
+#define BCE_EMAC_SERDES_CNTL_REMOTE_LBK (1L<<18)
+#define BCE_EMAC_SERDES_CNTL_REV_PHASE (1L<<19)
+#define BCE_EMAC_SERDES_CNTL_REGCTL12 (0x3L<<20)
+#define BCE_EMAC_SERDES_CNTL_REGCTL25 (0x3L<<22)
+
+#define BCE_EMAC_SERDES_STATUS 0x000014a8
+#define BCE_EMAC_SERDES_STATUS_RX_STAT (0xffL<<0)
+#define BCE_EMAC_SERDES_STATUS_COMMA_DET (1L<<8)
+
+#define BCE_EMAC_MDIO_COMM 0x000014ac
+#define BCE_EMAC_MDIO_COMM_DATA (0xffffL<<0)
+#define BCE_EMAC_MDIO_COMM_REG_ADDR (0x1fL<<16)
+#define BCE_EMAC_MDIO_COMM_PHY_ADDR (0x1fL<<21)
+#define BCE_EMAC_MDIO_COMM_COMMAND (0x3L<<26)
+#define BCE_EMAC_MDIO_COMM_COMMAND_UNDEFINED_0 (0L<<26)
+#define BCE_EMAC_MDIO_COMM_COMMAND_WRITE (1L<<26)
+#define BCE_EMAC_MDIO_COMM_COMMAND_READ (2L<<26)
+#define BCE_EMAC_MDIO_COMM_COMMAND_UNDEFINED_3 (3L<<26)
+#define BCE_EMAC_MDIO_COMM_FAIL (1L<<28)
+#define BCE_EMAC_MDIO_COMM_START_BUSY (1L<<29)
+#define BCE_EMAC_MDIO_COMM_DISEXT (1L<<30)
+
+#define BCE_EMAC_MDIO_STATUS 0x000014b0
+#define BCE_EMAC_MDIO_STATUS_LINK (1L<<0)
+#define BCE_EMAC_MDIO_STATUS_10MB (1L<<1)
+
+#define BCE_EMAC_MDIO_MODE 0x000014b4
+#define BCE_EMAC_MDIO_MODE_SHORT_PREAMBLE (1L<<1)
+#define BCE_EMAC_MDIO_MODE_AUTO_POLL (1L<<4)
+#define BCE_EMAC_MDIO_MODE_BIT_BANG (1L<<8)
+#define BCE_EMAC_MDIO_MODE_MDIO (1L<<9)
+#define BCE_EMAC_MDIO_MODE_MDIO_OE (1L<<10)
+#define BCE_EMAC_MDIO_MODE_MDC (1L<<11)
+#define BCE_EMAC_MDIO_MODE_MDINT (1L<<12)
+#define BCE_EMAC_MDIO_MODE_CLOCK_CNT (0x1fL<<16)
+
+#define BCE_EMAC_MDIO_AUTO_STATUS 0x000014b8
+#define BCE_EMAC_MDIO_AUTO_STATUS_AUTO_ERR (1L<<0)
+
+#define BCE_EMAC_TX_MODE 0x000014bc
+#define BCE_EMAC_TX_MODE_RESET (1L<<0)
+#define BCE_EMAC_TX_MODE_EXT_PAUSE_EN (1L<<3)
+#define BCE_EMAC_TX_MODE_FLOW_EN (1L<<4)
+#define BCE_EMAC_TX_MODE_BIG_BACKOFF (1L<<5)
+#define BCE_EMAC_TX_MODE_LONG_PAUSE (1L<<6)
+#define BCE_EMAC_TX_MODE_LINK_AWARE (1L<<7)
+
+#define BCE_EMAC_TX_STATUS 0x000014c0
+#define BCE_EMAC_TX_STATUS_XOFFED (1L<<0)
+#define BCE_EMAC_TX_STATUS_XOFF_SENT (1L<<1)
+#define BCE_EMAC_TX_STATUS_XON_SENT (1L<<2)
+#define BCE_EMAC_TX_STATUS_LINK_UP (1L<<3)
+#define BCE_EMAC_TX_STATUS_UNDERRUN (1L<<4)
+
+#define BCE_EMAC_TX_LENGTHS 0x000014c4
+#define BCE_EMAC_TX_LENGTHS_SLOT (0xffL<<0)
+#define BCE_EMAC_TX_LENGTHS_IPG (0xfL<<8)
+#define BCE_EMAC_TX_LENGTHS_IPG_CRS (0x3L<<12)
+
+#define BCE_EMAC_RX_MODE 0x000014c8
+#define BCE_EMAC_RX_MODE_RESET (1L<<0)
+#define BCE_EMAC_RX_MODE_FLOW_EN (1L<<2)
+#define BCE_EMAC_RX_MODE_KEEP_MAC_CONTROL (1L<<3)
+#define BCE_EMAC_RX_MODE_KEEP_PAUSE (1L<<4)
+#define BCE_EMAC_RX_MODE_ACCEPT_OVERSIZE (1L<<5)
+#define BCE_EMAC_RX_MODE_ACCEPT_RUNTS (1L<<6)
+#define BCE_EMAC_RX_MODE_LLC_CHK (1L<<7)
+#define BCE_EMAC_RX_MODE_PROMISCUOUS (1L<<8)
+#define BCE_EMAC_RX_MODE_NO_CRC_CHK (1L<<9)
+#define BCE_EMAC_RX_MODE_KEEP_VLAN_TAG (1L<<10)
+#define BCE_EMAC_RX_MODE_FILT_BROADCAST (1L<<11)
+#define BCE_EMAC_RX_MODE_SORT_MODE (1L<<12)
+
+#define BCE_EMAC_RX_STATUS 0x000014cc
+#define BCE_EMAC_RX_STATUS_FFED (1L<<0)
+#define BCE_EMAC_RX_STATUS_FF_RECEIVED (1L<<1)
+#define BCE_EMAC_RX_STATUS_N_RECEIVED (1L<<2)
+
+#define BCE_EMAC_MULTICAST_HASH0 0x000014d0
+#define BCE_EMAC_MULTICAST_HASH1 0x000014d4
+#define BCE_EMAC_MULTICAST_HASH2 0x000014d8
+#define BCE_EMAC_MULTICAST_HASH3 0x000014dc
+#define BCE_EMAC_MULTICAST_HASH4 0x000014e0
+#define BCE_EMAC_MULTICAST_HASH5 0x000014e4
+#define BCE_EMAC_MULTICAST_HASH6 0x000014e8
+#define BCE_EMAC_MULTICAST_HASH7 0x000014ec
+#define BCE_EMAC_RX_STAT_IFHCINOCTETS 0x00001500
+#define BCE_EMAC_RX_STAT_IFHCINBADOCTETS 0x00001504
+#define BCE_EMAC_RX_STAT_ETHERSTATSFRAGMENTS 0x00001508
+#define BCE_EMAC_RX_STAT_IFHCINUCASTPKTS 0x0000150c
+#define BCE_EMAC_RX_STAT_IFHCINMULTICASTPKTS 0x00001510
+#define BCE_EMAC_RX_STAT_IFHCINBROADCASTPKTS 0x00001514
+#define BCE_EMAC_RX_STAT_DOT3STATSFCSERRORS 0x00001518
+#define BCE_EMAC_RX_STAT_DOT3STATSALIGNMENTERRORS 0x0000151c
+#define BCE_EMAC_RX_STAT_DOT3STATSCARRIERSENSEERRORS 0x00001520
+#define BCE_EMAC_RX_STAT_XONPAUSEFRAMESRECEIVED 0x00001524
+#define BCE_EMAC_RX_STAT_XOFFPAUSEFRAMESRECEIVED 0x00001528
+#define BCE_EMAC_RX_STAT_MACCONTROLFRAMESRECEIVED 0x0000152c
+#define BCE_EMAC_RX_STAT_XOFFSTATEENTERED 0x00001530
+#define BCE_EMAC_RX_STAT_DOT3STATSFRAMESTOOLONG 0x00001534
+#define BCE_EMAC_RX_STAT_ETHERSTATSJABBERS 0x00001538
+#define BCE_EMAC_RX_STAT_ETHERSTATSUNDERSIZEPKTS 0x0000153c
+#define BCE_EMAC_RX_STAT_ETHERSTATSPKTS64OCTETS 0x00001540
+#define BCE_EMAC_RX_STAT_ETHERSTATSPKTS65OCTETSTO127OCTETS 0x00001544
+#define BCE_EMAC_RX_STAT_ETHERSTATSPKTS128OCTETSTO255OCTETS 0x00001548
+#define BCE_EMAC_RX_STAT_ETHERSTATSPKTS256OCTETSTO511OCTETS 0x0000154c
+#define BCE_EMAC_RX_STAT_ETHERSTATSPKTS512OCTETSTO1023OCTETS 0x00001550
+#define BCE_EMAC_RX_STAT_ETHERSTATSPKTS1024OCTETSTO1522OCTETS 0x00001554
+#define BCE_EMAC_RX_STAT_ETHERSTATSPKTS1523OCTETSTO9022OCTETS 0x00001558
+#define BCE_EMAC_RXMAC_DEBUG0 0x0000155c
+#define BCE_EMAC_RXMAC_DEBUG1 0x00001560
+#define BCE_EMAC_RXMAC_DEBUG1_LENGTH_NE_BYTE_COUNT (1L<<0)
+#define BCE_EMAC_RXMAC_DEBUG1_LENGTH_OUT_RANGE (1L<<1)
+#define BCE_EMAC_RXMAC_DEBUG1_BAD_CRC (1L<<2)
+#define BCE_EMAC_RXMAC_DEBUG1_RX_ERROR (1L<<3)
+#define BCE_EMAC_RXMAC_DEBUG1_ALIGN_ERROR (1L<<4)
+#define BCE_EMAC_RXMAC_DEBUG1_LAST_DATA (1L<<5)
+#define BCE_EMAC_RXMAC_DEBUG1_ODD_BYTE_START (1L<<6)
+#define BCE_EMAC_RXMAC_DEBUG1_BYTE_COUNT (0xffffL<<7)
+#define BCE_EMAC_RXMAC_DEBUG1_SLOT_TIME (0xffL<<23)
+
+#define BCE_EMAC_RXMAC_DEBUG2 0x00001564
+#define BCE_EMAC_RXMAC_DEBUG2_SM_STATE (0x7L<<0)
+#define BCE_EMAC_RXMAC_DEBUG2_SM_STATE_IDLE (0x0L<<0)
+#define BCE_EMAC_RXMAC_DEBUG2_SM_STATE_SFD (0x1L<<0)
+#define BCE_EMAC_RXMAC_DEBUG2_SM_STATE_DATA (0x2L<<0)
+#define BCE_EMAC_RXMAC_DEBUG2_SM_STATE_SKEEP (0x3L<<0)
+#define BCE_EMAC_RXMAC_DEBUG2_SM_STATE_EXT (0x4L<<0)
+#define BCE_EMAC_RXMAC_DEBUG2_SM_STATE_DROP (0x5L<<0)
+#define BCE_EMAC_RXMAC_DEBUG2_SM_STATE_SDROP (0x6L<<0)
+#define BCE_EMAC_RXMAC_DEBUG2_SM_STATE_FC (0x7L<<0)
+#define BCE_EMAC_RXMAC_DEBUG2_IDI_STATE (0xfL<<3)
+#define BCE_EMAC_RXMAC_DEBUG2_IDI_STATE_IDLE (0x0L<<3)
+#define BCE_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA0 (0x1L<<3)
+#define BCE_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA1 (0x2L<<3)
+#define BCE_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA2 (0x3L<<3)
+#define BCE_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA3 (0x4L<<3)
+#define BCE_EMAC_RXMAC_DEBUG2_IDI_STATE_ABORT (0x5L<<3)
+#define BCE_EMAC_RXMAC_DEBUG2_IDI_STATE_WAIT (0x6L<<3)
+#define BCE_EMAC_RXMAC_DEBUG2_IDI_STATE_STATUS (0x7L<<3)
+#define BCE_EMAC_RXMAC_DEBUG2_IDI_STATE_LAST (0x8L<<3)
+#define BCE_EMAC_RXMAC_DEBUG2_BYTE_IN (0xffL<<7)
+#define BCE_EMAC_RXMAC_DEBUG2_FALSEC (1L<<15)
+#define BCE_EMAC_RXMAC_DEBUG2_TAGGED (1L<<16)
+#define BCE_EMAC_RXMAC_DEBUG2_PAUSE_STATE (1L<<18)
+#define BCE_EMAC_RXMAC_DEBUG2_PAUSE_STATE_IDLE (0L<<18)
+#define BCE_EMAC_RXMAC_DEBUG2_PAUSE_STATE_PAUSED (1L<<18)
+#define BCE_EMAC_RXMAC_DEBUG2_SE_COUNTER (0xfL<<19)
+#define BCE_EMAC_RXMAC_DEBUG2_QUANTA (0x1fL<<23)
+
+#define BCE_EMAC_RXMAC_DEBUG3 0x00001568
+#define BCE_EMAC_RXMAC_DEBUG3_PAUSE_CTR (0xffffL<<0)
+#define BCE_EMAC_RXMAC_DEBUG3_TMP_PAUSE_CTR (0xffffL<<16)
+
+#define BCE_EMAC_RXMAC_DEBUG4 0x0000156c
+#define BCE_EMAC_RXMAC_DEBUG4_TYPE_FIELD (0xffffL<<0)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE (0x3fL<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_IDLE (0x0L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_UMAC2 (0x1L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_UMAC3 (0x2L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_UNI (0x3L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_MMAC2 (0x7L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_MMAC3 (0x5L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA1 (0x6L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA2 (0x7L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA3 (0x8L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_MC2 (0x9L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_MC3 (0xaL<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_MWAIT1 (0xeL<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_MWAIT2 (0xfL<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_MCHECK (0x10L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_MC (0x11L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_BC2 (0x12L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_BC3 (0x13L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA1 (0x14L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA2 (0x15L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA3 (0x16L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_BTYPE (0x17L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_BC (0x18L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_PTYPE (0x19L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_CMD (0x1aL<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_MAC (0x1bL<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_LATCH (0x1cL<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_XOFF (0x1dL<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_XON (0x1eL<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_PAUSED (0x1fL<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_NPAUSED (0x20L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_TTYPE (0x21L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_TVAL (0x22L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_USA1 (0x23L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_USA2 (0x24L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_USA3 (0x25L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_UTYPE (0x26L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_UTTYPE (0x27L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_UTVAL (0x28L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_MTYPE (0x29L<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_FILT_STATE_DROP (0x2aL<<16)
+#define BCE_EMAC_RXMAC_DEBUG4_DROP_PKT (1L<<22)
+#define BCE_EMAC_RXMAC_DEBUG4_SLOT_FILLED (1L<<23)
+#define BCE_EMAC_RXMAC_DEBUG4_FALSE_CARRIER (1L<<24)
+#define BCE_EMAC_RXMAC_DEBUG4_LAST_DATA (1L<<25)
+#define BCE_EMAC_RXMAC_DEBUG4_sfd_FOUND (1L<<26)
+#define BCE_EMAC_RXMAC_DEBUG4_ADVANCE (1L<<27)
+#define BCE_EMAC_RXMAC_DEBUG4_START (1L<<28)
+
+#define BCE_EMAC_RXMAC_DEBUG5 0x00001570
+#define BCE_EMAC_RXMAC_DEBUG5_PS_IDISM (0x7L<<0)
+#define BCE_EMAC_RXMAC_DEBUG5_PS_IDISM_IDLE (0L<<0)
+#define BCE_EMAC_RXMAC_DEBUG5_PS_IDISM_WAIT_EOF (1L<<0)
+#define BCE_EMAC_RXMAC_DEBUG5_PS_IDISM_WAIT_STAT (2L<<0)
+#define BCE_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4FCRC (3L<<0)
+#define BCE_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4RDE (4L<<0)
+#define BCE_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4ALL (5L<<0)
+#define BCE_EMAC_RXMAC_DEBUG5_PS_IDISM_1WD_WAIT_STAT (6L<<0)
+#define BCE_EMAC_RXMAC_DEBUG5_CCODE_BUF1 (0x7L<<4)
+#define BCE_EMAC_RXMAC_DEBUG5_CCODE_BUF1_VDW (0x0L<<4)
+#define BCE_EMAC_RXMAC_DEBUG5_CCODE_BUF1_STAT (0x1L<<4)
+#define BCE_EMAC_RXMAC_DEBUG5_CCODE_BUF1_AEOF (0x2L<<4)
+#define BCE_EMAC_RXMAC_DEBUG5_CCODE_BUF1_NEOF (0x3L<<4)
+#define BCE_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SOF (0x4L<<4)
+#define BCE_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SAEOF (0x6L<<4)
+#define BCE_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SNEOF (0x7L<<4)
+#define BCE_EMAC_RXMAC_DEBUG5_EOF_DETECTED (1L<<7)
+#define BCE_EMAC_RXMAC_DEBUG5_CCODE_BUF0 (0x7L<<8)
+#define BCE_EMAC_RXMAC_DEBUG5_RPM_IDI_FIFO_FULL (1L<<11)
+#define BCE_EMAC_RXMAC_DEBUG5_LOAD_CCODE (1L<<12)
+#define BCE_EMAC_RXMAC_DEBUG5_LOAD_DATA (1L<<13)
+#define BCE_EMAC_RXMAC_DEBUG5_LOAD_STAT (1L<<14)
+#define BCE_EMAC_RXMAC_DEBUG5_CLR_STAT (1L<<15)
+#define BCE_EMAC_RXMAC_DEBUG5_IDI_RPM_CCODE (0x3L<<16)
+#define BCE_EMAC_RXMAC_DEBUG5_IDI_RPM_ACCEPT (1L<<19)
+#define BCE_EMAC_RXMAC_DEBUG5_FMLEN (0xfffL<<20)
+
+#define BCE_EMAC_RX_STAT_AC0 0x00001580
+#define BCE_EMAC_RX_STAT_AC1 0x00001584
+#define BCE_EMAC_RX_STAT_AC2 0x00001588
+#define BCE_EMAC_RX_STAT_AC3 0x0000158c
+#define BCE_EMAC_RX_STAT_AC4 0x00001590
+#define BCE_EMAC_RX_STAT_AC5 0x00001594
+#define BCE_EMAC_RX_STAT_AC6 0x00001598
+#define BCE_EMAC_RX_STAT_AC7 0x0000159c
+#define BCE_EMAC_RX_STAT_AC8 0x000015a0
+#define BCE_EMAC_RX_STAT_AC9 0x000015a4
+#define BCE_EMAC_RX_STAT_AC10 0x000015a8
+#define BCE_EMAC_RX_STAT_AC11 0x000015ac
+#define BCE_EMAC_RX_STAT_AC12 0x000015b0
+#define BCE_EMAC_RX_STAT_AC13 0x000015b4
+#define BCE_EMAC_RX_STAT_AC14 0x000015b8
+#define BCE_EMAC_RX_STAT_AC15 0x000015bc
+#define BCE_EMAC_RX_STAT_AC16 0x000015c0
+#define BCE_EMAC_RX_STAT_AC17 0x000015c4
+#define BCE_EMAC_RX_STAT_AC18 0x000015c8
+#define BCE_EMAC_RX_STAT_AC19 0x000015cc
+#define BCE_EMAC_RX_STAT_AC20 0x000015d0
+#define BCE_EMAC_RX_STAT_AC21 0x000015d4
+#define BCE_EMAC_RX_STAT_AC22 0x000015d8
+#define BCE_EMAC_RXMAC_SUC_DBG_OVERRUNVEC 0x000015dc
+#define BCE_EMAC_TX_STAT_IFHCOUTOCTETS 0x00001600
+#define BCE_EMAC_TX_STAT_IFHCOUTBADOCTETS 0x00001604
+#define BCE_EMAC_TX_STAT_ETHERSTATSCOLLISIONS 0x00001608
+#define BCE_EMAC_TX_STAT_OUTXONSENT 0x0000160c
+#define BCE_EMAC_TX_STAT_OUTXOFFSENT 0x00001610
+#define BCE_EMAC_TX_STAT_FLOWCONTROLDONE 0x00001614
+#define BCE_EMAC_TX_STAT_DOT3STATSSINGLECOLLISIONFRAMES 0x00001618
+#define BCE_EMAC_TX_STAT_DOT3STATSMULTIPLECOLLISIONFRAMES 0x0000161c
+#define BCE_EMAC_TX_STAT_DOT3STATSDEFERREDTRANSMISSIONS 0x00001620
+#define BCE_EMAC_TX_STAT_DOT3STATSEXCESSIVECOLLISIONS 0x00001624
+#define BCE_EMAC_TX_STAT_DOT3STATSLATECOLLISIONS 0x00001628
+#define BCE_EMAC_TX_STAT_IFHCOUTUCASTPKTS 0x0000162c
+#define BCE_EMAC_TX_STAT_IFHCOUTMULTICASTPKTS 0x00001630
+#define BCE_EMAC_TX_STAT_IFHCOUTBROADCASTPKTS 0x00001634
+#define BCE_EMAC_TX_STAT_ETHERSTATSPKTS64OCTETS 0x00001638
+#define BCE_EMAC_TX_STAT_ETHERSTATSPKTS65OCTETSTO127OCTETS 0x0000163c
+#define BCE_EMAC_TX_STAT_ETHERSTATSPKTS128OCTETSTO255OCTETS 0x00001640
+#define BCE_EMAC_TX_STAT_ETHERSTATSPKTS256OCTETSTO511OCTETS 0x00001644
+#define BCE_EMAC_TX_STAT_ETHERSTATSPKTS512OCTETSTO1023OCTETS 0x00001648
+#define BCE_EMAC_TX_STAT_ETHERSTATSPKTS1024OCTETSTO1522OCTETS 0x0000164c
+#define BCE_EMAC_TX_STAT_ETHERSTATSPKTS1523OCTETSTO9022OCTETS 0x00001650
+#define BCE_EMAC_TX_STAT_DOT3STATSINTERNALMACTRANSMITERRORS 0x00001654
+#define BCE_EMAC_TXMAC_DEBUG0 0x00001658
+#define BCE_EMAC_TXMAC_DEBUG1 0x0000165c
+#define BCE_EMAC_TXMAC_DEBUG1_ODI_STATE (0xfL<<0)
+#define BCE_EMAC_TXMAC_DEBUG1_ODI_STATE_IDLE (0x0L<<0)
+#define BCE_EMAC_TXMAC_DEBUG1_ODI_STATE_START0 (0x1L<<0)
+#define BCE_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA0 (0x4L<<0)
+#define BCE_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA1 (0x5L<<0)
+#define BCE_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA2 (0x6L<<0)
+#define BCE_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA3 (0x7L<<0)
+#define BCE_EMAC_TXMAC_DEBUG1_ODI_STATE_WAIT0 (0x8L<<0)
+#define BCE_EMAC_TXMAC_DEBUG1_ODI_STATE_WAIT1 (0x9L<<0)
+#define BCE_EMAC_TXMAC_DEBUG1_CRS_ENABLE (1L<<4)
+#define BCE_EMAC_TXMAC_DEBUG1_BAD_CRC (1L<<5)
+#define BCE_EMAC_TXMAC_DEBUG1_SE_COUNTER (0xfL<<6)
+#define BCE_EMAC_TXMAC_DEBUG1_SEND_PAUSE (1L<<10)
+#define BCE_EMAC_TXMAC_DEBUG1_LATE_COLLISION (1L<<11)
+#define BCE_EMAC_TXMAC_DEBUG1_MAX_DEFER (1L<<12)
+#define BCE_EMAC_TXMAC_DEBUG1_DEFERRED (1L<<13)
+#define BCE_EMAC_TXMAC_DEBUG1_ONE_BYTE (1L<<14)
+#define BCE_EMAC_TXMAC_DEBUG1_IPG_TIME (0xfL<<15)
+#define BCE_EMAC_TXMAC_DEBUG1_SLOT_TIME (0xffL<<19)
+
+#define BCE_EMAC_TXMAC_DEBUG2 0x00001660
+#define BCE_EMAC_TXMAC_DEBUG2_BACK_OFF (0x3ffL<<0)
+#define BCE_EMAC_TXMAC_DEBUG2_BYTE_COUNT (0xffffL<<10)
+#define BCE_EMAC_TXMAC_DEBUG2_COL_COUNT (0x1fL<<26)
+#define BCE_EMAC_TXMAC_DEBUG2_COL_BIT (1L<<31)
+
+#define BCE_EMAC_TXMAC_DEBUG3 0x00001664
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE (0xfL<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_IDLE (0x0L<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_PRE1 (0x1L<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_PRE2 (0x2L<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_SFD (0x3L<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_DATA (0x4L<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_CRC1 (0x5L<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_CRC2 (0x6L<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_EXT (0x7L<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_STATB (0x8L<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_STATG (0x9L<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_JAM (0xaL<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_EJAM (0xbL<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_BJAM (0xcL<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_SWAIT (0xdL<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_SM_STATE_BACKOFF (0xeL<<0)
+#define BCE_EMAC_TXMAC_DEBUG3_FILT_STATE (0x7L<<4)
+#define BCE_EMAC_TXMAC_DEBUG3_FILT_STATE_IDLE (0x0L<<4)
+#define BCE_EMAC_TXMAC_DEBUG3_FILT_STATE_WAIT (0x1L<<4)
+#define BCE_EMAC_TXMAC_DEBUG3_FILT_STATE_UNI (0x2L<<4)
+#define BCE_EMAC_TXMAC_DEBUG3_FILT_STATE_MC (0x3L<<4)
+#define BCE_EMAC_TXMAC_DEBUG3_FILT_STATE_BC2 (0x4L<<4)
+#define BCE_EMAC_TXMAC_DEBUG3_FILT_STATE_BC3 (0x5L<<4)
+#define BCE_EMAC_TXMAC_DEBUG3_FILT_STATE_BC (0x6L<<4)
+#define BCE_EMAC_TXMAC_DEBUG3_CRS_DONE (1L<<7)
+#define BCE_EMAC_TXMAC_DEBUG3_XOFF (1L<<8)
+#define BCE_EMAC_TXMAC_DEBUG3_SE_COUNTER (0xfL<<9)
+#define BCE_EMAC_TXMAC_DEBUG3_QUANTA_COUNTER (0x1fL<<13)
+
+#define BCE_EMAC_TXMAC_DEBUG4 0x00001668
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_COUNTER (0xffffL<<0)
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_STATE (0xfL<<16)
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_STATE_IDLE (0x0L<<16)
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA1 (0x2L<<16)
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA2 (0x3L<<16)
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA3 (0x6L<<16)
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC1 (0x7L<<16)
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC2 (0x5L<<16)
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC3 (0x4L<<16)
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_STATE_TYPE (0xcL<<16)
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CMD (0xeL<<16)
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_STATE_TIME (0xaL<<16)
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CRC1 (0x8L<<16)
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CRC2 (0x9L<<16)
+#define BCE_EMAC_TXMAC_DEBUG4_PAUSE_STATE_WAIT (0xdL<<16)
+#define BCE_EMAC_TXMAC_DEBUG4_STATS0_VALID (1L<<20)
+#define BCE_EMAC_TXMAC_DEBUG4_APPEND_CRC (1L<<21)
+#define BCE_EMAC_TXMAC_DEBUG4_SLOT_FILLED (1L<<22)
+#define BCE_EMAC_TXMAC_DEBUG4_MAX_DEFER (1L<<23)
+#define BCE_EMAC_TXMAC_DEBUG4_SEND_EXTEND (1L<<24)
+#define BCE_EMAC_TXMAC_DEBUG4_SEND_PADDING (1L<<25)
+#define BCE_EMAC_TXMAC_DEBUG4_EOF_LOC (1L<<26)
+#define BCE_EMAC_TXMAC_DEBUG4_COLLIDING (1L<<27)
+#define BCE_EMAC_TXMAC_DEBUG4_COL_IN (1L<<28)
+#define BCE_EMAC_TXMAC_DEBUG4_BURSTING (1L<<29)
+#define BCE_EMAC_TXMAC_DEBUG4_ADVANCE (1L<<30)
+#define BCE_EMAC_TXMAC_DEBUG4_GO (1L<<31)
+
+#define BCE_EMAC_TX_STAT_AC0 0x00001680
+#define BCE_EMAC_TX_STAT_AC1 0x00001684
+#define BCE_EMAC_TX_STAT_AC2 0x00001688
+#define BCE_EMAC_TX_STAT_AC3 0x0000168c
+#define BCE_EMAC_TX_STAT_AC4 0x00001690
+#define BCE_EMAC_TX_STAT_AC5 0x00001694
+#define BCE_EMAC_TX_STAT_AC6 0x00001698
+#define BCE_EMAC_TX_STAT_AC7 0x0000169c
+#define BCE_EMAC_TX_STAT_AC8 0x000016a0
+#define BCE_EMAC_TX_STAT_AC9 0x000016a4
+#define BCE_EMAC_TX_STAT_AC10 0x000016a8
+#define BCE_EMAC_TX_STAT_AC11 0x000016ac
+#define BCE_EMAC_TX_STAT_AC12 0x000016b0
+#define BCE_EMAC_TX_STAT_AC13 0x000016b4
+#define BCE_EMAC_TX_STAT_AC14 0x000016b8
+#define BCE_EMAC_TX_STAT_AC15 0x000016bc
+#define BCE_EMAC_TX_STAT_AC16 0x000016c0
+#define BCE_EMAC_TX_STAT_AC17 0x000016c4
+#define BCE_EMAC_TX_STAT_AC18 0x000016c8
+#define BCE_EMAC_TX_STAT_AC19 0x000016cc
+#define BCE_EMAC_TX_STAT_AC20 0x000016d0
+#define BCE_EMAC_TX_STAT_AC21 0x000016d4
+#define BCE_EMAC_TXMAC_SUC_DBG_OVERRUNVEC 0x000016d8
+
+
+/*
+ * rpm_reg definition
+ * offset: 0x1800
+ */
+#define BCE_RPM_COMMAND 0x00001800
+#define BCE_RPM_COMMAND_ENABLED (1L<<0)
+#define BCE_RPM_COMMAND_OVERRUN_ABORT (1L<<4)
+
+#define BCE_RPM_STATUS 0x00001804
+#define BCE_RPM_STATUS_MBUF_WAIT (1L<<0)
+#define BCE_RPM_STATUS_FREE_WAIT (1L<<1)
+
+#define BCE_RPM_CONFIG 0x00001808
+#define BCE_RPM_CONFIG_NO_PSD_HDR_CKSUM (1L<<0)
+#define BCE_RPM_CONFIG_ACPI_ENA (1L<<1)
+#define BCE_RPM_CONFIG_ACPI_KEEP (1L<<2)
+#define BCE_RPM_CONFIG_MP_KEEP (1L<<3)
+#define BCE_RPM_CONFIG_SORT_VECT_VAL (0xfL<<4)
+#define BCE_RPM_CONFIG_IGNORE_VLAN (1L<<31)
+
+#define BCE_RPM_VLAN_MATCH0 0x00001810
+#define BCE_RPM_VLAN_MATCH0_RPM_VLAN_MTCH0_VALUE (0xfffL<<0)
+
+#define BCE_RPM_VLAN_MATCH1 0x00001814
+#define BCE_RPM_VLAN_MATCH1_RPM_VLAN_MTCH1_VALUE (0xfffL<<0)
+
+#define BCE_RPM_VLAN_MATCH2 0x00001818
+#define BCE_RPM_VLAN_MATCH2_RPM_VLAN_MTCH2_VALUE (0xfffL<<0)
+
+#define BCE_RPM_VLAN_MATCH3 0x0000181c
+#define BCE_RPM_VLAN_MATCH3_RPM_VLAN_MTCH3_VALUE (0xfffL<<0)
+
+#define BCE_RPM_SORT_USER0 0x00001820
+#define BCE_RPM_SORT_USER0_PM_EN (0xffffL<<0)
+#define BCE_RPM_SORT_USER0_BC_EN (1L<<16)
+#define BCE_RPM_SORT_USER0_MC_EN (1L<<17)
+#define BCE_RPM_SORT_USER0_MC_HSH_EN (1L<<18)
+#define BCE_RPM_SORT_USER0_PROM_EN (1L<<19)
+#define BCE_RPM_SORT_USER0_VLAN_EN (0xfL<<20)
+#define BCE_RPM_SORT_USER0_PROM_VLAN (1L<<24)
+#define BCE_RPM_SORT_USER0_ENA (1L<<31)
+
+#define BCE_RPM_SORT_USER1 0x00001824
+#define BCE_RPM_SORT_USER1_PM_EN (0xffffL<<0)
+#define BCE_RPM_SORT_USER1_BC_EN (1L<<16)
+#define BCE_RPM_SORT_USER1_MC_EN (1L<<17)
+#define BCE_RPM_SORT_USER1_MC_HSH_EN (1L<<18)
+#define BCE_RPM_SORT_USER1_PROM_EN (1L<<19)
+#define BCE_RPM_SORT_USER1_VLAN_EN (0xfL<<20)
+#define BCE_RPM_SORT_USER1_PROM_VLAN (1L<<24)
+#define BCE_RPM_SORT_USER1_ENA (1L<<31)
+
+#define BCE_RPM_SORT_USER2 0x00001828
+#define BCE_RPM_SORT_USER2_PM_EN (0xffffL<<0)
+#define BCE_RPM_SORT_USER2_BC_EN (1L<<16)
+#define BCE_RPM_SORT_USER2_MC_EN (1L<<17)
+#define BCE_RPM_SORT_USER2_MC_HSH_EN (1L<<18)
+#define BCE_RPM_SORT_USER2_PROM_EN (1L<<19)
+#define BCE_RPM_SORT_USER2_VLAN_EN (0xfL<<20)
+#define BCE_RPM_SORT_USER2_PROM_VLAN (1L<<24)
+#define BCE_RPM_SORT_USER2_ENA (1L<<31)
+
+#define BCE_RPM_SORT_USER3 0x0000182c
+#define BCE_RPM_SORT_USER3_PM_EN (0xffffL<<0)
+#define BCE_RPM_SORT_USER3_BC_EN (1L<<16)
+#define BCE_RPM_SORT_USER3_MC_EN (1L<<17)
+#define BCE_RPM_SORT_USER3_MC_HSH_EN (1L<<18)
+#define BCE_RPM_SORT_USER3_PROM_EN (1L<<19)
+#define BCE_RPM_SORT_USER3_VLAN_EN (0xfL<<20)
+#define BCE_RPM_SORT_USER3_PROM_VLAN (1L<<24)
+#define BCE_RPM_SORT_USER3_ENA (1L<<31)
+
+#define BCE_RPM_STAT_L2_FILTER_DISCARDS 0x00001840
+#define BCE_RPM_STAT_RULE_CHECKER_DISCARDS 0x00001844
+#define BCE_RPM_STAT_IFINFTQDISCARDS 0x00001848
+#define BCE_RPM_STAT_IFINMBUFDISCARD 0x0000184c
+#define BCE_RPM_STAT_RULE_CHECKER_P4_HIT 0x00001850
+#define BCE_RPM_STAT_AC0 0x00001880
+#define BCE_RPM_STAT_AC1 0x00001884
+#define BCE_RPM_STAT_AC2 0x00001888
+#define BCE_RPM_STAT_AC3 0x0000188c
+#define BCE_RPM_STAT_AC4 0x00001890
+#define BCE_RPM_RC_CNTL_0 0x00001900
+#define BCE_RPM_RC_CNTL_0_OFFSET (0xffL<<0)
+#define BCE_RPM_RC_CNTL_0_CLASS (0x7L<<8)
+#define BCE_RPM_RC_CNTL_0_PRIORITY (1L<<11)
+#define BCE_RPM_RC_CNTL_0_P4 (1L<<12)
+#define BCE_RPM_RC_CNTL_0_HDR_TYPE (0x7L<<13)
+#define BCE_RPM_RC_CNTL_0_HDR_TYPE_START (0L<<13)
+#define BCE_RPM_RC_CNTL_0_HDR_TYPE_IP (1L<<13)
+#define BCE_RPM_RC_CNTL_0_HDR_TYPE_TCP (2L<<13)
+#define BCE_RPM_RC_CNTL_0_HDR_TYPE_UDP (3L<<13)
+#define BCE_RPM_RC_CNTL_0_HDR_TYPE_DATA (4L<<13)
+#define BCE_RPM_RC_CNTL_0_COMP (0x3L<<16)
+#define BCE_RPM_RC_CNTL_0_COMP_EQUAL (0L<<16)
+#define BCE_RPM_RC_CNTL_0_COMP_NEQUAL (1L<<16)
+#define BCE_RPM_RC_CNTL_0_COMP_GREATER (2L<<16)
+#define BCE_RPM_RC_CNTL_0_COMP_LESS (3L<<16)
+#define BCE_RPM_RC_CNTL_0_SBIT (1L<<19)
+#define BCE_RPM_RC_CNTL_0_CMDSEL (0xfL<<20)
+#define BCE_RPM_RC_CNTL_0_MAP (1L<<24)
+#define BCE_RPM_RC_CNTL_0_DISCARD (1L<<25)
+#define BCE_RPM_RC_CNTL_0_MASK (1L<<26)
+#define BCE_RPM_RC_CNTL_0_P1 (1L<<27)
+#define BCE_RPM_RC_CNTL_0_P2 (1L<<28)
+#define BCE_RPM_RC_CNTL_0_P3 (1L<<29)
+#define BCE_RPM_RC_CNTL_0_NBIT (1L<<30)
+
+#define BCE_RPM_RC_VALUE_MASK_0 0x00001904
+#define BCE_RPM_RC_VALUE_MASK_0_VALUE (0xffffL<<0)
+#define BCE_RPM_RC_VALUE_MASK_0_MASK (0xffffL<<16)
+
+#define BCE_RPM_RC_CNTL_1 0x00001908
+#define BCE_RPM_RC_CNTL_1_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_1_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_1 0x0000190c
+#define BCE_RPM_RC_CNTL_2 0x00001910
+#define BCE_RPM_RC_CNTL_2_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_2_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_2 0x00001914
+#define BCE_RPM_RC_CNTL_3 0x00001918
+#define BCE_RPM_RC_CNTL_3_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_3_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_3 0x0000191c
+#define BCE_RPM_RC_CNTL_4 0x00001920
+#define BCE_RPM_RC_CNTL_4_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_4_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_4 0x00001924
+#define BCE_RPM_RC_CNTL_5 0x00001928
+#define BCE_RPM_RC_CNTL_5_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_5_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_5 0x0000192c
+#define BCE_RPM_RC_CNTL_6 0x00001930
+#define BCE_RPM_RC_CNTL_6_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_6_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_6 0x00001934
+#define BCE_RPM_RC_CNTL_7 0x00001938
+#define BCE_RPM_RC_CNTL_7_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_7_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_7 0x0000193c
+#define BCE_RPM_RC_CNTL_8 0x00001940
+#define BCE_RPM_RC_CNTL_8_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_8_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_8 0x00001944
+#define BCE_RPM_RC_CNTL_9 0x00001948
+#define BCE_RPM_RC_CNTL_9_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_9_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_9 0x0000194c
+#define BCE_RPM_RC_CNTL_10 0x00001950
+#define BCE_RPM_RC_CNTL_10_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_10_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_10 0x00001954
+#define BCE_RPM_RC_CNTL_11 0x00001958
+#define BCE_RPM_RC_CNTL_11_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_11_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_11 0x0000195c
+#define BCE_RPM_RC_CNTL_12 0x00001960
+#define BCE_RPM_RC_CNTL_12_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_12_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_12 0x00001964
+#define BCE_RPM_RC_CNTL_13 0x00001968
+#define BCE_RPM_RC_CNTL_13_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_13_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_13 0x0000196c
+#define BCE_RPM_RC_CNTL_14 0x00001970
+#define BCE_RPM_RC_CNTL_14_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_14_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_14 0x00001974
+#define BCE_RPM_RC_CNTL_15 0x00001978
+#define BCE_RPM_RC_CNTL_15_A (0x3ffffL<<0)
+#define BCE_RPM_RC_CNTL_15_B (0xfffL<<19)
+
+#define BCE_RPM_RC_VALUE_MASK_15 0x0000197c
+#define BCE_RPM_RC_CONFIG 0x00001980
+#define BCE_RPM_RC_CONFIG_RULE_ENABLE (0xffffL<<0)
+#define BCE_RPM_RC_CONFIG_DEF_CLASS (0x7L<<24)
+
+#define BCE_RPM_DEBUG0 0x00001984
+#define BCE_RPM_DEBUG0_FM_BCNT (0xffffL<<0)
+#define BCE_RPM_DEBUG0_T_DATA_OFST_VLD (1L<<16)
+#define BCE_RPM_DEBUG0_T_UDP_OFST_VLD (1L<<17)
+#define BCE_RPM_DEBUG0_T_TCP_OFST_VLD (1L<<18)
+#define BCE_RPM_DEBUG0_T_IP_OFST_VLD (1L<<19)
+#define BCE_RPM_DEBUG0_IP_MORE_FRGMT (1L<<20)
+#define BCE_RPM_DEBUG0_T_IP_NO_TCP_UDP_HDR (1L<<21)
+#define BCE_RPM_DEBUG0_LLC_SNAP (1L<<22)
+#define BCE_RPM_DEBUG0_FM_STARTED (1L<<23)
+#define BCE_RPM_DEBUG0_DONE (1L<<24)
+#define BCE_RPM_DEBUG0_WAIT_4_DONE (1L<<25)
+#define BCE_RPM_DEBUG0_USE_TPBUF_CKSUM (1L<<26)
+#define BCE_RPM_DEBUG0_RX_NO_PSD_HDR_CKSUM (1L<<27)
+#define BCE_RPM_DEBUG0_IGNORE_VLAN (1L<<28)
+#define BCE_RPM_DEBUG0_RP_ENA_ACTIVE (1L<<31)
+
+#define BCE_RPM_DEBUG1 0x00001988
+#define BCE_RPM_DEBUG1_FSM_CUR_ST (0xffffL<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_IDLE (0L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B6_ALL (1L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B2_IPLLC (2L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B6_IP (4L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B2_IP (8L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_IP_START (16L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_IP (32L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_TCP (64L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_UDP (128L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_AH (256L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_ESP (512L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_ESP_PAYLOAD (1024L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_DATA (2048L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_ADD_CARRY (0x2000L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_ADD_CARRYOUT (0x4000L<<0)
+#define BCE_RPM_DEBUG1_FSM_CUR_ST_LATCH_RESULT (0x8000L<<0)
+#define BCE_RPM_DEBUG1_HDR_BCNT (0x7ffL<<16)
+#define BCE_RPM_DEBUG1_UNKNOWN_ETYPE_D (1L<<28)
+#define BCE_RPM_DEBUG1_VLAN_REMOVED_D2 (1L<<29)
+#define BCE_RPM_DEBUG1_VLAN_REMOVED_D1 (1L<<30)
+#define BCE_RPM_DEBUG1_EOF_0XTRA_WD (1L<<31)
+
+#define BCE_RPM_DEBUG2 0x0000198c
+#define BCE_RPM_DEBUG2_CMD_HIT_VEC (0xffffL<<0)
+#define BCE_RPM_DEBUG2_IP_BCNT (0xffL<<16)
+#define BCE_RPM_DEBUG2_THIS_CMD_M4 (1L<<24)
+#define BCE_RPM_DEBUG2_THIS_CMD_M3 (1L<<25)
+#define BCE_RPM_DEBUG2_THIS_CMD_M2 (1L<<26)
+#define BCE_RPM_DEBUG2_THIS_CMD_M1 (1L<<27)
+#define BCE_RPM_DEBUG2_IPIPE_EMPTY (1L<<28)
+#define BCE_RPM_DEBUG2_FM_DISCARD (1L<<29)
+#define BCE_RPM_DEBUG2_LAST_RULE_IN_FM_D2 (1L<<30)
+#define BCE_RPM_DEBUG2_LAST_RULE_IN_FM_D1 (1L<<31)
+
+#define BCE_RPM_DEBUG3 0x00001990
+#define BCE_RPM_DEBUG3_AVAIL_MBUF_PTR (0x1ffL<<0)
+#define BCE_RPM_DEBUG3_RDE_RLUPQ_WR_REQ_INT (1L<<9)
+#define BCE_RPM_DEBUG3_RDE_RBUF_WR_LAST_INT (1L<<10)
+#define BCE_RPM_DEBUG3_RDE_RBUF_WR_REQ_INT (1L<<11)
+#define BCE_RPM_DEBUG3_RDE_RBUF_FREE_REQ (1L<<12)
+#define BCE_RPM_DEBUG3_RDE_RBUF_ALLOC_REQ (1L<<13)
+#define BCE_RPM_DEBUG3_DFSM_MBUF_NOTAVAIL (1L<<14)
+#define BCE_RPM_DEBUG3_RBUF_RDE_SOF_DROP (1L<<15)
+#define BCE_RPM_DEBUG3_DFIFO_VLD_ENTRY_CT (0xfL<<16)
+#define BCE_RPM_DEBUG3_RDE_SRC_FIFO_ALMFULL (1L<<21)
+#define BCE_RPM_DEBUG3_DROP_NXT_VLD (1L<<22)
+#define BCE_RPM_DEBUG3_DROP_NXT (1L<<23)
+#define BCE_RPM_DEBUG3_FTQ_FSM (0x3L<<24)
+#define BCE_RPM_DEBUG3_FTQ_FSM_IDLE (0x0L<<24)
+#define BCE_RPM_DEBUG3_FTQ_FSM_WAIT_ACK (0x1L<<24)
+#define BCE_RPM_DEBUG3_FTQ_FSM_WAIT_FREE (0x2L<<24)
+#define BCE_RPM_DEBUG3_MBWRITE_FSM (0x3L<<26)
+#define BCE_RPM_DEBUG3_MBWRITE_FSM_WAIT_SOF (0x0L<<26)
+#define BCE_RPM_DEBUG3_MBWRITE_FSM_GET_MBUF (0x1L<<26)
+#define BCE_RPM_DEBUG3_MBWRITE_FSM_DMA_DATA (0x2L<<26)
+#define BCE_RPM_DEBUG3_MBWRITE_FSM_WAIT_DATA (0x3L<<26)
+#define BCE_RPM_DEBUG3_MBWRITE_FSM_WAIT_EOF (0x4L<<26)
+#define BCE_RPM_DEBUG3_MBWRITE_FSM_WAIT_MF_ACK (0x5L<<26)
+#define BCE_RPM_DEBUG3_MBWRITE_FSM_WAIT_DROP_NXT_VLD (0x6L<<26)
+#define BCE_RPM_DEBUG3_MBWRITE_FSM_DONE (0x7L<<26)
+#define BCE_RPM_DEBUG3_MBFREE_FSM (1L<<29)
+#define BCE_RPM_DEBUG3_MBFREE_FSM_IDLE (0L<<29)
+#define BCE_RPM_DEBUG3_MBFREE_FSM_WAIT_ACK (1L<<29)
+#define BCE_RPM_DEBUG3_MBALLOC_FSM (1L<<30)
+#define BCE_RPM_DEBUG3_MBALLOC_FSM_ET_MBUF (0x0L<<30)
+#define BCE_RPM_DEBUG3_MBALLOC_FSM_IVE_MBUF (0x1L<<30)
+#define BCE_RPM_DEBUG3_CCODE_EOF_ERROR (1L<<31)
+
+#define BCE_RPM_DEBUG4 0x00001994
+#define BCE_RPM_DEBUG4_DFSM_MBUF_CLUSTER (0x1ffffffL<<0)
+#define BCE_RPM_DEBUG4_DFIFO_CUR_CCODE (0x7L<<25)
+#define BCE_RPM_DEBUG4_MBWRITE_FSM (0x7L<<28)
+#define BCE_RPM_DEBUG4_DFIFO_EMPTY (1L<<31)
+
+#define BCE_RPM_DEBUG5 0x00001998
+#define BCE_RPM_DEBUG5_RDROP_WPTR (0x1fL<<0)
+#define BCE_RPM_DEBUG5_RDROP_ACPI_RPTR (0x1fL<<5)
+#define BCE_RPM_DEBUG5_RDROP_MC_RPTR (0x1fL<<10)
+#define BCE_RPM_DEBUG5_RDROP_RC_RPTR (0x1fL<<15)
+#define BCE_RPM_DEBUG5_RDROP_ACPI_EMPTY (1L<<20)
+#define BCE_RPM_DEBUG5_RDROP_MC_EMPTY (1L<<21)
+#define BCE_RPM_DEBUG5_RDROP_AEOF_VEC_AT_RDROP_MC_RPTR (1L<<22)
+#define BCE_RPM_DEBUG5_HOLDREG_WOL_DROP_INT (1L<<23)
+#define BCE_RPM_DEBUG5_HOLDREG_DISCARD (1L<<24)
+#define BCE_RPM_DEBUG5_HOLDREG_MBUF_NOTAVAIL (1L<<25)
+#define BCE_RPM_DEBUG5_HOLDREG_MC_EMPTY (1L<<26)
+#define BCE_RPM_DEBUG5_HOLDREG_RC_EMPTY (1L<<27)
+#define BCE_RPM_DEBUG5_HOLDREG_FC_EMPTY (1L<<28)
+#define BCE_RPM_DEBUG5_HOLDREG_ACPI_EMPTY (1L<<29)
+#define BCE_RPM_DEBUG5_HOLDREG_FULL_T (1L<<30)
+#define BCE_RPM_DEBUG5_HOLDREG_RD (1L<<31)
+
+#define BCE_RPM_DEBUG6 0x0000199c
+#define BCE_RPM_DEBUG6_ACPI_VEC (0xffffL<<0)
+#define BCE_RPM_DEBUG6_VEC (0xffffL<<16)
+
+#define BCE_RPM_DEBUG7 0x000019a0
+#define BCE_RPM_DEBUG7_RPM_DBG7_LAST_CRC (0xffffffffL<<0)
+
+#define BCE_RPM_DEBUG8 0x000019a4
+#define BCE_RPM_DEBUG8_PS_ACPI_FSM (0xfL<<0)
+#define BCE_RPM_DEBUG8_PS_ACPI_FSM_IDLE (0L<<0)
+#define BCE_RPM_DEBUG8_PS_ACPI_FSM_SOF_W1_ADDR (1L<<0)
+#define BCE_RPM_DEBUG8_PS_ACPI_FSM_SOF_W2_ADDR (2L<<0)
+#define BCE_RPM_DEBUG8_PS_ACPI_FSM_SOF_W3_ADDR (3L<<0)
+#define BCE_RPM_DEBUG8_PS_ACPI_FSM_SOF_WAIT_THBUF (4L<<0)
+#define BCE_RPM_DEBUG8_PS_ACPI_FSM_W3_DATA (5L<<0)
+#define BCE_RPM_DEBUG8_PS_ACPI_FSM_W0_ADDR (6L<<0)
+#define BCE_RPM_DEBUG8_PS_ACPI_FSM_W1_ADDR (7L<<0)
+#define BCE_RPM_DEBUG8_PS_ACPI_FSM_W2_ADDR (8L<<0)
+#define BCE_RPM_DEBUG8_PS_ACPI_FSM_W3_ADDR (9L<<0)
+#define BCE_RPM_DEBUG8_PS_ACPI_FSM_WAIT_THBUF (10L<<0)
+#define BCE_RPM_DEBUG8_COMPARE_AT_W0 (1L<<4)
+#define BCE_RPM_DEBUG8_COMPARE_AT_W3_DATA (1L<<5)
+#define BCE_RPM_DEBUG8_COMPARE_AT_SOF_WAIT (1L<<6)
+#define BCE_RPM_DEBUG8_COMPARE_AT_SOF_W3 (1L<<7)
+#define BCE_RPM_DEBUG8_COMPARE_AT_SOF_W2 (1L<<8)
+#define BCE_RPM_DEBUG8_EOF_W_LTEQ6_VLDBYTES (1L<<9)
+#define BCE_RPM_DEBUG8_EOF_W_LTEQ4_VLDBYTES (1L<<10)
+#define BCE_RPM_DEBUG8_NXT_EOF_W_12_VLDBYTES (1L<<11)
+#define BCE_RPM_DEBUG8_EOF_DET (1L<<12)
+#define BCE_RPM_DEBUG8_SOF_DET (1L<<13)
+#define BCE_RPM_DEBUG8_WAIT_4_SOF (1L<<14)
+#define BCE_RPM_DEBUG8_ALL_DONE (1L<<15)
+#define BCE_RPM_DEBUG8_THBUF_ADDR (0x7fL<<16)
+#define BCE_RPM_DEBUG8_BYTE_CTR (0xffL<<24)
+
+#define BCE_RPM_DEBUG9 0x000019a8
+#define BCE_RPM_DEBUG9_OUTFIFO_COUNT (0x7L<<0)
+#define BCE_RPM_DEBUG9_RDE_ACPI_RDY (1L<<3)
+#define BCE_RPM_DEBUG9_VLD_RD_ENTRY_CT (0x7L<<4)
+#define BCE_RPM_DEBUG9_OUTFIFO_OVERRUN_OCCURRED (1L<<28)
+#define BCE_RPM_DEBUG9_INFIFO_OVERRUN_OCCURRED (1L<<29)
+#define BCE_RPM_DEBUG9_ACPI_MATCH_INT (1L<<30)
+#define BCE_RPM_DEBUG9_ACPI_ENABLE_SYN (1L<<31)
+
+#define BCE_RPM_ACPI_DBG_BUF_W00 0x000019c0
+#define BCE_RPM_ACPI_DBG_BUF_W01 0x000019c4
+#define BCE_RPM_ACPI_DBG_BUF_W02 0x000019c8
+#define BCE_RPM_ACPI_DBG_BUF_W03 0x000019cc
+#define BCE_RPM_ACPI_DBG_BUF_W10 0x000019d0
+#define BCE_RPM_ACPI_DBG_BUF_W11 0x000019d4
+#define BCE_RPM_ACPI_DBG_BUF_W12 0x000019d8
+#define BCE_RPM_ACPI_DBG_BUF_W13 0x000019dc
+#define BCE_RPM_ACPI_DBG_BUF_W20 0x000019e0
+#define BCE_RPM_ACPI_DBG_BUF_W21 0x000019e4
+#define BCE_RPM_ACPI_DBG_BUF_W22 0x000019e8
+#define BCE_RPM_ACPI_DBG_BUF_W23 0x000019ec
+#define BCE_RPM_ACPI_DBG_BUF_W30 0x000019f0
+#define BCE_RPM_ACPI_DBG_BUF_W31 0x000019f4
+#define BCE_RPM_ACPI_DBG_BUF_W32 0x000019f8
+#define BCE_RPM_ACPI_DBG_BUF_W33 0x000019fc
+
+
+/*
+ * rbuf_reg definition
+ * offset: 0x200000
+ */
+#define BCE_RBUF_COMMAND 0x00200000
+#define BCE_RBUF_COMMAND_ENABLED (1L<<0)
+#define BCE_RBUF_COMMAND_FREE_INIT (1L<<1)
+#define BCE_RBUF_COMMAND_RAM_INIT (1L<<2)
+#define BCE_RBUF_COMMAND_OVER_FREE (1L<<4)
+#define BCE_RBUF_COMMAND_ALLOC_REQ (1L<<5)
+
+#define BCE_RBUF_STATUS1 0x00200004
+#define BCE_RBUF_STATUS1_FREE_COUNT (0x3ffL<<0)
+
+#define BCE_RBUF_STATUS2 0x00200008
+#define BCE_RBUF_STATUS2_FREE_TAIL (0x3ffL<<0)
+#define BCE_RBUF_STATUS2_FREE_HEAD (0x3ffL<<16)
+
+#define BCE_RBUF_CONFIG 0x0020000c
+#define BCE_RBUF_CONFIG_XOFF_TRIP (0x3ffL<<0)
+#define BCE_RBUF_CONFIG_XON_TRIP (0x3ffL<<16)
+
+#define BCE_RBUF_FW_BUF_ALLOC 0x00200010
+#define BCE_RBUF_FW_BUF_ALLOC_VALUE (0x1ffL<<7)
+
+#define BCE_RBUF_FW_BUF_FREE 0x00200014
+#define BCE_RBUF_FW_BUF_FREE_COUNT (0x7fL<<0)
+#define BCE_RBUF_FW_BUF_FREE_TAIL (0x1ffL<<7)
+#define BCE_RBUF_FW_BUF_FREE_HEAD (0x1ffL<<16)
+
+#define BCE_RBUF_FW_BUF_SEL 0x00200018
+#define BCE_RBUF_FW_BUF_SEL_COUNT (0x7fL<<0)
+#define BCE_RBUF_FW_BUF_SEL_TAIL (0x1ffL<<7)
+#define BCE_RBUF_FW_BUF_SEL_HEAD (0x1ffL<<16)
+
+#define BCE_RBUF_CONFIG2 0x0020001c
+#define BCE_RBUF_CONFIG2_MAC_DROP_TRIP (0x3ffL<<0)
+#define BCE_RBUF_CONFIG2_MAC_KEEP_TRIP (0x3ffL<<16)
+
+#define BCE_RBUF_CONFIG3 0x00200020
+#define BCE_RBUF_CONFIG3_CU_DROP_TRIP (0x3ffL<<0)
+#define BCE_RBUF_CONFIG3_CU_KEEP_TRIP (0x3ffL<<16)
+
+#define BCE_RBUF_PKT_DATA 0x00208000
+#define BCE_RBUF_CLIST_DATA 0x00210000
+#define BCE_RBUF_BUF_DATA 0x00220000
+
+
+/*
+ * rv2p_reg definition
+ * offset: 0x2800
+ */
+#define BCE_RV2P_COMMAND 0x00002800
+#define BCE_RV2P_COMMAND_ENABLED (1L<<0)
+#define BCE_RV2P_COMMAND_PROC1_INTRPT (1L<<1)
+#define BCE_RV2P_COMMAND_PROC2_INTRPT (1L<<2)
+#define BCE_RV2P_COMMAND_ABORT0 (1L<<4)
+#define BCE_RV2P_COMMAND_ABORT1 (1L<<5)
+#define BCE_RV2P_COMMAND_ABORT2 (1L<<6)
+#define BCE_RV2P_COMMAND_ABORT3 (1L<<7)
+#define BCE_RV2P_COMMAND_ABORT4 (1L<<8)
+#define BCE_RV2P_COMMAND_ABORT5 (1L<<9)
+#define BCE_RV2P_COMMAND_PROC1_RESET (1L<<16)
+#define BCE_RV2P_COMMAND_PROC2_RESET (1L<<17)
+#define BCE_RV2P_COMMAND_CTXIF_RESET (1L<<18)
+
+#define BCE_RV2P_STATUS 0x00002804
+#define BCE_RV2P_STATUS_ALWAYS_0 (1L<<0)
+#define BCE_RV2P_STATUS_RV2P_GEN_STAT0_CNT (1L<<8)
+#define BCE_RV2P_STATUS_RV2P_GEN_STAT1_CNT (1L<<9)
+#define BCE_RV2P_STATUS_RV2P_GEN_STAT2_CNT (1L<<10)
+#define BCE_RV2P_STATUS_RV2P_GEN_STAT3_CNT (1L<<11)
+#define BCE_RV2P_STATUS_RV2P_GEN_STAT4_CNT (1L<<12)
+#define BCE_RV2P_STATUS_RV2P_GEN_STAT5_CNT (1L<<13)
+
+#define BCE_RV2P_CONFIG 0x00002808
+#define BCE_RV2P_CONFIG_STALL_PROC1 (1L<<0)
+#define BCE_RV2P_CONFIG_STALL_PROC2 (1L<<1)
+#define BCE_RV2P_CONFIG_PROC1_STALL_ON_ABORT0 (1L<<8)
+#define BCE_RV2P_CONFIG_PROC1_STALL_ON_ABORT1 (1L<<9)
+#define BCE_RV2P_CONFIG_PROC1_STALL_ON_ABORT2 (1L<<10)
+#define BCE_RV2P_CONFIG_PROC1_STALL_ON_ABORT3 (1L<<11)
+#define BCE_RV2P_CONFIG_PROC1_STALL_ON_ABORT4 (1L<<12)
+#define BCE_RV2P_CONFIG_PROC1_STALL_ON_ABORT5 (1L<<13)
+#define BCE_RV2P_CONFIG_PROC2_STALL_ON_ABORT0 (1L<<16)
+#define BCE_RV2P_CONFIG_PROC2_STALL_ON_ABORT1 (1L<<17)
+#define BCE_RV2P_CONFIG_PROC2_STALL_ON_ABORT2 (1L<<18)
+#define BCE_RV2P_CONFIG_PROC2_STALL_ON_ABORT3 (1L<<19)
+#define BCE_RV2P_CONFIG_PROC2_STALL_ON_ABORT4 (1L<<20)
+#define BCE_RV2P_CONFIG_PROC2_STALL_ON_ABORT5 (1L<<21)
+#define BCE_RV2P_CONFIG_PAGE_SIZE (0xfL<<24)
+#define BCE_RV2P_CONFIG_PAGE_SIZE_256 (0L<<24)
+#define BCE_RV2P_CONFIG_PAGE_SIZE_512 (1L<<24)
+#define BCE_RV2P_CONFIG_PAGE_SIZE_1K (2L<<24)
+#define BCE_RV2P_CONFIG_PAGE_SIZE_2K (3L<<24)
+#define BCE_RV2P_CONFIG_PAGE_SIZE_4K (4L<<24)
+#define BCE_RV2P_CONFIG_PAGE_SIZE_8K (5L<<24)
+#define BCE_RV2P_CONFIG_PAGE_SIZE_16K (6L<<24)
+#define BCE_RV2P_CONFIG_PAGE_SIZE_32K (7L<<24)
+#define BCE_RV2P_CONFIG_PAGE_SIZE_64K (8L<<24)
+#define BCE_RV2P_CONFIG_PAGE_SIZE_128K (9L<<24)
+#define BCE_RV2P_CONFIG_PAGE_SIZE_256K (10L<<24)
+#define BCE_RV2P_CONFIG_PAGE_SIZE_512K (11L<<24)
+#define BCE_RV2P_CONFIG_PAGE_SIZE_1M (12L<<24)
+
+#define BCE_RV2P_GEN_BFR_ADDR_0 0x00002810
+#define BCE_RV2P_GEN_BFR_ADDR_0_VALUE (0xffffL<<16)
+
+#define BCE_RV2P_GEN_BFR_ADDR_1 0x00002814
+#define BCE_RV2P_GEN_BFR_ADDR_1_VALUE (0xffffL<<16)
+
+#define BCE_RV2P_GEN_BFR_ADDR_2 0x00002818
+#define BCE_RV2P_GEN_BFR_ADDR_2_VALUE (0xffffL<<16)
+
+#define BCE_RV2P_GEN_BFR_ADDR_3 0x0000281c
+#define BCE_RV2P_GEN_BFR_ADDR_3_VALUE (0xffffL<<16)
+
+#define BCE_RV2P_INSTR_HIGH 0x00002830
+#define BCE_RV2P_INSTR_HIGH_HIGH (0x1fL<<0)
+
+#define BCE_RV2P_INSTR_LOW 0x00002834
+#define BCE_RV2P_PROC1_ADDR_CMD 0x00002838
+#define BCE_RV2P_PROC1_ADDR_CMD_ADD (0x3ffL<<0)
+#define BCE_RV2P_PROC1_ADDR_CMD_RDWR (1L<<31)
+
+#define BCE_RV2P_PROC2_ADDR_CMD 0x0000283c
+#define BCE_RV2P_PROC2_ADDR_CMD_ADD (0x3ffL<<0)
+#define BCE_RV2P_PROC2_ADDR_CMD_RDWR (1L<<31)
+
+#define BCE_RV2P_PROC1_GRC_DEBUG 0x00002840
+#define BCE_RV2P_PROC2_GRC_DEBUG 0x00002844
+#define BCE_RV2P_GRC_PROC_DEBUG 0x00002848
+#define BCE_RV2P_DEBUG_VECT_PEEK 0x0000284c
+#define BCE_RV2P_DEBUG_VECT_PEEK_1_VALUE (0x7ffL<<0)
+#define BCE_RV2P_DEBUG_VECT_PEEK_1_PEEK_EN (1L<<11)
+#define BCE_RV2P_DEBUG_VECT_PEEK_1_SEL (0xfL<<12)
+#define BCE_RV2P_DEBUG_VECT_PEEK_2_VALUE (0x7ffL<<16)
+#define BCE_RV2P_DEBUG_VECT_PEEK_2_PEEK_EN (1L<<27)
+#define BCE_RV2P_DEBUG_VECT_PEEK_2_SEL (0xfL<<28)
+
+#define BCE_RV2P_PFTQ_DATA 0x00002b40
+#define BCE_RV2P_PFTQ_CMD 0x00002b78
+#define BCE_RV2P_PFTQ_CMD_OFFSET (0x3ffL<<0)
+#define BCE_RV2P_PFTQ_CMD_WR_TOP (1L<<10)
+#define BCE_RV2P_PFTQ_CMD_WR_TOP_0 (0L<<10)
+#define BCE_RV2P_PFTQ_CMD_WR_TOP_1 (1L<<10)
+#define BCE_RV2P_PFTQ_CMD_SFT_RESET (1L<<25)
+#define BCE_RV2P_PFTQ_CMD_RD_DATA (1L<<26)
+#define BCE_RV2P_PFTQ_CMD_ADD_INTERVEN (1L<<27)
+#define BCE_RV2P_PFTQ_CMD_ADD_DATA (1L<<28)
+#define BCE_RV2P_PFTQ_CMD_INTERVENE_CLR (1L<<29)
+#define BCE_RV2P_PFTQ_CMD_POP (1L<<30)
+#define BCE_RV2P_PFTQ_CMD_BUSY (1L<<31)
+
+#define BCE_RV2P_PFTQ_CTL 0x00002b7c
+#define BCE_RV2P_PFTQ_CTL_INTERVENE (1L<<0)
+#define BCE_RV2P_PFTQ_CTL_OVERFLOW (1L<<1)
+#define BCE_RV2P_PFTQ_CTL_FORCE_INTERVENE (1L<<2)
+#define BCE_RV2P_PFTQ_CTL_MAX_DEPTH (0x3ffL<<12)
+#define BCE_RV2P_PFTQ_CTL_CUR_DEPTH (0x3ffL<<22)
+
+#define BCE_RV2P_TFTQ_DATA 0x00002b80
+#define BCE_RV2P_TFTQ_CMD 0x00002bb8
+#define BCE_RV2P_TFTQ_CMD_OFFSET (0x3ffL<<0)
+#define BCE_RV2P_TFTQ_CMD_WR_TOP (1L<<10)
+#define BCE_RV2P_TFTQ_CMD_WR_TOP_0 (0L<<10)
+#define BCE_RV2P_TFTQ_CMD_WR_TOP_1 (1L<<10)
+#define BCE_RV2P_TFTQ_CMD_SFT_RESET (1L<<25)
+#define BCE_RV2P_TFTQ_CMD_RD_DATA (1L<<26)
+#define BCE_RV2P_TFTQ_CMD_ADD_INTERVEN (1L<<27)
+#define BCE_RV2P_TFTQ_CMD_ADD_DATA (1L<<28)
+#define BCE_RV2P_TFTQ_CMD_INTERVENE_CLR (1L<<29)
+#define BCE_RV2P_TFTQ_CMD_POP (1L<<30)
+#define BCE_RV2P_TFTQ_CMD_BUSY (1L<<31)
+
+#define BCE_RV2P_TFTQ_CTL 0x00002bbc
+#define BCE_RV2P_TFTQ_CTL_INTERVENE (1L<<0)
+#define BCE_RV2P_TFTQ_CTL_OVERFLOW (1L<<1)
+#define BCE_RV2P_TFTQ_CTL_FORCE_INTERVENE (1L<<2)
+#define BCE_RV2P_TFTQ_CTL_MAX_DEPTH (0x3ffL<<12)
+#define BCE_RV2P_TFTQ_CTL_CUR_DEPTH (0x3ffL<<22)
+
+#define BCE_RV2P_MFTQ_DATA 0x00002bc0
+#define BCE_RV2P_MFTQ_CMD 0x00002bf8
+#define BCE_RV2P_MFTQ_CMD_OFFSET (0x3ffL<<0)
+#define BCE_RV2P_MFTQ_CMD_WR_TOP (1L<<10)
+#define BCE_RV2P_MFTQ_CMD_WR_TOP_0 (0L<<10)
+#define BCE_RV2P_MFTQ_CMD_WR_TOP_1 (1L<<10)
+#define BCE_RV2P_MFTQ_CMD_SFT_RESET (1L<<25)
+#define BCE_RV2P_MFTQ_CMD_RD_DATA (1L<<26)
+#define BCE_RV2P_MFTQ_CMD_ADD_INTERVEN (1L<<27)
+#define BCE_RV2P_MFTQ_CMD_ADD_DATA (1L<<28)
+#define BCE_RV2P_MFTQ_CMD_INTERVENE_CLR (1L<<29)
+#define BCE_RV2P_MFTQ_CMD_POP (1L<<30)
+#define BCE_RV2P_MFTQ_CMD_BUSY (1L<<31)
+
+#define BCE_RV2P_MFTQ_CTL 0x00002bfc
+#define BCE_RV2P_MFTQ_CTL_INTERVENE (1L<<0)
+#define BCE_RV2P_MFTQ_CTL_OVERFLOW (1L<<1)
+#define BCE_RV2P_MFTQ_CTL_FORCE_INTERVENE (1L<<2)
+#define BCE_RV2P_MFTQ_CTL_MAX_DEPTH (0x3ffL<<12)
+#define BCE_RV2P_MFTQ_CTL_CUR_DEPTH (0x3ffL<<22)
+
+
+
+/*
+ * mq_reg definition
+ * offset: 0x3c00
+ */
+#define BCE_MQ_COMMAND 0x00003c00
+#define BCE_MQ_COMMAND_ENABLED (1L<<0)
+#define BCE_MQ_COMMAND_OVERFLOW (1L<<4)
+#define BCE_MQ_COMMAND_WR_ERROR (1L<<5)
+#define BCE_MQ_COMMAND_RD_ERROR (1L<<6)
+
+#define BCE_MQ_STATUS 0x00003c04
+#define BCE_MQ_STATUS_CTX_ACCESS_STAT (1L<<16)
+#define BCE_MQ_STATUS_CTX_ACCESS64_STAT (1L<<17)
+#define BCE_MQ_STATUS_PCI_STALL_STAT (1L<<18)
+
+#define BCE_MQ_CONFIG 0x00003c08
+#define BCE_MQ_CONFIG_TX_HIGH_PRI (1L<<0)
+#define BCE_MQ_CONFIG_HALT_DIS (1L<<1)
+#define BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE (0x7L<<4)
+#define BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE_256 (0L<<4)
+#define BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE_512 (1L<<4)
+#define BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE_1K (2L<<4)
+#define BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE_2K (3L<<4)
+#define BCE_MQ_CONFIG_KNL_BYP_BLK_SIZE_4K (4L<<4)
+#define BCE_MQ_CONFIG_MAX_DEPTH (0x7fL<<8)
+#define BCE_MQ_CONFIG_CUR_DEPTH (0x7fL<<20)
+
+#define BCE_MQ_ENQUEUE1 0x00003c0c
+#define BCE_MQ_ENQUEUE1_OFFSET (0x3fL<<2)
+#define BCE_MQ_ENQUEUE1_CID (0x3fffL<<8)
+#define BCE_MQ_ENQUEUE1_BYTE_MASK (0xfL<<24)
+#define BCE_MQ_ENQUEUE1_KNL_MODE (1L<<28)
+
+#define BCE_MQ_ENQUEUE2 0x00003c10
+#define BCE_MQ_BAD_WR_ADDR 0x00003c14
+#define BCE_MQ_BAD_RD_ADDR 0x00003c18
+#define BCE_MQ_KNL_BYP_WIND_START 0x00003c1c
+#define BCE_MQ_KNL_BYP_WIND_START_VALUE (0xfffffL<<12)
+
+#define BCE_MQ_KNL_WIND_END 0x00003c20
+#define BCE_MQ_KNL_WIND_END_VALUE (0xffffffL<<8)
+
+#define BCE_MQ_KNL_WRITE_MASK1 0x00003c24
+#define BCE_MQ_KNL_TX_MASK1 0x00003c28
+#define BCE_MQ_KNL_CMD_MASK1 0x00003c2c
+#define BCE_MQ_KNL_COND_ENQUEUE_MASK1 0x00003c30
+#define BCE_MQ_KNL_RX_V2P_MASK1 0x00003c34
+#define BCE_MQ_KNL_WRITE_MASK2 0x00003c38
+#define BCE_MQ_KNL_TX_MASK2 0x00003c3c
+#define BCE_MQ_KNL_CMD_MASK2 0x00003c40
+#define BCE_MQ_KNL_COND_ENQUEUE_MASK2 0x00003c44
+#define BCE_MQ_KNL_RX_V2P_MASK2 0x00003c48
+#define BCE_MQ_KNL_BYP_WRITE_MASK1 0x00003c4c
+#define BCE_MQ_KNL_BYP_TX_MASK1 0x00003c50
+#define BCE_MQ_KNL_BYP_CMD_MASK1 0x00003c54
+#define BCE_MQ_KNL_BYP_COND_ENQUEUE_MASK1 0x00003c58
+#define BCE_MQ_KNL_BYP_RX_V2P_MASK1 0x00003c5c
+#define BCE_MQ_KNL_BYP_WRITE_MASK2 0x00003c60
+#define BCE_MQ_KNL_BYP_TX_MASK2 0x00003c64
+#define BCE_MQ_KNL_BYP_CMD_MASK2 0x00003c68
+#define BCE_MQ_KNL_BYP_COND_ENQUEUE_MASK2 0x00003c6c
+#define BCE_MQ_KNL_BYP_RX_V2P_MASK2 0x00003c70
+#define BCE_MQ_MEM_WR_ADDR 0x00003c74
+#define BCE_MQ_MEM_WR_ADDR_VALUE (0x3fL<<0)
+
+#define BCE_MQ_MEM_WR_DATA0 0x00003c78
+#define BCE_MQ_MEM_WR_DATA0_VALUE (0xffffffffL<<0)
+
+#define BCE_MQ_MEM_WR_DATA1 0x00003c7c
+#define BCE_MQ_MEM_WR_DATA1_VALUE (0xffffffffL<<0)
+
+#define BCE_MQ_MEM_WR_DATA2 0x00003c80
+#define BCE_MQ_MEM_WR_DATA2_VALUE (0x3fffffffL<<0)
+
+#define BCE_MQ_MEM_RD_ADDR 0x00003c84
+#define BCE_MQ_MEM_RD_ADDR_VALUE (0x3fL<<0)
+
+#define BCE_MQ_MEM_RD_DATA0 0x00003c88
+#define BCE_MQ_MEM_RD_DATA0_VALUE (0xffffffffL<<0)
+
+#define BCE_MQ_MEM_RD_DATA1 0x00003c8c
+#define BCE_MQ_MEM_RD_DATA1_VALUE (0xffffffffL<<0)
+
+#define BCE_MQ_MEM_RD_DATA2 0x00003c90
+#define BCE_MQ_MEM_RD_DATA2_VALUE (0x3fffffffL<<0)
+
+
+
+/*
+ * tbdr_reg definition
+ * offset: 0x5000
+ */
+#define BCE_TBDR_COMMAND 0x00005000
+#define BCE_TBDR_COMMAND_ENABLE (1L<<0)
+#define BCE_TBDR_COMMAND_SOFT_RST (1L<<1)
+#define BCE_TBDR_COMMAND_MSTR_ABORT (1L<<4)
+
+#define BCE_TBDR_STATUS 0x00005004
+#define BCE_TBDR_STATUS_DMA_WAIT (1L<<0)
+#define BCE_TBDR_STATUS_FTQ_WAIT (1L<<1)
+#define BCE_TBDR_STATUS_FIFO_OVERFLOW (1L<<2)
+#define BCE_TBDR_STATUS_FIFO_UNDERFLOW (1L<<3)
+#define BCE_TBDR_STATUS_SEARCHMISS_ERROR (1L<<4)
+#define BCE_TBDR_STATUS_FTQ_ENTRY_CNT (1L<<5)
+#define BCE_TBDR_STATUS_BURST_CNT (1L<<6)
+
+#define BCE_TBDR_CONFIG 0x00005008
+#define BCE_TBDR_CONFIG_MAX_BDS (0xffL<<0)
+#define BCE_TBDR_CONFIG_SWAP_MODE (1L<<8)
+#define BCE_TBDR_CONFIG_PRIORITY (1L<<9)
+#define BCE_TBDR_CONFIG_CACHE_NEXT_PAGE_PTRS (1L<<10)
+#define BCE_TBDR_CONFIG_PAGE_SIZE (0xfL<<24)
+#define BCE_TBDR_CONFIG_PAGE_SIZE_256 (0L<<24)
+#define BCE_TBDR_CONFIG_PAGE_SIZE_512 (1L<<24)
+#define BCE_TBDR_CONFIG_PAGE_SIZE_1K (2L<<24)
+#define BCE_TBDR_CONFIG_PAGE_SIZE_2K (3L<<24)
+#define BCE_TBDR_CONFIG_PAGE_SIZE_4K (4L<<24)
+#define BCE_TBDR_CONFIG_PAGE_SIZE_8K (5L<<24)
+#define BCE_TBDR_CONFIG_PAGE_SIZE_16K (6L<<24)
+#define BCE_TBDR_CONFIG_PAGE_SIZE_32K (7L<<24)
+#define BCE_TBDR_CONFIG_PAGE_SIZE_64K (8L<<24)
+#define BCE_TBDR_CONFIG_PAGE_SIZE_128K (9L<<24)
+#define BCE_TBDR_CONFIG_PAGE_SIZE_256K (10L<<24)
+#define BCE_TBDR_CONFIG_PAGE_SIZE_512K (11L<<24)
+#define BCE_TBDR_CONFIG_PAGE_SIZE_1M (12L<<24)
+
+#define BCE_TBDR_DEBUG_VECT_PEEK 0x0000500c
+#define BCE_TBDR_DEBUG_VECT_PEEK_1_VALUE (0x7ffL<<0)
+#define BCE_TBDR_DEBUG_VECT_PEEK_1_PEEK_EN (1L<<11)
+#define BCE_TBDR_DEBUG_VECT_PEEK_1_SEL (0xfL<<12)
+#define BCE_TBDR_DEBUG_VECT_PEEK_2_VALUE (0x7ffL<<16)
+#define BCE_TBDR_DEBUG_VECT_PEEK_2_PEEK_EN (1L<<27)
+#define BCE_TBDR_DEBUG_VECT_PEEK_2_SEL (0xfL<<28)
+
+#define BCE_TBDR_FTQ_DATA 0x000053c0
+#define BCE_TBDR_FTQ_CMD 0x000053f8
+#define BCE_TBDR_FTQ_CMD_OFFSET (0x3ffL<<0)
+#define BCE_TBDR_FTQ_CMD_WR_TOP (1L<<10)
+#define BCE_TBDR_FTQ_CMD_WR_TOP_0 (0L<<10)
+#define BCE_TBDR_FTQ_CMD_WR_TOP_1 (1L<<10)
+#define BCE_TBDR_FTQ_CMD_SFT_RESET (1L<<25)
+#define BCE_TBDR_FTQ_CMD_RD_DATA (1L<<26)
+#define BCE_TBDR_FTQ_CMD_ADD_INTERVEN (1L<<27)
+#define BCE_TBDR_FTQ_CMD_ADD_DATA (1L<<28)
+#define BCE_TBDR_FTQ_CMD_INTERVENE_CLR (1L<<29)
+#define BCE_TBDR_FTQ_CMD_POP (1L<<30)
+#define BCE_TBDR_FTQ_CMD_BUSY (1L<<31)
+
+#define BCE_TBDR_FTQ_CTL 0x000053fc
+#define BCE_TBDR_FTQ_CTL_INTERVENE (1L<<0)
+#define BCE_TBDR_FTQ_CTL_OVERFLOW (1L<<1)
+#define BCE_TBDR_FTQ_CTL_FORCE_INTERVENE (1L<<2)
+#define BCE_TBDR_FTQ_CTL_MAX_DEPTH (0x3ffL<<12)
+#define BCE_TBDR_FTQ_CTL_CUR_DEPTH (0x3ffL<<22)
+
+
+
+/*
+ * tdma_reg definition
+ * offset: 0x5c00
+ */
+#define BCE_TDMA_COMMAND 0x00005c00
+#define BCE_TDMA_COMMAND_ENABLED (1L<<0)
+#define BCE_TDMA_COMMAND_MASTER_ABORT (1L<<4)
+#define BCE_TDMA_COMMAND_BAD_L2_LENGTH_ABORT (1L<<7)
+
+#define BCE_TDMA_STATUS 0x00005c04
+#define BCE_TDMA_STATUS_DMA_WAIT (1L<<0)
+#define BCE_TDMA_STATUS_PAYLOAD_WAIT (1L<<1)
+#define BCE_TDMA_STATUS_PATCH_FTQ_WAIT (1L<<2)
+#define BCE_TDMA_STATUS_LOCK_WAIT (1L<<3)
+#define BCE_TDMA_STATUS_FTQ_ENTRY_CNT (1L<<16)
+#define BCE_TDMA_STATUS_BURST_CNT (1L<<17)
+
+#define BCE_TDMA_CONFIG 0x00005c08
+#define BCE_TDMA_CONFIG_ONE_DMA (1L<<0)
+#define BCE_TDMA_CONFIG_ONE_RECORD (1L<<1)
+#define BCE_TDMA_CONFIG_LIMIT_SZ (0xfL<<4)
+#define BCE_TDMA_CONFIG_LIMIT_SZ_64 (0L<<4)
+#define BCE_TDMA_CONFIG_LIMIT_SZ_128 (0x4L<<4)
+#define BCE_TDMA_CONFIG_LIMIT_SZ_256 (0x6L<<4)
+#define BCE_TDMA_CONFIG_LIMIT_SZ_512 (0x8L<<4)
+#define BCE_TDMA_CONFIG_LINE_SZ (0xfL<<8)
+#define BCE_TDMA_CONFIG_LINE_SZ_64 (0L<<8)
+#define BCE_TDMA_CONFIG_LINE_SZ_128 (4L<<8)
+#define BCE_TDMA_CONFIG_LINE_SZ_256 (6L<<8)
+#define BCE_TDMA_CONFIG_LINE_SZ_512 (8L<<8)
+#define BCE_TDMA_CONFIG_ALIGN_ENA (1L<<15)
+#define BCE_TDMA_CONFIG_CHK_L2_BD (1L<<16)
+#define BCE_TDMA_CONFIG_FIFO_CMP (0xfL<<20)
+
+#define BCE_TDMA_PAYLOAD_PROD 0x00005c0c
+#define BCE_TDMA_PAYLOAD_PROD_VALUE (0x1fffL<<3)
+
+#define BCE_TDMA_DBG_WATCHDOG 0x00005c10
+#define BCE_TDMA_DBG_TRIGGER 0x00005c14
+#define BCE_TDMA_DMAD_FSM 0x00005c80
+#define BCE_TDMA_DMAD_FSM_BD_INVLD (1L<<0)
+#define BCE_TDMA_DMAD_FSM_PUSH (0xfL<<4)
+#define BCE_TDMA_DMAD_FSM_ARB_TBDC (0x3L<<8)
+#define BCE_TDMA_DMAD_FSM_ARB_CTX (1L<<12)
+#define BCE_TDMA_DMAD_FSM_DR_INTF (1L<<16)
+#define BCE_TDMA_DMAD_FSM_DMAD (0x7L<<20)
+#define BCE_TDMA_DMAD_FSM_BD (0xfL<<24)
+
+#define BCE_TDMA_DMAD_STATUS 0x00005c84
+#define BCE_TDMA_DMAD_STATUS_RHOLD_PUSH_ENTRY (0x3L<<0)
+#define BCE_TDMA_DMAD_STATUS_RHOLD_DMAD_ENTRY (0x3L<<4)
+#define BCE_TDMA_DMAD_STATUS_RHOLD_BD_ENTRY (0x3L<<8)
+#define BCE_TDMA_DMAD_STATUS_IFTQ_ENUM (0xfL<<12)
+
+#define BCE_TDMA_DR_INTF_FSM 0x00005c88
+#define BCE_TDMA_DR_INTF_FSM_L2_COMP (0x3L<<0)
+#define BCE_TDMA_DR_INTF_FSM_TPATQ (0x7L<<4)
+#define BCE_TDMA_DR_INTF_FSM_TPBUF (0x3L<<8)
+#define BCE_TDMA_DR_INTF_FSM_DR_BUF (0x7L<<12)
+#define BCE_TDMA_DR_INTF_FSM_DMAD (0x7L<<16)
+
+#define BCE_TDMA_DR_INTF_STATUS 0x00005c8c
+#define BCE_TDMA_DR_INTF_STATUS_HOLE_PHASE (0x7L<<0)
+#define BCE_TDMA_DR_INTF_STATUS_DATA_AVAIL (0x3L<<4)
+#define BCE_TDMA_DR_INTF_STATUS_SHIFT_ADDR (0x7L<<8)
+#define BCE_TDMA_DR_INTF_STATUS_NXT_PNTR (0xfL<<12)
+#define BCE_TDMA_DR_INTF_STATUS_BYTE_COUNT (0x7L<<16)
+
+#define BCE_TDMA_FTQ_DATA 0x00005fc0
+#define BCE_TDMA_FTQ_CMD 0x00005ff8
+#define BCE_TDMA_FTQ_CMD_OFFSET (0x3ffL<<0)
+#define BCE_TDMA_FTQ_CMD_WR_TOP (1L<<10)
+#define BCE_TDMA_FTQ_CMD_WR_TOP_0 (0L<<10)
+#define BCE_TDMA_FTQ_CMD_WR_TOP_1 (1L<<10)
+#define BCE_TDMA_FTQ_CMD_SFT_RESET (1L<<25)
+#define BCE_TDMA_FTQ_CMD_RD_DATA (1L<<26)
+#define BCE_TDMA_FTQ_CMD_ADD_INTERVEN (1L<<27)
+#define BCE_TDMA_FTQ_CMD_ADD_DATA (1L<<28)
+#define BCE_TDMA_FTQ_CMD_INTERVENE_CLR (1L<<29)
+#define BCE_TDMA_FTQ_CMD_POP (1L<<30)
+#define BCE_TDMA_FTQ_CMD_BUSY (1L<<31)
+
+#define BCE_TDMA_FTQ_CTL 0x00005ffc
+#define BCE_TDMA_FTQ_CTL_INTERVENE (1L<<0)
+#define BCE_TDMA_FTQ_CTL_OVERFLOW (1L<<1)
+#define BCE_TDMA_FTQ_CTL_FORCE_INTERVENE (1L<<2)
+#define BCE_TDMA_FTQ_CTL_MAX_DEPTH (0x3ffL<<12)
+#define BCE_TDMA_FTQ_CTL_CUR_DEPTH (0x3ffL<<22)
+
+
+
+/*
+ * hc_reg definition
+ * offset: 0x6800
+ */
+#define BCE_HC_COMMAND 0x00006800
+#define BCE_HC_COMMAND_ENABLE (1L<<0)
+#define BCE_HC_COMMAND_SKIP_ABORT (1L<<4)
+#define BCE_HC_COMMAND_COAL_NOW (1L<<16)
+#define BCE_HC_COMMAND_COAL_NOW_WO_INT (1L<<17)
+#define BCE_HC_COMMAND_STATS_NOW (1L<<18)
+#define BCE_HC_COMMAND_FORCE_INT (0x3L<<19)
+#define BCE_HC_COMMAND_FORCE_INT_NULL (0L<<19)
+#define BCE_HC_COMMAND_FORCE_INT_HIGH (1L<<19)
+#define BCE_HC_COMMAND_FORCE_INT_LOW (2L<<19)
+#define BCE_HC_COMMAND_FORCE_INT_FREE (3L<<19)
+#define BCE_HC_COMMAND_CLR_STAT_NOW (1L<<21)
+
+#define BCE_HC_STATUS 0x00006804
+#define BCE_HC_STATUS_MASTER_ABORT (1L<<0)
+#define BCE_HC_STATUS_PARITY_ERROR_STATE (1L<<1)
+#define BCE_HC_STATUS_PCI_CLK_CNT_STAT (1L<<16)
+#define BCE_HC_STATUS_CORE_CLK_CNT_STAT (1L<<17)
+#define BCE_HC_STATUS_NUM_STATUS_BLOCKS_STAT (1L<<18)
+#define BCE_HC_STATUS_NUM_INT_GEN_STAT (1L<<19)
+#define BCE_HC_STATUS_NUM_INT_MBOX_WR_STAT (1L<<20)
+#define BCE_HC_STATUS_CORE_CLKS_TO_HW_INTACK_STAT (1L<<23)
+#define BCE_HC_STATUS_CORE_CLKS_TO_SW_INTACK_STAT (1L<<24)
+#define BCE_HC_STATUS_CORE_CLKS_DURING_SW_INTACK_STAT (1L<<25)
+
+#define BCE_HC_CONFIG 0x00006808
+#define BCE_HC_CONFIG_COLLECT_STATS (1L<<0)
+#define BCE_HC_CONFIG_RX_TMR_MODE (1L<<1)
+#define BCE_HC_CONFIG_TX_TMR_MODE (1L<<2)
+#define BCE_HC_CONFIG_COM_TMR_MODE (1L<<3)
+#define BCE_HC_CONFIG_CMD_TMR_MODE (1L<<4)
+#define BCE_HC_CONFIG_STATISTIC_PRIORITY (1L<<5)
+#define BCE_HC_CONFIG_STATUS_PRIORITY (1L<<6)
+#define BCE_HC_CONFIG_STAT_MEM_ADDR (0xffL<<8)
+
+#define BCE_HC_ATTN_BITS_ENABLE 0x0000680c
+#define BCE_HC_STATUS_ADDR_L 0x00006810
+#define BCE_HC_STATUS_ADDR_H 0x00006814
+#define BCE_HC_STATISTICS_ADDR_L 0x00006818
+#define BCE_HC_STATISTICS_ADDR_H 0x0000681c
+#define BCE_HC_TX_QUICK_CONS_TRIP 0x00006820
+#define BCE_HC_TX_QUICK_CONS_TRIP_VALUE (0xffL<<0)
+#define BCE_HC_TX_QUICK_CONS_TRIP_INT (0xffL<<16)
+
+#define BCE_HC_COMP_PROD_TRIP 0x00006824
+#define BCE_HC_COMP_PROD_TRIP_VALUE (0xffL<<0)
+#define BCE_HC_COMP_PROD_TRIP_INT (0xffL<<16)
+
+#define BCE_HC_RX_QUICK_CONS_TRIP 0x00006828
+#define BCE_HC_RX_QUICK_CONS_TRIP_VALUE (0xffL<<0)
+#define BCE_HC_RX_QUICK_CONS_TRIP_INT (0xffL<<16)
+
+#define BCE_HC_RX_TICKS 0x0000682c
+#define BCE_HC_RX_TICKS_VALUE (0x3ffL<<0)
+#define BCE_HC_RX_TICKS_INT (0x3ffL<<16)
+
+#define BCE_HC_TX_TICKS 0x00006830
+#define BCE_HC_TX_TICKS_VALUE (0x3ffL<<0)
+#define BCE_HC_TX_TICKS_INT (0x3ffL<<16)
+
+#define BCE_HC_COM_TICKS 0x00006834
+#define BCE_HC_COM_TICKS_VALUE (0x3ffL<<0)
+#define BCE_HC_COM_TICKS_INT (0x3ffL<<16)
+
+#define BCE_HC_CMD_TICKS 0x00006838
+#define BCE_HC_CMD_TICKS_VALUE (0x3ffL<<0)
+#define BCE_HC_CMD_TICKS_INT (0x3ffL<<16)
+
+#define BCE_HC_PERIODIC_TICKS 0x0000683c
+#define BCE_HC_PERIODIC_TICKS_HC_PERIODIC_TICKS (0xffffL<<0)
+
+#define BCE_HC_STAT_COLLECT_TICKS 0x00006840
+#define BCE_HC_STAT_COLLECT_TICKS_HC_STAT_COLL_TICKS (0xffL<<4)
+
+#define BCE_HC_STATS_TICKS 0x00006844
+#define BCE_HC_STATS_TICKS_HC_STAT_TICKS (0xffffL<<8)
+
+#define BCE_HC_STAT_MEM_DATA 0x0000684c
+#define BCE_HC_STAT_GEN_SEL_0 0x00006850
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0 (0x7fL<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT0 (0L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT1 (1L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT2 (2L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT3 (3L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT4 (4L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT5 (5L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT6 (6L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT7 (7L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT8 (8L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT9 (9L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT10 (10L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT11 (11L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT0 (12L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT1 (13L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT2 (14L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT3 (15L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT4 (16L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT5 (17L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT6 (18L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT7 (19L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT0 (20L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT1 (21L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT2 (22L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT3 (23L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT4 (24L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT5 (25L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT6 (26L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT7 (27L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT8 (28L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT9 (29L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT10 (30L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT11 (31L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT0 (32L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT1 (33L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT2 (34L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT3 (35L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT0 (36L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT1 (37L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT2 (38L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT3 (39L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT4 (40L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT5 (41L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT6 (42L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT7 (43L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT0 (44L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT1 (45L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT2 (46L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT3 (47L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT4 (48L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT5 (49L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT6 (50L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT7 (51L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_PCI_CLK_CNT (52L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CORE_CLK_CNT (53L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS (54L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN (55L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR (56L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK (59L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK (60L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK (61L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCH_CMD_CNT (62L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCH_SLOT_CNT (63L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSCH_CMD_CNT (64L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSCH_SLOT_CNT (65L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RLUPQ_VALID_CNT (66L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXPQ_VALID_CNT (67L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXPCQ_VALID_CNT (68L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PPQ_VALID_CNT (69L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PMQ_VALID_CNT (70L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PTQ_VALID_CNT (71L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMAQ_VALID_CNT (72L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCHQ_VALID_CNT (73L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDRQ_VALID_CNT (74L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXPQ_VALID_CNT (75L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMAQ_VALID_CNT (76L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPATQ_VALID_CNT (77L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TASQ_VALID_CNT (78L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSQ_VALID_CNT (79L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CPQ_VALID_CNT (80L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMXQ_VALID_CNT (81L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMTQ_VALID_CNT (82L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMQ_VALID_CNT (83L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_MGMQ_VALID_CNT (84L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_READ_TRANSFERS_CNT (85L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_READ_DELAY_PCI_CLKS_CNT (86L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_TRANSFERS_CNT (87L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_DELAY_PCI_CLKS_CNT (88L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_RETRY_AFTER_DATA_CNT (89L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_WRITE_TRANSFERS_CNT (90L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_WRITE_DELAY_PCI_CLKS_CNT (91L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_TRANSFERS_CNT (92L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_DELAY_PCI_CLKS_CNT (93L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_RETRY_AFTER_DATA_CNT (94L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_WR_CNT64 (95L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_RD_CNT64 (96L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_ACC_STALL_CLKS (97L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_LOCK_STALL_CLKS (98L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_CTX_ACCESS_STAT (99L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_CTX_ACCESS64_STAT (100L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_PCI_STALL_STAT (101L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDR_FTQ_ENTRY_CNT (102L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDR_BURST_CNT (103L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMA_FTQ_ENTRY_CNT (104L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMA_BURST_CNT (105L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMA_FTQ_ENTRY_CNT (106L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMA_BURST_CNT (107L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RLUP_MATCH_CNT (108L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_POLL_PASS_CNT (109L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR1_CNT (110L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR2_CNT (111L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR3_CNT (112L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR4_CNT (113L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR5_CNT (114L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT0 (115L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT1 (116L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT2 (117L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT3 (118L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT4 (119L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT5 (120L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_PROC1_MISS (121L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_PROC2_MISS (122L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_BURST_CNT (127L<<0)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_1 (0x7fL<<8)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_2 (0x7fL<<16)
+#define BCE_HC_STAT_GEN_SEL_0_GEN_SEL_3 (0x7fL<<24)
+
+#define BCE_HC_STAT_GEN_SEL_1 0x00006854
+#define BCE_HC_STAT_GEN_SEL_1_GEN_SEL_4 (0x7fL<<0)
+#define BCE_HC_STAT_GEN_SEL_1_GEN_SEL_5 (0x7fL<<8)
+#define BCE_HC_STAT_GEN_SEL_1_GEN_SEL_6 (0x7fL<<16)
+#define BCE_HC_STAT_GEN_SEL_1_GEN_SEL_7 (0x7fL<<24)
+
+#define BCE_HC_STAT_GEN_SEL_2 0x00006858
+#define BCE_HC_STAT_GEN_SEL_2_GEN_SEL_8 (0x7fL<<0)
+#define BCE_HC_STAT_GEN_SEL_2_GEN_SEL_9 (0x7fL<<8)
+#define BCE_HC_STAT_GEN_SEL_2_GEN_SEL_10 (0x7fL<<16)
+#define BCE_HC_STAT_GEN_SEL_2_GEN_SEL_11 (0x7fL<<24)
+
+#define BCE_HC_STAT_GEN_SEL_3 0x0000685c
+#define BCE_HC_STAT_GEN_SEL_3_GEN_SEL_12 (0x7fL<<0)
+#define BCE_HC_STAT_GEN_SEL_3_GEN_SEL_13 (0x7fL<<8)
+#define BCE_HC_STAT_GEN_SEL_3_GEN_SEL_14 (0x7fL<<16)
+#define BCE_HC_STAT_GEN_SEL_3_GEN_SEL_15 (0x7fL<<24)
+
+#define BCE_HC_STAT_GEN_STAT0 0x00006888
+#define BCE_HC_STAT_GEN_STAT1 0x0000688c
+#define BCE_HC_STAT_GEN_STAT2 0x00006890
+#define BCE_HC_STAT_GEN_STAT3 0x00006894
+#define BCE_HC_STAT_GEN_STAT4 0x00006898
+#define BCE_HC_STAT_GEN_STAT5 0x0000689c
+#define BCE_HC_STAT_GEN_STAT6 0x000068a0
+#define BCE_HC_STAT_GEN_STAT7 0x000068a4
+#define BCE_HC_STAT_GEN_STAT8 0x000068a8
+#define BCE_HC_STAT_GEN_STAT9 0x000068ac
+#define BCE_HC_STAT_GEN_STAT10 0x000068b0
+#define BCE_HC_STAT_GEN_STAT11 0x000068b4
+#define BCE_HC_STAT_GEN_STAT12 0x000068b8
+#define BCE_HC_STAT_GEN_STAT13 0x000068bc
+#define BCE_HC_STAT_GEN_STAT14 0x000068c0
+#define BCE_HC_STAT_GEN_STAT15 0x000068c4
+#define BCE_HC_STAT_GEN_STAT_AC0 0x000068c8
+#define BCE_HC_STAT_GEN_STAT_AC1 0x000068cc
+#define BCE_HC_STAT_GEN_STAT_AC2 0x000068d0
+#define BCE_HC_STAT_GEN_STAT_AC3 0x000068d4
+#define BCE_HC_STAT_GEN_STAT_AC4 0x000068d8
+#define BCE_HC_STAT_GEN_STAT_AC5 0x000068dc
+#define BCE_HC_STAT_GEN_STAT_AC6 0x000068e0
+#define BCE_HC_STAT_GEN_STAT_AC7 0x000068e4
+#define BCE_HC_STAT_GEN_STAT_AC8 0x000068e8
+#define BCE_HC_STAT_GEN_STAT_AC9 0x000068ec
+#define BCE_HC_STAT_GEN_STAT_AC10 0x000068f0
+#define BCE_HC_STAT_GEN_STAT_AC11 0x000068f4
+#define BCE_HC_STAT_GEN_STAT_AC12 0x000068f8
+#define BCE_HC_STAT_GEN_STAT_AC13 0x000068fc
+#define BCE_HC_STAT_GEN_STAT_AC14 0x00006900
+#define BCE_HC_STAT_GEN_STAT_AC15 0x00006904
+#define BCE_HC_VIS 0x00006908
+#define BCE_HC_VIS_STAT_BUILD_STATE (0xfL<<0)
+#define BCE_HC_VIS_STAT_BUILD_STATE_IDLE (0L<<0)
+#define BCE_HC_VIS_STAT_BUILD_STATE_START (1L<<0)
+#define BCE_HC_VIS_STAT_BUILD_STATE_REQUEST (2L<<0)
+#define BCE_HC_VIS_STAT_BUILD_STATE_UPDATE64 (3L<<0)
+#define BCE_HC_VIS_STAT_BUILD_STATE_UPDATE32 (4L<<0)
+#define BCE_HC_VIS_STAT_BUILD_STATE_UPDATE_DONE (5L<<0)
+#define BCE_HC_VIS_STAT_BUILD_STATE_DMA (6L<<0)
+#define BCE_HC_VIS_STAT_BUILD_STATE_MSI_CONTROL (7L<<0)
+#define BCE_HC_VIS_STAT_BUILD_STATE_MSI_LOW (8L<<0)
+#define BCE_HC_VIS_STAT_BUILD_STATE_MSI_HIGH (9L<<0)
+#define BCE_HC_VIS_STAT_BUILD_STATE_MSI_DATA (10L<<0)
+#define BCE_HC_VIS_DMA_STAT_STATE (0xfL<<8)
+#define BCE_HC_VIS_DMA_STAT_STATE_IDLE (0L<<8)
+#define BCE_HC_VIS_DMA_STAT_STATE_STATUS_PARAM (1L<<8)
+#define BCE_HC_VIS_DMA_STAT_STATE_STATUS_DMA (2L<<8)
+#define BCE_HC_VIS_DMA_STAT_STATE_WRITE_COMP (3L<<8)
+#define BCE_HC_VIS_DMA_STAT_STATE_COMP (4L<<8)
+#define BCE_HC_VIS_DMA_STAT_STATE_STATISTIC_PARAM (5L<<8)
+#define BCE_HC_VIS_DMA_STAT_STATE_STATISTIC_DMA (6L<<8)
+#define BCE_HC_VIS_DMA_STAT_STATE_WRITE_COMP_1 (7L<<8)
+#define BCE_HC_VIS_DMA_STAT_STATE_WRITE_COMP_2 (8L<<8)
+#define BCE_HC_VIS_DMA_STAT_STATE_WAIT (9L<<8)
+#define BCE_HC_VIS_DMA_STAT_STATE_ABORT (15L<<8)
+#define BCE_HC_VIS_DMA_MSI_STATE (0x7L<<12)
+#define BCE_HC_VIS_STATISTIC_DMA_EN_STATE (0x3L<<15)
+#define BCE_HC_VIS_STATISTIC_DMA_EN_STATE_IDLE (0L<<15)
+#define BCE_HC_VIS_STATISTIC_DMA_EN_STATE_COUNT (1L<<15)
+#define BCE_HC_VIS_STATISTIC_DMA_EN_STATE_START (2L<<15)
+
+#define BCE_HC_VIS_1 0x0000690c
+#define BCE_HC_VIS_1_HW_INTACK_STATE (1L<<4)
+#define BCE_HC_VIS_1_HW_INTACK_STATE_IDLE (0L<<4)
+#define BCE_HC_VIS_1_HW_INTACK_STATE_COUNT (1L<<4)
+#define BCE_HC_VIS_1_SW_INTACK_STATE (1L<<5)
+#define BCE_HC_VIS_1_SW_INTACK_STATE_IDLE (0L<<5)
+#define BCE_HC_VIS_1_SW_INTACK_STATE_COUNT (1L<<5)
+#define BCE_HC_VIS_1_DURING_SW_INTACK_STATE (1L<<6)
+#define BCE_HC_VIS_1_DURING_SW_INTACK_STATE_IDLE (0L<<6)
+#define BCE_HC_VIS_1_DURING_SW_INTACK_STATE_COUNT (1L<<6)
+#define BCE_HC_VIS_1_MAILBOX_COUNT_STATE (1L<<7)
+#define BCE_HC_VIS_1_MAILBOX_COUNT_STATE_IDLE (0L<<7)
+#define BCE_HC_VIS_1_MAILBOX_COUNT_STATE_COUNT (1L<<7)
+#define BCE_HC_VIS_1_RAM_RD_ARB_STATE (0xfL<<17)
+#define BCE_HC_VIS_1_RAM_RD_ARB_STATE_IDLE (0L<<17)
+#define BCE_HC_VIS_1_RAM_RD_ARB_STATE_DMA (1L<<17)
+#define BCE_HC_VIS_1_RAM_RD_ARB_STATE_UPDATE (2L<<17)
+#define BCE_HC_VIS_1_RAM_RD_ARB_STATE_ASSIGN (3L<<17)
+#define BCE_HC_VIS_1_RAM_RD_ARB_STATE_WAIT (4L<<17)
+#define BCE_HC_VIS_1_RAM_RD_ARB_STATE_REG_UPDATE (5L<<17)
+#define BCE_HC_VIS_1_RAM_RD_ARB_STATE_REG_ASSIGN (6L<<17)
+#define BCE_HC_VIS_1_RAM_RD_ARB_STATE_REG_WAIT (7L<<17)
+#define BCE_HC_VIS_1_RAM_WR_ARB_STATE (0x3L<<21)
+#define BCE_HC_VIS_1_RAM_WR_ARB_STATE_NORMAL (0L<<21)
+#define BCE_HC_VIS_1_RAM_WR_ARB_STATE_CLEAR (1L<<21)
+#define BCE_HC_VIS_1_INT_GEN_STATE (1L<<23)
+#define BCE_HC_VIS_1_INT_GEN_STATE_DLE (0L<<23)
+#define BCE_HC_VIS_1_INT_GEN_STATE_NTERRUPT (1L<<23)
+#define BCE_HC_VIS_1_STAT_CHAN_ID (0x7L<<24)
+#define BCE_HC_VIS_1_INT_B (1L<<27)
+
+#define BCE_HC_DEBUG_VECT_PEEK 0x00006910
+#define BCE_HC_DEBUG_VECT_PEEK_1_VALUE (0x7ffL<<0)
+#define BCE_HC_DEBUG_VECT_PEEK_1_PEEK_EN (1L<<11)
+#define BCE_HC_DEBUG_VECT_PEEK_1_SEL (0xfL<<12)
+#define BCE_HC_DEBUG_VECT_PEEK_2_VALUE (0x7ffL<<16)
+#define BCE_HC_DEBUG_VECT_PEEK_2_PEEK_EN (1L<<27)
+#define BCE_HC_DEBUG_VECT_PEEK_2_SEL (0xfL<<28)
+
+
+
+/*
+ * txp_reg definition
+ * offset: 0x40000
+ */
+#define BCE_TXP_CPU_MODE 0x00045000
+#define BCE_TXP_CPU_MODE_LOCAL_RST (1L<<0)
+#define BCE_TXP_CPU_MODE_STEP_ENA (1L<<1)
+#define BCE_TXP_CPU_MODE_PAGE_0_DATA_ENA (1L<<2)
+#define BCE_TXP_CPU_MODE_PAGE_0_INST_ENA (1L<<3)
+#define BCE_TXP_CPU_MODE_MSG_BIT1 (1L<<6)
+#define BCE_TXP_CPU_MODE_INTERRUPT_ENA (1L<<7)
+#define BCE_TXP_CPU_MODE_SOFT_HALT (1L<<10)
+#define BCE_TXP_CPU_MODE_BAD_DATA_HALT_ENA (1L<<11)
+#define BCE_TXP_CPU_MODE_BAD_INST_HALT_ENA (1L<<12)
+#define BCE_TXP_CPU_MODE_FIO_ABORT_HALT_ENA (1L<<13)
+#define BCE_TXP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA (1L<<15)
+
+#define BCE_TXP_CPU_STATE 0x00045004
+#define BCE_TXP_CPU_STATE_BREAKPOINT (1L<<0)
+#define BCE_TXP_CPU_STATE_BAD_INST_HALTED (1L<<2)
+#define BCE_TXP_CPU_STATE_PAGE_0_DATA_HALTED (1L<<3)
+#define BCE_TXP_CPU_STATE_PAGE_0_INST_HALTED (1L<<4)
+#define BCE_TXP_CPU_STATE_BAD_DATA_ADDR_HALTED (1L<<5)
+#define BCE_TXP_CPU_STATE_BAD_pc_HALTED (1L<<6)
+#define BCE_TXP_CPU_STATE_ALIGN_HALTED (1L<<7)
+#define BCE_TXP_CPU_STATE_FIO_ABORT_HALTED (1L<<8)
+#define BCE_TXP_CPU_STATE_SOFT_HALTED (1L<<10)
+#define BCE_TXP_CPU_STATE_SPAD_UNDERFLOW (1L<<11)
+#define BCE_TXP_CPU_STATE_INTERRRUPT (1L<<12)
+#define BCE_TXP_CPU_STATE_DATA_ACCESS_STALL (1L<<14)
+#define BCE_TXP_CPU_STATE_INST_FETCH_STALL (1L<<15)
+#define BCE_TXP_CPU_STATE_BLOCKED_READ (1L<<31)
+
+#define BCE_TXP_CPU_EVENT_MASK 0x00045008
+#define BCE_TXP_CPU_EVENT_MASK_BREAKPOINT_MASK (1L<<0)
+#define BCE_TXP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK (1L<<2)
+#define BCE_TXP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK (1L<<3)
+#define BCE_TXP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK (1L<<4)
+#define BCE_TXP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK (1L<<5)
+#define BCE_TXP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK (1L<<6)
+#define BCE_TXP_CPU_EVENT_MASK_ALIGN_HALTED_MASK (1L<<7)
+#define BCE_TXP_CPU_EVENT_MASK_FIO_ABORT_MASK (1L<<8)
+#define BCE_TXP_CPU_EVENT_MASK_SOFT_HALTED_MASK (1L<<10)
+#define BCE_TXP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK (1L<<11)
+#define BCE_TXP_CPU_EVENT_MASK_INTERRUPT_MASK (1L<<12)
+
+#define BCE_TXP_CPU_PROGRAM_COUNTER 0x0004501c
+#define BCE_TXP_CPU_INSTRUCTION 0x00045020
+#define BCE_TXP_CPU_DATA_ACCESS 0x00045024
+#define BCE_TXP_CPU_INTERRUPT_ENABLE 0x00045028
+#define BCE_TXP_CPU_INTERRUPT_VECTOR 0x0004502c
+#define BCE_TXP_CPU_INTERRUPT_SAVED_PC 0x00045030
+#define BCE_TXP_CPU_HW_BREAKPOINT 0x00045034
+#define BCE_TXP_CPU_HW_BREAKPOINT_DISABLE (1L<<0)
+#define BCE_TXP_CPU_HW_BREAKPOINT_ADDRESS (0x3fffffffL<<2)
+
+#define BCE_TXP_CPU_DEBUG_VECT_PEEK 0x00045038
+#define BCE_TXP_CPU_DEBUG_VECT_PEEK_1_VALUE (0x7ffL<<0)
+#define BCE_TXP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN (1L<<11)
+#define BCE_TXP_CPU_DEBUG_VECT_PEEK_1_SEL (0xfL<<12)
+#define BCE_TXP_CPU_DEBUG_VECT_PEEK_2_VALUE (0x7ffL<<16)
+#define BCE_TXP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN (1L<<27)
+#define BCE_TXP_CPU_DEBUG_VECT_PEEK_2_SEL (0xfL<<28)
+
+#define BCE_TXP_CPU_LAST_BRANCH_ADDR 0x00045048
+#define BCE_TXP_CPU_LAST_BRANCH_ADDR_TYPE (1L<<1)
+#define BCE_TXP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP (0L<<1)
+#define BCE_TXP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH (1L<<1)
+#define BCE_TXP_CPU_LAST_BRANCH_ADDR_LBA (0x3fffffffL<<2)
+
+#define BCE_TXP_CPU_REG_FILE 0x00045200
+#define BCE_TXP_FTQ_DATA 0x000453c0
+#define BCE_TXP_FTQ_CMD 0x000453f8
+#define BCE_TXP_FTQ_CMD_OFFSET (0x3ffL<<0)
+#define BCE_TXP_FTQ_CMD_WR_TOP (1L<<10)
+#define BCE_TXP_FTQ_CMD_WR_TOP_0 (0L<<10)
+#define BCE_TXP_FTQ_CMD_WR_TOP_1 (1L<<10)
+#define BCE_TXP_FTQ_CMD_SFT_RESET (1L<<25)
+#define BCE_TXP_FTQ_CMD_RD_DATA (1L<<26)
+#define BCE_TXP_FTQ_CMD_ADD_INTERVEN (1L<<27)
+#define BCE_TXP_FTQ_CMD_ADD_DATA (1L<<28)
+#define BCE_TXP_FTQ_CMD_INTERVENE_CLR (1L<<29)
+#define BCE_TXP_FTQ_CMD_POP (1L<<30)
+#define BCE_TXP_FTQ_CMD_BUSY (1L<<31)
+
+#define BCE_TXP_FTQ_CTL 0x000453fc
+#define BCE_TXP_FTQ_CTL_INTERVENE (1L<<0)
+#define BCE_TXP_FTQ_CTL_OVERFLOW (1L<<1)
+#define BCE_TXP_FTQ_CTL_FORCE_INTERVENE (1L<<2)
+#define BCE_TXP_FTQ_CTL_MAX_DEPTH (0x3ffL<<12)
+#define BCE_TXP_FTQ_CTL_CUR_DEPTH (0x3ffL<<22)
+
+#define BCE_TXP_SCRATCH 0x00060000
+
+
+/*
+ * tpat_reg definition
+ * offset: 0x80000
+ */
+#define BCE_TPAT_CPU_MODE 0x00085000
+#define BCE_TPAT_CPU_MODE_LOCAL_RST (1L<<0)
+#define BCE_TPAT_CPU_MODE_STEP_ENA (1L<<1)
+#define BCE_TPAT_CPU_MODE_PAGE_0_DATA_ENA (1L<<2)
+#define BCE_TPAT_CPU_MODE_PAGE_0_INST_ENA (1L<<3)
+#define BCE_TPAT_CPU_MODE_MSG_BIT1 (1L<<6)
+#define BCE_TPAT_CPU_MODE_INTERRUPT_ENA (1L<<7)
+#define BCE_TPAT_CPU_MODE_SOFT_HALT (1L<<10)
+#define BCE_TPAT_CPU_MODE_BAD_DATA_HALT_ENA (1L<<11)
+#define BCE_TPAT_CPU_MODE_BAD_INST_HALT_ENA (1L<<12)
+#define BCE_TPAT_CPU_MODE_FIO_ABORT_HALT_ENA (1L<<13)
+#define BCE_TPAT_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA (1L<<15)
+
+#define BCE_TPAT_CPU_STATE 0x00085004
+#define BCE_TPAT_CPU_STATE_BREAKPOINT (1L<<0)
+#define BCE_TPAT_CPU_STATE_BAD_INST_HALTED (1L<<2)
+#define BCE_TPAT_CPU_STATE_PAGE_0_DATA_HALTED (1L<<3)
+#define BCE_TPAT_CPU_STATE_PAGE_0_INST_HALTED (1L<<4)
+#define BCE_TPAT_CPU_STATE_BAD_DATA_ADDR_HALTED (1L<<5)
+#define BCE_TPAT_CPU_STATE_BAD_pc_HALTED (1L<<6)
+#define BCE_TPAT_CPU_STATE_ALIGN_HALTED (1L<<7)
+#define BCE_TPAT_CPU_STATE_FIO_ABORT_HALTED (1L<<8)
+#define BCE_TPAT_CPU_STATE_SOFT_HALTED (1L<<10)
+#define BCE_TPAT_CPU_STATE_SPAD_UNDERFLOW (1L<<11)
+#define BCE_TPAT_CPU_STATE_INTERRRUPT (1L<<12)
+#define BCE_TPAT_CPU_STATE_DATA_ACCESS_STALL (1L<<14)
+#define BCE_TPAT_CPU_STATE_INST_FETCH_STALL (1L<<15)
+#define BCE_TPAT_CPU_STATE_BLOCKED_READ (1L<<31)
+
+#define BCE_TPAT_CPU_EVENT_MASK 0x00085008
+#define BCE_TPAT_CPU_EVENT_MASK_BREAKPOINT_MASK (1L<<0)
+#define BCE_TPAT_CPU_EVENT_MASK_BAD_INST_HALTED_MASK (1L<<2)
+#define BCE_TPAT_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK (1L<<3)
+#define BCE_TPAT_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK (1L<<4)
+#define BCE_TPAT_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK (1L<<5)
+#define BCE_TPAT_CPU_EVENT_MASK_BAD_PC_HALTED_MASK (1L<<6)
+#define BCE_TPAT_CPU_EVENT_MASK_ALIGN_HALTED_MASK (1L<<7)
+#define BCE_TPAT_CPU_EVENT_MASK_FIO_ABORT_MASK (1L<<8)
+#define BCE_TPAT_CPU_EVENT_MASK_SOFT_HALTED_MASK (1L<<10)
+#define BCE_TPAT_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK (1L<<11)
+#define BCE_TPAT_CPU_EVENT_MASK_INTERRUPT_MASK (1L<<12)
+
+#define BCE_TPAT_CPU_PROGRAM_COUNTER 0x0008501c
+#define BCE_TPAT_CPU_INSTRUCTION 0x00085020
+#define BCE_TPAT_CPU_DATA_ACCESS 0x00085024
+#define BCE_TPAT_CPU_INTERRUPT_ENABLE 0x00085028
+#define BCE_TPAT_CPU_INTERRUPT_VECTOR 0x0008502c
+#define BCE_TPAT_CPU_INTERRUPT_SAVED_PC 0x00085030
+#define BCE_TPAT_CPU_HW_BREAKPOINT 0x00085034
+#define BCE_TPAT_CPU_HW_BREAKPOINT_DISABLE (1L<<0)
+#define BCE_TPAT_CPU_HW_BREAKPOINT_ADDRESS (0x3fffffffL<<2)
+
+#define BCE_TPAT_CPU_DEBUG_VECT_PEEK 0x00085038
+#define BCE_TPAT_CPU_DEBUG_VECT_PEEK_1_VALUE (0x7ffL<<0)
+#define BCE_TPAT_CPU_DEBUG_VECT_PEEK_1_PEEK_EN (1L<<11)
+#define BCE_TPAT_CPU_DEBUG_VECT_PEEK_1_SEL (0xfL<<12)
+#define BCE_TPAT_CPU_DEBUG_VECT_PEEK_2_VALUE (0x7ffL<<16)
+#define BCE_TPAT_CPU_DEBUG_VECT_PEEK_2_PEEK_EN (1L<<27)
+#define BCE_TPAT_CPU_DEBUG_VECT_PEEK_2_SEL (0xfL<<28)
+
+#define BCE_TPAT_CPU_LAST_BRANCH_ADDR 0x00085048
+#define BCE_TPAT_CPU_LAST_BRANCH_ADDR_TYPE (1L<<1)
+#define BCE_TPAT_CPU_LAST_BRANCH_ADDR_TYPE_JUMP (0L<<1)
+#define BCE_TPAT_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH (1L<<1)
+#define BCE_TPAT_CPU_LAST_BRANCH_ADDR_LBA (0x3fffffffL<<2)
+
+#define BCE_TPAT_CPU_REG_FILE 0x00085200
+#define BCE_TPAT_FTQ_DATA 0x000853c0
+#define BCE_TPAT_FTQ_CMD 0x000853f8
+#define BCE_TPAT_FTQ_CMD_OFFSET (0x3ffL<<0)
+#define BCE_TPAT_FTQ_CMD_WR_TOP (1L<<10)
+#define BCE_TPAT_FTQ_CMD_WR_TOP_0 (0L<<10)
+#define BCE_TPAT_FTQ_CMD_WR_TOP_1 (1L<<10)
+#define BCE_TPAT_FTQ_CMD_SFT_RESET (1L<<25)
+#define BCE_TPAT_FTQ_CMD_RD_DATA (1L<<26)
+#define BCE_TPAT_FTQ_CMD_ADD_INTERVEN (1L<<27)
+#define BCE_TPAT_FTQ_CMD_ADD_DATA (1L<<28)
+#define BCE_TPAT_FTQ_CMD_INTERVENE_CLR (1L<<29)
+#define BCE_TPAT_FTQ_CMD_POP (1L<<30)
+#define BCE_TPAT_FTQ_CMD_BUSY (1L<<31)
+
+#define BCE_TPAT_FTQ_CTL 0x000853fc
+#define BCE_TPAT_FTQ_CTL_INTERVENE (1L<<0)
+#define BCE_TPAT_FTQ_CTL_OVERFLOW (1L<<1)
+#define BCE_TPAT_FTQ_CTL_FORCE_INTERVENE (1L<<2)
+#define BCE_TPAT_FTQ_CTL_MAX_DEPTH (0x3ffL<<12)
+#define BCE_TPAT_FTQ_CTL_CUR_DEPTH (0x3ffL<<22)
+
+#define BCE_TPAT_SCRATCH 0x000a0000
+
+
+/*
+ * rxp_reg definition
+ * offset: 0xc0000
+ */
+#define BCE_RXP_CPU_MODE 0x000c5000
+#define BCE_RXP_CPU_MODE_LOCAL_RST (1L<<0)
+#define BCE_RXP_CPU_MODE_STEP_ENA (1L<<1)
+#define BCE_RXP_CPU_MODE_PAGE_0_DATA_ENA (1L<<2)
+#define BCE_RXP_CPU_MODE_PAGE_0_INST_ENA (1L<<3)
+#define BCE_RXP_CPU_MODE_MSG_BIT1 (1L<<6)
+#define BCE_RXP_CPU_MODE_INTERRUPT_ENA (1L<<7)
+#define BCE_RXP_CPU_MODE_SOFT_HALT (1L<<10)
+#define BCE_RXP_CPU_MODE_BAD_DATA_HALT_ENA (1L<<11)
+#define BCE_RXP_CPU_MODE_BAD_INST_HALT_ENA (1L<<12)
+#define BCE_RXP_CPU_MODE_FIO_ABORT_HALT_ENA (1L<<13)
+#define BCE_RXP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA (1L<<15)
+
+#define BCE_RXP_CPU_STATE 0x000c5004
+#define BCE_RXP_CPU_STATE_BREAKPOINT (1L<<0)
+#define BCE_RXP_CPU_STATE_BAD_INST_HALTED (1L<<2)
+#define BCE_RXP_CPU_STATE_PAGE_0_DATA_HALTED (1L<<3)
+#define BCE_RXP_CPU_STATE_PAGE_0_INST_HALTED (1L<<4)
+#define BCE_RXP_CPU_STATE_BAD_DATA_ADDR_HALTED (1L<<5)
+#define BCE_RXP_CPU_STATE_BAD_pc_HALTED (1L<<6)
+#define BCE_RXP_CPU_STATE_ALIGN_HALTED (1L<<7)
+#define BCE_RXP_CPU_STATE_FIO_ABORT_HALTED (1L<<8)
+#define BCE_RXP_CPU_STATE_SOFT_HALTED (1L<<10)
+#define BCE_RXP_CPU_STATE_SPAD_UNDERFLOW (1L<<11)
+#define BCE_RXP_CPU_STATE_INTERRRUPT (1L<<12)
+#define BCE_RXP_CPU_STATE_DATA_ACCESS_STALL (1L<<14)
+#define BCE_RXP_CPU_STATE_INST_FETCH_STALL (1L<<15)
+#define BCE_RXP_CPU_STATE_BLOCKED_READ (1L<<31)
+
+#define BCE_RXP_CPU_EVENT_MASK 0x000c5008
+#define BCE_RXP_CPU_EVENT_MASK_BREAKPOINT_MASK (1L<<0)
+#define BCE_RXP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK (1L<<2)
+#define BCE_RXP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK (1L<<3)
+#define BCE_RXP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK (1L<<4)
+#define BCE_RXP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK (1L<<5)
+#define BCE_RXP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK (1L<<6)
+#define BCE_RXP_CPU_EVENT_MASK_ALIGN_HALTED_MASK (1L<<7)
+#define BCE_RXP_CPU_EVENT_MASK_FIO_ABORT_MASK (1L<<8)
+#define BCE_RXP_CPU_EVENT_MASK_SOFT_HALTED_MASK (1L<<10)
+#define BCE_RXP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK (1L<<11)
+#define BCE_RXP_CPU_EVENT_MASK_INTERRUPT_MASK (1L<<12)
+
+#define BCE_RXP_CPU_PROGRAM_COUNTER 0x000c501c
+#define BCE_RXP_CPU_INSTRUCTION 0x000c5020
+#define BCE_RXP_CPU_DATA_ACCESS 0x000c5024
+#define BCE_RXP_CPU_INTERRUPT_ENABLE 0x000c5028
+#define BCE_RXP_CPU_INTERRUPT_VECTOR 0x000c502c
+#define BCE_RXP_CPU_INTERRUPT_SAVED_PC 0x000c5030
+#define BCE_RXP_CPU_HW_BREAKPOINT 0x000c5034
+#define BCE_RXP_CPU_HW_BREAKPOINT_DISABLE (1L<<0)
+#define BCE_RXP_CPU_HW_BREAKPOINT_ADDRESS (0x3fffffffL<<2)
+
+#define BCE_RXP_CPU_DEBUG_VECT_PEEK 0x000c5038
+#define BCE_RXP_CPU_DEBUG_VECT_PEEK_1_VALUE (0x7ffL<<0)
+#define BCE_RXP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN (1L<<11)
+#define BCE_RXP_CPU_DEBUG_VECT_PEEK_1_SEL (0xfL<<12)
+#define BCE_RXP_CPU_DEBUG_VECT_PEEK_2_VALUE (0x7ffL<<16)
+#define BCE_RXP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN (1L<<27)
+#define BCE_RXP_CPU_DEBUG_VECT_PEEK_2_SEL (0xfL<<28)
+
+#define BCE_RXP_CPU_LAST_BRANCH_ADDR 0x000c5048
+#define BCE_RXP_CPU_LAST_BRANCH_ADDR_TYPE (1L<<1)
+#define BCE_RXP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP (0L<<1)
+#define BCE_RXP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH (1L<<1)
+#define BCE_RXP_CPU_LAST_BRANCH_ADDR_LBA (0x3fffffffL<<2)
+
+#define BCE_RXP_CPU_REG_FILE 0x000c5200
+#define BCE_RXP_CFTQ_DATA 0x000c5380
+#define BCE_RXP_CFTQ_CMD 0x000c53b8
+#define BCE_RXP_CFTQ_CMD_OFFSET (0x3ffL<<0)
+#define BCE_RXP_CFTQ_CMD_WR_TOP (1L<<10)
+#define BCE_RXP_CFTQ_CMD_WR_TOP_0 (0L<<10)
+#define BCE_RXP_CFTQ_CMD_WR_TOP_1 (1L<<10)
+#define BCE_RXP_CFTQ_CMD_SFT_RESET (1L<<25)
+#define BCE_RXP_CFTQ_CMD_RD_DATA (1L<<26)
+#define BCE_RXP_CFTQ_CMD_ADD_INTERVEN (1L<<27)
+#define BCE_RXP_CFTQ_CMD_ADD_DATA (1L<<28)
+#define BCE_RXP_CFTQ_CMD_INTERVENE_CLR (1L<<29)
+#define BCE_RXP_CFTQ_CMD_POP (1L<<30)
+#define BCE_RXP_CFTQ_CMD_BUSY (1L<<31)
+
+#define BCE_RXP_CFTQ_CTL 0x000c53bc
+#define BCE_RXP_CFTQ_CTL_INTERVENE (1L<<0)
+#define BCE_RXP_CFTQ_CTL_OVERFLOW (1L<<1)
+#define BCE_RXP_CFTQ_CTL_FORCE_INTERVENE (1L<<2)
+#define BCE_RXP_CFTQ_CTL_MAX_DEPTH (0x3ffL<<12)
+#define BCE_RXP_CFTQ_CTL_CUR_DEPTH (0x3ffL<<22)
+
+#define BCE_RXP_FTQ_DATA 0x000c53c0
+#define BCE_RXP_FTQ_CMD 0x000c53f8
+#define BCE_RXP_FTQ_CMD_OFFSET (0x3ffL<<0)
+#define BCE_RXP_FTQ_CMD_WR_TOP (1L<<10)
+#define BCE_RXP_FTQ_CMD_WR_TOP_0 (0L<<10)
+#define BCE_RXP_FTQ_CMD_WR_TOP_1 (1L<<10)
+#define BCE_RXP_FTQ_CMD_SFT_RESET (1L<<25)
+#define BCE_RXP_FTQ_CMD_RD_DATA (1L<<26)
+#define BCE_RXP_FTQ_CMD_ADD_INTERVEN (1L<<27)
+#define BCE_RXP_FTQ_CMD_ADD_DATA (1L<<28)
+#define BCE_RXP_FTQ_CMD_INTERVENE_CLR (1L<<29)
+#define BCE_RXP_FTQ_CMD_POP (1L<<30)
+#define BCE_RXP_FTQ_CMD_BUSY (1L<<31)
+
+#define BCE_RXP_FTQ_CTL 0x000c53fc
+#define BCE_RXP_FTQ_CTL_INTERVENE (1L<<0)
+#define BCE_RXP_FTQ_CTL_OVERFLOW (1L<<1)
+#define BCE_RXP_FTQ_CTL_FORCE_INTERVENE (1L<<2)
+#define BCE_RXP_FTQ_CTL_MAX_DEPTH (0x3ffL<<12)
+#define BCE_RXP_FTQ_CTL_CUR_DEPTH (0x3ffL<<22)
+
+#define BCE_RXP_SCRATCH 0x000e0000
+
+
+/*
+ * com_reg definition
+ * offset: 0x100000
+ */
+#define BCE_COM_CPU_MODE 0x00105000
+#define BCE_COM_CPU_MODE_LOCAL_RST (1L<<0)
+#define BCE_COM_CPU_MODE_STEP_ENA (1L<<1)
+#define BCE_COM_CPU_MODE_PAGE_0_DATA_ENA (1L<<2)
+#define BCE_COM_CPU_MODE_PAGE_0_INST_ENA (1L<<3)
+#define BCE_COM_CPU_MODE_MSG_BIT1 (1L<<6)
+#define BCE_COM_CPU_MODE_INTERRUPT_ENA (1L<<7)
+#define BCE_COM_CPU_MODE_SOFT_HALT (1L<<10)
+#define BCE_COM_CPU_MODE_BAD_DATA_HALT_ENA (1L<<11)
+#define BCE_COM_CPU_MODE_BAD_INST_HALT_ENA (1L<<12)
+#define BCE_COM_CPU_MODE_FIO_ABORT_HALT_ENA (1L<<13)
+#define BCE_COM_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA (1L<<15)
+
+#define BCE_COM_CPU_STATE 0x00105004
+#define BCE_COM_CPU_STATE_BREAKPOINT (1L<<0)
+#define BCE_COM_CPU_STATE_BAD_INST_HALTED (1L<<2)
+#define BCE_COM_CPU_STATE_PAGE_0_DATA_HALTED (1L<<3)
+#define BCE_COM_CPU_STATE_PAGE_0_INST_HALTED (1L<<4)
+#define BCE_COM_CPU_STATE_BAD_DATA_ADDR_HALTED (1L<<5)
+#define BCE_COM_CPU_STATE_BAD_pc_HALTED (1L<<6)
+#define BCE_COM_CPU_STATE_ALIGN_HALTED (1L<<7)
+#define BCE_COM_CPU_STATE_FIO_ABORT_HALTED (1L<<8)
+#define BCE_COM_CPU_STATE_SOFT_HALTED (1L<<10)
+#define BCE_COM_CPU_STATE_SPAD_UNDERFLOW (1L<<11)
+#define BCE_COM_CPU_STATE_INTERRRUPT (1L<<12)
+#define BCE_COM_CPU_STATE_DATA_ACCESS_STALL (1L<<14)
+#define BCE_COM_CPU_STATE_INST_FETCH_STALL (1L<<15)
+#define BCE_COM_CPU_STATE_BLOCKED_READ (1L<<31)
+
+#define BCE_COM_CPU_EVENT_MASK 0x00105008
+#define BCE_COM_CPU_EVENT_MASK_BREAKPOINT_MASK (1L<<0)
+#define BCE_COM_CPU_EVENT_MASK_BAD_INST_HALTED_MASK (1L<<2)
+#define BCE_COM_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK (1L<<3)
+#define BCE_COM_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK (1L<<4)
+#define BCE_COM_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK (1L<<5)
+#define BCE_COM_CPU_EVENT_MASK_BAD_PC_HALTED_MASK (1L<<6)
+#define BCE_COM_CPU_EVENT_MASK_ALIGN_HALTED_MASK (1L<<7)
+#define BCE_COM_CPU_EVENT_MASK_FIO_ABORT_MASK (1L<<8)
+#define BCE_COM_CPU_EVENT_MASK_SOFT_HALTED_MASK (1L<<10)
+#define BCE_COM_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK (1L<<11)
+#define BCE_COM_CPU_EVENT_MASK_INTERRUPT_MASK (1L<<12)
+
+#define BCE_COM_CPU_PROGRAM_COUNTER 0x0010501c
+#define BCE_COM_CPU_INSTRUCTION 0x00105020
+#define BCE_COM_CPU_DATA_ACCESS 0x00105024
+#define BCE_COM_CPU_INTERRUPT_ENABLE 0x00105028
+#define BCE_COM_CPU_INTERRUPT_VECTOR 0x0010502c
+#define BCE_COM_CPU_INTERRUPT_SAVED_PC 0x00105030
+#define BCE_COM_CPU_HW_BREAKPOINT 0x00105034
+#define BCE_COM_CPU_HW_BREAKPOINT_DISABLE (1L<<0)
+#define BCE_COM_CPU_HW_BREAKPOINT_ADDRESS (0x3fffffffL<<2)
+
+#define BCE_COM_CPU_DEBUG_VECT_PEEK 0x00105038
+#define BCE_COM_CPU_DEBUG_VECT_PEEK_1_VALUE (0x7ffL<<0)
+#define BCE_COM_CPU_DEBUG_VECT_PEEK_1_PEEK_EN (1L<<11)
+#define BCE_COM_CPU_DEBUG_VECT_PEEK_1_SEL (0xfL<<12)
+#define BCE_COM_CPU_DEBUG_VECT_PEEK_2_VALUE (0x7ffL<<16)
+#define BCE_COM_CPU_DEBUG_VECT_PEEK_2_PEEK_EN (1L<<27)
+#define BCE_COM_CPU_DEBUG_VECT_PEEK_2_SEL (0xfL<<28)
+
+#define BCE_COM_CPU_LAST_BRANCH_ADDR 0x00105048
+#define BCE_COM_CPU_LAST_BRANCH_ADDR_TYPE (1L<<1)
+#define BCE_COM_CPU_LAST_BRANCH_ADDR_TYPE_JUMP (0L<<1)
+#define BCE_COM_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH (1L<<1)
+#define BCE_COM_CPU_LAST_BRANCH_ADDR_LBA (0x3fffffffL<<2)
+
+#define BCE_COM_CPU_REG_FILE 0x00105200
+#define BCE_COM_COMXQ_FTQ_DATA 0x00105340
+#define BCE_COM_COMXQ_FTQ_CMD 0x00105378
+#define BCE_COM_COMXQ_FTQ_CMD_OFFSET (0x3ffL<<0)
+#define BCE_COM_COMXQ_FTQ_CMD_WR_TOP (1L<<10)
+#define BCE_COM_COMXQ_FTQ_CMD_WR_TOP_0 (0L<<10)
+#define BCE_COM_COMXQ_FTQ_CMD_WR_TOP_1 (1L<<10)
+#define BCE_COM_COMXQ_FTQ_CMD_SFT_RESET (1L<<25)
+#define BCE_COM_COMXQ_FTQ_CMD_RD_DATA (1L<<26)
+#define BCE_COM_COMXQ_FTQ_CMD_ADD_INTERVEN (1L<<27)
+#define BCE_COM_COMXQ_FTQ_CMD_ADD_DATA (1L<<28)
+#define BCE_COM_COMXQ_FTQ_CMD_INTERVENE_CLR (1L<<29)
+#define BCE_COM_COMXQ_FTQ_CMD_POP (1L<<30)
+#define BCE_COM_COMXQ_FTQ_CMD_BUSY (1L<<31)
+
+#define BCE_COM_COMXQ_FTQ_CTL 0x0010537c
+#define BCE_COM_COMXQ_FTQ_CTL_INTERVENE (1L<<0)
+#define BCE_COM_COMXQ_FTQ_CTL_OVERFLOW (1L<<1)
+#define BCE_COM_COMXQ_FTQ_CTL_FORCE_INTERVENE (1L<<2)
+#define BCE_COM_COMXQ_FTQ_CTL_MAX_DEPTH (0x3ffL<<12)
+#define BCE_COM_COMXQ_FTQ_CTL_CUR_DEPTH (0x3ffL<<22)
+
+#define BCE_COM_COMTQ_FTQ_DATA 0x00105380
+#define BCE_COM_COMTQ_FTQ_CMD 0x001053b8
+#define BCE_COM_COMTQ_FTQ_CMD_OFFSET (0x3ffL<<0)
+#define BCE_COM_COMTQ_FTQ_CMD_WR_TOP (1L<<10)
+#define BCE_COM_COMTQ_FTQ_CMD_WR_TOP_0 (0L<<10)
+#define BCE_COM_COMTQ_FTQ_CMD_WR_TOP_1 (1L<<10)
+#define BCE_COM_COMTQ_FTQ_CMD_SFT_RESET (1L<<25)
+#define BCE_COM_COMTQ_FTQ_CMD_RD_DATA (1L<<26)
+#define BCE_COM_COMTQ_FTQ_CMD_ADD_INTERVEN (1L<<27)
+#define BCE_COM_COMTQ_FTQ_CMD_ADD_DATA (1L<<28)
+#define BCE_COM_COMTQ_FTQ_CMD_INTERVENE_CLR (1L<<29)
+#define BCE_COM_COMTQ_FTQ_CMD_POP (1L<<30)
+#define BCE_COM_COMTQ_FTQ_CMD_BUSY (1L<<31)
+
+#define BCE_COM_COMTQ_FTQ_CTL 0x001053bc
+#define BCE_COM_COMTQ_FTQ_CTL_INTERVENE (1L<<0)
+#define BCE_COM_COMTQ_FTQ_CTL_OVERFLOW (1L<<1)
+#define BCE_COM_COMTQ_FTQ_CTL_FORCE_INTERVENE (1L<<2)
+#define BCE_COM_COMTQ_FTQ_CTL_MAX_DEPTH (0x3ffL<<12)
+#define BCE_COM_COMTQ_FTQ_CTL_CUR_DEPTH (0x3ffL<<22)
+
+#define BCE_COM_COMQ_FTQ_DATA 0x001053c0
+#define BCE_COM_COMQ_FTQ_CMD 0x001053f8
+#define BCE_COM_COMQ_FTQ_CMD_OFFSET (0x3ffL<<0)
+#define BCE_COM_COMQ_FTQ_CMD_WR_TOP (1L<<10)
+#define BCE_COM_COMQ_FTQ_CMD_WR_TOP_0 (0L<<10)
+#define BCE_COM_COMQ_FTQ_CMD_WR_TOP_1 (1L<<10)
+#define BCE_COM_COMQ_FTQ_CMD_SFT_RESET (1L<<25)
+#define BCE_COM_COMQ_FTQ_CMD_RD_DATA (1L<<26)
+#define BCE_COM_COMQ_FTQ_CMD_ADD_INTERVEN (1L<<27)
+#define BCE_COM_COMQ_FTQ_CMD_ADD_DATA (1L<<28)
+#define BCE_COM_COMQ_FTQ_CMD_INTERVENE_CLR (1L<<29)
+#define BCE_COM_COMQ_FTQ_CMD_POP (1L<<30)
+#define BCE_COM_COMQ_FTQ_CMD_BUSY (1L<<31)
+
+#define BCE_COM_COMQ_FTQ_CTL 0x001053fc
+#define BCE_COM_COMQ_FTQ_CTL_INTERVENE (1L<<0)
+#define BCE_COM_COMQ_FTQ_CTL_OVERFLOW (1L<<1)
+#define BCE_COM_COMQ_FTQ_CTL_FORCE_INTERVENE (1L<<2)
+#define BCE_COM_COMQ_FTQ_CTL_MAX_DEPTH (0x3ffL<<12)
+#define BCE_COM_COMQ_FTQ_CTL_CUR_DEPTH (0x3ffL<<22)
+
+#define BCE_COM_SCRATCH 0x00120000
+
+
+/*
+ * cp_reg definition
+ * offset: 0x180000
+ */
+#define BCE_CP_CPU_MODE 0x00185000
+#define BCE_CP_CPU_MODE_LOCAL_RST (1L<<0)
+#define BCE_CP_CPU_MODE_STEP_ENA (1L<<1)
+#define BCE_CP_CPU_MODE_PAGE_0_DATA_ENA (1L<<2)
+#define BCE_CP_CPU_MODE_PAGE_0_INST_ENA (1L<<3)
+#define BCE_CP_CPU_MODE_MSG_BIT1 (1L<<6)
+#define BCE_CP_CPU_MODE_INTERRUPT_ENA (1L<<7)
+#define BCE_CP_CPU_MODE_SOFT_HALT (1L<<10)
+#define BCE_CP_CPU_MODE_BAD_DATA_HALT_ENA (1L<<11)
+#define BCE_CP_CPU_MODE_BAD_INST_HALT_ENA (1L<<12)
+#define BCE_CP_CPU_MODE_FIO_ABORT_HALT_ENA (1L<<13)
+#define BCE_CP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA (1L<<15)
+
+#define BCE_CP_CPU_STATE 0x00185004
+#define BCE_CP_CPU_STATE_BREAKPOINT (1L<<0)
+#define BCE_CP_CPU_STATE_BAD_INST_HALTED (1L<<2)
+#define BCE_CP_CPU_STATE_PAGE_0_DATA_HALTED (1L<<3)
+#define BCE_CP_CPU_STATE_PAGE_0_INST_HALTED (1L<<4)
+#define BCE_CP_CPU_STATE_BAD_DATA_ADDR_HALTED (1L<<5)
+#define BCE_CP_CPU_STATE_BAD_pc_HALTED (1L<<6)
+#define BCE_CP_CPU_STATE_ALIGN_HALTED (1L<<7)
+#define BCE_CP_CPU_STATE_FIO_ABORT_HALTED (1L<<8)
+#define BCE_CP_CPU_STATE_SOFT_HALTED (1L<<10)
+#define BCE_CP_CPU_STATE_SPAD_UNDERFLOW (1L<<11)
+#define BCE_CP_CPU_STATE_INTERRRUPT (1L<<12)
+#define BCE_CP_CPU_STATE_DATA_ACCESS_STALL (1L<<14)
+#define BCE_CP_CPU_STATE_INST_FETCH_STALL (1L<<15)
+#define BCE_CP_CPU_STATE_BLOCKED_READ (1L<<31)
+
+#define BCE_CP_CPU_EVENT_MASK 0x00185008
+#define BCE_CP_CPU_EVENT_MASK_BREAKPOINT_MASK (1L<<0)
+#define BCE_CP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK (1L<<2)
+#define BCE_CP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK (1L<<3)
+#define BCE_CP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK (1L<<4)
+#define BCE_CP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK (1L<<5)
+#define BCE_CP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK (1L<<6)
+#define BCE_CP_CPU_EVENT_MASK_ALIGN_HALTED_MASK (1L<<7)
+#define BCE_CP_CPU_EVENT_MASK_FIO_ABORT_MASK (1L<<8)
+#define BCE_CP_CPU_EVENT_MASK_SOFT_HALTED_MASK (1L<<10)
+#define BCE_CP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK (1L<<11)
+#define BCE_CP_CPU_EVENT_MASK_INTERRUPT_MASK (1L<<12)
+
+#define BCE_CP_CPU_PROGRAM_COUNTER 0x0018501c
+#define BCE_CP_CPU_INSTRUCTION 0x00185020
+#define BCE_CP_CPU_DATA_ACCESS 0x00185024
+#define BCE_CP_CPU_INTERRUPT_ENABLE 0x00185028
+#define BCE_CP_CPU_INTERRUPT_VECTOR 0x0018502c
+#define BCE_CP_CPU_INTERRUPT_SAVED_PC 0x00185030
+#define BCE_CP_CPU_HW_BREAKPOINT 0x00185034
+#define BCE_CP_CPU_HW_BREAKPOINT_DISABLE (1L<<0)
+#define BCE_CP_CPU_HW_BREAKPOINT_ADDRESS (0x3fffffffL<<2)
+
+#define BCE_CP_CPU_DEBUG_VECT_PEEK 0x00185038
+#define BCE_CP_CPU_DEBUG_VECT_PEEK_1_VALUE (0x7ffL<<0)
+#define BCE_CP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN (1L<<11)
+#define BCE_CP_CPU_DEBUG_VECT_PEEK_1_SEL (0xfL<<12)
+#define BCE_CP_CPU_DEBUG_VECT_PEEK_2_VALUE (0x7ffL<<16)
+#define BCE_CP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN (1L<<27)
+#define BCE_CP_CPU_DEBUG_VECT_PEEK_2_SEL (0xfL<<28)
+
+#define BCE_CP_CPU_LAST_BRANCH_ADDR 0x00185048
+#define BCE_CP_CPU_LAST_BRANCH_ADDR_TYPE (1L<<1)
+#define BCE_CP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP (0L<<1)
+#define BCE_CP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH (1L<<1)
+#define BCE_CP_CPU_LAST_BRANCH_ADDR_LBA (0x3fffffffL<<2)
+
+#define BCE_CP_CPU_REG_FILE 0x00185200
+#define BCE_CP_CPQ_FTQ_DATA 0x001853c0
+#define BCE_CP_CPQ_FTQ_CMD 0x001853f8
+#define BCE_CP_CPQ_FTQ_CMD_OFFSET (0x3ffL<<0)
+#define BCE_CP_CPQ_FTQ_CMD_WR_TOP (1L<<10)
+#define BCE_CP_CPQ_FTQ_CMD_WR_TOP_0 (0L<<10)
+#define BCE_CP_CPQ_FTQ_CMD_WR_TOP_1 (1L<<10)
+#define BCE_CP_CPQ_FTQ_CMD_SFT_RESET (1L<<25)
+#define BCE_CP_CPQ_FTQ_CMD_RD_DATA (1L<<26)
+#define BCE_CP_CPQ_FTQ_CMD_ADD_INTERVEN (1L<<27)
+#define BCE_CP_CPQ_FTQ_CMD_ADD_DATA (1L<<28)
+#define BCE_CP_CPQ_FTQ_CMD_INTERVENE_CLR (1L<<29)
+#define BCE_CP_CPQ_FTQ_CMD_POP (1L<<30)
+#define BCE_CP_CPQ_FTQ_CMD_BUSY (1L<<31)
+
+#define BCE_CP_CPQ_FTQ_CTL 0x001853fc
+#define BCE_CP_CPQ_FTQ_CTL_INTERVENE (1L<<0)
+#define BCE_CP_CPQ_FTQ_CTL_OVERFLOW (1L<<1)
+#define BCE_CP_CPQ_FTQ_CTL_FORCE_INTERVENE (1L<<2)
+#define BCE_CP_CPQ_FTQ_CTL_MAX_DEPTH (0x3ffL<<12)
+#define BCE_CP_CPQ_FTQ_CTL_CUR_DEPTH (0x3ffL<<22)
+
+#define BCE_CP_SCRATCH 0x001a0000
+
+
+/*
+ * mcp_reg definition
+ * offset: 0x140000
+ */
+#define BCE_MCP_CPU_MODE 0x00145000
+#define BCE_MCP_CPU_MODE_LOCAL_RST (1L<<0)
+#define BCE_MCP_CPU_MODE_STEP_ENA (1L<<1)
+#define BCE_MCP_CPU_MODE_PAGE_0_DATA_ENA (1L<<2)
+#define BCE_MCP_CPU_MODE_PAGE_0_INST_ENA (1L<<3)
+#define BCE_MCP_CPU_MODE_MSG_BIT1 (1L<<6)
+#define BCE_MCP_CPU_MODE_INTERRUPT_ENA (1L<<7)
+#define BCE_MCP_CPU_MODE_SOFT_HALT (1L<<10)
+#define BCE_MCP_CPU_MODE_BAD_DATA_HALT_ENA (1L<<11)
+#define BCE_MCP_CPU_MODE_BAD_INST_HALT_ENA (1L<<12)
+#define BCE_MCP_CPU_MODE_FIO_ABORT_HALT_ENA (1L<<13)
+#define BCE_MCP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA (1L<<15)
+
+#define BCE_MCP_CPU_STATE 0x00145004
+#define BCE_MCP_CPU_STATE_BREAKPOINT (1L<<0)
+#define BCE_MCP_CPU_STATE_BAD_INST_HALTED (1L<<2)
+#define BCE_MCP_CPU_STATE_PAGE_0_DATA_HALTED (1L<<3)
+#define BCE_MCP_CPU_STATE_PAGE_0_INST_HALTED (1L<<4)
+#define BCE_MCP_CPU_STATE_BAD_DATA_ADDR_HALTED (1L<<5)
+#define BCE_MCP_CPU_STATE_BAD_pc_HALTED (1L<<6)
+#define BCE_MCP_CPU_STATE_ALIGN_HALTED (1L<<7)
+#define BCE_MCP_CPU_STATE_FIO_ABORT_HALTED (1L<<8)
+#define BCE_MCP_CPU_STATE_SOFT_HALTED (1L<<10)
+#define BCE_MCP_CPU_STATE_SPAD_UNDERFLOW (1L<<11)
+#define BCE_MCP_CPU_STATE_INTERRRUPT (1L<<12)
+#define BCE_MCP_CPU_STATE_DATA_ACCESS_STALL (1L<<14)
+#define BCE_MCP_CPU_STATE_INST_FETCH_STALL (1L<<15)
+#define BCE_MCP_CPU_STATE_BLOCKED_READ (1L<<31)
+
+#define BCE_MCP_CPU_EVENT_MASK 0x00145008
+#define BCE_MCP_CPU_EVENT_MASK_BREAKPOINT_MASK (1L<<0)
+#define BCE_MCP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK (1L<<2)
+#define BCE_MCP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK (1L<<3)
+#define BCE_MCP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK (1L<<4)
+#define BCE_MCP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK (1L<<5)
+#define BCE_MCP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK (1L<<6)
+#define BCE_MCP_CPU_EVENT_MASK_ALIGN_HALTED_MASK (1L<<7)
+#define BCE_MCP_CPU_EVENT_MASK_FIO_ABORT_MASK (1L<<8)
+#define BCE_MCP_CPU_EVENT_MASK_SOFT_HALTED_MASK (1L<<10)
+#define BCE_MCP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK (1L<<11)
+#define BCE_MCP_CPU_EVENT_MASK_INTERRUPT_MASK (1L<<12)
+
+#define BCE_MCP_CPU_PROGRAM_COUNTER 0x0014501c
+#define BCE_MCP_CPU_INSTRUCTION 0x00145020
+#define BCE_MCP_CPU_DATA_ACCESS 0x00145024
+#define BCE_MCP_CPU_INTERRUPT_ENABLE 0x00145028
+#define BCE_MCP_CPU_INTERRUPT_VECTOR 0x0014502c
+#define BCE_MCP_CPU_INTERRUPT_SAVED_PC 0x00145030
+#define BCE_MCP_CPU_HW_BREAKPOINT 0x00145034
+#define BCE_MCP_CPU_HW_BREAKPOINT_DISABLE (1L<<0)
+#define BCE_MCP_CPU_HW_BREAKPOINT_ADDRESS (0x3fffffffL<<2)
+
+#define BCE_MCP_CPU_DEBUG_VECT_PEEK 0x00145038
+#define BCE_MCP_CPU_DEBUG_VECT_PEEK_1_VALUE (0x7ffL<<0)
+#define BCE_MCP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN (1L<<11)
+#define BCE_MCP_CPU_DEBUG_VECT_PEEK_1_SEL (0xfL<<12)
+#define BCE_MCP_CPU_DEBUG_VECT_PEEK_2_VALUE (0x7ffL<<16)
+#define BCE_MCP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN (1L<<27)
+#define BCE_MCP_CPU_DEBUG_VECT_PEEK_2_SEL (0xfL<<28)
+
+#define BCE_MCP_CPU_LAST_BRANCH_ADDR 0x00145048
+#define BCE_MCP_CPU_LAST_BRANCH_ADDR_TYPE (1L<<1)
+#define BCE_MCP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP (0L<<1)
+#define BCE_MCP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH (1L<<1)
+#define BCE_MCP_CPU_LAST_BRANCH_ADDR_LBA (0x3fffffffL<<2)
+
+#define BCE_MCP_CPU_REG_FILE 0x00145200
+#define BCE_MCP_MCPQ_FTQ_DATA 0x001453c0
+#define BCE_MCP_MCPQ_FTQ_CMD 0x001453f8
+#define BCE_MCP_MCPQ_FTQ_CMD_OFFSET (0x3ffL<<0)
+#define BCE_MCP_MCPQ_FTQ_CMD_WR_TOP (1L<<10)
+#define BCE_MCP_MCPQ_FTQ_CMD_WR_TOP_0 (0L<<10)
+#define BCE_MCP_MCPQ_FTQ_CMD_WR_TOP_1 (1L<<10)
+#define BCE_MCP_MCPQ_FTQ_CMD_SFT_RESET (1L<<25)
+#define BCE_MCP_MCPQ_FTQ_CMD_RD_DATA (1L<<26)
+#define BCE_MCP_MCPQ_FTQ_CMD_ADD_INTERVEN (1L<<27)
+#define BCE_MCP_MCPQ_FTQ_CMD_ADD_DATA (1L<<28)
+#define BCE_MCP_MCPQ_FTQ_CMD_INTERVENE_CLR (1L<<29)
+#define BCE_MCP_MCPQ_FTQ_CMD_POP (1L<<30)
+#define BCE_MCP_MCPQ_FTQ_CMD_BUSY (1L<<31)
+
+#define BCE_MCP_MCPQ_FTQ_CTL 0x001453fc
+#define BCE_MCP_MCPQ_FTQ_CTL_INTERVENE (1L<<0)
+#define BCE_MCP_MCPQ_FTQ_CTL_OVERFLOW (1L<<1)
+#define BCE_MCP_MCPQ_FTQ_CTL_FORCE_INTERVENE (1L<<2)
+#define BCE_MCP_MCPQ_FTQ_CTL_MAX_DEPTH (0x3ffL<<12)
+#define BCE_MCP_MCPQ_FTQ_CTL_CUR_DEPTH (0x3ffL<<22)
+
+#define BCE_MCP_ROM 0x00150000
+#define BCE_MCP_SCRATCH 0x00160000
+
+#define BCE_SHM_HDR_SIGNATURE BCE_MCP_SCRATCH
+#define BCE_SHM_HDR_SIGNATURE_SIG_MASK 0xffff0000
+#define BCE_SHM_HDR_SIGNATURE_SIG 0x53530000
+#define BCE_SHM_HDR_SIGNATURE_VER_MASK 0x000000ff
+#define BCE_SHM_HDR_SIGNATURE_VER_ONE 0x00000001
+
+#define BCE_SHM_HDR_ADDR_0 BCE_MCP_SCRATCH + 4
+#define BCE_SHM_HDR_ADDR_1 BCE_MCP_SCRATCH + 8
+
+/****************************************************************************/
+/* End machine generated definitions. */
+/****************************************************************************/
+
+#define NUM_MC_HASH_REGISTERS 8
+
+
+/* PHY_ID1: bits 31-16; PHY_ID2: bits 15-0. */
+#define PHY_BCM5706_PHY_ID 0x00206160
+
+#define PHY_ID(id) ((id) & 0xfffffff0)
+#define PHY_REV_ID(id) ((id) & 0xf)
+
+/* 5708 Serdes PHY registers */
+
+#define BCM5708S_UP1 0xb
+
+#define BCM5708S_UP1_2G5 0x1
+
+#define BCM5708S_BLK_ADDR 0x1f
+
+#define BCM5708S_BLK_ADDR_DIG 0x0000
+#define BCM5708S_BLK_ADDR_DIG3 0x0002
+#define BCM5708S_BLK_ADDR_TX_MISC 0x0005
+
+/* Digital Block */
+#define BCM5708S_1000X_CTL1 0x10
+
+#define BCM5708S_1000X_CTL1_FIBER_MODE 0x0001
+#define BCM5708S_1000X_CTL1_AUTODET_EN 0x0010
+
+#define BCM5708S_1000X_CTL2 0x11
+
+#define BCM5708S_1000X_CTL2_PLLEL_DET_EN 0x0001
+
+#define BCM5708S_1000X_STAT1 0x14
+
+#define BCM5708S_1000X_STAT1_SGMII 0x0001
+#define BCM5708S_1000X_STAT1_LINK 0x0002
+#define BCM5708S_1000X_STAT1_FD 0x0004
+#define BCM5708S_1000X_STAT1_SPEED_MASK 0x0018
+#define BCM5708S_1000X_STAT1_SPEED_10 0x0000
+#define BCM5708S_1000X_STAT1_SPEED_100 0x0008
+#define BCM5708S_1000X_STAT1_SPEED_1G 0x0010
+#define BCM5708S_1000X_STAT1_SPEED_2G5 0x0018
+#define BCM5708S_1000X_STAT1_TX_PAUSE 0x0020
+#define BCM5708S_1000X_STAT1_RX_PAUSE 0x0040
+
+/* Digital3 Block */
+#define BCM5708S_DIG_3_0 0x10
+
+#define BCM5708S_DIG_3_0_USE_IEEE 0x0001
+
+/* Tx/Misc Block */
+#define BCM5708S_TX_ACTL1 0x15
+
+#define BCM5708S_TX_ACTL1_DRIVER_VCM 0x30
+
+#define BCM5708S_TX_ACTL3 0x17
+
+#define RX_COPY_THRESH 92
+
+#define DMA_READ_CHANS 5
+#define DMA_WRITE_CHANS 3
+
+/* Use the natural page size of the host CPU. */
+/* XXX: This has only been tested on amd64/i386 systems using 4KB pages. */
+#define BCM_PAGE_BITS PAGE_SHIFT
+#define BCM_PAGE_SIZE PAGE_SIZE
+
+#define TX_PAGES 2
+#define TOTAL_TX_BD_PER_PAGE (BCM_PAGE_SIZE / sizeof(struct tx_bd))
+#define USABLE_TX_BD_PER_PAGE (TOTAL_TX_BD_PER_PAGE - 1)
+#define TOTAL_TX_BD (TOTAL_TX_BD_PER_PAGE * TX_PAGES)
+#define USABLE_TX_BD (USABLE_TX_BD_PER_PAGE * TX_PAGES)
+#define MAX_TX_BD (TOTAL_TX_BD - 1)
+#define BCE_TX_SLACK_SPACE 16
+
+#define RX_PAGES 2
+#define TOTAL_RX_BD_PER_PAGE (BCM_PAGE_SIZE / sizeof(struct rx_bd))
+#define USABLE_RX_BD_PER_PAGE (TOTAL_RX_BD_PER_PAGE - 1)
+#define TOTAL_RX_BD (TOTAL_RX_BD_PER_PAGE * RX_PAGES)
+#define USABLE_RX_BD (USABLE_RX_BD_PER_PAGE * RX_PAGES)
+#define MAX_RX_BD (TOTAL_RX_BD - 1)
+#define BCE_RX_SLACK_SPACE (MAX_RX_BD - 8)
+
+#define NEXT_TX_BD(x) (((x) & USABLE_TX_BD_PER_PAGE) == \
+ (USABLE_TX_BD_PER_PAGE - 1)) ? \
+ (x) + 2 : (x) + 1
+
+#define TX_CHAIN_IDX(x) ((x) & MAX_TX_BD)
+
+#define TX_PAGE(x) (((x) & ~USABLE_TX_BD_PER_PAGE) >> 8)
+#define TX_IDX(x) ((x) & USABLE_TX_BD_PER_PAGE)
+
+#define NEXT_RX_BD(x) (((x) & USABLE_RX_BD_PER_PAGE) == \
+ (USABLE_RX_BD_PER_PAGE - 1)) ? \
+ (x) + 2 : (x) + 1
+
+#define RX_CHAIN_IDX(x) ((x) & MAX_RX_BD)
+
+#define RX_PAGE(x) (((x) & ~USABLE_RX_BD_PER_PAGE) >> 8)
+#define RX_IDX(x) ((x) & USABLE_RX_BD_PER_PAGE)
+
+/* Context size. */
+#define CTX_SHIFT 7
+#define CTX_SIZE (1 << CTX_SHIFT)
+#define CTX_MASK (CTX_SIZE - 1)
+#define GET_CID_ADDR(_cid) ((_cid) << CTX_SHIFT)
+#define GET_CID(_cid_addr) ((_cid_addr) >> CTX_SHIFT)
+
+#define PHY_CTX_SHIFT 6
+#define PHY_CTX_SIZE (1 << PHY_CTX_SHIFT)
+#define PHY_CTX_MASK (PHY_CTX_SIZE - 1)
+#define GET_PCID_ADDR(_pcid) ((_pcid) << PHY_CTX_SHIFT)
+#define GET_PCID(_pcid_addr) ((_pcid_addr) >> PHY_CTX_SHIFT)
+
+#define MB_KERNEL_CTX_SHIFT 8
+#define MB_KERNEL_CTX_SIZE (1 << MB_KERNEL_CTX_SHIFT)
+#define MB_KERNEL_CTX_MASK (MB_KERNEL_CTX_SIZE - 1)
+#define MB_GET_CID_ADDR(_cid) (0x10000 + ((_cid) << MB_KERNEL_CTX_SHIFT))
+
+#define MAX_CID_CNT 0x4000
+#define MAX_CID_ADDR (GET_CID_ADDR(MAX_CID_CNT))
+#define INVALID_CID_ADDR 0xffffffff
+
+#define TX_CID 16
+#define RX_CID 0
+
+#define MB_TX_CID_ADDR MB_GET_CID_ADDR(TX_CID)
+#define MB_RX_CID_ADDR MB_GET_CID_ADDR(RX_CID)
+
+/****************************************************************************/
+/* BCE Processor Firmwware Load Definitions */
+/****************************************************************************/
+
+struct cpu_reg {
+ u32 mode;
+ u32 mode_value_halt;
+ u32 mode_value_sstep;
+
+ u32 state;
+ u32 state_value_clear;
+
+ u32 gpr0;
+ u32 evmask;
+ u32 pc;
+ u32 inst;
+ u32 bp;
+
+ u32 spad_base;
+
+ u32 mips_view_base;
+};
+
+struct fw_info {
+ u32 ver_major;
+ u32 ver_minor;
+ u32 ver_fix;
+
+ u32 start_addr;
+
+ /* Text section. */
+ u32 text_addr;
+ u32 text_len;
+ u32 text_index;
+ u32 *text;
+
+ /* Data section. */
+ u32 data_addr;
+ u32 data_len;
+ u32 data_index;
+ u32 *data;
+
+ /* SBSS section. */
+ u32 sbss_addr;
+ u32 sbss_len;
+ u32 sbss_index;
+ u32 *sbss;
+
+ /* BSS section. */
+ u32 bss_addr;
+ u32 bss_len;
+ u32 bss_index;
+ u32 *bss;
+
+ /* Read-only section. */
+ u32 rodata_addr;
+ u32 rodata_len;
+ u32 rodata_index;
+ u32 *rodata;
+};
+
+#define RV2P_PROC1 0
+#define RV2P_PROC2 1
+
+#define BCE_MIREG(x) ((x & 0x1F) << 16)
+#define BCE_MIPHY(x) ((x & 0x1F) << 21)
+#define BCE_PHY_TIMEOUT 50
+
+#define BCE_NVRAM_SIZE 0x200
+#define BCE_NVRAM_MAGIC 0x669955aa
+#define BCE_CRC32_RESIDUAL 0xdebb20e3
+
+#define BCE_TX_TIMEOUT 5
+
+#define BCE_MAX_SEGMENTS 8
+#define BCE_DMA_ALIGN 8
+#define BCE_DMA_BOUNDARY 0
+
+/* The BCM5708 has a problem with addresses greater that 40bits. */
+/* Handle the sizing issue in an architecture agnostic fashion. */
+#if (BUS_SPACE_MAXADDR < 0xFFFFFFFFFF)
+#define BCE_BUS_SPACE_MAXADDR BUS_SPACE_MAXADDR
+#else
+#define BCE_BUS_SPACE_MAXADDR 0xFFFFFFFFFF
+#endif
+
+#define BCE_IF_HWASSIST (CSUM_IP | CSUM_TCP | CSUM_UDP)
+
+#if __FreeBSD_version < 700000
+#define BCE_IF_CAPABILITIES (IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | \
+ IFCAP_HWCSUM | IFCAP_JUMBO_MTU)
+#else
+#define BCE_IF_CAPABILITIES (IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | \
+ IFCAP_HWCSUM | IFCAP_JUMBO_MTU | IFCAP_VLAN_HWCSUM)
+#endif
+
+#define BCE_MIN_MTU 60
+#define BCE_MIN_ETHER_MTU 64
+
+#define BCE_MAX_STD_MTU 1500
+#define BCE_MAX_STD_ETHER_MTU 1518
+#define BCE_MAX_STD_ETHER_MTU_VLAN 1522
+
+#define BCE_MAX_JUMBO_MTU 9000
+#define BCE_MAX_JUMBO_ETHER_MTU 9018
+#define BCE_MAX_JUMBO_ETHER_MTU_VLAN 9022
+
+// #define BCE_MAX_MTU ETHER_MAX_LEN_JUMBO + ETHER_VLAN_ENCAP_LEN /* 9022 */
+
+/****************************************************************************/
+/* BCE Device State Data Structure */
+/****************************************************************************/
+
+#define BCE_STATUS_BLK_SZ sizeof(struct status_block)
+#define BCE_STATS_BLK_SZ sizeof(struct statistics_block)
+#define BCE_TX_CHAIN_PAGE_SZ BCM_PAGE_SIZE
+#define BCE_RX_CHAIN_PAGE_SZ BCM_PAGE_SIZE
+/*
+ * Mbuf pointers. We need these to keep track of the virtual addresses
+ * of our mbuf chains since we can only convert from physical to virtual,
+ * not the other way around.
+ */
+
+struct bce_dmamap_arg {
+ struct bce_softc *sc; /* Pointer back to device context */
+ bus_addr_t busaddr; /* Physical address of mapped memory */
+ u32 tx_flags; /* Flags for frame transmit */
+ u16 prod;
+ u16 chain_prod;
+ int maxsegs; /* Max segments supported for this mapped memory */
+ u32 prod_bseq;
+ struct tx_bd *tx_chain[TX_PAGES];
+};
+
+
+struct bce_softc
+{
+ /* MUST start with ifnet pointer (see definition of miibus_statchg()) */
+ struct ifnet *bce_ifp; /* Interface info */
+ device_t bce_dev; /* Parent device handle */
+ u_int8_t bce_unit; /* Interface number */
+ struct resource *bce_res; /* Device resource handle */
+ struct ifmedia bce_ifmedia; /* TBI media info */
+ bus_space_tag_t bce_btag; /* Device bus tag */
+ bus_space_handle_t bce_bhandle; /* Device bus handle */
+ vm_offset_t bce_vhandle; /* Device virtual memory handle */
+ struct resource *bce_irq; /* IRQ Resource Handle */
+ struct mtx bce_mtx; /* Mutex */
+ void *bce_intrhand; /* Interrupt handler */
+
+ /* ASIC Chip ID. */
+ u32 bce_chipid;
+
+ /* General controller flags. */
+ u32 bce_flags;
+#define BCE_PCIX_FLAG 0x01
+#define BCE_PCI_32BIT_FLAG 0x02
+#define BCE_ONE_TDMA_FLAG 0x04 /* Deprecated */
+#define BCE_NO_WOL_FLAG 0x08
+#define BCE_USING_DAC_FLAG 0x10
+#define BCE_USING_MSI_FLAG 0x20
+#define BCE_MFW_ENABLE_FLAG 0x40
+
+ /* PHY specific flags. */
+ u32 bce_phy_flags;
+#define BCE_PHY_SERDES_FLAG 1
+#define BCE_PHY_CRC_FIX_FLAG 2
+#define BCE_PHY_PARALLEL_DETECT_FLAG 4
+#define BCE_PHY_2_5G_CAPABLE_FLAG 8
+#define BCE_PHY_INT_MODE_MASK_FLAG 0x300
+#define BCE_PHY_INT_MODE_AUTO_POLLING_FLAG 0x100
+#define BCE_PHY_INT_MODE_LINK_READY_FLAG 0x200
+
+ bus_size_t max_bus_addr;
+ u16 bus_speed_mhz; /* PCI bus speed */
+ struct flash_spec *bce_flash_info; /* Flash NVRAM settings */
+ u32 bce_flash_size; /* Flash NVRAM size */
+ u32 bce_shmem_base; /* Shared Memory base address */
+ char * bce_name; /* Name string */
+
+ /* Tracks the version of bootcode firmware. */
+ u32 bce_fw_ver;
+
+ /* Tracks the state of the firmware. 0 = Running while any */
+ /* other value indicates that the firmware is not responding. */
+ u16 bce_fw_timed_out;
+
+ /* An incrementing sequence used to coordinate messages passed */
+ /* from the driver to the firmware. */
+ u16 bce_fw_wr_seq;
+
+ /* An incrementing sequence used to let the firmware know that */
+ /* the driver is still operating. Without the pulse, management */
+ /* firmware such as IPMI or UMP will operate in OS absent state. */
+ u16 bce_fw_drv_pulse_wr_seq;
+
+ /* Ethernet MAC address. */
+ u_char eaddr[6];
+
+ /* These setting are used by the host coalescing (HC) block to */
+ /* to control how often the status block, statistics block and */
+ /* interrupts are generated. */
+ u16 bce_tx_quick_cons_trip_int;
+ u16 bce_tx_quick_cons_trip;
+ u16 bce_rx_quick_cons_trip_int;
+ u16 bce_rx_quick_cons_trip;
+ u16 bce_comp_prod_trip_int;
+ u16 bce_comp_prod_trip;
+ u16 bce_tx_ticks_int;
+ u16 bce_tx_ticks;
+ u16 bce_rx_ticks_int;
+ u16 bce_rx_ticks;
+ u16 bce_com_ticks_int;
+ u16 bce_com_ticks;
+ u16 bce_cmd_ticks_int;
+ u16 bce_cmd_ticks;
+ u32 bce_stats_ticks;
+
+ /* The address of the integrated PHY on the MII bus. */
+ int bce_phy_addr;
+
+ /* The device handle for the MII bus child device. */
+ device_t bce_miibus;
+
+ /* Driver maintained TX chain pointers and byte counter. */
+ u16 rx_prod;
+ u16 rx_cons;
+ u32 rx_prod_bseq; /* Counts the bytes used. */
+ u16 tx_prod;
+ u16 tx_cons;
+ u32 tx_prod_bseq; /* Counts the bytes used. */
+
+ int bce_link;
+ struct callout bce_stat_ch;
+
+ /* Frame size and mbuf allocation size for RX frames. */
+ u32 max_frame_size;
+ int mbuf_alloc_size;
+
+ /* Receive mode settings (i.e promiscuous, multicast, etc.). */
+ u32 rx_mode;
+
+#ifdef DEVICE_POLLING
+ int bce_rxcycles; /* Counter for receive polling cycles */
+#endif
+
+ /* Bus tag for the bce controller. */
+ bus_dma_tag_t parent_tag;
+
+ /* H/W maintained TX buffer descriptor chain structure. */
+ bus_dma_tag_t tx_bd_chain_tag;
+ bus_dmamap_t tx_bd_chain_map[TX_PAGES];
+ struct tx_bd *tx_bd_chain[TX_PAGES];
+ bus_addr_t tx_bd_chain_paddr[TX_PAGES];
+
+ /* H/W maintained RX buffer descriptor chain structure. */
+ bus_dma_tag_t rx_bd_chain_tag;
+ bus_dmamap_t rx_bd_chain_map[RX_PAGES];
+ struct rx_bd *rx_bd_chain[RX_PAGES];
+ bus_addr_t rx_bd_chain_paddr[RX_PAGES];
+
+ /* H/W maintained status block. */
+ bus_dma_tag_t status_tag;
+ bus_dmamap_t status_map;
+ struct status_block *status_block; /* virtual address */
+ bus_addr_t status_block_paddr; /* Physical address */
+
+ /* Driver maintained status block values. */
+ u16 last_status_idx;
+ u16 hw_rx_cons;
+ u16 hw_tx_cons;
+
+ /* H/W maintained statistics block. */
+ bus_dma_tag_t stats_tag;
+ bus_dmamap_t stats_map;
+ struct statistics_block *stats_block; /* Virtual address */
+ bus_addr_t stats_block_paddr; /* Physical address */
+
+ /* Bus tag for RX/TX mbufs. */
+ bus_dma_tag_t rx_mbuf_tag;
+ bus_dma_tag_t tx_mbuf_tag;
+
+ /* S/W maintained mbuf TX chain structure. */
+ bus_dmamap_t tx_mbuf_map[TOTAL_TX_BD];
+ struct mbuf *tx_mbuf_ptr[TOTAL_TX_BD];
+
+ /* S/W maintained mbuf RX chain structure. */
+ bus_dmamap_t rx_mbuf_map[TOTAL_RX_BD];
+ struct mbuf *rx_mbuf_ptr[TOTAL_RX_BD];
+
+ /* Track the number of rx_bd and tx_bd's in use. */
+ u16 free_rx_bd;
+ u16 used_tx_bd;
+
+ /* Provides access to hardware statistics through sysctl. */
+ u64 stat_IfHCInOctets;
+ u64 stat_IfHCInBadOctets;
+ u64 stat_IfHCOutOctets;
+ u64 stat_IfHCOutBadOctets;
+ u64 stat_IfHCInUcastPkts;
+ u64 stat_IfHCInMulticastPkts;
+ u64 stat_IfHCInBroadcastPkts;
+ u64 stat_IfHCOutUcastPkts;
+ u64 stat_IfHCOutMulticastPkts;
+ u64 stat_IfHCOutBroadcastPkts;
+
+ u32 stat_emac_tx_stat_dot3statsinternalmactransmiterrors;
+ u32 stat_Dot3StatsCarrierSenseErrors;
+ u32 stat_Dot3StatsFCSErrors;
+ u32 stat_Dot3StatsAlignmentErrors;
+ u32 stat_Dot3StatsSingleCollisionFrames;
+ u32 stat_Dot3StatsMultipleCollisionFrames;
+ u32 stat_Dot3StatsDeferredTransmissions;
+ u32 stat_Dot3StatsExcessiveCollisions;
+ u32 stat_Dot3StatsLateCollisions;
+ u32 stat_EtherStatsCollisions;
+ u32 stat_EtherStatsFragments;
+ u32 stat_EtherStatsJabbers;
+ u32 stat_EtherStatsUndersizePkts;
+ u32 stat_EtherStatsOverrsizePkts;
+ u32 stat_EtherStatsPktsRx64Octets;
+ u32 stat_EtherStatsPktsRx65Octetsto127Octets;
+ u32 stat_EtherStatsPktsRx128Octetsto255Octets;
+ u32 stat_EtherStatsPktsRx256Octetsto511Octets;
+ u32 stat_EtherStatsPktsRx512Octetsto1023Octets;
+ u32 stat_EtherStatsPktsRx1024Octetsto1522Octets;
+ u32 stat_EtherStatsPktsRx1523Octetsto9022Octets;
+ u32 stat_EtherStatsPktsTx64Octets;
+ u32 stat_EtherStatsPktsTx65Octetsto127Octets;
+ u32 stat_EtherStatsPktsTx128Octetsto255Octets;
+ u32 stat_EtherStatsPktsTx256Octetsto511Octets;
+ u32 stat_EtherStatsPktsTx512Octetsto1023Octets;
+ u32 stat_EtherStatsPktsTx1024Octetsto1522Octets;
+ u32 stat_EtherStatsPktsTx1523Octetsto9022Octets;
+ u32 stat_XonPauseFramesReceived;
+ u32 stat_XoffPauseFramesReceived;
+ u32 stat_OutXonSent;
+ u32 stat_OutXoffSent;
+ u32 stat_FlowControlDone;
+ u32 stat_MacControlFramesReceived;
+ u32 stat_XoffStateEntered;
+ u32 stat_IfInFramesL2FilterDiscards;
+ u32 stat_IfInRuleCheckerDiscards;
+ u32 stat_IfInFTQDiscards;
+ u32 stat_IfInMBUFDiscards;
+ u32 stat_IfInRuleCheckerP4Hit;
+ u32 stat_CatchupInRuleCheckerDiscards;
+ u32 stat_CatchupInFTQDiscards;
+ u32 stat_CatchupInMBUFDiscards;
+ u32 stat_CatchupInRuleCheckerP4Hit;
+
+#ifdef BCE_DEBUG
+ /* Track the number of enqueued mbufs. */
+ int tx_mbuf_alloc;
+ int rx_mbuf_alloc;
+
+ /* Track how many and what type of interrupts are generated. */
+ u32 interrupts_generated;
+ u32 interrupts_handled;
+ u32 rx_interrupts;
+ u32 tx_interrupts;
+
+ u32 rx_low_watermark; /* Lowest number of rx_bd's free. */
+ u32 tx_hi_watermark; /* Greatest number of tx_bd's used. */
+ u32 mbuf_alloc_failed; /* Mbuf allocation failure counter. */
+ u32 l2fhdr_status_errors;
+ u32 unexpected_attentions;
+ u32 lost_status_block_updates;
+#endif
+};
+
+#endif /* #ifndef _BCE_H_DEFINED */
diff --git a/sys/dev/mii/brgphy.c b/sys/dev/mii/brgphy.c
index a005fdc..7908976 100644
--- a/sys/dev/mii/brgphy.c
+++ b/sys/dev/mii/brgphy.c
@@ -48,6 +48,7 @@ __FBSDID("$FreeBSD$");
#include <machine/clock.h>
#include <net/if.h>
+#include <net/ethernet.h>
#include <net/if_media.h>
#include <dev/mii/mii.h>
@@ -58,6 +59,7 @@ __FBSDID("$FreeBSD$");
#include <net/if_arp.h>
#include <machine/bus.h>
#include <dev/bge/if_bgereg.h>
+#include <dev/bce/if_bcereg.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
@@ -161,6 +163,17 @@ brgphy_probe(device_t dev)
if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5780) {
device_set_desc(dev, MII_STR_xxBROADCOM_BCM5780);
+ }
+
+ if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
+ MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5706C) {
+ device_set_desc(dev, MII_STR_xxBROADCOM_BCM5706C);
+ return(0);
+ }
+
+ if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
+ MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5708C) {
+ device_set_desc(dev, MII_STR_xxBROADCOM_BCM5708C);
return(0);
}
@@ -174,7 +187,8 @@ brgphy_attach(device_t dev)
struct mii_attach_args *ma;
struct mii_data *mii;
const char *sep = "";
- struct bge_softc *bge_sc;
+ struct bge_softc *bge_sc = NULL;
+ struct bce_softc *bce_sc = NULL;
int fast_ether_only = FALSE;
sc = device_get_softc(dev);
@@ -210,10 +224,14 @@ brgphy_attach(device_t dev)
device_printf(dev, " ");
mii_add_media(sc);
- /* The 590x chips are 10/100 only. */
-
- bge_sc = mii->mii_ifp->if_softc;
+ /* Find the driver associated with this PHY. */
+ if (strcmp(mii->mii_ifp->if_dname, "bge") == 0) {
+ bge_sc = mii->mii_ifp->if_softc;
+ } else if (strcmp(mii->mii_ifp->if_dname, "bce") == 0) {
+ bce_sc = mii->mii_ifp->if_softc;
+ }
+ /* The 590x chips are 10/100 only. */
if (strcmp(mii->mii_ifp->if_dname, "bge") == 0 &&
pci_get_vendor(bge_sc->bge_dev) == BCOM_VENDORID &&
(pci_get_device(bge_sc->bge_dev) == BCOM_DEVICEID_BCM5901 ||
@@ -619,7 +637,8 @@ brgphy_reset(struct mii_softc *sc)
{
u_int32_t val;
struct ifnet *ifp;
- struct bge_softc *bge_sc;
+ struct bge_softc *bge_sc = NULL;
+ struct bce_softc *bce_sc = NULL;
mii_phy_reset(sc);
@@ -640,34 +659,71 @@ brgphy_reset(struct mii_softc *sc)
case MII_MODEL_xxBROADCOM_BCM5750:
case MII_MODEL_xxBROADCOM_BCM5714:
case MII_MODEL_xxBROADCOM_BCM5780:
+ case MII_MODEL_xxBROADCOM_BCM5706C:
+ case MII_MODEL_xxBROADCOM_BCM5708C:
bcm5750_load_dspcode(sc);
break;
}
ifp = sc->mii_pdata->mii_ifp;
- bge_sc = ifp->if_softc;
- /*
- * Don't enable Ethernet@WireSpeed for the 5700 or the
- * 5705 A1 and A2 chips. Make sure we only do this test
- * on "bge" NICs, since other drivers may use this same
- * PHY subdriver.
- */
- if (strcmp(ifp->if_dname, "bge") == 0 &&
- (bge_sc->bge_asicrev == BGE_ASICREV_BCM5700 ||
- bge_sc->bge_chipid == BGE_CHIPID_BCM5705_A1 ||
- bge_sc->bge_chipid == BGE_CHIPID_BCM5705_A2))
- return;
+ /* Find the driver associated with this PHY. */
+ if (strcmp(ifp->if_dname, "bge") == 0) {
+ bge_sc = ifp->if_softc;
+ } else if (strcmp(ifp->if_dname, "bce") == 0) {
+ bce_sc = ifp->if_softc;
+ }
+
+ /* Handle any NetXtreme/bge workarounds. */
+ if (bge_sc) {
+ /*
+ * Don't enable Ethernet@WireSpeed for the 5700 or the
+ * 5705 A1 and A2 chips. Make sure we only do this test
+ * on "bge" NICs, since other drivers may use this same
+ * PHY subdriver.
+ */
+ if (bge_sc->bge_asicrev == BGE_ASICREV_BCM5700 ||
+ bge_sc->bge_chipid == BGE_CHIPID_BCM5705_A1 ||
+ bge_sc->bge_chipid == BGE_CHIPID_BCM5705_A2)
+ return;
+
+ /* Enable Ethernet@WireSpeed. */
+ PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007);
+ val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
+ PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) | (1 << 4));
- /* Enable Ethernet@WireSpeed. */
- PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007);
- val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
- PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) | (1 << 4));
+ /* Enable Link LED on Dell boxes */
+ if (bge_sc->bge_no_3_led) {
+ PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
+ PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL)
+ & ~BRGPHY_PHY_EXTCTL_3_LED);
+ }
+ } else if (bce_sc) {
+
+ /* Set or clear jumbo frame settings in the PHY. */
+ if (ifp->if_mtu > ETHER_MAX_LEN) {
+ PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7);
+ val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
+ PHY_WRITE(sc, BRGPHY_MII_AUXCTL,
+ val | BRGPHY_AUXCTL_LONG_PKT);
+
+ val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL);
+ PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
+ val | BRGPHY_PHY_EXTCTL_HIGH_LA);
+ } else {
+ PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7);
+ val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
+ PHY_WRITE(sc, BRGPHY_MII_AUXCTL,
+ val & ~(BRGPHY_AUXCTL_LONG_PKT | 0x7));
+
+ val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL);
+ PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
+ val & ~BRGPHY_PHY_EXTCTL_HIGH_LA);
+ }
- /* Enable Link LED on Dell boxes */
- if (bge_sc->bge_no_3_led) {
- PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
- PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL)
- & ~BRGPHY_PHY_EXTCTL_3_LED);
+ /* Enable Ethernet@Wirespeed */
+ PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007);
+ val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
+ PHY_WRITE(sc, BRGPHY_MII_AUXCTL, (val | (1 << 15) | (1 << 4)));
}
}
diff --git a/sys/dev/mii/miidevs b/sys/dev/mii/miidevs
index 6356c7b..14b5193 100644
--- a/sys/dev/mii/miidevs
+++ b/sys/dev/mii/miidevs
@@ -124,6 +124,8 @@ model xxBROADCOM BCM5705 0x001a BCM5705 10/100/1000baseTX PHY
model xxBROADCOM BCM5750 0x0018 BCM5750 10/100/1000baseTX PHY
model xxBROADCOM BCM5714 0x0034 BCM5714 10/100/1000baseTX PHY
model xxBROADCOM BCM5780 0x0035 BCM5780 10/100/1000baseTX PHY
+model xxBROADCOM BCM5706C 0x0015 BCM5706C 10/100/1000baseTX PHY
+model xxBROADCOM BCM5708C 0x0036 BCM5708C 10/100/1000baseTX PHY
/* Cicada Semiconductor PHYs (now owned by Vitesse?) */
model CICADA CS8201 0x0001 Cicada CS8201 10/100/1000TX PHY
diff --git a/sys/modules/bce/Makefile b/sys/modules/bce/Makefile
new file mode 100644
index 0000000..1be2a3f
--- /dev/null
+++ b/sys/modules/bce/Makefile
@@ -0,0 +1,8 @@
+# $FreeBSD$
+.PATH: ${.CURDIR}/../../dev/bce
+KMOD= if_bce
+SRCS= opt_bce.h if_bce.c miibus_if.h miidevs.h device_if.h bus_if.h pci_if.h
+
+#CFLAGS += -DBCE_DEBUG=0
+
+.include <bsd.kmod.mk>
OpenPOWER on IntegriCloud