Add support for the Atmel SAM9XE familiy of microcontrollers, which

consist of a ARM926EJ-S processor core with up to 512 Kbytes of on-chip
flash. Tested with SAM9XE512.

8 files changed, 41 insertions, 15 deletions

diff --git a/sys/arm/at91/at91_pit.c b/sys/arm/at91/at91_pit.c
index 1c6e98f..693dae8 100644
--- a/sys/arm/at91/at91_pit.c
+++ b/sys/arm/at91/at91_pit.c
@@ -90,7 +90,7 @@ static int
 at91pit_probe(device_t dev)
 {
 
-	if (at91_is_sam9()) {
+	if (at91_is_sam9() || at91_is_sam9xe()) {
 		device_set_desc(dev, "AT91SAM9 PIT");
 		return (0);
 	}
diff --git a/sys/arm/at91/at91_rst.c b/sys/arm/at91/at91_rst.c
index 34cf3c7..76cc43c 100644
--- a/sys/arm/at91/at91_rst.c
+++ b/sys/arm/at91/at91_rst.c
@@ -71,7 +71,7 @@ static int
 at91_rst_probe(device_t dev)
 {
 
-	if (at91_is_sam9()) {
+	if (at91_is_sam9() || at91_is_sam9xe()) {
 		device_set_desc(dev, "AT91SAM9 Reset Controller");
 		return (0);
 	}
diff --git a/sys/arm/at91/at91_twireg.h b/sys/arm/at91/at91_twireg.h
index 30f4874..5f59b22 100644
--- a/sys/arm/at91/at91_twireg.h
+++ b/sys/arm/at91/at91_twireg.h
@@ -64,7 +64,7 @@
 #define	TWI_CWGR_CHDIV(x) ((x) << 8)	/* Clock High Divider */
 #define	TWI_CWGR_CLDIV(x) ((x) << 0)	/* Clock Low Divider */
 #define	TWI_CWGR_DIV(rate) 		 		\
-	(at91_is_sam9() ?				\
+	(at91_is_sam9() || at91_is_sam9xe() ?		\
 	    ((at91_master_clock / (4 * (rate))) - 3) :	\
 	    ((at91_master_clock / (4 * (rate))) - 2))
 
diff --git a/sys/arm/at91/at91_wdt.c b/sys/arm/at91/at91_wdt.c
index 3048147..9ab51e1 100644
--- a/sys/arm/at91/at91_wdt.c
+++ b/sys/arm/at91/at91_wdt.c
@@ -132,7 +132,7 @@ static int
 wdt_probe(device_t dev)
 {
 
-	if (at91_is_sam9()) {
+	if (at91_is_sam9() || at91_is_sam9xe()) {
 		device_set_desc(dev, "WDT");
 		return (0);
 	}
diff --git a/sys/arm/at91/at91reg.h b/sys/arm/at91/at91reg.h
index 9c652f5..692d36c 100644
--- a/sys/arm/at91/at91reg.h
+++ b/sys/arm/at91/at91reg.h
@@ -61,6 +61,9 @@
 #define	AT91_CPU_SAM9G10  	0x819903a0
 #define	AT91_CPU_SAM9G20  	0x019905a0
 #define	AT91_CPU_SAM9G45  	0x819b05a0
+#define	AT91_CPU_SAM9XE128	0x329973a0
+#define	AT91_CPU_SAM9XE256	0x329a93a0
+#define	AT91_CPU_SAM9XE512	0x329aa3a0
 
 #define	AT91_ARCH(chipid)	((chipid >> 20) & 0xff)
 #define	AT91_CPU(chipid)	(chipid & ~AT91_CPU_VERSION_MASK)
diff --git a/sys/arm/at91/at91sam9260.c b/sys/arm/at91/at91sam9260.c
index 3322dc7..cbc5a27 100644
--- a/sys/arm/at91/at91sam9260.c
+++ b/sys/arm/at91/at91sam9260.c
@@ -197,21 +197,40 @@ static void
 at91_identify(driver_t *drv, device_t parent)
 {
 
-	if (at91_cpu_is(AT91_CPU_SAM9260)) {
+	switch (AT91_CPU(at91_chip_id)) {
+	case AT91_CPU_SAM9260:
+	case AT91_CPU_SAM9XE128:
+	case AT91_CPU_SAM9XE256:
+	case AT91_CPU_SAM9XE512:
 		at91_add_child(parent, 0, "at91sam9260", 0, 0, 0, -1, 0, 0);
 		at91_cpu_add_builtin_children(parent);
+		break;
 	}
 }
 
 static int
 at91_probe(device_t dev)
 {
-
-	if (at91_cpu_is(AT91_CPU_SAM9260)) {
-		device_set_desc(dev, "AT91SAM9260");
-		return (0);
+	const char *desc;
+
+	switch (AT91_CPU(at91_chip_id)) {
+	case AT91_CPU_SAM9260:
+		desc = "AT91SAM9260";
+		break;
+	case AT91_CPU_SAM9XE128:
+		desc = "AT91SAM9XE128";
+		break;
+	case AT91_CPU_SAM9XE256:
+		desc = "AT91SAM9XE256";
+		break;
+	case AT91_CPU_SAM9XE512:
+		desc = "AT91SAM9XE512";
+		break;
+	default:
+		return (ENXIO);
 	}
-	return (ENXIO);
+	device_set_desc(dev, desc);
+	return (0);
 }
 
 static int
@@ -227,10 +246,6 @@ at91_attach(device_t dev)
 	sc->sc_sh = at91sc->sc_sh;
 	sc->dev = dev;
 
-	/*
-	 * XXX These values work for the RM9200, SAM926[01], and SAM9260
-	 * will have to fix this when we want to support anything else. XXX
-	 */
 	if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9260_SYS_BASE,
 	    AT91SAM9260_SYS_SIZE, &sc->sc_sys_sh) != 0)
 		panic("Enable to map system registers");
diff --git a/sys/arm/at91/at91var.h b/sys/arm/at91/at91var.h
index f83e86e..9bd0265 100644
--- a/sys/arm/at91/at91var.h
+++ b/sys/arm/at91/at91var.h
@@ -63,6 +63,7 @@ extern uint32_t at91_chip_id;
 
 static inline int at91_is_rm92(void);
 static inline int at91_is_sam9(void);
+static inline int at91_is_sam9xe(void);
 static inline int at91_cpu_is(u_int cpu);
 
 static inline int
@@ -80,6 +81,13 @@ at91_is_sam9(void)
 }
 
 static inline int
+at91_is_sam9xe(void)
+{
+
+	return (AT91_ARCH(at91_chip_id) == AT91_ARCH_SAM9XE);
+}
+
+static inline int
 at91_cpu_is(u_int cpu)
 {
 
diff --git a/sys/arm/at91/if_ate.c b/sys/arm/at91/if_ate.c
index 321906c..3d80435 100644
--- a/sys/arm/at91/if_ate.c
+++ b/sys/arm/at91/if_ate.c
@@ -266,7 +266,7 @@ ate_attach(device_t dev)
 	}
 
 	/* New or old version, chooses buffer size. */
-	sc->is_emacb    = at91_is_sam9();
+	sc->is_emacb = at91_is_sam9() || at91_is_sam9xe();
 	sc->rx_buf_size = RX_BUF_SIZE(sc);
 
 	err = ate_activate(dev);