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authoradrian <adrian@FreeBSD.org>2012-06-24 08:28:06 +0000
committeradrian <adrian@FreeBSD.org>2012-06-24 08:28:06 +0000
commitb5c3afbe7d6ad247172006c5106e9399b853ca63 (patch)
treed9c03b43711c90b7ad2b4eaea67657e823ede696
parentc5fe4faa45f9d164bdf48d81b9b2e892c8b0a623 (diff)
downloadFreeBSD-src-b5c3afbe7d6ad247172006c5106e9399b853ca63.zip
FreeBSD-src-b5c3afbe7d6ad247172006c5106e9399b853ca63.tar.gz
Shuffle these initialisations to where they should be.
-rw-r--r--sys/dev/ath/if_ath.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/sys/dev/ath/if_ath.c b/sys/dev/ath/if_ath.c
index 968b424..84cbd00 100644
--- a/sys/dev/ath/if_ath.c
+++ b/sys/dev/ath/if_ath.c
@@ -723,6 +723,13 @@ ath_attach(u_int16_t devid, struct ath_softc *sc)
#endif
/*
+ * Initial aggregation settings.
+ */
+ sc->sc_hwq_limit = ATH_AGGR_MIN_QDEPTH;
+ sc->sc_tid_hwq_lo = ATH_AGGR_SCHED_LOW;
+ sc->sc_tid_hwq_hi = ATH_AGGR_SCHED_HIGH;
+
+ /*
* Check if the hardware requires PCI register serialisation.
* Some of the Owl based MACs require this.
*/
@@ -1824,13 +1831,6 @@ ath_init(void *arg)
sc->sc_beacons = 0;
/*
- * Initial aggregation settings.
- */
- sc->sc_hwq_limit = ATH_AGGR_MIN_QDEPTH;
- sc->sc_tid_hwq_lo = ATH_AGGR_SCHED_LOW;
- sc->sc_tid_hwq_hi = ATH_AGGR_SCHED_HIGH;
-
- /*
* Setup the hardware after reset: the key cache
* is filled as needed and the receive engine is
* set going. Frame transmit is handled entirely
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