diff options
author | ps <ps@FreeBSD.org> | 2000-09-22 23:40:10 +0000 |
---|---|---|
committer | ps <ps@FreeBSD.org> | 2000-09-22 23:40:10 +0000 |
commit | ab88cc6719e2d569d7f78bc2fdf7925513a538c8 (patch) | |
tree | 076030806da9ece11ea86aef58f1ac0c4fdd36c0 | |
parent | 9b419172b9371a7c431182f07664221bdc4cf735 (diff) | |
download | FreeBSD-src-ab88cc6719e2d569d7f78bc2fdf7925513a538c8.zip FreeBSD-src-ab88cc6719e2d569d7f78bc2fdf7925513a538c8.tar.gz |
Remove the NCPU, NAPIC, NBUS, NINTR config options. Make NAPIC,
NBUS, NINTR dynamic and set NCPU to a maximum of 16 under SMP.
Reviewed by: peter
39 files changed, 423 insertions, 419 deletions
diff --git a/sys/alpha/alpha/genassym.c b/sys/alpha/alpha/genassym.c index 066d87b..bd520f1 100644 --- a/sys/alpha/alpha/genassym.c +++ b/sys/alpha/alpha/genassym.c @@ -69,8 +69,6 @@ #include <nfs/nfs.h> #include <nfs/nfsdiskless.h> -#include "opt_smp.h" - ASSYM(GD_CURPROC, offsetof(struct globaldata, gd_curproc)); ASSYM(GD_FPCURPROC, offsetof(struct globaldata, gd_fpcurproc)); ASSYM(GD_CURPCB, offsetof(struct globaldata, gd_curpcb)); diff --git a/sys/amd64/amd64/amd64_mem.c b/sys/amd64/amd64/amd64_mem.c index 90b72b4..9d49949 100644 --- a/sys/amd64/amd64/amd64_mem.c +++ b/sys/amd64/amd64/amd64_mem.c @@ -26,8 +26,6 @@ * $FreeBSD$ */ -#include "opt_smp.h" - #include <sys/param.h> #include <sys/kernel.h> #include <sys/systm.h> diff --git a/sys/amd64/amd64/legacy.c b/sys/amd64/amd64/legacy.c index 6413abd..07552fc 100644 --- a/sys/amd64/amd64/legacy.c +++ b/sys/amd64/amd64/legacy.c @@ -40,7 +40,6 @@ * and I/O memory address space. */ -#include "opt_smp.h" #include "mca.h" #include <sys/param.h> diff --git a/sys/amd64/amd64/machdep.c b/sys/amd64/amd64/machdep.c index a3c09f4..bb9a235 100644 --- a/sys/amd64/amd64/machdep.c +++ b/sys/amd64/amd64/machdep.c @@ -49,7 +49,6 @@ #include "opt_maxmem.h" #include "opt_msgbuf.h" #include "opt_perfmon.h" -#include "opt_smp.h" #include "opt_user_ldt.h" #include "opt_userconfig.h" @@ -1181,11 +1180,7 @@ SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, */ int _default_ldt; -#ifdef SMP -union descriptor gdt[NGDT * NCPU]; /* global descriptor table */ -#else -union descriptor gdt[NGDT]; /* global descriptor table */ -#endif +union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ static struct gate_descriptor idt0[NIDT]; struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ union descriptor ldt[NLDT]; /* local descriptor table */ diff --git a/sys/amd64/amd64/mp_machdep.c b/sys/amd64/amd64/mp_machdep.c index 5056ed1..ea9aee8 100644 --- a/sys/amd64/amd64/mp_machdep.c +++ b/sys/amd64/amd64/mp_machdep.c @@ -25,7 +25,6 @@ * $FreeBSD$ */ -#include "opt_smp.h" #include "opt_cpu.h" #include "opt_user_ldt.h" @@ -257,8 +256,8 @@ vm_offset_t cpu_apic_address; vm_offset_t io_apic_address[NAPICID]; /* NAPICID is more than enough */ extern int nkpt; -u_int32_t cpu_apic_versions[NCPU]; -u_int32_t io_apic_versions[NAPIC]; +u_int32_t cpu_apic_versions[MAXCPU]; +u_int32_t *io_apic_versions; #ifdef APIC_INTR_DIAGNOSTIC int apic_itrace_enter[32]; @@ -313,7 +312,7 @@ extern pt_entry_t *KPTphys; /* SMP page table page */ extern pt_entry_t *SMPpt; -struct pcb stoppcbs[NCPU]; +struct pcb stoppcbs[MAXCPU]; int smp_started; /* has the system started? */ @@ -330,7 +329,7 @@ static mpfps_t mpfps; static int search_for_sig(u_int32_t target, int count); static void mp_enable(u_int boot_addr); -static int mptable_pass1(void); +static void mptable_pass1(void); static int mptable_pass2(void); static void default_mp_table(int type); static void fix_mp_table(void); @@ -398,8 +397,7 @@ mp_probe(void) found: /* calculate needed resources */ mpfps = (mpfps_t)x; - if (mptable_pass1()) - panic("you must reconfigure your kernel"); + mptable_pass1(); /* flag fact that we are running multiple processors */ mp_capable = 1; @@ -720,10 +718,10 @@ static int default_data[7][5] = /* the bus data */ -static bus_datum bus_data[NBUS]; +static bus_datum *bus_data; /* the IO INT data, one entry per possible APIC INTerrupt */ -static io_int io_apic_ints[NINTR]; +static io_int *io_apic_ints; static int nintrs; @@ -748,7 +746,7 @@ static int lookup_bus_type __P((char *name)); * mp_napics * nintrs */ -static int +static void mptable_pass1(void) { int x; @@ -757,12 +755,9 @@ mptable_pass1(void) void* position; int count; int type; - int mustpanic; POSTCODE(MPTABLE_PASS1_POST); - mustpanic = 0; - /* clear various tables */ for (x = 0; x < NAPICID; ++x) { io_apic_address[x] = ~0; /* IO APIC address table */ @@ -832,22 +827,10 @@ mptable_pass1(void) } /* qualify the numbers */ - if (mp_naps > NCPU) { + if (mp_naps > MAXCPU) { printf("Warning: only using %d of %d available CPUs!\n", - NCPU, mp_naps); - mp_naps = NCPU; - } - if (mp_nbusses > NBUS) { - printf("found %d busses, increase NBUS\n", mp_nbusses); - mustpanic = 1; - } - if (mp_napics > NAPIC) { - printf("found %d apics, increase NAPIC\n", mp_napics); - mustpanic = 1; - } - if (nintrs > NINTR) { - printf("found %d intrs, increase NINTR\n", nintrs); - mustpanic = 1; + MAXCPU, mp_naps); + mp_naps = MAXCPU; } /* @@ -857,8 +840,6 @@ mptable_pass1(void) mp_ncpus = 1; --mp_naps; /* subtract the BSP */ - - return mustpanic; } @@ -883,9 +864,46 @@ mptable_pass2(void) int count; int type; int apic, bus, cpu, intr; + int i, j; + int pgeflag; POSTCODE(MPTABLE_PASS2_POST); + pgeflag = 0; /* XXX - Not used under SMP yet. */ + + MALLOC(io_apic_versions, u_int32_t *, sizeof(u_int32_t) * mp_napics, + M_DEVBUF, M_WAITOK); + MALLOC(ioapic, volatile ioapic_t **, sizeof(ioapic_t *) * mp_napics, + M_DEVBUF, M_WAITOK); + MALLOC(io_apic_ints, io_int *, sizeof(io_int) * nintrs, + M_DEVBUF, M_WAITOK); + MALLOC(bus_data, bus_datum *, sizeof(bus_datum) * mp_nbusses, + M_DEVBUF, M_WAITOK); + + bzero(ioapic, sizeof(ioapic_t *) * mp_napics); + + for (i = 0; i < mp_napics; i++) { + for (j = 0; j < mp_napics; j++) { + /* same page frame as a previous IO apic? */ + if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == + (io_apic_address[i] & PG_FRAME)) { + ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace + + (NPTEPG-2-j) * PAGE_SIZE + + (io_apic_address[i] & PAGE_MASK)); + break; + } + /* use this slot if available */ + if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == 0) { + SMPpt[NPTEPG-2-j] = (pt_entry_t)(PG_V | PG_RW | + pgeflag | (io_apic_address[i] & PG_FRAME)); + ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace + + (NPTEPG-2-j) * PAGE_SIZE + + (io_apic_address[i] & PAGE_MASK)); + break; + } + } + } + /* clear various tables */ for (x = 0; x < NAPICID; ++x) { ID_TO_IO(x) = -1; /* phy APIC ID to log CPU/IO table */ @@ -894,11 +912,11 @@ mptable_pass2(void) } /* clear bus data table */ - for (x = 0; x < NBUS; ++x) + for (x = 0; x < mp_nbusses; ++x) bus_data[x].bus_id = 0xff; /* clear IO APIC INT table */ - for (x = 0; x < NINTR; ++x) { + for (x = 0; x < nintrs; ++x) { io_apic_ints[x].int_type = 0xff; io_apic_ints[x].int_vector = 0xff; } @@ -1305,7 +1323,7 @@ processor_entry(proc_entry_ptr entry, int cpu) } /* add another AP to list, if less than max number of CPUs */ - else if (cpu < NCPU) { + else if (cpu < MAXCPU) { CPU_TO_ID(cpu) = entry->apic_id; ID_TO_CPU(entry->apic_id) = cpu; return 1; @@ -2427,9 +2445,9 @@ ap_init(void) #define CHECKSTATE_INTR 2 /* Do not staticize. Used from apic_vector.s */ -struct proc* checkstate_curproc[NCPU]; -int checkstate_cpustate[NCPU]; -u_long checkstate_pc[NCPU]; +struct proc* checkstate_curproc[MAXCPU]; +int checkstate_cpustate[MAXCPU]; +u_long checkstate_pc[MAXCPU]; #define PC_TO_INDEX(pc, prof) \ ((int)(((u_quad_t)((pc) - (prof)->pr_off) * \ diff --git a/sys/amd64/amd64/mptable.c b/sys/amd64/amd64/mptable.c index 5056ed1..ea9aee8 100644 --- a/sys/amd64/amd64/mptable.c +++ b/sys/amd64/amd64/mptable.c @@ -25,7 +25,6 @@ * $FreeBSD$ */ -#include "opt_smp.h" #include "opt_cpu.h" #include "opt_user_ldt.h" @@ -257,8 +256,8 @@ vm_offset_t cpu_apic_address; vm_offset_t io_apic_address[NAPICID]; /* NAPICID is more than enough */ extern int nkpt; -u_int32_t cpu_apic_versions[NCPU]; -u_int32_t io_apic_versions[NAPIC]; +u_int32_t cpu_apic_versions[MAXCPU]; +u_int32_t *io_apic_versions; #ifdef APIC_INTR_DIAGNOSTIC int apic_itrace_enter[32]; @@ -313,7 +312,7 @@ extern pt_entry_t *KPTphys; /* SMP page table page */ extern pt_entry_t *SMPpt; -struct pcb stoppcbs[NCPU]; +struct pcb stoppcbs[MAXCPU]; int smp_started; /* has the system started? */ @@ -330,7 +329,7 @@ static mpfps_t mpfps; static int search_for_sig(u_int32_t target, int count); static void mp_enable(u_int boot_addr); -static int mptable_pass1(void); +static void mptable_pass1(void); static int mptable_pass2(void); static void default_mp_table(int type); static void fix_mp_table(void); @@ -398,8 +397,7 @@ mp_probe(void) found: /* calculate needed resources */ mpfps = (mpfps_t)x; - if (mptable_pass1()) - panic("you must reconfigure your kernel"); + mptable_pass1(); /* flag fact that we are running multiple processors */ mp_capable = 1; @@ -720,10 +718,10 @@ static int default_data[7][5] = /* the bus data */ -static bus_datum bus_data[NBUS]; +static bus_datum *bus_data; /* the IO INT data, one entry per possible APIC INTerrupt */ -static io_int io_apic_ints[NINTR]; +static io_int *io_apic_ints; static int nintrs; @@ -748,7 +746,7 @@ static int lookup_bus_type __P((char *name)); * mp_napics * nintrs */ -static int +static void mptable_pass1(void) { int x; @@ -757,12 +755,9 @@ mptable_pass1(void) void* position; int count; int type; - int mustpanic; POSTCODE(MPTABLE_PASS1_POST); - mustpanic = 0; - /* clear various tables */ for (x = 0; x < NAPICID; ++x) { io_apic_address[x] = ~0; /* IO APIC address table */ @@ -832,22 +827,10 @@ mptable_pass1(void) } /* qualify the numbers */ - if (mp_naps > NCPU) { + if (mp_naps > MAXCPU) { printf("Warning: only using %d of %d available CPUs!\n", - NCPU, mp_naps); - mp_naps = NCPU; - } - if (mp_nbusses > NBUS) { - printf("found %d busses, increase NBUS\n", mp_nbusses); - mustpanic = 1; - } - if (mp_napics > NAPIC) { - printf("found %d apics, increase NAPIC\n", mp_napics); - mustpanic = 1; - } - if (nintrs > NINTR) { - printf("found %d intrs, increase NINTR\n", nintrs); - mustpanic = 1; + MAXCPU, mp_naps); + mp_naps = MAXCPU; } /* @@ -857,8 +840,6 @@ mptable_pass1(void) mp_ncpus = 1; --mp_naps; /* subtract the BSP */ - - return mustpanic; } @@ -883,9 +864,46 @@ mptable_pass2(void) int count; int type; int apic, bus, cpu, intr; + int i, j; + int pgeflag; POSTCODE(MPTABLE_PASS2_POST); + pgeflag = 0; /* XXX - Not used under SMP yet. */ + + MALLOC(io_apic_versions, u_int32_t *, sizeof(u_int32_t) * mp_napics, + M_DEVBUF, M_WAITOK); + MALLOC(ioapic, volatile ioapic_t **, sizeof(ioapic_t *) * mp_napics, + M_DEVBUF, M_WAITOK); + MALLOC(io_apic_ints, io_int *, sizeof(io_int) * nintrs, + M_DEVBUF, M_WAITOK); + MALLOC(bus_data, bus_datum *, sizeof(bus_datum) * mp_nbusses, + M_DEVBUF, M_WAITOK); + + bzero(ioapic, sizeof(ioapic_t *) * mp_napics); + + for (i = 0; i < mp_napics; i++) { + for (j = 0; j < mp_napics; j++) { + /* same page frame as a previous IO apic? */ + if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == + (io_apic_address[i] & PG_FRAME)) { + ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace + + (NPTEPG-2-j) * PAGE_SIZE + + (io_apic_address[i] & PAGE_MASK)); + break; + } + /* use this slot if available */ + if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == 0) { + SMPpt[NPTEPG-2-j] = (pt_entry_t)(PG_V | PG_RW | + pgeflag | (io_apic_address[i] & PG_FRAME)); + ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace + + (NPTEPG-2-j) * PAGE_SIZE + + (io_apic_address[i] & PAGE_MASK)); + break; + } + } + } + /* clear various tables */ for (x = 0; x < NAPICID; ++x) { ID_TO_IO(x) = -1; /* phy APIC ID to log CPU/IO table */ @@ -894,11 +912,11 @@ mptable_pass2(void) } /* clear bus data table */ - for (x = 0; x < NBUS; ++x) + for (x = 0; x < mp_nbusses; ++x) bus_data[x].bus_id = 0xff; /* clear IO APIC INT table */ - for (x = 0; x < NINTR; ++x) { + for (x = 0; x < nintrs; ++x) { io_apic_ints[x].int_type = 0xff; io_apic_ints[x].int_vector = 0xff; } @@ -1305,7 +1323,7 @@ processor_entry(proc_entry_ptr entry, int cpu) } /* add another AP to list, if less than max number of CPUs */ - else if (cpu < NCPU) { + else if (cpu < MAXCPU) { CPU_TO_ID(cpu) = entry->apic_id; ID_TO_CPU(entry->apic_id) = cpu; return 1; @@ -2427,9 +2445,9 @@ ap_init(void) #define CHECKSTATE_INTR 2 /* Do not staticize. Used from apic_vector.s */ -struct proc* checkstate_curproc[NCPU]; -int checkstate_cpustate[NCPU]; -u_long checkstate_pc[NCPU]; +struct proc* checkstate_curproc[MAXCPU]; +int checkstate_cpustate[MAXCPU]; +u_long checkstate_pc[MAXCPU]; #define PC_TO_INDEX(pc, prof) \ ((int)(((u_quad_t)((pc) - (prof)->pr_off) * \ diff --git a/sys/amd64/amd64/nexus.c b/sys/amd64/amd64/nexus.c index 6413abd..07552fc 100644 --- a/sys/amd64/amd64/nexus.c +++ b/sys/amd64/amd64/nexus.c @@ -40,7 +40,6 @@ * and I/O memory address space. */ -#include "opt_smp.h" #include "mca.h" #include <sys/param.h> diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c index 287647a..52d9cd1 100644 --- a/sys/amd64/amd64/pmap.c +++ b/sys/amd64/amd64/pmap.c @@ -279,7 +279,6 @@ pmap_bootstrap(firstaddr, loadaddr) vm_offset_t va; pt_entry_t *pte; #ifdef SMP - int i, j; struct globaldata *gd; #endif @@ -361,7 +360,7 @@ pmap_bootstrap(firstaddr, loadaddr) pgeflag = 0; -#if !defined(SMP) +#if !defined(SMP) /* XXX - see also mp_machdep.c */ if (cpu_feature & CPUID_PGE) { pgeflag = PG_G; } @@ -419,28 +418,6 @@ pmap_bootstrap(firstaddr, loadaddr) SMPpt[NPTEPG - 1] = (pt_entry_t)(PG_V | PG_RW | PG_N | pgeflag | (cpu_apic_address & PG_FRAME)); - for (i = 0; i < mp_napics; i++) { - for (j = 0; j < mp_napics; j++) { - /* same page frame as a previous IO apic? */ - if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == - (io_apic_address[i] & PG_FRAME)) { - ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace - + (NPTEPG-2-j) * PAGE_SIZE - + (io_apic_address[i] & PAGE_MASK)); - break; - } - /* use this slot if available */ - if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == 0) { - SMPpt[NPTEPG-2-j] = (pt_entry_t)(PG_V | PG_RW | - pgeflag | (io_apic_address[i] & PG_FRAME)); - ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace - + (NPTEPG-2-j) * PAGE_SIZE - + (io_apic_address[i] & PAGE_MASK)); - break; - } - } - } - /* BSP does this itself, AP's get it pre-set */ gd = &SMP_prvspace[0].globaldata; gd->gd_prv_CMAP1 = &SMPpt[1]; diff --git a/sys/amd64/amd64/support.S b/sys/amd64/amd64/support.S index 1f073d8..1187c19 100644 --- a/sys/amd64/amd64/support.S +++ b/sys/amd64/amd64/support.S @@ -33,7 +33,6 @@ * $FreeBSD$ */ -#include "opt_smp.h" #include "npx.h" #include <machine/asmacros.h> diff --git a/sys/amd64/amd64/support.s b/sys/amd64/amd64/support.s index 1f073d8..1187c19 100644 --- a/sys/amd64/amd64/support.s +++ b/sys/amd64/amd64/support.s @@ -33,7 +33,6 @@ * $FreeBSD$ */ -#include "opt_smp.h" #include "npx.h" #include <machine/asmacros.h> diff --git a/sys/amd64/amd64/sys_machdep.c b/sys/amd64/amd64/sys_machdep.c index bd7f0d8..803ac25 100644 --- a/sys/amd64/amd64/sys_machdep.c +++ b/sys/amd64/amd64/sys_machdep.c @@ -36,7 +36,6 @@ */ #include "opt_user_ldt.h" -#include "opt_smp.h" #include <sys/param.h> #include <sys/systm.h> diff --git a/sys/amd64/conf/GENERIC b/sys/amd64/conf/GENERIC index c385449..d492547 100644 --- a/sys/amd64/conf/GENERIC +++ b/sys/amd64/conf/GENERIC @@ -61,11 +61,6 @@ options KBD_INSTALL_CDEV # install a CDEV entry in /dev # To make an SMP kernel, the next two are needed #options SMP # Symmetric MultiProcessor Kernel #options APIC_IO # Symmetric (APIC) I/O -# Optionally these may need tweaked, (defaults shown): -#options NCPU=2 # number of CPUs -#options NBUS=8 # number of busses -#options NAPIC=1 # number of IO APICs -#options NINTR=24 # number of INTs device isa device eisa diff --git a/sys/amd64/include/mptable.h b/sys/amd64/include/mptable.h index 5056ed1..ea9aee8 100644 --- a/sys/amd64/include/mptable.h +++ b/sys/amd64/include/mptable.h @@ -25,7 +25,6 @@ * $FreeBSD$ */ -#include "opt_smp.h" #include "opt_cpu.h" #include "opt_user_ldt.h" @@ -257,8 +256,8 @@ vm_offset_t cpu_apic_address; vm_offset_t io_apic_address[NAPICID]; /* NAPICID is more than enough */ extern int nkpt; -u_int32_t cpu_apic_versions[NCPU]; -u_int32_t io_apic_versions[NAPIC]; +u_int32_t cpu_apic_versions[MAXCPU]; +u_int32_t *io_apic_versions; #ifdef APIC_INTR_DIAGNOSTIC int apic_itrace_enter[32]; @@ -313,7 +312,7 @@ extern pt_entry_t *KPTphys; /* SMP page table page */ extern pt_entry_t *SMPpt; -struct pcb stoppcbs[NCPU]; +struct pcb stoppcbs[MAXCPU]; int smp_started; /* has the system started? */ @@ -330,7 +329,7 @@ static mpfps_t mpfps; static int search_for_sig(u_int32_t target, int count); static void mp_enable(u_int boot_addr); -static int mptable_pass1(void); +static void mptable_pass1(void); static int mptable_pass2(void); static void default_mp_table(int type); static void fix_mp_table(void); @@ -398,8 +397,7 @@ mp_probe(void) found: /* calculate needed resources */ mpfps = (mpfps_t)x; - if (mptable_pass1()) - panic("you must reconfigure your kernel"); + mptable_pass1(); /* flag fact that we are running multiple processors */ mp_capable = 1; @@ -720,10 +718,10 @@ static int default_data[7][5] = /* the bus data */ -static bus_datum bus_data[NBUS]; +static bus_datum *bus_data; /* the IO INT data, one entry per possible APIC INTerrupt */ -static io_int io_apic_ints[NINTR]; +static io_int *io_apic_ints; static int nintrs; @@ -748,7 +746,7 @@ static int lookup_bus_type __P((char *name)); * mp_napics * nintrs */ -static int +static void mptable_pass1(void) { int x; @@ -757,12 +755,9 @@ mptable_pass1(void) void* position; int count; int type; - int mustpanic; POSTCODE(MPTABLE_PASS1_POST); - mustpanic = 0; - /* clear various tables */ for (x = 0; x < NAPICID; ++x) { io_apic_address[x] = ~0; /* IO APIC address table */ @@ -832,22 +827,10 @@ mptable_pass1(void) } /* qualify the numbers */ - if (mp_naps > NCPU) { + if (mp_naps > MAXCPU) { printf("Warning: only using %d of %d available CPUs!\n", - NCPU, mp_naps); - mp_naps = NCPU; - } - if (mp_nbusses > NBUS) { - printf("found %d busses, increase NBUS\n", mp_nbusses); - mustpanic = 1; - } - if (mp_napics > NAPIC) { - printf("found %d apics, increase NAPIC\n", mp_napics); - mustpanic = 1; - } - if (nintrs > NINTR) { - printf("found %d intrs, increase NINTR\n", nintrs); - mustpanic = 1; + MAXCPU, mp_naps); + mp_naps = MAXCPU; } /* @@ -857,8 +840,6 @@ mptable_pass1(void) mp_ncpus = 1; --mp_naps; /* subtract the BSP */ - - return mustpanic; } @@ -883,9 +864,46 @@ mptable_pass2(void) int count; int type; int apic, bus, cpu, intr; + int i, j; + int pgeflag; POSTCODE(MPTABLE_PASS2_POST); + pgeflag = 0; /* XXX - Not used under SMP yet. */ + + MALLOC(io_apic_versions, u_int32_t *, sizeof(u_int32_t) * mp_napics, + M_DEVBUF, M_WAITOK); + MALLOC(ioapic, volatile ioapic_t **, sizeof(ioapic_t *) * mp_napics, + M_DEVBUF, M_WAITOK); + MALLOC(io_apic_ints, io_int *, sizeof(io_int) * nintrs, + M_DEVBUF, M_WAITOK); + MALLOC(bus_data, bus_datum *, sizeof(bus_datum) * mp_nbusses, + M_DEVBUF, M_WAITOK); + + bzero(ioapic, sizeof(ioapic_t *) * mp_napics); + + for (i = 0; i < mp_napics; i++) { + for (j = 0; j < mp_napics; j++) { + /* same page frame as a previous IO apic? */ + if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == + (io_apic_address[i] & PG_FRAME)) { + ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace + + (NPTEPG-2-j) * PAGE_SIZE + + (io_apic_address[i] & PAGE_MASK)); + break; + } + /* use this slot if available */ + if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == 0) { + SMPpt[NPTEPG-2-j] = (pt_entry_t)(PG_V | PG_RW | + pgeflag | (io_apic_address[i] & PG_FRAME)); + ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace + + (NPTEPG-2-j) * PAGE_SIZE + + (io_apic_address[i] & PAGE_MASK)); + break; + } + } + } + /* clear various tables */ for (x = 0; x < NAPICID; ++x) { ID_TO_IO(x) = -1; /* phy APIC ID to log CPU/IO table */ @@ -894,11 +912,11 @@ mptable_pass2(void) } /* clear bus data table */ - for (x = 0; x < NBUS; ++x) + for (x = 0; x < mp_nbusses; ++x) bus_data[x].bus_id = 0xff; /* clear IO APIC INT table */ - for (x = 0; x < NINTR; ++x) { + for (x = 0; x < nintrs; ++x) { io_apic_ints[x].int_type = 0xff; io_apic_ints[x].int_vector = 0xff; } @@ -1305,7 +1323,7 @@ processor_entry(proc_entry_ptr entry, int cpu) } /* add another AP to list, if less than max number of CPUs */ - else if (cpu < NCPU) { + else if (cpu < MAXCPU) { CPU_TO_ID(cpu) = entry->apic_id; ID_TO_CPU(entry->apic_id) = cpu; return 1; @@ -2427,9 +2445,9 @@ ap_init(void) #define CHECKSTATE_INTR 2 /* Do not staticize. Used from apic_vector.s */ -struct proc* checkstate_curproc[NCPU]; -int checkstate_cpustate[NCPU]; -u_long checkstate_pc[NCPU]; +struct proc* checkstate_curproc[MAXCPU]; +int checkstate_cpustate[MAXCPU]; +u_long checkstate_pc[MAXCPU]; #define PC_TO_INDEX(pc, prof) \ ((int)(((u_quad_t)((pc) - (prof)->pr_off) * \ diff --git a/sys/amd64/include/smp.h b/sys/amd64/include/smp.h index 425dac0..dab3611 100644 --- a/sys/amd64/include/smp.h +++ b/sys/amd64/include/smp.h @@ -22,16 +22,15 @@ # error APIC_IO required for SMP, add "options APIC_IO" to your config file. #endif /* SMP && !APIC_IO */ -/* Number of CPUs. */ -#if defined(SMP) && !defined(NCPU) -# define NCPU 2 -#endif /* SMP && NCPU */ - -/* Number of IO APICs. */ -#if defined(APIC_IO) && !defined(NAPIC) -# define NAPIC 2 -#endif /* SMP && NAPIC */ - +/* + * Maximum number of CPUs we will use. + * In the !SMP case we save ourselves a litle space. + */ +#if defined(SMP) +# define MAXCPU 16 +#else +# define MAXCPU 1 +#endif /* SMP */ #if defined(SMP) || defined(APIC_IO) @@ -85,7 +84,7 @@ extern int boot_cpu_id; extern vm_offset_t cpu_apic_address; extern vm_offset_t io_apic_address[]; extern u_int32_t cpu_apic_versions[]; -extern u_int32_t io_apic_versions[]; +extern u_int32_t *io_apic_versions; extern int cpu_num_to_apic_id[]; extern int io_num_to_apic_id[]; extern int apic_id_to_logical[]; @@ -142,7 +141,7 @@ void smp_rendezvous __P((void (*)(void *), /* global data in mpapic.c */ extern volatile lapic_t lapic; -extern volatile ioapic_t *ioapic[]; +extern volatile ioapic_t **ioapic; /* functions in mpapic.c */ void apic_dump __P((char*)); diff --git a/sys/conf/NOTES b/sys/conf/NOTES index c2b94ab..4909bca 100644 --- a/sys/conf/NOTES +++ b/sys/conf/NOTES @@ -105,10 +105,6 @@ options ROOTDEVNAME=\"ufs:da0s2e\" # # SMP enables building of a Symmetric MultiProcessor Kernel. # APIC_IO enables the use of the IO APIC for Symmetric I/O. -# NCPU sets the number of CPUs, defaults to 2. -# NBUS sets the number of busses, defaults to 8. -# NAPIC sets the number of IO APICs on the motherboard, defaults to 1. -# NINTR sets the total number of INTs provided by the motherboard. # # Notes: # @@ -124,12 +120,6 @@ options ROOTDEVNAME=\"ufs:da0s2e\" options SMP # Symmetric MultiProcessor Kernel options APIC_IO # Symmetric (APIC) I/O -# Optional, these are the defaults plus 1: -options NCPU=5 # number of CPUs -options NBUS=10 # number of busses -options NAPIC=2 # number of IO APICs -options NINTR=25 # number of INTs - # # Rogue SMP hardware: # diff --git a/sys/conf/options b/sys/conf/options index 3c78eeb..80327a8 100644 --- a/sys/conf/options +++ b/sys/conf/options @@ -367,8 +367,6 @@ PQ_CACHESIZE opt_vmpage.h # Standard SMP options SMP opt_global.h -NCPU opt_smp.h -NBUS opt_smp.h # sys/netkey KEY diff --git a/sys/conf/options.i386 b/sys/conf/options.i386 index 4cceb8b..d5d0f65 100644 --- a/sys/conf/options.i386 +++ b/sys/conf/options.i386 @@ -33,8 +33,6 @@ DEBUG_SVR4 opt_svr4.h # i386 SMP options APIC_IO opt_global.h -NAPIC opt_smp.h -NINTR opt_smp.h CLK_CALIBRATION_LOOP opt_clock.h CLK_USE_I8254_CALIBRATION opt_clock.h diff --git a/sys/i386/conf/GENERIC b/sys/i386/conf/GENERIC index c385449..d492547 100644 --- a/sys/i386/conf/GENERIC +++ b/sys/i386/conf/GENERIC @@ -61,11 +61,6 @@ options KBD_INSTALL_CDEV # install a CDEV entry in /dev # To make an SMP kernel, the next two are needed #options SMP # Symmetric MultiProcessor Kernel #options APIC_IO # Symmetric (APIC) I/O -# Optionally these may need tweaked, (defaults shown): -#options NCPU=2 # number of CPUs -#options NBUS=8 # number of busses -#options NAPIC=1 # number of IO APICs -#options NINTR=24 # number of INTs device isa device eisa diff --git a/sys/i386/conf/NOTES b/sys/i386/conf/NOTES index c2b94ab..4909bca 100644 --- a/sys/i386/conf/NOTES +++ b/sys/i386/conf/NOTES @@ -105,10 +105,6 @@ options ROOTDEVNAME=\"ufs:da0s2e\" # # SMP enables building of a Symmetric MultiProcessor Kernel. # APIC_IO enables the use of the IO APIC for Symmetric I/O. -# NCPU sets the number of CPUs, defaults to 2. -# NBUS sets the number of busses, defaults to 8. -# NAPIC sets the number of IO APICs on the motherboard, defaults to 1. -# NINTR sets the total number of INTs provided by the motherboard. # # Notes: # @@ -124,12 +120,6 @@ options ROOTDEVNAME=\"ufs:da0s2e\" options SMP # Symmetric MultiProcessor Kernel options APIC_IO # Symmetric (APIC) I/O -# Optional, these are the defaults plus 1: -options NCPU=5 # number of CPUs -options NBUS=10 # number of busses -options NAPIC=2 # number of IO APICs -options NINTR=25 # number of INTs - # # Rogue SMP hardware: # diff --git a/sys/i386/i386/i686_mem.c b/sys/i386/i386/i686_mem.c index 90b72b4..9d49949 100644 --- a/sys/i386/i386/i686_mem.c +++ b/sys/i386/i386/i686_mem.c @@ -26,8 +26,6 @@ * $FreeBSD$ */ -#include "opt_smp.h" - #include <sys/param.h> #include <sys/kernel.h> #include <sys/systm.h> diff --git a/sys/i386/i386/legacy.c b/sys/i386/i386/legacy.c index 6413abd..07552fc 100644 --- a/sys/i386/i386/legacy.c +++ b/sys/i386/i386/legacy.c @@ -40,7 +40,6 @@ * and I/O memory address space. */ -#include "opt_smp.h" #include "mca.h" #include <sys/param.h> diff --git a/sys/i386/i386/machdep.c b/sys/i386/i386/machdep.c index a3c09f4..bb9a235 100644 --- a/sys/i386/i386/machdep.c +++ b/sys/i386/i386/machdep.c @@ -49,7 +49,6 @@ #include "opt_maxmem.h" #include "opt_msgbuf.h" #include "opt_perfmon.h" -#include "opt_smp.h" #include "opt_user_ldt.h" #include "opt_userconfig.h" @@ -1181,11 +1180,7 @@ SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, */ int _default_ldt; -#ifdef SMP -union descriptor gdt[NGDT * NCPU]; /* global descriptor table */ -#else -union descriptor gdt[NGDT]; /* global descriptor table */ -#endif +union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ static struct gate_descriptor idt0[NIDT]; struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ union descriptor ldt[NLDT]; /* local descriptor table */ diff --git a/sys/i386/i386/mp_clock.c b/sys/i386/i386/mp_clock.c index 5657ca3..42be208 100644 --- a/sys/i386/i386/mp_clock.c +++ b/sys/i386/i386/mp_clock.c @@ -35,7 +35,6 @@ /* #include "opt_bus.h" */ /* #include "opt_pci.h" */ -/* #include "opt_smp.h" */ #include <sys/param.h> #include <sys/systm.h> diff --git a/sys/i386/i386/mp_machdep.c b/sys/i386/i386/mp_machdep.c index 5056ed1..ea9aee8 100644 --- a/sys/i386/i386/mp_machdep.c +++ b/sys/i386/i386/mp_machdep.c @@ -25,7 +25,6 @@ * $FreeBSD$ */ -#include "opt_smp.h" #include "opt_cpu.h" #include "opt_user_ldt.h" @@ -257,8 +256,8 @@ vm_offset_t cpu_apic_address; vm_offset_t io_apic_address[NAPICID]; /* NAPICID is more than enough */ extern int nkpt; -u_int32_t cpu_apic_versions[NCPU]; -u_int32_t io_apic_versions[NAPIC]; +u_int32_t cpu_apic_versions[MAXCPU]; +u_int32_t *io_apic_versions; #ifdef APIC_INTR_DIAGNOSTIC int apic_itrace_enter[32]; @@ -313,7 +312,7 @@ extern pt_entry_t *KPTphys; /* SMP page table page */ extern pt_entry_t *SMPpt; -struct pcb stoppcbs[NCPU]; +struct pcb stoppcbs[MAXCPU]; int smp_started; /* has the system started? */ @@ -330,7 +329,7 @@ static mpfps_t mpfps; static int search_for_sig(u_int32_t target, int count); static void mp_enable(u_int boot_addr); -static int mptable_pass1(void); +static void mptable_pass1(void); static int mptable_pass2(void); static void default_mp_table(int type); static void fix_mp_table(void); @@ -398,8 +397,7 @@ mp_probe(void) found: /* calculate needed resources */ mpfps = (mpfps_t)x; - if (mptable_pass1()) - panic("you must reconfigure your kernel"); + mptable_pass1(); /* flag fact that we are running multiple processors */ mp_capable = 1; @@ -720,10 +718,10 @@ static int default_data[7][5] = /* the bus data */ -static bus_datum bus_data[NBUS]; +static bus_datum *bus_data; /* the IO INT data, one entry per possible APIC INTerrupt */ -static io_int io_apic_ints[NINTR]; +static io_int *io_apic_ints; static int nintrs; @@ -748,7 +746,7 @@ static int lookup_bus_type __P((char *name)); * mp_napics * nintrs */ -static int +static void mptable_pass1(void) { int x; @@ -757,12 +755,9 @@ mptable_pass1(void) void* position; int count; int type; - int mustpanic; POSTCODE(MPTABLE_PASS1_POST); - mustpanic = 0; - /* clear various tables */ for (x = 0; x < NAPICID; ++x) { io_apic_address[x] = ~0; /* IO APIC address table */ @@ -832,22 +827,10 @@ mptable_pass1(void) } /* qualify the numbers */ - if (mp_naps > NCPU) { + if (mp_naps > MAXCPU) { printf("Warning: only using %d of %d available CPUs!\n", - NCPU, mp_naps); - mp_naps = NCPU; - } - if (mp_nbusses > NBUS) { - printf("found %d busses, increase NBUS\n", mp_nbusses); - mustpanic = 1; - } - if (mp_napics > NAPIC) { - printf("found %d apics, increase NAPIC\n", mp_napics); - mustpanic = 1; - } - if (nintrs > NINTR) { - printf("found %d intrs, increase NINTR\n", nintrs); - mustpanic = 1; + MAXCPU, mp_naps); + mp_naps = MAXCPU; } /* @@ -857,8 +840,6 @@ mptable_pass1(void) mp_ncpus = 1; --mp_naps; /* subtract the BSP */ - - return mustpanic; } @@ -883,9 +864,46 @@ mptable_pass2(void) int count; int type; int apic, bus, cpu, intr; + int i, j; + int pgeflag; POSTCODE(MPTABLE_PASS2_POST); + pgeflag = 0; /* XXX - Not used under SMP yet. */ + + MALLOC(io_apic_versions, u_int32_t *, sizeof(u_int32_t) * mp_napics, + M_DEVBUF, M_WAITOK); + MALLOC(ioapic, volatile ioapic_t **, sizeof(ioapic_t *) * mp_napics, + M_DEVBUF, M_WAITOK); + MALLOC(io_apic_ints, io_int *, sizeof(io_int) * nintrs, + M_DEVBUF, M_WAITOK); + MALLOC(bus_data, bus_datum *, sizeof(bus_datum) * mp_nbusses, + M_DEVBUF, M_WAITOK); + + bzero(ioapic, sizeof(ioapic_t *) * mp_napics); + + for (i = 0; i < mp_napics; i++) { + for (j = 0; j < mp_napics; j++) { + /* same page frame as a previous IO apic? */ + if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == + (io_apic_address[i] & PG_FRAME)) { + ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace + + (NPTEPG-2-j) * PAGE_SIZE + + (io_apic_address[i] & PAGE_MASK)); + break; + } + /* use this slot if available */ + if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == 0) { + SMPpt[NPTEPG-2-j] = (pt_entry_t)(PG_V | PG_RW | + pgeflag | (io_apic_address[i] & PG_FRAME)); + ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace + + (NPTEPG-2-j) * PAGE_SIZE + + (io_apic_address[i] & PAGE_MASK)); + break; + } + } + } + /* clear various tables */ for (x = 0; x < NAPICID; ++x) { ID_TO_IO(x) = -1; /* phy APIC ID to log CPU/IO table */ @@ -894,11 +912,11 @@ mptable_pass2(void) } /* clear bus data table */ - for (x = 0; x < NBUS; ++x) + for (x = 0; x < mp_nbusses; ++x) bus_data[x].bus_id = 0xff; /* clear IO APIC INT table */ - for (x = 0; x < NINTR; ++x) { + for (x = 0; x < nintrs; ++x) { io_apic_ints[x].int_type = 0xff; io_apic_ints[x].int_vector = 0xff; } @@ -1305,7 +1323,7 @@ processor_entry(proc_entry_ptr entry, int cpu) } /* add another AP to list, if less than max number of CPUs */ - else if (cpu < NCPU) { + else if (cpu < MAXCPU) { CPU_TO_ID(cpu) = entry->apic_id; ID_TO_CPU(entry->apic_id) = cpu; return 1; @@ -2427,9 +2445,9 @@ ap_init(void) #define CHECKSTATE_INTR 2 /* Do not staticize. Used from apic_vector.s */ -struct proc* checkstate_curproc[NCPU]; -int checkstate_cpustate[NCPU]; -u_long checkstate_pc[NCPU]; +struct proc* checkstate_curproc[MAXCPU]; +int checkstate_cpustate[MAXCPU]; +u_long checkstate_pc[MAXCPU]; #define PC_TO_INDEX(pc, prof) \ ((int)(((u_quad_t)((pc) - (prof)->pr_off) * \ diff --git a/sys/i386/i386/mpapic.c b/sys/i386/i386/mpapic.c index 3f971d8..f476e01 100644 --- a/sys/i386/i386/mpapic.c +++ b/sys/i386/i386/mpapic.c @@ -25,8 +25,6 @@ * $FreeBSD$ */ -#include "opt_smp.h" - #include <sys/param.h> #include <sys/bus.h> #include <sys/systm.h> @@ -49,7 +47,7 @@ */ #if defined(APIC_IO) -volatile ioapic_t *ioapic[NAPIC]; +volatile ioapic_t **ioapic; #endif /* APIC_IO */ /* diff --git a/sys/i386/i386/mptable.c b/sys/i386/i386/mptable.c index 5056ed1..ea9aee8 100644 --- a/sys/i386/i386/mptable.c +++ b/sys/i386/i386/mptable.c @@ -25,7 +25,6 @@ * $FreeBSD$ */ -#include "opt_smp.h" #include "opt_cpu.h" #include "opt_user_ldt.h" @@ -257,8 +256,8 @@ vm_offset_t cpu_apic_address; vm_offset_t io_apic_address[NAPICID]; /* NAPICID is more than enough */ extern int nkpt; -u_int32_t cpu_apic_versions[NCPU]; -u_int32_t io_apic_versions[NAPIC]; +u_int32_t cpu_apic_versions[MAXCPU]; +u_int32_t *io_apic_versions; #ifdef APIC_INTR_DIAGNOSTIC int apic_itrace_enter[32]; @@ -313,7 +312,7 @@ extern pt_entry_t *KPTphys; /* SMP page table page */ extern pt_entry_t *SMPpt; -struct pcb stoppcbs[NCPU]; +struct pcb stoppcbs[MAXCPU]; int smp_started; /* has the system started? */ @@ -330,7 +329,7 @@ static mpfps_t mpfps; static int search_for_sig(u_int32_t target, int count); static void mp_enable(u_int boot_addr); -static int mptable_pass1(void); +static void mptable_pass1(void); static int mptable_pass2(void); static void default_mp_table(int type); static void fix_mp_table(void); @@ -398,8 +397,7 @@ mp_probe(void) found: /* calculate needed resources */ mpfps = (mpfps_t)x; - if (mptable_pass1()) - panic("you must reconfigure your kernel"); + mptable_pass1(); /* flag fact that we are running multiple processors */ mp_capable = 1; @@ -720,10 +718,10 @@ static int default_data[7][5] = /* the bus data */ -static bus_datum bus_data[NBUS]; +static bus_datum *bus_data; /* the IO INT data, one entry per possible APIC INTerrupt */ -static io_int io_apic_ints[NINTR]; +static io_int *io_apic_ints; static int nintrs; @@ -748,7 +746,7 @@ static int lookup_bus_type __P((char *name)); * mp_napics * nintrs */ -static int +static void mptable_pass1(void) { int x; @@ -757,12 +755,9 @@ mptable_pass1(void) void* position; int count; int type; - int mustpanic; POSTCODE(MPTABLE_PASS1_POST); - mustpanic = 0; - /* clear various tables */ for (x = 0; x < NAPICID; ++x) { io_apic_address[x] = ~0; /* IO APIC address table */ @@ -832,22 +827,10 @@ mptable_pass1(void) } /* qualify the numbers */ - if (mp_naps > NCPU) { + if (mp_naps > MAXCPU) { printf("Warning: only using %d of %d available CPUs!\n", - NCPU, mp_naps); - mp_naps = NCPU; - } - if (mp_nbusses > NBUS) { - printf("found %d busses, increase NBUS\n", mp_nbusses); - mustpanic = 1; - } - if (mp_napics > NAPIC) { - printf("found %d apics, increase NAPIC\n", mp_napics); - mustpanic = 1; - } - if (nintrs > NINTR) { - printf("found %d intrs, increase NINTR\n", nintrs); - mustpanic = 1; + MAXCPU, mp_naps); + mp_naps = MAXCPU; } /* @@ -857,8 +840,6 @@ mptable_pass1(void) mp_ncpus = 1; --mp_naps; /* subtract the BSP */ - - return mustpanic; } @@ -883,9 +864,46 @@ mptable_pass2(void) int count; int type; int apic, bus, cpu, intr; + int i, j; + int pgeflag; POSTCODE(MPTABLE_PASS2_POST); + pgeflag = 0; /* XXX - Not used under SMP yet. */ + + MALLOC(io_apic_versions, u_int32_t *, sizeof(u_int32_t) * mp_napics, + M_DEVBUF, M_WAITOK); + MALLOC(ioapic, volatile ioapic_t **, sizeof(ioapic_t *) * mp_napics, + M_DEVBUF, M_WAITOK); + MALLOC(io_apic_ints, io_int *, sizeof(io_int) * nintrs, + M_DEVBUF, M_WAITOK); + MALLOC(bus_data, bus_datum *, sizeof(bus_datum) * mp_nbusses, + M_DEVBUF, M_WAITOK); + + bzero(ioapic, sizeof(ioapic_t *) * mp_napics); + + for (i = 0; i < mp_napics; i++) { + for (j = 0; j < mp_napics; j++) { + /* same page frame as a previous IO apic? */ + if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == + (io_apic_address[i] & PG_FRAME)) { + ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace + + (NPTEPG-2-j) * PAGE_SIZE + + (io_apic_address[i] & PAGE_MASK)); + break; + } + /* use this slot if available */ + if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == 0) { + SMPpt[NPTEPG-2-j] = (pt_entry_t)(PG_V | PG_RW | + pgeflag | (io_apic_address[i] & PG_FRAME)); + ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace + + (NPTEPG-2-j) * PAGE_SIZE + + (io_apic_address[i] & PAGE_MASK)); + break; + } + } + } + /* clear various tables */ for (x = 0; x < NAPICID; ++x) { ID_TO_IO(x) = -1; /* phy APIC ID to log CPU/IO table */ @@ -894,11 +912,11 @@ mptable_pass2(void) } /* clear bus data table */ - for (x = 0; x < NBUS; ++x) + for (x = 0; x < mp_nbusses; ++x) bus_data[x].bus_id = 0xff; /* clear IO APIC INT table */ - for (x = 0; x < NINTR; ++x) { + for (x = 0; x < nintrs; ++x) { io_apic_ints[x].int_type = 0xff; io_apic_ints[x].int_vector = 0xff; } @@ -1305,7 +1323,7 @@ processor_entry(proc_entry_ptr entry, int cpu) } /* add another AP to list, if less than max number of CPUs */ - else if (cpu < NCPU) { + else if (cpu < MAXCPU) { CPU_TO_ID(cpu) = entry->apic_id; ID_TO_CPU(entry->apic_id) = cpu; return 1; @@ -2427,9 +2445,9 @@ ap_init(void) #define CHECKSTATE_INTR 2 /* Do not staticize. Used from apic_vector.s */ -struct proc* checkstate_curproc[NCPU]; -int checkstate_cpustate[NCPU]; -u_long checkstate_pc[NCPU]; +struct proc* checkstate_curproc[MAXCPU]; +int checkstate_cpustate[MAXCPU]; +u_long checkstate_pc[MAXCPU]; #define PC_TO_INDEX(pc, prof) \ ((int)(((u_quad_t)((pc) - (prof)->pr_off) * \ diff --git a/sys/i386/i386/nexus.c b/sys/i386/i386/nexus.c index 6413abd..07552fc 100644 --- a/sys/i386/i386/nexus.c +++ b/sys/i386/i386/nexus.c @@ -40,7 +40,6 @@ * and I/O memory address space. */ -#include "opt_smp.h" #include "mca.h" #include <sys/param.h> diff --git a/sys/i386/i386/pmap.c b/sys/i386/i386/pmap.c index 287647a..52d9cd1 100644 --- a/sys/i386/i386/pmap.c +++ b/sys/i386/i386/pmap.c @@ -279,7 +279,6 @@ pmap_bootstrap(firstaddr, loadaddr) vm_offset_t va; pt_entry_t *pte; #ifdef SMP - int i, j; struct globaldata *gd; #endif @@ -361,7 +360,7 @@ pmap_bootstrap(firstaddr, loadaddr) pgeflag = 0; -#if !defined(SMP) +#if !defined(SMP) /* XXX - see also mp_machdep.c */ if (cpu_feature & CPUID_PGE) { pgeflag = PG_G; } @@ -419,28 +418,6 @@ pmap_bootstrap(firstaddr, loadaddr) SMPpt[NPTEPG - 1] = (pt_entry_t)(PG_V | PG_RW | PG_N | pgeflag | (cpu_apic_address & PG_FRAME)); - for (i = 0; i < mp_napics; i++) { - for (j = 0; j < mp_napics; j++) { - /* same page frame as a previous IO apic? */ - if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == - (io_apic_address[i] & PG_FRAME)) { - ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace - + (NPTEPG-2-j) * PAGE_SIZE - + (io_apic_address[i] & PAGE_MASK)); - break; - } - /* use this slot if available */ - if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == 0) { - SMPpt[NPTEPG-2-j] = (pt_entry_t)(PG_V | PG_RW | - pgeflag | (io_apic_address[i] & PG_FRAME)); - ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace - + (NPTEPG-2-j) * PAGE_SIZE - + (io_apic_address[i] & PAGE_MASK)); - break; - } - } - } - /* BSP does this itself, AP's get it pre-set */ gd = &SMP_prvspace[0].globaldata; gd->gd_prv_CMAP1 = &SMPpt[1]; diff --git a/sys/i386/i386/support.s b/sys/i386/i386/support.s index 1f073d8..1187c19 100644 --- a/sys/i386/i386/support.s +++ b/sys/i386/i386/support.s @@ -33,7 +33,6 @@ * $FreeBSD$ */ -#include "opt_smp.h" #include "npx.h" #include <machine/asmacros.h> diff --git a/sys/i386/i386/sys_machdep.c b/sys/i386/i386/sys_machdep.c index bd7f0d8..803ac25 100644 --- a/sys/i386/i386/sys_machdep.c +++ b/sys/i386/i386/sys_machdep.c @@ -36,7 +36,6 @@ */ #include "opt_user_ldt.h" -#include "opt_smp.h" #include <sys/param.h> #include <sys/systm.h> diff --git a/sys/i386/include/mpapic.h b/sys/i386/include/mpapic.h index 9f20892..e797c9f 100644 --- a/sys/i386/include/mpapic.h +++ b/sys/i386/include/mpapic.h @@ -32,17 +32,6 @@ #include <i386/isa/icu.h> -/* number of busses */ -#if !defined(NBUS) -# define NBUS 8 -#endif /* NBUS */ - -/* total number of APIC INTs, including SHARED INTs */ -#if !defined(NINTR) -#define NINTR 48 -#endif /* NINTR */ - - /* * Size of APIC ID list. * Also used a MAX size of various other arrays. diff --git a/sys/i386/include/mptable.h b/sys/i386/include/mptable.h index 5056ed1..ea9aee8 100644 --- a/sys/i386/include/mptable.h +++ b/sys/i386/include/mptable.h @@ -25,7 +25,6 @@ * $FreeBSD$ */ -#include "opt_smp.h" #include "opt_cpu.h" #include "opt_user_ldt.h" @@ -257,8 +256,8 @@ vm_offset_t cpu_apic_address; vm_offset_t io_apic_address[NAPICID]; /* NAPICID is more than enough */ extern int nkpt; -u_int32_t cpu_apic_versions[NCPU]; -u_int32_t io_apic_versions[NAPIC]; +u_int32_t cpu_apic_versions[MAXCPU]; +u_int32_t *io_apic_versions; #ifdef APIC_INTR_DIAGNOSTIC int apic_itrace_enter[32]; @@ -313,7 +312,7 @@ extern pt_entry_t *KPTphys; /* SMP page table page */ extern pt_entry_t *SMPpt; -struct pcb stoppcbs[NCPU]; +struct pcb stoppcbs[MAXCPU]; int smp_started; /* has the system started? */ @@ -330,7 +329,7 @@ static mpfps_t mpfps; static int search_for_sig(u_int32_t target, int count); static void mp_enable(u_int boot_addr); -static int mptable_pass1(void); +static void mptable_pass1(void); static int mptable_pass2(void); static void default_mp_table(int type); static void fix_mp_table(void); @@ -398,8 +397,7 @@ mp_probe(void) found: /* calculate needed resources */ mpfps = (mpfps_t)x; - if (mptable_pass1()) - panic("you must reconfigure your kernel"); + mptable_pass1(); /* flag fact that we are running multiple processors */ mp_capable = 1; @@ -720,10 +718,10 @@ static int default_data[7][5] = /* the bus data */ -static bus_datum bus_data[NBUS]; +static bus_datum *bus_data; /* the IO INT data, one entry per possible APIC INTerrupt */ -static io_int io_apic_ints[NINTR]; +static io_int *io_apic_ints; static int nintrs; @@ -748,7 +746,7 @@ static int lookup_bus_type __P((char *name)); * mp_napics * nintrs */ -static int +static void mptable_pass1(void) { int x; @@ -757,12 +755,9 @@ mptable_pass1(void) void* position; int count; int type; - int mustpanic; POSTCODE(MPTABLE_PASS1_POST); - mustpanic = 0; - /* clear various tables */ for (x = 0; x < NAPICID; ++x) { io_apic_address[x] = ~0; /* IO APIC address table */ @@ -832,22 +827,10 @@ mptable_pass1(void) } /* qualify the numbers */ - if (mp_naps > NCPU) { + if (mp_naps > MAXCPU) { printf("Warning: only using %d of %d available CPUs!\n", - NCPU, mp_naps); - mp_naps = NCPU; - } - if (mp_nbusses > NBUS) { - printf("found %d busses, increase NBUS\n", mp_nbusses); - mustpanic = 1; - } - if (mp_napics > NAPIC) { - printf("found %d apics, increase NAPIC\n", mp_napics); - mustpanic = 1; - } - if (nintrs > NINTR) { - printf("found %d intrs, increase NINTR\n", nintrs); - mustpanic = 1; + MAXCPU, mp_naps); + mp_naps = MAXCPU; } /* @@ -857,8 +840,6 @@ mptable_pass1(void) mp_ncpus = 1; --mp_naps; /* subtract the BSP */ - - return mustpanic; } @@ -883,9 +864,46 @@ mptable_pass2(void) int count; int type; int apic, bus, cpu, intr; + int i, j; + int pgeflag; POSTCODE(MPTABLE_PASS2_POST); + pgeflag = 0; /* XXX - Not used under SMP yet. */ + + MALLOC(io_apic_versions, u_int32_t *, sizeof(u_int32_t) * mp_napics, + M_DEVBUF, M_WAITOK); + MALLOC(ioapic, volatile ioapic_t **, sizeof(ioapic_t *) * mp_napics, + M_DEVBUF, M_WAITOK); + MALLOC(io_apic_ints, io_int *, sizeof(io_int) * nintrs, + M_DEVBUF, M_WAITOK); + MALLOC(bus_data, bus_datum *, sizeof(bus_datum) * mp_nbusses, + M_DEVBUF, M_WAITOK); + + bzero(ioapic, sizeof(ioapic_t *) * mp_napics); + + for (i = 0; i < mp_napics; i++) { + for (j = 0; j < mp_napics; j++) { + /* same page frame as a previous IO apic? */ + if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == + (io_apic_address[i] & PG_FRAME)) { + ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace + + (NPTEPG-2-j) * PAGE_SIZE + + (io_apic_address[i] & PAGE_MASK)); + break; + } + /* use this slot if available */ + if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == 0) { + SMPpt[NPTEPG-2-j] = (pt_entry_t)(PG_V | PG_RW | + pgeflag | (io_apic_address[i] & PG_FRAME)); + ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace + + (NPTEPG-2-j) * PAGE_SIZE + + (io_apic_address[i] & PAGE_MASK)); + break; + } + } + } + /* clear various tables */ for (x = 0; x < NAPICID; ++x) { ID_TO_IO(x) = -1; /* phy APIC ID to log CPU/IO table */ @@ -894,11 +912,11 @@ mptable_pass2(void) } /* clear bus data table */ - for (x = 0; x < NBUS; ++x) + for (x = 0; x < mp_nbusses; ++x) bus_data[x].bus_id = 0xff; /* clear IO APIC INT table */ - for (x = 0; x < NINTR; ++x) { + for (x = 0; x < nintrs; ++x) { io_apic_ints[x].int_type = 0xff; io_apic_ints[x].int_vector = 0xff; } @@ -1305,7 +1323,7 @@ processor_entry(proc_entry_ptr entry, int cpu) } /* add another AP to list, if less than max number of CPUs */ - else if (cpu < NCPU) { + else if (cpu < MAXCPU) { CPU_TO_ID(cpu) = entry->apic_id; ID_TO_CPU(entry->apic_id) = cpu; return 1; @@ -2427,9 +2445,9 @@ ap_init(void) #define CHECKSTATE_INTR 2 /* Do not staticize. Used from apic_vector.s */ -struct proc* checkstate_curproc[NCPU]; -int checkstate_cpustate[NCPU]; -u_long checkstate_pc[NCPU]; +struct proc* checkstate_curproc[MAXCPU]; +int checkstate_cpustate[MAXCPU]; +u_long checkstate_pc[MAXCPU]; #define PC_TO_INDEX(pc, prof) \ ((int)(((u_quad_t)((pc) - (prof)->pr_off) * \ diff --git a/sys/i386/include/smp.h b/sys/i386/include/smp.h index 425dac0..dab3611 100644 --- a/sys/i386/include/smp.h +++ b/sys/i386/include/smp.h @@ -22,16 +22,15 @@ # error APIC_IO required for SMP, add "options APIC_IO" to your config file. #endif /* SMP && !APIC_IO */ -/* Number of CPUs. */ -#if defined(SMP) && !defined(NCPU) -# define NCPU 2 -#endif /* SMP && NCPU */ - -/* Number of IO APICs. */ -#if defined(APIC_IO) && !defined(NAPIC) -# define NAPIC 2 -#endif /* SMP && NAPIC */ - +/* + * Maximum number of CPUs we will use. + * In the !SMP case we save ourselves a litle space. + */ +#if defined(SMP) +# define MAXCPU 16 +#else +# define MAXCPU 1 +#endif /* SMP */ #if defined(SMP) || defined(APIC_IO) @@ -85,7 +84,7 @@ extern int boot_cpu_id; extern vm_offset_t cpu_apic_address; extern vm_offset_t io_apic_address[]; extern u_int32_t cpu_apic_versions[]; -extern u_int32_t io_apic_versions[]; +extern u_int32_t *io_apic_versions; extern int cpu_num_to_apic_id[]; extern int io_num_to_apic_id[]; extern int apic_id_to_logical[]; @@ -142,7 +141,7 @@ void smp_rendezvous __P((void (*)(void *), /* global data in mpapic.c */ extern volatile lapic_t lapic; -extern volatile ioapic_t *ioapic[]; +extern volatile ioapic_t **ioapic; /* functions in mpapic.c */ void apic_dump __P((char*)); diff --git a/sys/i386/isa/apic_ipl.s b/sys/i386/isa/apic_ipl.s index 0def1de..596adf6 100644 --- a/sys/i386/isa/apic_ipl.s +++ b/sys/i386/isa/apic_ipl.s @@ -235,7 +235,8 @@ write_ioapic_mask: jz all_done /* no change, return */ movl _APIC, %esi /* APIC # */ - movl _ioapic(,%esi,4), %esi /* %esi holds APIC base address */ + movl _ioapic, %ecx + movl (%ecx,%esi,4), %esi /* %esi holds APIC base address */ next_loop: /* %ebx = diffs, %esi = APIC base */ bsfl %ebx, %ecx /* %ecx = index if 1st/next set bit */ @@ -355,7 +356,8 @@ clr_ioapic_maskbit: */ ENTRY(io_apic_read) movl 4(%esp), %ecx /* APIC # */ - movl _ioapic(,%ecx,4), %edx /* APIC base register address */ + movl _ioapic, %eax + movl (%eax,%ecx,4), %edx /* APIC base register address */ movl 8(%esp), %eax /* target register index */ movl %eax, (%edx) /* write the target register index */ movl 16(%edx), %eax /* read the APIC register data */ @@ -366,7 +368,8 @@ ENTRY(io_apic_read) */ ENTRY(io_apic_write) movl 4(%esp), %ecx /* APIC # */ - movl _ioapic(,%ecx,4), %edx /* APIC base register address */ + movl _ioapic, %eax + movl (%eax,%ecx,4), %edx /* APIC base register address */ movl 8(%esp), %eax /* target register index */ movl %eax, (%edx) /* write the target register index */ movl 12(%esp), %eax /* target register value */ diff --git a/sys/kern/subr_smp.c b/sys/kern/subr_smp.c index 5056ed1..ea9aee8 100644 --- a/sys/kern/subr_smp.c +++ b/sys/kern/subr_smp.c @@ -25,7 +25,6 @@ * $FreeBSD$ */ -#include "opt_smp.h" #include "opt_cpu.h" #include "opt_user_ldt.h" @@ -257,8 +256,8 @@ vm_offset_t cpu_apic_address; vm_offset_t io_apic_address[NAPICID]; /* NAPICID is more than enough */ extern int nkpt; -u_int32_t cpu_apic_versions[NCPU]; -u_int32_t io_apic_versions[NAPIC]; +u_int32_t cpu_apic_versions[MAXCPU]; +u_int32_t *io_apic_versions; #ifdef APIC_INTR_DIAGNOSTIC int apic_itrace_enter[32]; @@ -313,7 +312,7 @@ extern pt_entry_t *KPTphys; /* SMP page table page */ extern pt_entry_t *SMPpt; -struct pcb stoppcbs[NCPU]; +struct pcb stoppcbs[MAXCPU]; int smp_started; /* has the system started? */ @@ -330,7 +329,7 @@ static mpfps_t mpfps; static int search_for_sig(u_int32_t target, int count); static void mp_enable(u_int boot_addr); -static int mptable_pass1(void); +static void mptable_pass1(void); static int mptable_pass2(void); static void default_mp_table(int type); static void fix_mp_table(void); @@ -398,8 +397,7 @@ mp_probe(void) found: /* calculate needed resources */ mpfps = (mpfps_t)x; - if (mptable_pass1()) - panic("you must reconfigure your kernel"); + mptable_pass1(); /* flag fact that we are running multiple processors */ mp_capable = 1; @@ -720,10 +718,10 @@ static int default_data[7][5] = /* the bus data */ -static bus_datum bus_data[NBUS]; +static bus_datum *bus_data; /* the IO INT data, one entry per possible APIC INTerrupt */ -static io_int io_apic_ints[NINTR]; +static io_int *io_apic_ints; static int nintrs; @@ -748,7 +746,7 @@ static int lookup_bus_type __P((char *name)); * mp_napics * nintrs */ -static int +static void mptable_pass1(void) { int x; @@ -757,12 +755,9 @@ mptable_pass1(void) void* position; int count; int type; - int mustpanic; POSTCODE(MPTABLE_PASS1_POST); - mustpanic = 0; - /* clear various tables */ for (x = 0; x < NAPICID; ++x) { io_apic_address[x] = ~0; /* IO APIC address table */ @@ -832,22 +827,10 @@ mptable_pass1(void) } /* qualify the numbers */ - if (mp_naps > NCPU) { + if (mp_naps > MAXCPU) { printf("Warning: only using %d of %d available CPUs!\n", - NCPU, mp_naps); - mp_naps = NCPU; - } - if (mp_nbusses > NBUS) { - printf("found %d busses, increase NBUS\n", mp_nbusses); - mustpanic = 1; - } - if (mp_napics > NAPIC) { - printf("found %d apics, increase NAPIC\n", mp_napics); - mustpanic = 1; - } - if (nintrs > NINTR) { - printf("found %d intrs, increase NINTR\n", nintrs); - mustpanic = 1; + MAXCPU, mp_naps); + mp_naps = MAXCPU; } /* @@ -857,8 +840,6 @@ mptable_pass1(void) mp_ncpus = 1; --mp_naps; /* subtract the BSP */ - - return mustpanic; } @@ -883,9 +864,46 @@ mptable_pass2(void) int count; int type; int apic, bus, cpu, intr; + int i, j; + int pgeflag; POSTCODE(MPTABLE_PASS2_POST); + pgeflag = 0; /* XXX - Not used under SMP yet. */ + + MALLOC(io_apic_versions, u_int32_t *, sizeof(u_int32_t) * mp_napics, + M_DEVBUF, M_WAITOK); + MALLOC(ioapic, volatile ioapic_t **, sizeof(ioapic_t *) * mp_napics, + M_DEVBUF, M_WAITOK); + MALLOC(io_apic_ints, io_int *, sizeof(io_int) * nintrs, + M_DEVBUF, M_WAITOK); + MALLOC(bus_data, bus_datum *, sizeof(bus_datum) * mp_nbusses, + M_DEVBUF, M_WAITOK); + + bzero(ioapic, sizeof(ioapic_t *) * mp_napics); + + for (i = 0; i < mp_napics; i++) { + for (j = 0; j < mp_napics; j++) { + /* same page frame as a previous IO apic? */ + if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == + (io_apic_address[i] & PG_FRAME)) { + ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace + + (NPTEPG-2-j) * PAGE_SIZE + + (io_apic_address[i] & PAGE_MASK)); + break; + } + /* use this slot if available */ + if (((vm_offset_t)SMPpt[NPTEPG-2-j] & PG_FRAME) == 0) { + SMPpt[NPTEPG-2-j] = (pt_entry_t)(PG_V | PG_RW | + pgeflag | (io_apic_address[i] & PG_FRAME)); + ioapic[i] = (ioapic_t *)((u_int)SMP_prvspace + + (NPTEPG-2-j) * PAGE_SIZE + + (io_apic_address[i] & PAGE_MASK)); + break; + } + } + } + /* clear various tables */ for (x = 0; x < NAPICID; ++x) { ID_TO_IO(x) = -1; /* phy APIC ID to log CPU/IO table */ @@ -894,11 +912,11 @@ mptable_pass2(void) } /* clear bus data table */ - for (x = 0; x < NBUS; ++x) + for (x = 0; x < mp_nbusses; ++x) bus_data[x].bus_id = 0xff; /* clear IO APIC INT table */ - for (x = 0; x < NINTR; ++x) { + for (x = 0; x < nintrs; ++x) { io_apic_ints[x].int_type = 0xff; io_apic_ints[x].int_vector = 0xff; } @@ -1305,7 +1323,7 @@ processor_entry(proc_entry_ptr entry, int cpu) } /* add another AP to list, if less than max number of CPUs */ - else if (cpu < NCPU) { + else if (cpu < MAXCPU) { CPU_TO_ID(cpu) = entry->apic_id; ID_TO_CPU(entry->apic_id) = cpu; return 1; @@ -2427,9 +2445,9 @@ ap_init(void) #define CHECKSTATE_INTR 2 /* Do not staticize. Used from apic_vector.s */ -struct proc* checkstate_curproc[NCPU]; -int checkstate_cpustate[NCPU]; -u_long checkstate_pc[NCPU]; +struct proc* checkstate_curproc[MAXCPU]; +int checkstate_cpustate[MAXCPU]; +u_long checkstate_pc[MAXCPU]; #define PC_TO_INDEX(pc, prof) \ ((int)(((u_quad_t)((pc) - (prof)->pr_off) * \ diff --git a/sys/modules/agp/Makefile b/sys/modules/agp/Makefile index 1509cc1..7eb2ed7 100644 --- a/sys/modules/agp/Makefile +++ b/sys/modules/agp/Makefile @@ -5,7 +5,7 @@ KMOD = agp SRCS = agp.c agp_intel.c agp_via.c agp_sis.c agp_ali.c agp_amd.c SRCS += agp_i810.c agp_if.c SRCS += device_if.h bus_if.h agp_if.h pci_if.h -SRCS += opt_bdg.h opt_bus.h opt_pci.h opt_smp.h +SRCS += opt_bdg.h opt_bus.h opt_pci.h MFILES = kern/device_if.m kern/bus_if.m pci/agp_if.m pci/pci_if.m .include <bsd.kmod.mk> diff --git a/sys/pci/pcisupport.c b/sys/pci/pcisupport.c index 2cfaaa1..e73a7a6 100644 --- a/sys/pci/pcisupport.c +++ b/sys/pci/pcisupport.c @@ -43,7 +43,6 @@ #include "opt_bus.h" #include "opt_pci.h" -#include "opt_smp.h" #include <sys/param.h> #include <sys/systm.h> diff --git a/sys/powerpc/powerpc/genassym.c b/sys/powerpc/powerpc/genassym.c index 066d87b..bd520f1 100644 --- a/sys/powerpc/powerpc/genassym.c +++ b/sys/powerpc/powerpc/genassym.c @@ -69,8 +69,6 @@ #include <nfs/nfs.h> #include <nfs/nfsdiskless.h> -#include "opt_smp.h" - ASSYM(GD_CURPROC, offsetof(struct globaldata, gd_curproc)); ASSYM(GD_FPCURPROC, offsetof(struct globaldata, gd_fpcurproc)); ASSYM(GD_CURPCB, offsetof(struct globaldata, gd_curpcb)); diff --git a/sys/sys/smp.h b/sys/sys/smp.h index 425dac0..dab3611 100644 --- a/sys/sys/smp.h +++ b/sys/sys/smp.h @@ -22,16 +22,15 @@ # error APIC_IO required for SMP, add "options APIC_IO" to your config file. #endif /* SMP && !APIC_IO */ -/* Number of CPUs. */ -#if defined(SMP) && !defined(NCPU) -# define NCPU 2 -#endif /* SMP && NCPU */ - -/* Number of IO APICs. */ -#if defined(APIC_IO) && !defined(NAPIC) -# define NAPIC 2 -#endif /* SMP && NAPIC */ - +/* + * Maximum number of CPUs we will use. + * In the !SMP case we save ourselves a litle space. + */ +#if defined(SMP) +# define MAXCPU 16 +#else +# define MAXCPU 1 +#endif /* SMP */ #if defined(SMP) || defined(APIC_IO) @@ -85,7 +84,7 @@ extern int boot_cpu_id; extern vm_offset_t cpu_apic_address; extern vm_offset_t io_apic_address[]; extern u_int32_t cpu_apic_versions[]; -extern u_int32_t io_apic_versions[]; +extern u_int32_t *io_apic_versions; extern int cpu_num_to_apic_id[]; extern int io_num_to_apic_id[]; extern int apic_id_to_logical[]; @@ -142,7 +141,7 @@ void smp_rendezvous __P((void (*)(void *), /* global data in mpapic.c */ extern volatile lapic_t lapic; -extern volatile ioapic_t *ioapic[]; +extern volatile ioapic_t **ioapic; /* functions in mpapic.c */ void apic_dump __P((char*)); |