diff options
| author | mav <mav@FreeBSD.org> | 2017-05-16 00:21:03 +0000 |
|---|---|---|
| committer | mav <mav@FreeBSD.org> | 2017-05-16 00:21:03 +0000 |
| commit | 87d7c82fefe4143a9b80cf82c7eacb61458352d4 (patch) | |
| tree | 7196225238334a031921f6fc398e2b1ed55c652a | |
| parent | 925f3bde502f9c9f6a093d833e419c3d9afee4b3 (diff) | |
| download | FreeBSD-src-87d7c82fefe4143a9b80cf82c7eacb61458352d4.zip FreeBSD-src-87d7c82fefe4143a9b80cf82c7eacb61458352d4.tar.gz | |
MFC r317659, r317752:
Make some UART consoles to not spin wait for data to be sent.
At least with Tx FIFO enabled it shows me ~10% reduction of verbose boot
time with serial console at 115200 baud.
| -rw-r--r-- | sys/dev/uart/uart_dev_lpc.c | 12 | ||||
| -rw-r--r-- | sys/dev/uart/uart_dev_ns8250.c | 12 |
2 files changed, 14 insertions, 10 deletions
diff --git a/sys/dev/uart/uart_dev_lpc.c b/sys/dev/uart/uart_dev_lpc.c index 306c9f1..48d7be3 100644 --- a/sys/dev/uart/uart_dev_lpc.c +++ b/sys/dev/uart/uart_dev_lpc.c @@ -345,9 +345,6 @@ lpc_ns8250_putc(struct uart_bas *bas, int c) DELAY(4); uart_setreg(bas, REG_DATA, c); uart_barrier(bas); - limit = 250000; - while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0 && --limit) - DELAY(4); } static int @@ -890,8 +887,13 @@ lpc_ns8250_bus_transmit(struct uart_softc *sc) bas = &sc->sc_bas; uart_lock(sc->sc_hwmtx); - while ((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0) - ; + if (sc->sc_txdatasz > 1) { + if ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0) + lpc_ns8250_drain(bas, UART_DRAIN_TRANSMITTER); + } else { + while ((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0) + DELAY(4); + } for (i = 0; i < sc->sc_txdatasz; i++) { uart_setreg(bas, REG_DATA, sc->sc_txbuf[i]); uart_barrier(bas); diff --git a/sys/dev/uart/uart_dev_ns8250.c b/sys/dev/uart/uart_dev_ns8250.c index 2498fa3..cad5366 100644 --- a/sys/dev/uart/uart_dev_ns8250.c +++ b/sys/dev/uart/uart_dev_ns8250.c @@ -335,9 +335,6 @@ ns8250_putc(struct uart_bas *bas, int c) DELAY(4); uart_setreg(bas, REG_DATA, c); uart_barrier(bas); - limit = 250000; - while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0 && --limit) - DELAY(4); } static int @@ -968,8 +965,13 @@ ns8250_bus_transmit(struct uart_softc *sc) bas = &sc->sc_bas; uart_lock(sc->sc_hwmtx); - while ((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0) - ; + if (sc->sc_txdatasz > 1) { + if ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0) + ns8250_drain(bas, UART_DRAIN_TRANSMITTER); + } else { + while ((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0) + DELAY(4); + } for (i = 0; i < sc->sc_txdatasz; i++) { uart_setreg(bas, REG_DATA, sc->sc_txbuf[i]); uart_barrier(bas); |
