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| author | br <br@FreeBSD.org> | 2016-04-22 16:15:58 +0000 |
|---|---|---|
| committer | br <br@FreeBSD.org> | 2016-04-22 16:15:58 +0000 |
| commit | 84e42ee622ad2d0af29da83eacff82f1da80f602 (patch) | |
| tree | 9f760285c85660f0b18c9a5bac4ab95d5150fd47 | |
| parent | e0ecee54992a794a8d017219a78dbcbd376a0412 (diff) | |
| download | FreeBSD-src-84e42ee622ad2d0af29da83eacff82f1da80f602.zip FreeBSD-src-84e42ee622ad2d0af29da83eacff82f1da80f602.tar.gz | |
Clear the DDR memory. This should be done by bootloaders,
but they have no such feature yet.
This fixes operation on Rocket Core and lowRISC.
| -rw-r--r-- | sys/conf/options.riscv | 1 | ||||
| -rw-r--r-- | sys/riscv/riscv/locore.S | 11 |
2 files changed, 12 insertions, 0 deletions
diff --git a/sys/conf/options.riscv b/sys/conf/options.riscv index c263bd8..0404654 100644 --- a/sys/conf/options.riscv +++ b/sys/conf/options.riscv @@ -2,3 +2,4 @@ RISCV opt_global.h VFP opt_global.h +DDR_CLEAR_SIZE opt_global.h diff --git a/sys/riscv/riscv/locore.S b/sys/riscv/riscv/locore.S index ef81686..1c2063a 100644 --- a/sys/riscv/riscv/locore.S +++ b/sys/riscv/riscv/locore.S @@ -126,6 +126,17 @@ _start: csrr a0, mhartid bnez a0, mpentry +#if defined(DDR_CLEAR_SIZE) + /* Clear DDR memory */ + la t0, _end + li t1, DDR_CLEAR_SIZE +1: + sd zero, 0(t0) + addi t0, t0, 8 + bltu t0, t1, 1b + /* End */ +#endif + /* Build event queue for current core */ build_ring |
