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| author | mav <mav@FreeBSD.org> | 2008-11-30 00:10:55 +0000 |
|---|---|---|
| committer | mav <mav@FreeBSD.org> | 2008-11-30 00:10:55 +0000 |
| commit | 750de65ae4e09e2b3fc79cfcf760435b8f078d2f (patch) | |
| tree | ed347a6d1f2d7be24a5bb3568b178f299bba36b6 | |
| parent | 58f888b28c6991ea1def089a22338da9dec097c3 (diff) | |
| download | FreeBSD-src-750de65ae4e09e2b3fc79cfcf760435b8f078d2f.zip FreeBSD-src-750de65ae4e09e2b3fc79cfcf760435b8f078d2f.tar.gz | |
According to "Intel 64 and IA-32 Architectures Software Developer's Manual
Volume 3B: System Programming Guide, Part 2", CPUs with family 0x6 and model
above or 0xE and CPUs with family 0xF and model above or 0x3 have invariant
TSC.
| -rw-r--r-- | sys/amd64/amd64/identcpu.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/sys/amd64/amd64/identcpu.c b/sys/amd64/amd64/identcpu.c index bcbef10..c63339d 100644 --- a/sys/amd64/amd64/identcpu.c +++ b/sys/amd64/amd64/identcpu.c @@ -368,7 +368,11 @@ printcpuinfo(void) tsc_is_invariant = 1; break; case CPU_VENDOR_INTEL: - if (amd_pminfo & AMDPM_TSC_INVARIANT) + if ((amd_pminfo & AMDPM_TSC_INVARIANT) || + (AMD64_CPU_FAMILY(cpu_id) == 0x6 && + AMD64_CPU_MODEL(cpu_id) >= 0xe) || + (AMD64_CPU_FAMILY(cpu_id) == 0xf && + AMD64_CPU_MODEL(cpu_id) >= 0x3)) tsc_is_invariant = 1; break; } |
