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author | cognet <cognet@FreeBSD.org> | 2008-09-11 20:43:38 +0000 |
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committer | cognet <cognet@FreeBSD.org> | 2008-09-11 20:43:38 +0000 |
commit | 5b5d402e310bfeb84d4bc66d726e9ec45b26b6dd (patch) | |
tree | 15327fe6aa531b575666e84dbf8df36436e3efca | |
parent | a815eb98d34fa1d56c7900fe49e45cdf5b2ebdf0 (diff) | |
download | FreeBSD-src-5b5d402e310bfeb84d4bc66d726e9ec45b26b6dd.zip FreeBSD-src-5b5d402e310bfeb84d4bc66d726e9ec45b26b6dd.tar.gz |
Bandaid: disable interrupts to make sure intr_enabled and the IER register
are in sync. I'm not sure why it is needed, and why it wouldn't be on other
arm platforms, but it prevents a lockup under heavy I/O.
-rw-r--r-- | sys/arm/xscale/ixp425/ixp425.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/sys/arm/xscale/ixp425/ixp425.c b/sys/arm/xscale/ixp425/ixp425.c index b1a7a56..af87503 100644 --- a/sys/arm/xscale/ixp425/ixp425.c +++ b/sys/arm/xscale/ixp425/ixp425.c @@ -143,22 +143,27 @@ ixp425_irq2gpio_bit(int irq) void arm_mask_irq(uintptr_t nb) { + int i; + + i = disable_interrupts(I32_bit); intr_enabled &= ~(1 << nb); ixp425_set_intrmask(); + restore_interrupts(i); /*XXX; If it's a GPIO interrupt, ACK it know. Can it be a problem ?*/ if ((1 << nb) & IXP425_INT_GPIOMASK) IXPREG(IXP425_GPIO_VBASE + IXP425_GPIO_GPISR) = ixp425_irq2gpio_bit(nb); - - } void arm_unmask_irq(uintptr_t nb) { - + int i; + + i = disable_interrupts(I32_bit); intr_enabled |= (1 << nb); ixp425_set_intrmask(); + restore_interrupts(i); } static __inline uint32_t |