diff options
| author | jkim <jkim@FreeBSD.org> | 2006-08-21 19:10:58 +0000 |
|---|---|---|
| committer | jkim <jkim@FreeBSD.org> | 2006-08-21 19:10:58 +0000 |
| commit | 51974d427a3dddb6697b8ee76c62c5b05215bfd9 (patch) | |
| tree | 05ae994d5db73ed5888c62f6bc3b567ad978e8ff | |
| parent | 527f3d6e4f98626400fb2b0472838e6fae599bca (diff) | |
| download | FreeBSD-src-51974d427a3dddb6697b8ee76c62c5b05215bfd9.zip FreeBSD-src-51974d427a3dddb6697b8ee76c62c5b05215bfd9.tar.gz | |
Use aperture base address from north bridge. Some BIOS does not encode
misc. control registers correctly and it is inconsistent with north bridge.
In fact, there are too many broken BIOS implementations out there and we
cannot fix every possible combination but at least it is consistent with
what we advertise with ioctl(2).
| -rw-r--r-- | sys/dev/agp/agp_amd64.c | 15 | ||||
| -rw-r--r-- | sys/pci/agp_amd64.c | 15 |
2 files changed, 10 insertions, 20 deletions
diff --git a/sys/dev/agp/agp_amd64.c b/sys/dev/agp/agp_amd64.c index 2e949e5..9a4ccdb 100644 --- a/sys/dev/agp/agp_amd64.c +++ b/sys/dev/agp/agp_amd64.c @@ -182,14 +182,9 @@ agp_amd64_attach(device_t dev) sc->n_mctrl = n; - if (bootverbose) { + if (bootverbose) device_printf(dev, "%d Miscellaneous Control unit(s) found.\n", sc->n_mctrl); - for (i = 0; i < sc->n_mctrl; i++) - device_printf(dev, "Aperture Base[%d]: 0x%08x\n", i, - pci_cfgregread(0, sc->mctrl[i], 3, - AGP_AMD64_APBASE, 4) & AGP_AMD64_APBASE_MASK); - } if ((error = agp_generic_attach(dev))) return error; @@ -380,11 +375,11 @@ agp_amd64_apbase_fixup(device_t dev) uint32_t apbase; int i; - apbase = pci_cfgregread(0, sc->mctrl[0], 3, AGP_AMD64_APBASE, 4); + sc->apbase = rman_get_start(sc->agp.as_aperture); + apbase = (sc->apbase >> 25) & AGP_AMD64_APBASE_MASK; for (i = 0; i < sc->n_mctrl; i++) - pci_cfgregwrite(0, sc->mctrl[i], 3, AGP_AMD64_APBASE, - apbase & ~(AGP_AMD64_APBASE_MASK & ~(uint32_t)0x7f), 4); - sc->apbase = apbase << 25; + pci_cfgregwrite(0, sc->mctrl[i], 3, + AGP_AMD64_APBASE, apbase, 4); } static void diff --git a/sys/pci/agp_amd64.c b/sys/pci/agp_amd64.c index 2e949e5..9a4ccdb 100644 --- a/sys/pci/agp_amd64.c +++ b/sys/pci/agp_amd64.c @@ -182,14 +182,9 @@ agp_amd64_attach(device_t dev) sc->n_mctrl = n; - if (bootverbose) { + if (bootverbose) device_printf(dev, "%d Miscellaneous Control unit(s) found.\n", sc->n_mctrl); - for (i = 0; i < sc->n_mctrl; i++) - device_printf(dev, "Aperture Base[%d]: 0x%08x\n", i, - pci_cfgregread(0, sc->mctrl[i], 3, - AGP_AMD64_APBASE, 4) & AGP_AMD64_APBASE_MASK); - } if ((error = agp_generic_attach(dev))) return error; @@ -380,11 +375,11 @@ agp_amd64_apbase_fixup(device_t dev) uint32_t apbase; int i; - apbase = pci_cfgregread(0, sc->mctrl[0], 3, AGP_AMD64_APBASE, 4); + sc->apbase = rman_get_start(sc->agp.as_aperture); + apbase = (sc->apbase >> 25) & AGP_AMD64_APBASE_MASK; for (i = 0; i < sc->n_mctrl; i++) - pci_cfgregwrite(0, sc->mctrl[i], 3, AGP_AMD64_APBASE, - apbase & ~(AGP_AMD64_APBASE_MASK & ~(uint32_t)0x7f), 4); - sc->apbase = apbase << 25; + pci_cfgregwrite(0, sc->mctrl[i], 3, + AGP_AMD64_APBASE, apbase, 4); } static void |
