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| author | mav <mav@FreeBSD.org> | 2014-01-05 22:55:21 +0000 |
|---|---|---|
| committer | mav <mav@FreeBSD.org> | 2014-01-05 22:55:21 +0000 |
| commit | 3dd7b80d9aa202dd3ebdba2cff812904269131f3 (patch) | |
| tree | e26b6615cb694bdd54ada94b7a2741b52d295a71 | |
| parent | 75eb8161f46daa5ecf87e5f4436f246c30b6e4ce (diff) | |
| download | FreeBSD-src-3dd7b80d9aa202dd3ebdba2cff812904269131f3.zip FreeBSD-src-3dd7b80d9aa202dd3ebdba2cff812904269131f3.tar.gz | |
MFC r258173:
Add few more minor parts of DevSleep support from AHCI 1.3.1 proposal.
| -rw-r--r-- | sys/dev/ahci/ahci.c | 7 | ||||
| -rw-r--r-- | sys/dev/ahci/ahci.h | 13 |
2 files changed, 18 insertions, 2 deletions
diff --git a/sys/dev/ahci/ahci.c b/sys/dev/ahci/ahci.c index 6e5715c..d2ed691 100644 --- a/sys/dev/ahci/ahci.c +++ b/sys/dev/ahci/ahci.c @@ -1087,13 +1087,16 @@ ahci_ch_attach(device_t dev) version = ATA_INL(ctlr->r_mem, AHCI_VS); if (version < 0x00010200 && (ctlr->caps & AHCI_CAP_FBSS)) ch->chcaps |= AHCI_P_CMD_FBSCP; + if (ch->caps2 & AHCI_CAP2_SDS) + ch->chscaps = ATA_INL(ch->r_mem, AHCI_P_DEVSLP); if (bootverbose) { - device_printf(dev, "Caps:%s%s%s%s%s\n", + device_printf(dev, "Caps:%s%s%s%s%s%s\n", (ch->chcaps & AHCI_P_CMD_HPCP) ? " HPCP":"", (ch->chcaps & AHCI_P_CMD_MPSP) ? " MPSP":"", (ch->chcaps & AHCI_P_CMD_CPD) ? " CPD":"", (ch->chcaps & AHCI_P_CMD_ESP) ? " ESP":"", - (ch->chcaps & AHCI_P_CMD_FBSCP) ? " FBSCP":""); + (ch->chcaps & AHCI_P_CMD_FBSCP) ? " FBSCP":"", + (ch->chscaps & AHCI_P_DEVSLP_DSP) ? " DSP":""); } /* Create the device queue for our SIM. */ devq = cam_simq_alloc(ch->numslots); diff --git a/sys/dev/ahci/ahci.h b/sys/dev/ahci/ahci.h index c44a76b..0c60c7d 100644 --- a/sys/dev/ahci/ahci.h +++ b/sys/dev/ahci/ahci.h @@ -137,6 +137,7 @@ #define ATA_SC_IPM_NONE 0x00000000 #define ATA_SC_IPM_DIS_PARTIAL 0x00000100 #define ATA_SC_IPM_DIS_SLUMBER 0x00000200 +#define ATA_SC_IPM_DIS_DEVSLEEP 0x00000400 #define ATA_SACTIVE 16 @@ -286,6 +287,17 @@ #define AHCI_P_FBS_ADO_SHIFT 12 #define AHCI_P_FBS_DWE 0x000f0000 #define AHCI_P_FBS_DWE_SHIFT 16 +#define AHCI_P_DEVSLP 0x44 +#define AHCI_P_DEVSLP_ADSE 0x00000001 +#define AHCI_P_DEVSLP_DSP 0x00000002 +#define AHCI_P_DEVSLP_DETO 0x000003fc +#define AHCI_P_DEVSLP_DETO_SHIFT 2 +#define AHCI_P_DEVSLP_MDAT 0x00007c00 +#define AHCI_P_DEVSLP_MDAT_SHIFT 10 +#define AHCI_P_DEVSLP_DITO 0x01ff8000 +#define AHCI_P_DEVSLP_DITO_SHIFT 15 +#define AHCI_P_DEVSLP_DM 0x0e000000 +#define AHCI_P_DEVSLP_DM_SHIFT 25 /* Just to be sure, if building as module. */ #if MAXPHYS < 512 * 1024 @@ -402,6 +414,7 @@ struct ahci_channel { uint32_t caps; /* Controller capabilities */ uint32_t caps2; /* Controller capabilities */ uint32_t chcaps; /* Channel capabilities */ + uint32_t chscaps; /* Channel sleep capabilities */ int quirks; int numslots; /* Number of present slots */ int pm_level; /* power management level */ |
