diff options
author | nwhitehorn <nwhitehorn@FreeBSD.org> | 2010-11-12 20:26:34 +0000 |
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committer | nwhitehorn <nwhitehorn@FreeBSD.org> | 2010-11-12 20:26:34 +0000 |
commit | 2666f521076488341c6d69221cfc92588e048cc9 (patch) | |
tree | 02a54508cebfccf6e13a450c54a41d58c09f850e | |
parent | ec97f564250a32af2861e1dfe2bd3ccd3d01ad6b (diff) | |
download | FreeBSD-src-2666f521076488341c6d69221cfc92588e048cc9.zip FreeBSD-src-2666f521076488341c6d69221cfc92588e048cc9.tar.gz |
Partially revert r215182. There appears to be a silicon bug on the 970
that causes AP bringup to fail if some of the Cell HID-register code
is anywhere in the instruction stream. Pending a better solution, cache
performance on SMP Cell systems running without a hypervisor will be
suboptimal.
-rw-r--r-- | sys/powerpc/aim/mp_cpudep.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/sys/powerpc/aim/mp_cpudep.c b/sys/powerpc/aim/mp_cpudep.c index 312164e..3ee22f3 100644 --- a/sys/powerpc/aim/mp_cpudep.c +++ b/sys/powerpc/aim/mp_cpudep.c @@ -228,8 +228,8 @@ cpudep_save_config(void *dummy) powerpc_sync(); break; -#ifdef __powerpc64__ case IBMCELLBE: + #ifdef NOTYET /* Causes problems if in instruction stream on 970 */ if (mfmsr() & PSL_HV) { bsp_state[0] = mfspr(SPR_HID0); bsp_state[1] = mfspr(SPR_HID1); @@ -238,11 +238,11 @@ cpudep_save_config(void *dummy) bsp_state[4] = mfspr(SPR_CELL_TSCR); } + #endif bsp_state[5] = mfspr(SPR_CELL_TSRL); break; -#endif case MPC7450: case MPC7455: case MPC7457: @@ -303,8 +303,8 @@ cpudep_ap_setup() powerpc_sync(); break; -#ifdef __powerpc64__ case IBMCELLBE: + #ifdef NOTYET /* Causes problems if in instruction stream on 970 */ if (mfmsr() & PSL_HV) { mtspr(SPR_HID0, bsp_state[0]); mtspr(SPR_HID1, bsp_state[1]); @@ -313,11 +313,11 @@ cpudep_ap_setup() mtspr(SPR_CELL_TSCR, bsp_state[4]); } + #endif mtspr(SPR_CELL_TSRL, bsp_state[5]); break; -#endif case MPC7450: case MPC7455: case MPC7457: |