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authorgavin <gavin@FreeBSD.org>2014-08-03 21:56:53 +0000
committergavin <gavin@FreeBSD.org>2014-08-03 21:56:53 +0000
commit1d423503b17474fc76b7a45ecccda6e9ee9943b9 (patch)
tree8c887428522b13b2708b53cd992ea358e21aec43
parentb7491c3532cec8226a2ea8a763d06f3db39698ea (diff)
downloadFreeBSD-src-1d423503b17474fc76b7a45ecccda6e9ee9943b9.zip
FreeBSD-src-1d423503b17474fc76b7a45ecccda6e9ee9943b9.tar.gz
For reasons which are not clear, r254263 broke some PCMCIA and CardBus
bridges in strange ways, either rendering them unable to detect insertion and removal events, or possibly unable to read from the device behind the bridge. This fixes at least one laptop, a Toshiba Tecra M5 with a Texas Instruments PCxx12 (d=0x8039 v=0c104c) bridge. The very similar Tecra M9 has the same bridge, but worked fine without this change. The bridge chip has no I/O port BAR, and there is nothing in the spec to suggest I/O decoding should be enabled; however enabling it fixes the issue. Add an XXX comment to this effect. Discussed with: jhb, imp MFC after: 2 weeks
-rw-r--r--sys/dev/pccbb/pccbb_pci.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/sys/dev/pccbb/pccbb_pci.c b/sys/dev/pccbb/pccbb_pci.c
index 85928f9..7b4727c 100644
--- a/sys/dev/pccbb/pccbb_pci.c
+++ b/sys/dev/pccbb/pccbb_pci.c
@@ -481,6 +481,8 @@ cbb_chipinit(struct cbb_softc *sc)
/* Enable memory access */
pci_enable_busmaster(sc->dev);
+ /* XXX: This should not be necessary, but some chipsets require it */
+ PCI_MASK_CONFIG(sc->dev, PCIR_COMMAND, | PCIM_CMD_PORTEN, 2);
/* disable Legacy IO */
switch (sc->chipset) {
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