Call the WMAC DDR flush before handling an interrupt for the

Atheros AHB (internally) connected MAC.

TODO:

* verify the interrupt was for us before doing the DDR flush.

1 files changed, 9 insertions, 1 deletions

diff --git a/sys/dev/ath/if_ath_ahb.c b/sys/dev/ath/if_ath_ahb.c
index ffe825d..fe6420c 100644
--- a/sys/dev/ath/if_ath_ahb.c
+++ b/sys/dev/ath/if_ath_ahb.c
@@ -117,6 +117,14 @@ ath_ahb_probe(device_t dev)
 	return ENXIO;
 }
 
+static void
+ath_ahb_intr(void *arg)
+{
+	/* XXX TODO: check if its ours! */
+	ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_WMAC);
+	ath_intr(arg);
+}
+
 static int
 ath_ahb_attach(device_t dev)
 {
@@ -212,7 +220,7 @@ ath_ahb_attach(device_t dev)
 	}
 	if (bus_setup_intr(dev, psc->sc_irq,
 			   INTR_TYPE_NET | INTR_MPSAFE,
-			   NULL, ath_intr, sc, &psc->sc_ih)) {
+			   NULL, ath_ahb_intr, sc, &psc->sc_ih)) {
 		device_printf(dev, "could not establish interrupt\n");
 		goto bad2;
 	}