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| author | neel <neel@FreeBSD.org> | 2014-10-17 06:23:04 +0000 |
|---|---|---|
| committer | neel <neel@FreeBSD.org> | 2014-10-17 06:23:04 +0000 |
| commit | 170f49cd346e3fe89bb5fd6322940694477b7002 (patch) | |
| tree | 9baa9d2ee53784635790097d5cbbde652089891e | |
| parent | b194fc5a2b8dd89544329e2aaa9569f23c24b990 (diff) | |
| download | FreeBSD-src-170f49cd346e3fe89bb5fd6322940694477b7002.zip FreeBSD-src-170f49cd346e3fe89bb5fd6322940694477b7002.tar.gz | |
Don't advertise the Instruction Based Sampling feature because it requires
emulating a large number of MSRs.
Ignore writes to a couple more AMD-specific MSRs and return 0 on read.
This further reduces the unimplemented MSRs accessed by a Linux guest on boot.
| -rw-r--r-- | sys/amd64/vmm/x86.c | 5 | ||||
| -rw-r--r-- | sys/x86/include/specialreg.h | 2 | ||||
| -rw-r--r-- | usr.sbin/bhyve/xmsr.c | 13 |
3 files changed, 20 insertions, 0 deletions
diff --git a/sys/amd64/vmm/x86.c b/sys/amd64/vmm/x86.c index 3c5ca19..0b32eef 100644 --- a/sys/amd64/vmm/x86.c +++ b/sys/amd64/vmm/x86.c @@ -167,6 +167,11 @@ x86_emulate_cpuid(struct vm *vm, int vcpu_id, regs[2] &= ~AMDID2_PTSCEL2I; /* + * Don't advertise Instruction Based Sampling feature. + */ + regs[2] &= ~AMDID2_IBS; + + /* * Hide rdtscp/ia32_tsc_aux until we know how * to deal with them. */ diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h index 52c207a..28e2a36 100644 --- a/sys/x86/include/specialreg.h +++ b/sys/x86/include/specialreg.h @@ -784,6 +784,8 @@ #define MSR_IORRMASK1 0xc0010019 #define MSR_TOP_MEM 0xc001001a /* boundary for ram below 4G */ #define MSR_TOP_MEM2 0xc001001d /* boundary for ram above 4G */ +#define MSR_NB_CFG1 0xc001001f /* NB configuration 1 */ +#define MSR_IC_CFG 0xc0011021 /* Instruction Cache Configuration */ #define MSR_K8_UCODE_UPDATE 0xc0010020 /* update microcode */ #define MSR_MC0_CTL_MASK 0xc0010044 #define MSR_VM_CR 0xc0010114 /* SVM: feature control */ diff --git a/usr.sbin/bhyve/xmsr.c b/usr.sbin/bhyve/xmsr.c index 72740c2..bd8a1a6 100644 --- a/usr.sbin/bhyve/xmsr.c +++ b/usr.sbin/bhyve/xmsr.c @@ -69,6 +69,10 @@ emulate_wrmsr(struct vmctx *ctx, int vcpu, uint32_t num, uint64_t val) */ return (0); + case MSR_NB_CFG1: + case MSR_IC_CFG: + return (0); /* Ignore writes */ + case MSR_PERFEVSEL0: case MSR_PERFEVSEL1: case MSR_PERFEVSEL2: @@ -127,6 +131,15 @@ emulate_rdmsr(struct vmctx *ctx, int vcpu, uint32_t num, uint64_t *val) *val |= 1 << 9; /* MONITOR/MWAIT disable */ break; + case MSR_NB_CFG1: + case MSR_IC_CFG: + /* + * The reset value is processor family dependent so + * just return 0. + */ + *val = 0; + break; + case MSR_PERFEVSEL0: case MSR_PERFEVSEL1: case MSR_PERFEVSEL2: |
