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author | imp <imp@FreeBSD.org> | 2009-03-31 01:59:47 +0000 |
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committer | imp <imp@FreeBSD.org> | 2009-03-31 01:59:47 +0000 |
commit | 1693b220556c87908d97a0688045000b3b0e1d77 (patch) | |
tree | c1d5b2e7af3c1df341051843303943f0c21f4da0 | |
parent | d4ed9d6887a6828e3bc3925a80a1c36e526275a2 (diff) | |
download | FreeBSD-src-1693b220556c87908d97a0688045000b3b0e1d77.zip FreeBSD-src-1693b220556c87908d97a0688045000b3b0e1d77.tar.gz |
Hmmmm... This can't be right... But it looks like the DL100xx chips
don't have one of the clock cycles (the turn cycle) that the AX88x90
chips have. Make this conditional. But this seems totally crazy and
can't possibly be right. Commit the fix for the moment until I can
explore this mystery more deeply.
On the plus side, the DL10022-based cards I have (D-Link DEF-670TXD
and SMC8040TX) work after this fix.
-rw-r--r-- | sys/dev/ed/if_ed_pccard.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/sys/dev/ed/if_ed_pccard.c b/sys/dev/ed/if_ed_pccard.c index 05c5c07..924cc83 100644 --- a/sys/dev/ed/if_ed_pccard.c +++ b/sys/dev/ed/if_ed_pccard.c @@ -1115,7 +1115,9 @@ ed_miibus_readreg(device_t dev, int phy, int reg) (*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS); (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS); (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS); - (*sc->mii_readbits)(sc, ED_MII_ACK_BITS); + if (sc->chip_type == ED_CHIP_TYPE_AX88790 || + sc->chip_type == ED_CHIP_TYPE_AX88190) + (*sc->mii_readbits)(sc, ED_MII_ACK_BITS); failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS); val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS); (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS); |