Move Book-E/AIM dependent bits for setting user PMAP during thread switch

out of cpu_switch() and into pmap_activate() where they belong. This also
removes all the #ifdef from cpu_switch().

5 files changed, 11 insertions, 29 deletions

diff --git a/sys/powerpc/aim/mmu_oea.c b/sys/powerpc/aim/mmu_oea.c
index 12d108b..7069ea7 100644
--- a/sys/powerpc/aim/mmu_oea.c
+++ b/sys/powerpc/aim/mmu_oea.c
@@ -986,6 +986,8 @@ moea_activate(mmu_t mmu, struct thread *td)
 
 	CPU_SET(PCPU_GET(cpuid), &pm->pm_active);
 	PCPU_SET(curpmap, pmr);
+
+	mtsrin(USER_SR << ADDR_SR_SHFT, td->td_pcb->pcb_cpu.aim.usr_vsid);
 }
 
 void
diff --git a/sys/powerpc/aim/mmu_oea64.c b/sys/powerpc/aim/mmu_oea64.c
index 6cf1feb..6b3add7 100644
--- a/sys/powerpc/aim/mmu_oea64.c
+++ b/sys/powerpc/aim/mmu_oea64.c
@@ -991,8 +991,11 @@ moea64_activate(mmu_t mmu, struct thread *td)
 
 	#ifdef __powerpc64__
 	PCPU_SET(userslb, pm->pm_slb);
+	__asm __volatile("slbmte %0, %1; isync" ::
+	    "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE));
 	#else
 	PCPU_SET(curpmap, pm->pmap_phys);
+	mtsrin(USER_SR << ADDR_SR_SHFT, td->td_pcb->pcb_cpu.aim.usr_vsid);
 	#endif
 }
 
@@ -1001,6 +1004,8 @@ moea64_deactivate(mmu_t mmu, struct thread *td)
 {
 	pmap_t	pm;
 
+	__asm __volatile("isync; slbie %0" :: "r"(USER_ADDR));
+
 	pm = &td->td_proc->p_vmspace->vm_pmap;
 	CPU_CLR(PCPU_GET(cpuid), &pm->pm_active);
 	#ifdef __powerpc64__
diff --git a/sys/powerpc/booke/pmap.c b/sys/powerpc/booke/pmap.c
index 1a573cd..5ee5b0a 100644
--- a/sys/powerpc/booke/pmap.c
+++ b/sys/powerpc/booke/pmap.c
@@ -1946,6 +1946,8 @@ mmu_booke_activate(mmu_t mmu, struct thread *td)
 	mtspr(SPR_PID0, pmap->pm_tid[cpuid]);
 	__asm __volatile("isync");
 
+	mtspr(SPR_DBCR0, td->td_pcb->pcb_cpu.booke.dbcr0);
+
 	sched_unpin();
 
 	CTR3(KTR_PMAP, "%s: e (tid = %d for '%s')", __func__,
@@ -1965,6 +1967,8 @@ mmu_booke_deactivate(mmu_t mmu, struct thread *td)
 	CTR5(KTR_PMAP, "%s: td=%p, proc = '%s', id = %d, pmap = 0x%08x",
 	    __func__, td, td->td_proc->p_comm, td->td_proc->p_pid, pmap);
 
+	td->td_pcb->pcb_cpu.booke.dbcr0 = mfspr(SPR_DBCR0);
+
 	CPU_CLR_ATOMIC(PCPU_GET(cpuid), &pmap->pm_active);
 	PCPU_SET(curpmap, NULL);
 }
diff --git a/sys/powerpc/powerpc/swtch32.S b/sys/powerpc/powerpc/swtch32.S
index 6ea1f2a..dc28323 100644
--- a/sys/powerpc/powerpc/swtch32.S
+++ b/sys/powerpc/powerpc/swtch32.S
@@ -91,10 +91,6 @@ ENTRY(cpu_switch)
 	stw	%r16,PCB_CR(%r6)
 	mflr	%r16			/* Save the link register */
 	stw	%r16,PCB_LR(%r6)
-#ifdef BOOKE
-	mfspr	%r16,SPR_DBCR0
-	stw	%r16,PCB_BOOKE_DBCR0(%r6)
-#endif
 	stw	%r1,PCB_SP(%r6)		/* Save the stack pointer */
 
 	mr	%r14,%r3		/* Copy the old thread ptr... */
@@ -173,16 +169,6 @@ blocked_loop:
 	mtcr	%r5
 	lwz	%r5,PCB_LR(%r3)		/* Load the link register */
 	mtlr	%r5
-#ifdef AIM
-	lwz	%r5,PCB_AIM_USR_VSID(%r3) /* Load the USER_SR segment reg */
-	isync
-	mtsr	USER_SR,%r5
-	isync
-#endif
-#ifdef BOOKE
-	lwz	%r5,PCB_BOOKE_DBCR0(%r3)
-	mtspr	SPR_DBCR0,%r5
-#endif
 	lwz	%r1,PCB_SP(%r3)		/* Load the stack pointer */
 	/*
 	 * Perform a dummy stwcx. to clear any reservations we may have
diff --git a/sys/powerpc/powerpc/swtch64.S b/sys/powerpc/powerpc/swtch64.S
index ffecd1e..b785281 100644
--- a/sys/powerpc/powerpc/swtch64.S
+++ b/sys/powerpc/powerpc/swtch64.S
@@ -218,21 +218,6 @@ blocked_loop:
 	ld	%r1,PCB_SP(%r3)		/* Load the stack pointer */
 	ld	%r2,PCB_TOC(%r3)	/* Load the TOC pointer */
 
-	lis	%r5,USER_ADDR@highesta	/* Load the copyin/out segment reg */
-	ori	%r5,%r5,USER_ADDR@highera
-	sldi	%r5,%r5,32
-	oris	%r5,%r5,USER_ADDR@ha
-	isync
-	slbie	%r5
-	lis	%r6,USER_SLB_SLBE@highesta
-	ori	%r6,%r6,USER_SLB_SLBE@highera
-	sldi	%r6,%r6,32
-	oris	%r6,%r6,USER_SLB_SLBE@ha
-	ori	%r6,%r6,USER_SLB_SLBE@l
-	ld	%r5,PCB_AIM_USR_VSID(%r3)
-	slbmte	%r5,%r6
-	isync
-
 	/*
 	 * Perform a dummy stdcx. to clear any reservations we may have
 	 * inherited from the previous thread. It doesn't matter if the