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author | linimon <linimon@FreeBSD.org> | 2003-11-20 03:19:37 +0000 |
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committer | linimon <linimon@FreeBSD.org> | 2003-11-20 03:19:37 +0000 |
commit | ddda064c3a70bb6a7951ec7dfc10715615d4907d (patch) | |
tree | f1e3b8f73c76bb49151f947584384ec1e279fa91 /cad | |
parent | 7314b5709addc0e882a2bbd05fa803b99839a7ed (diff) | |
download | FreeBSD-ports-ddda064c3a70bb6a7951ec7dfc10715615d4907d.zip FreeBSD-ports-ddda064c3a70bb6a7951ec7dfc10715615d4907d.tar.gz |
Mark as broken while we muddle through the compile problem with
the author.
Diffstat (limited to 'cad')
-rw-r--r-- | cad/iverilog/Makefile | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cad/iverilog/Makefile b/cad/iverilog/Makefile index ca06116..e805d41 100644 --- a/cad/iverilog/Makefile +++ b/cad/iverilog/Makefile @@ -15,6 +15,8 @@ DISTNAME= verilog-20031009 MAINTAINER= watchman@ludd.luth.se COMMENT= A Verilog simulation and synthesis tool +BROKEN= "fails to compile - missing definition of TIME_FMT" + USE_BISON= yes USE_GMAKE= yes GNU_CONFIGURE= yes |