- Add port for verilog-mode.el, Emacs Verilog editing mode.

WWW:	http://www.veripool.org/wiki/verilog-mode

6 files changed, 59 insertions, 0 deletions

diff --git a/cad/Makefile b/cad/Makefile
index 4d3739b..767c85d 100644
--- a/cad/Makefile
+++ b/cad/Makefile
@@ -82,6 +82,7 @@
     SUBDIR += tochnog
     SUBDIR += transcalc
     SUBDIR += varkon
+    SUBDIR += verilog-mode.el
     SUBDIR += vipec
     SUBDIR += xcircuit
     SUBDIR += z88
diff --git a/cad/verilog-mode.el/Makefile b/cad/verilog-mode.el/Makefile
new file mode 100644
index 0000000..c3881fa
--- /dev/null
+++ b/cad/verilog-mode.el/Makefile
@@ -0,0 +1,33 @@
+# New ports collection makefile for:	verilog-mode.el
+# Date created:		12 January 2009
+# Whom:			stas
+#
+# $FreeBSD$
+#
+
+PORTNAME=	verilog-mode.el
+PORTVERSION=	465
+CATEGORIES=	cad elisp
+MASTER_SITES=	http://www.veripool.org/ftp/
+DISTNAME=	verilog-mode-${PORTVERSION}.el
+EXTRACT_SUFX=	.gz
+
+MAINTAINER=	stas@FreeBSD.org
+COMMENT=	Emacs lisp modules for the Verilog language
+
+NO_BUILD=	yes
+EXTRACT_AFTER_ARGS=	> ${ELFILE}
+
+ELFILE=		verilog-mode.el
+EMACSLISPDIR=	${PREFIX}/share/emacs/site-lisp
+XEMACSLISPDIR=	${PREFIX}/lib/xemacs/site-lisp
+
+do-install:
+	${MKDIR} ${DATADIR}/
+	${INSTALL_DATA} ${WRKDIR}/${ELFILE} ${DATADIR}/
+	${MKDIR} ${XEMACSLISPDIR}
+	${LN} -sf ${DATADIR}/${ELFILE} ${EMACSLISPDIR}/
+	${LN} -sf ${DATADIR}/${ELFILE} ${XEMACSLISPDIR}/
+	@${CAT} ${PKGMESSAGE}
+
+.include <bsd.port.mk>
diff --git a/cad/verilog-mode.el/distinfo b/cad/verilog-mode.el/distinfo
new file mode 100644
index 0000000..53b0e32
--- /dev/null
+++ b/cad/verilog-mode.el/distinfo
@@ -0,0 +1,3 @@
+MD5 (verilog-mode-465.el.gz) = 0fc282f30f3b9d3b5c7687a8db3b9cd8
+SHA256 (verilog-mode-465.el.gz) = 5800e9e451753a1e253f094fb2f778948d298a6da4b07c2e30d4f8efe78c7765
+SIZE (verilog-mode-465.el.gz) = 91867
diff --git a/cad/verilog-mode.el/pkg-descr b/cad/verilog-mode.el/pkg-descr
new file mode 100644
index 0000000..49316f0
--- /dev/null
+++ b/cad/verilog-mode.el/pkg-descr
@@ -0,0 +1,10 @@
+Verilog-mode.el is a Verilog mode for Emacs which provides context-sensitive
+highlighting, auto indenting, and provides macro expansion capabilities to
+greatly reduce Verilog coding time.
+
+Recent versions allow you to insert AUTOS in non-AUTO designs, so IP interconnect
+can be easily modified. You can also expand Verilog-2001 ".*" instantiations, to
+see what ports will be connected by simulators.
+
+Author:	Michael McNamara <mac@verilog.com>, Wilson Snyder <wsnyder@wsnyder.org>
+WWW:	http://www.veripool.org/wiki/verilog-mode
diff --git a/cad/verilog-mode.el/pkg-message b/cad/verilog-mode.el/pkg-message
new file mode 100644
index 0000000..15b41e4
--- /dev/null
+++ b/cad/verilog-mode.el/pkg-message
@@ -0,0 +1,7 @@
+====
+To use verilog-mode features in Emacs/XEmacs, add the
+following lines to your Emacs configuration file (usually ~/.emacs):
+
+(autoload 'verilog-mode "verilog-mode" "Verilog mode" t )
+(add-to-list 'auto-mode-alist '("\\.[ds]?v\\'" . verilog-mode))
+====
diff --git a/cad/verilog-mode.el/pkg-plist b/cad/verilog-mode.el/pkg-plist
new file mode 100644
index 0000000..fad1b73
--- /dev/null
+++ b/cad/verilog-mode.el/pkg-plist
@@ -0,0 +1,5 @@
+share/emacs/site-lisp/verilog-mode.el
+lib/xemacs/site-lisp/verilog-mode.el
+%%DATADIR%%/verilog-mode.el
+@dirrmtry lib/xemacs/site-lisp
+@dirrmtry lib/xemacs