Getting started - FPGA
The simplest version of the ZPU uses BRAM. When getting accustomed to the ZPU, a BRAM ZPU with a UART
is a good place to start.
You'll find a working simulation script in hdl/example/simzpu.do.
When implementing the ZPU, copy the following files and modify them to your needs:
- hdl/example/zpu_config.vhd - set up RAM size here
- hdl/example/helloworld.vhd - dual port BRAM implementation.
Obviously you must also connect the ZPU to the rest of your IO subsystem. IO is memory mapped(read/write) in the ZPU.
Generating VHDL BRAM initialization
../install/bin/zpu-elf-objdump -O binary hello.elf hello.bin
java -classpath ../simulator/zpusim.jar com.zylin.zpu.simulator.tools.MakeRam hello.bin >hello.bram
Running example simulation
The hdl/example directory has a simulation written for Xilinx WebPack ModelSim. From the ModelSim command prompt:
- cd c:/<installfolder>/hdl/example
- do zpusim.do
After running the hello world simulation (see zpusim.do), two files are written to the hdl/exmaple directory:
- log.txt - contains the "Hello world!" text written to the debug channel/simplified UART.
- trace.txt - a trace file for the CPU. The instruction set simulator has the capability of taking
this file as input in order to verify that the HDL implementation matches the instruction set simulator.
When a mismatch is found, the GDB debugger will break. Very handy for debugging custom ZPU implementations.
HDL Directories & files
- example - contains example files & working ZPU. Start here.
- wishbone - contains wishbone interface for the ZPU
- zpu3 - if you are interested in developing ZPU cores and not only using them, then this directory contains various stuff of more or less historical interest.
- zpu4 - if you are interested in developing ZPU cores and not only using them, then this is the active development version. You'll also want to copy out the
files you need from this folder to your own project.
The HDL files need a bit of spit and polish!