# # $HeadURL: https://svn.fzd.de/repo/concast/FWF_Projects/FWKE/beam_position_monitor/hardware/board_sp601_amba/synthese/Makefile $ # $Date: 2011-11-18 08:42:44 +0100 (Fr, 18. Nov 2011) $ # $Author: lange $ # $Revision: 1257 $ # MODULE = top DEVICE = xc6slx45t-fgg484-3 UCF_FILE = sp605.ucf CORES = ../cores/ SOFTWARE = ../../../software/test DATE = $(shell date +"%Y-%m-%d__%H_%M") LOGFILE = synthesis_log_$(DATE).txt export XST_LOGFILE := $(LOGFILE) all: @echo "check - look for timing and other synthesis issues" @echo "xst - generate ngc file (netlist, replaces edif and netlist constrains)" @echo "translate - generate ngd file (native generic database [reduced to primitives])" @echo "map - generate ncd file (native ciruit description)" @echo "par - place&route ncd file (design implementation)" @echo "trace - generate timing report" @echo "bitgen - generate bit file (ncd -> bit)" @echo "update - update bitstream with elf file" @echo "program - program fpga with bit file" @echo "genmcs - genrate mcs file" @echo "progspi - program spi flash with mcs file" @echo "clean" @echo "..." @echo "testflow - update bitgen update program check" @echo "finalflow - update bitgen update progspi check" testflow: $(MAKE) update bitgen update program check 2>&1 | tee $(XST_LOGFILE) finalflow: $(MAKE) update bitgen update progspi check 2>&1 | tee $(XST_LOGFILE) check: @echo -e "Timing score: " @grep --with-filename "Timing Score" xst/*.par @echo -e "\nUnwanted Latches (737): " @grep --with-filename "WARNING:Xst:737" xst/*.syr || echo -n @echo -e "\nUnassigned signals (653): " @grep --with-filename "WARNING:Xst:653" xst/*.syr || echo -n @echo -e "\nCombinatoric loops (2170): " @grep --with-filename "WARNING:Xst:2170" xst/*.syr || echo -n @echo -e "\n Gated clocks (372): " @grep --with-filename "WARNING:PhysDesignRules:372" xst/*.bgn || echo -n update: make all --directory $(SOFTWARE) data2mem -bm zpu_i0_memory_64k.bmm -bd $(SOFTWARE)/*.elf -bt xst/$(MODULE).bit -o b xst/$(MODULE)_update.bit program: impact -batch program_fpga.cmd genmcs: promgen -spi -p mcs -w -o $(MODULE)_update.mcs -s 8192 -u 0 xst/$(MODULE)_update.bit progspi: genmcs impact -batch program_spi.cmd clean: rm -f *.log rm -f _impact.cmd rm -f *.cfi rm -f *.prm rm -rf xst dir: mkdir -p xst mkdir -p xst/projnav.tmp cp *.xst xst cp *.prj xst xst: $(MODULE).ngc translate: $(MODULE).ngd map: $(MODULE)_map.ncd par: $(MODULE).ncd #.PHONY: xst hw_timestamp: make --directory ../rtl $(MODULE).ngc: dir hw_timestamp cd xst ; xst -ifn $(MODULE).xst -ofn $(MODULE).syr $(MODULE).ngd: $(MODULE).ngc $(UCF_FILE) cd xst ; ngdbuild -dd _ngo -nt timestamp -uc ../$(UCF_FILE) -p $(DEVICE) -sd ../$(CORES) $(MODULE).ngc $(MODULE).ngd # -p part number # -mt multi-threading # -w overwrite existing files # -logic_opt logic optimization # -ol overall effor level (std|high) # -t placer cost table # -xt extra placer cost table # -register_duplication duplicate registers # -global_opt Global Optimization (off|speed|area|power) # -ir ignore RLOCs # -pr pack registers in IO (off|i|o|b) # -lc lut combining (auto|area|off) # -power Virtex 6 Power Optimization (on|off|high|xe) # -detail Generate Detailed MAP Report # -o Output File Name # -bp enables block RAM mapping $(MODULE)_map.ncd: $(MODULE).ngd cd xst ; export XIL_PAR_DESIGN_CHECK_VERBOSE=1; map -p $(DEVICE) -mt 2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -global_opt off -ir off -pr off -lc off -power off -detail -o $(MODULE)_map.ncd $(MODULE).ngd $(MODULE).pcf $(MODULE).ncd: $(MODULE)_map.ncd cd xst ; par -w -mt 4 -ol high $(MODULE)_map.ncd $(MODULE).ncd $(MODULE).pcf trace: cd xst ; trce -e -a -u -s 2 -xml $(MODULE).twx $(MODULE).ncd -o $(MODULE).twr $(MODULE).pcf tracefast: cd xst ; trce -v 12 -fastpaths -xml $(MODULE).twx -o $(MODULE).twr $(MODULE).ncd $(MODULE).pcf bitgen: $(MODULE).ncd cd xst ; bitgen -f ../$(MODULE).ut $(MODULE).ncd