page1
JTAG
Test
SPI
LED2
FPGA
not configured
LED1
FPGA
configured
SW1
(high active)
SW2
(low active)
SPI/CON3
pin1-2 enables the onboard crystal oscillator
pin13-14 allows SW2 to reconfigure the FPGA
GODIL_XC3S500E DIL FPGA module - Leiterplattenüberblick
GND
3.6 - 5.5 V
~120 mA