From 662a6952bc04419ac063cf3eb2b5917978eec0a1 Mon Sep 17 00:00:00 2001
From: Bert Lange <b.lange@hzdr.de>
Date: Fri, 28 Oct 2011 10:59:45 +0200
Subject: add: Spartan3 reference design for zealot

---
 .../fpga/altium-livedesign-xc3s1000/synthesis.sh   | 36 ++++++++++++++++++++++
 1 file changed, 36 insertions(+)
 create mode 100755 zpu/hdl/zealot/fpga/altium-livedesign-xc3s1000/synthesis.sh

(limited to 'zpu/hdl/zealot/fpga/altium-livedesign-xc3s1000/synthesis.sh')

diff --git a/zpu/hdl/zealot/fpga/altium-livedesign-xc3s1000/synthesis.sh b/zpu/hdl/zealot/fpga/altium-livedesign-xc3s1000/synthesis.sh
new file mode 100755
index 0000000..a7180fc
--- /dev/null
+++ b/zpu/hdl/zealot/fpga/altium-livedesign-xc3s1000/synthesis.sh
@@ -0,0 +1,36 @@
+#!/bin/sh
+
+# need project files:
+#    top.xst
+#    top.prj
+#    top.ut
+
+# need Xilinx tools:
+#    xst
+#    ngdbuild
+#    map
+#    par
+#    trce
+#    bitgen
+
+echo "########################"
+echo "generate build directory"
+echo "########################"
+mkdir build
+cd build 
+mkdir tmp
+
+echo "###############"
+echo "start processes"
+echo "###############"
+xst      -ifn "../synthesis_config/top.xst" -ofn "top.syr" 
+ngdbuild -dd _ngo -nt timestamp -uc ../synthesis_config/altium-livedesign-xc3s1000.ucf -p xc3s1000-fg456-4 top.ngc top.ngd  
+map      -p xc3s1000-fg456-4 -cm area -ir off -pr off -c 100 -o top_map.ncd top.ngd top.pcf 
+par      -w -ol high -t 1 top_map.ncd top.ncd top.pcf 
+trce     -v 3 -s 4 -n 3 -fastpaths -xml top.twx top.ncd -o top.twr top.pcf 
+bitgen   -f ../synthesis_config/top.ut top.ncd 
+
+echo "###########"
+echo "get bitfile"
+echo "###########"
+cp top.bit ..
-- 
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