From 8c5a743259480ebd0cfdbb17fbde8584e34b2aa4 Mon Sep 17 00:00:00 2001 From: Bert Lange Date: Wed, 15 Apr 2015 13:54:39 +0200 Subject: clean up --- uc_str912/prj_test_lcd/include/91x_ahbapb.h | 60 -- uc_str912/prj_test_lcd/include/91x_conf.h | 115 ---- uc_str912/prj_test_lcd/include/91x_fmi.h | 184 ------ uc_str912/prj_test_lcd/include/91x_gpio.h | 93 --- uc_str912/prj_test_lcd/include/91x_lib.h | 114 ---- uc_str912/prj_test_lcd/include/91x_map.h | 878 --------------------------- uc_str912/prj_test_lcd/include/91x_scu.h | 196 ------ uc_str912/prj_test_lcd/include/91x_type.h | 50 -- uc_str912/prj_test_lcd/include/char_code.h | 79 --- uc_str912/prj_test_lcd/include/lcd_lib_91x.h | 63 -- uc_str912/prj_test_lcd/include/vectors.h | 67 -- 11 files changed, 1899 deletions(-) delete mode 100644 uc_str912/prj_test_lcd/include/91x_ahbapb.h delete mode 100644 uc_str912/prj_test_lcd/include/91x_conf.h delete mode 100644 uc_str912/prj_test_lcd/include/91x_fmi.h delete mode 100644 uc_str912/prj_test_lcd/include/91x_gpio.h delete mode 100644 uc_str912/prj_test_lcd/include/91x_lib.h delete mode 100644 uc_str912/prj_test_lcd/include/91x_map.h delete mode 100644 uc_str912/prj_test_lcd/include/91x_scu.h delete mode 100644 uc_str912/prj_test_lcd/include/91x_type.h delete mode 100644 uc_str912/prj_test_lcd/include/char_code.h delete mode 100644 uc_str912/prj_test_lcd/include/lcd_lib_91x.h delete mode 100644 uc_str912/prj_test_lcd/include/vectors.h (limited to 'uc_str912/prj_test_lcd/include') diff --git a/uc_str912/prj_test_lcd/include/91x_ahbapb.h b/uc_str912/prj_test_lcd/include/91x_ahbapb.h deleted file mode 100644 index 1828d48..0000000 --- a/uc_str912/prj_test_lcd/include/91x_ahbapb.h +++ /dev/null @@ -1,60 +0,0 @@ -/******************** (C) COPYRIGHT 2006 STMicroelectronics ******************** -* File Name : 91x_ahbapb.h -* Author : MCD Application Team -* Date First Issued : 05/18/2006 : Version 1.0 -* Description : This file contains all the functions prototypes for the -* AHBAPB software library. -******************************************************************************** -* History: -* 05/24/2006 : Version 1.1 -* 05/18/2006 : Version 1.0 -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH -* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS -* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT -* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT -* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION -* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef _91x_AHBAPB_H -#define _91x_AHBAPB_H - -#include "91x_map.h" - -#define AHBAPB_Split_Enable 0x01000000 -#define AHBAPB_Split_Disable 0xFEFFFFFF -#define AHBAPB_Error_Enable 0x0000100 -#define AHBAPB_Error_Disable 0xFFFFEFF - -/*FLAG*/ -#define AHBAPB_FLAG_ERROR 0x01 /* error flag*/ -#define AHBAPB_FLAG_OUTM 0x10 /* Out of Memory flag */ -#define AHBAPB_FLAG_APBT 0x20 /* APB Time-out flag */ -#define AHBAPB_FLAG_RW 0x40 /*Access type flag*/ - -/* Includes ------------------------------------------------------------------*/ - - -/* AHBAPB Init structure definition */ -typedef struct -{ - u32 AHBAPB_SetTimeOut; - u32 AHBAPB_Error; - u32 AHBAPB_Split; - u8 AHBAPB_SplitCounter; -}AHBAPB_InitTypeDef; - -/* Exported constants --------------------------------------------------------*/ -void AHBAPB_DeInit(AHBAPB_TypeDef* AHBAPBx); -void AHBAPB_Init(AHBAPB_TypeDef* AHBAPBx, AHBAPB_InitTypeDef* AHBAPB_InitStruct); -void AHBAPB_StructInit(AHBAPB_InitTypeDef* AHBAPB_InitStruct); -FlagStatus AHBAPB_GetFlagStatus(AHBAPB_TypeDef* AHBAPBx, u8 AHBAPB_FLAG); -void AHBAPB_ClearFlag(AHBAPB_TypeDef* AHBAPBx, u8 AHBAPB_FLAG); -u32 AHBAPB_GetPeriphAddrError(AHBAPB_TypeDef* AHBAPBx); - - -#endif /* _91x_AHBAPB_H */ - -/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/ diff --git a/uc_str912/prj_test_lcd/include/91x_conf.h b/uc_str912/prj_test_lcd/include/91x_conf.h deleted file mode 100644 index 578335d..0000000 --- a/uc_str912/prj_test_lcd/include/91x_conf.h +++ /dev/null @@ -1,115 +0,0 @@ -/******************** (C) COPYRIGHT 2006 STMicroelectronics ******************** -* File Name : 91x_conf.h -* Author : MCD Application Team -* Date First Issued : 05/18/2006 : Version 1.0 -* Description : Library configuration. -******************************************************************************** -* History: -* 05/24/2006 : Version 1.1 -* 05/18/2006 : Version 1.0 -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH -* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS -* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT -* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT -* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION -* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - - -#ifndef __91x_CONF_H -#define __91x_CONF_H - -/* To work in buffered mode just decomment the following line */ - -//#define Buffered - -/* Comment the line below to put the library in release mode */ -//#define DEBUG - -/************************* AHBAPB *************************/ -//#define _AHBAPB -//#define _AHBAPB0 -//#define _AHBAPB1 -/************************* VIC *************************/ -//#define _VIC -//#define _VIC0 -//#define _VIC1 -/************************* DMA *************************/ -//#define _DMA -//#define _DMA_Channel0 -//#define _DMA_Channel1 -//#define _DMA_Channel2 -//#define _DMA_Channel3 -//#define _DMA_Channel4 -//#define _DMA_Channel5 -//#define _DMA_Channel6 -//#define _DMA_Channel7 - -/************************* EMI *************************/ -//#define _EMI -//#define _EMI_Bank0 -//#define _EMI_Bank1 -//#define _EMI_Bank2 -//#define _EMI_Bank3 -/************************* FMI *************************/ -//#define _FMI -/************************* WIU *************************/ -//#define _WIU -/************************* TIM *************************/ -//#define _TIM -//#define _TIM0 -//#define _TIM1 -//#define _TIM2 -//#define _TIM3 -/************************* GPIO ************************/ -#define _GPIO -#define _GPIO0 -#define _GPIO1 -#define _GPIO2 -#define _GPIO3 -#define _GPIO4 -#define _GPIO5 -#define _GPIO6 -#define _GPIO7 -#define _GPIO8 -#define _GPIO9 -/************************* RTC *************************/ -//#define _RTC -/************************* SCU *************************/ -#define _SCU -/************************* MC **************************/ -//#define _MC -/************************* UART ************************/ -//#define _UART -//#define _UART0 -//#define _UART1 -//#define _UART2 -/************************* SSP *************************/ -//#define _SSP -//#define _SSP0 -//#define _SSP1 -/************************* CAN *************************/ -//#define _CAN -/************************* ADC *************************/ -//#define _ADC -/************************* WDG *************************/ -//#define _WDG -/************************* I2C *************************/ -//#define _I2C -//#define _I2C0 -//#define _I2C1 -/************************ ENET *************************/ -//#define _ENET - -/*---------------------------- _Main_Crystal frequency value (KHz)------------*/ - -#ifndef _Main_Crystal -#define _Main_Crystal 25000 -#endif -/*------------------------------------------------------------------------------*/ - - -#endif /* __91x_CONF_H */ - -/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/ diff --git a/uc_str912/prj_test_lcd/include/91x_fmi.h b/uc_str912/prj_test_lcd/include/91x_fmi.h deleted file mode 100644 index 06e8115..0000000 --- a/uc_str912/prj_test_lcd/include/91x_fmi.h +++ /dev/null @@ -1,184 +0,0 @@ -/******************** (C) COPYRIGHT 2006 STMicroelectronics ******************** -* File Name : 91x_fmi.h -* Author : MCD Application Team -* Date First Issued : 05/18/2006 : Version 1.0 -* Description : This file contains all the functions prototypes for the -* FMI software library. -******************************************************************************** -* History: -* 05/24/2006 : Version 1.1 -* 05/18/2006 : Version 1.0 -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH -* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS -* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT -* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT -* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION -* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - - -/* Define to prevent recursive inclusion ------------------------------------ */ - -#ifndef __91x_FMI_H -#define __91x_FMI_H - -/* ========================================================================== */ -/* When bank 1 is remapped at address 0x0, decomment the following line */ -/* ========================================================================== */ - -//#define Remap_Bank_1 - - -/* Includes ------------------------------------------------------------------*/ - -#include "91x_map.h" - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* FMI banks */ - -#ifdef Remap_Bank_1 - -#define FMI_BANK_0 ((*(vu32*)0x54000010) << 2) /* FMI Bank 0 */ -#define FMI_BANK_1 ((*(vu32*)0x5400000C) << 2) /* FMI Bank 1 */ - -#else /* Remap Bank 0 */ - -#define FMI_BANK_0 ((*(vu32*)0x5400000C) << 2) /* FMI Bank 0 */ -#define FMI_BANK_1 ((*(vu32*)0x54000010) << 2) /* FMI Bank 1 */ - -#endif - -/* FMI sectors */ - -#define FMI_B0S0 0x00000000 + FMI_BANK_0 /* Bank 0 sector 0 */ -#define FMI_B0S1 0x00010000 + FMI_BANK_0 /* Bank 0 sector 1 */ -#define FMI_B0S2 0x00020000 + FMI_BANK_0 /* Bank 0 sector 2 */ -#define FMI_B0S3 0x00030000 + FMI_BANK_0 /* Bank 0 sector 3 */ -#define FMI_B0S4 0x00040000 + FMI_BANK_0 /* Bank 0 sector 4 */ -#define FMI_B0S5 0x00050000 + FMI_BANK_0 /* Bank 0 sector 5 */ -#define FMI_B0S6 0x00060000 + FMI_BANK_0 /* Bank 0 sector 6 */ -#define FMI_B0S7 0x00070000 + FMI_BANK_0 /* Bank 0 sector 7 */ - -#define FMI_B1S0 0x00000000 + FMI_BANK_1 /* Bank 1 sector 0 */ -#define FMI_B1S1 0x00002000 + FMI_BANK_1 /* Bank 1 sector 1 */ -#define FMI_B1S2 0x00004000 + FMI_BANK_1 /* Bank 1 sector 2 */ -#define FMI_B1S3 0x00006000 + FMI_BANK_1 /* Bank 1 sector 3 */ - -/* FMI Flags */ - -#define FMI_FLAG_SPS 0x02 /* Sector Protection Status Flag */ -#define FMI_FLAG_PSS 0x04 /* Program Suspend Status Flag */ -#define FMI_FLAG_PS 0x10 /* Program Status Flag */ -#define FMI_FLAG_ES 0x20 /* Erase Status Flag */ -#define FMI_FLAG_ESS 0x40 /* Erase Suspend Status Flag */ -#define FMI_FLAG_PECS 0x80 /* FPEC Status Flag */ - -/* FMI read wait states */ - -#define FMI_READ_WAIT_STATE_1 0x0000 /* One read wait state */ -#define FMI_READ_WAIT_STATE_2 0x2000 /* Two read wait states */ -#define FMI_READ_WAIT_STATE_3 0x4000 /* Three read wait states */ - -/* FMI write wait states */ - -#define FMI_WRITE_WAIT_STATE_0 0xFFFFFEFF /* Zero wait state */ -#define FMI_WRITE_WAIT_STATE_1 0x00000100 /* One wait state */ - -/* FMI power down configuration */ - -#define FMI_PWD_ENABLE 0x1000 /* FMI Power Down Enable */ -#define FMI_PWD_DISABLE 0x0000 /* FMI Power Down Disable */ - -/* FMI low voltage detector */ - -#define FMI_LVD_ENABLE 0x0000 /* FMI Low Voltage Detector Enable */ -#define FMI_LVD_DISABLE 0x0800 /* FMI Low Voltage Detector Disable */ - -/* FMI frequency range */ - -#define FMI_FREQ_LOW 0x0000 /* FMI Low bus working frequency */ -#define FMI_FREQ_HIGH 0x0040 /* FMI High bus working gfrequency */ - /* Above 66 MHz*/ -/* FMI OTP word addresses */ - -#define FMI_OTP_WORD_0 0x00 /* OTP word 0 */ -#define FMI_OTP_WORD_1 0x04 /* OTP word 1 */ -#define FMI_OTP_WORD_2 0x08 /* OTP word 2 */ -#define FMI_OTP_WORD_3 0x0C /* OTP word 3 */ -#define FMI_OTP_WORD_4 0x10 /* OTP word 4 */ -#define FMI_OTP_WORD_5 0x14 /* OTP word 5 */ -#define FMI_OTP_WORD_6 0x18 /* OTP word 6 */ -#define FMI_OTP_WORD_7 0x1C /* OTP word 7 */ - -/* FMI OTP halfword addresses */ - -#define FMI_OTP_LOW_HALFWORD_0 0x00 /* OTP Low halfword 0 */ -#define FMI_OTP_HIGH_HALFWORD_0 0x02 /* OTP High halfword 0 */ -#define FMI_OTP_LOW_HALFWORD_1 0x04 /* OTP Low halfword 1 */ -#define FMI_OTP_HIGH_HALFWORD_1 0x06 /* OTP High halfword 1 */ -#define FMI_OTP_LOW_HALFWORD_2 0x08 /* OTP Low halfword 2 */ -#define FMI_OTP_HIGH_HALFWORD_2 0x0A /* OTP High halfword 2 */ -#define FMI_OTP_LOW_HALFWORD_3 0x0C /* OTP Low halfword 3 */ -#define FMI_OTP_HIGH_HALFWORD_3 0x0E /* OTP High halfword 3 */ -#define FMI_OTP_LOW_HALFWORD_4 0x10 /* OTP Low halfword 4 */ -#define FMI_OTP_HIGH_HALFWORD_4 0x12 /* OTP High halfword 4 */ -#define FMI_OTP_LOW_HALFWORD_5 0x14 /* OTP Low halfword 5 */ -#define FMI_OTP_HIGH_HALFWORD_5 0x16 /* OTP High halfword 5 */ -#define FMI_OTP_LOW_HALFWORD_6 0x18 /* OTP Low halfword 6 */ -#define FMI_OTP_HIGH_HALFWORD_6 0x1A /* OTP High halfword 6 */ -#define FMI_OTP_LOW_HALFWORD_7 0x1C /* OTP Low halfword 7 */ -#define FMI_OTP_HIGH_HALFWORD_7 0x1E /* OTP High halfword 7 */ - -/* FMI sectors Masks */ - -#define FMI_B0S0_MASK 0x0001 /* FMI B0S0 mask */ -#define FMI_B0S1_MASK 0x0002 /* FMI B0S1 mask */ -#define FMI_B0S2_MASK 0x0004 /* FMI B0S2 mask */ -#define FMI_B0S3_MASK 0x0008 /* FMI B0S3 mask */ -#define FMI_B0S4_MASK 0x0010 /* FMI B0S4 mask */ -#define FMI_B0S5_MASK 0x0020 /* FMI B0S5 mask */ -#define FMI_B0S6_MASK 0x0040 /* FMI B0S6 mask */ -#define FMI_B0S7_MASK 0x0080 /* FMI B0S7 mask */ - -#define FMI_B1S0_MASK 0x0100 /* FMI B1S0 mask */ -#define FMI_B1S1_MASK 0x0200 /* FMI B1S1 mask */ -#define FMI_B1S2_MASK 0x0400 /* FMI B1S2 mask */ -#define FMI_B1S3_MASK 0x0800 /* FMI B1S3 mask */ - -/* Timeout error */ - -#define FMI_TIME_OUT_ERROR 0x00 /* Timeout error */ -#define FMI_NO_TIME_OUT_ERROR 0x01 /* No Timeout error */ - -/* Module private variables --------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - -void FMI_BankRemapConfig(u8 FMI_BootBankSize, u8 FMI_NonBootBankSize, \ - u32 FMI_BootBankAddress, u32 FMI_NonBootBankAddress); -void FMI_Config(u16 FMI_ReadWaitState, u32 FMI_WriteWaitState, u16 FMI_PWD,\ - u16 FMI_LVDEN, u16 FMI_FreqRange); -void FMI_EraseSector(vu32 FMI_Sector); -void FMI_EraseBank(vu32 FMI_Bank); -void FMI_WriteHalfWord(u32 FMI_Address, u16 FMI_Data); -void FMI_WriteOTPHalfWord(u8 FMI_OTPHWAddress, u16 FMI_OTPData); -u32 FMI_ReadWord(u32 FMI_Address); -u32 FMI_ReadOTPData(u8 FMI_OTPAddress); -FlagStatus FMI_GetFlagStatus(u8 FMI_Flag, vu32 FMI_Bank); -u16 FMI_GetReadWaitStateValue(void); -u16 FMI_GetWriteWaitStateValue(void); -void FMI_SuspendEnable(vu32 FMI_Bank); -void FMI_ResumeEnable(vu32 FMI_Bank); -void FMI_ClearFlag(vu32 FMI_Bank); -void FMI_WriteProtectionCmd(vu32 FMI_Sector, FunctionalState FMI_NewState); -FlagStatus FMI_GetWriteProtectionStatus(u32 FMI_Sector_Protection); -u8 FMI_WaitForLastOperation(vu32 FMI_Bank); - -#endif /* __91x_FMI_H */ - -/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/ - diff --git a/uc_str912/prj_test_lcd/include/91x_gpio.h b/uc_str912/prj_test_lcd/include/91x_gpio.h deleted file mode 100644 index 4beab75..0000000 --- a/uc_str912/prj_test_lcd/include/91x_gpio.h +++ /dev/null @@ -1,93 +0,0 @@ -/******************** (C) COPYRIGHT 2006 STMicroelectronics ******************** -* File Name : 91x_gpio.h -* Author : MCD Application Team -* Date First Issued : 05/18/2006 : Version 1.0 -* Description : This file contains all the functions prototypes for the -* GPIO software library. -******************************************************************************** -* History: -* 05/24/2006 : Version 1.1 -* 05/18/2006 : Version 1.0 -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH -* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS -* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT -* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT -* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION -* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion ------------------------------------ */ - -#ifndef _91x_GPIO_H -#define _91x_GPIO_H - -/* Includes ------------------------------------------------------------------*/ -#include "91x_map.h" - -/* GPIO Init structure definition */ -typedef struct -{ - u8 GPIO_Pin; - u8 GPIO_Direction; - u8 GPIO_Type; - u8 GPIO_IPConnected; - u16 GPIO_Alternate; -}GPIO_InitTypeDef; - -/* Bit_SET and Bit_RESET enumeration */ -typedef enum -{ Bit_RESET = 0, - Bit_SET -}BitAction; - - -/* Exported constants --------------------------------------------------------*/ -#define GPIO_Pin_None 0x00 -#define GPIO_Pin_0 0x01 -#define GPIO_Pin_1 0x02 -#define GPIO_Pin_2 0x04 -#define GPIO_Pin_3 0x08 -#define GPIO_Pin_4 0x10 -#define GPIO_Pin_5 0x20 -#define GPIO_Pin_6 0x40 -#define GPIO_Pin_7 0x80 -#define GPIO_Pin_All 0xFF - -#define GPIO_PinInput 0x00 -#define GPIO_PinOutput 0x01 - -#define GPIO_Type_PushPull 0x00 -#define GPIO_Type_OpenCollector 0x01 - -#define GPIO_IPConnected_Disable 0x00 -#define GPIO_IPConnected_Enable 0x01 - -#define GPIO_InputAlt1 0x00 -#define GPIO_OutputAlt1 0x01 -#define GPIO_OutputAlt2 0x02 -#define GPIO_OutputAlt3 0x03 - -#define GPIO_ANAChannel0 0x01 -#define GPIO_ANAChannel1 0x02 -#define GPIO_ANAChannel2 0x04 -#define GPIO_ANAChannel3 0x08 -#define GPIO_ANAChannel4 0x10 -#define GPIO_ANAChannel5 0x20 -#define GPIO_ANAChannel6 0x40 -#define GPIO_ANAChannel7 0x80 -#define GPIO_ANAChannelALL 0xFF - -void GPIO_DeInit(GPIO_TypeDef* GPIOx); -void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct); -void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct); -u8 GPIO_ReadBit(GPIO_TypeDef* GPIOx, u8 GPIO_Pin); -u8 GPIO_Read(GPIO_TypeDef* GPIOx); -void GPIO_WriteBit(GPIO_TypeDef* GPIOx, u8 GPIO_Pin, BitAction BitVal); -void GPIO_Write(GPIO_TypeDef* GPIOx, u8 PortVal); -void GPIO_EMIConfig(FunctionalState NewState); -void GPIO_ANAPinConfig(u8 GPIO_ANAChannel, FunctionalState NewState); - -#endif /* _91x_GPIO_H */ - -/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/ diff --git a/uc_str912/prj_test_lcd/include/91x_lib.h b/uc_str912/prj_test_lcd/include/91x_lib.h deleted file mode 100644 index 823b250..0000000 --- a/uc_str912/prj_test_lcd/include/91x_lib.h +++ /dev/null @@ -1,114 +0,0 @@ -/******************** (C) COPYRIGHT 2006 STMicroelectronics ******************** -* File Name : 91x_lib.h -* Author : MCD Application Team -* Date First Issued : 05/18/2006 : Version 1.0 -* Description : Used to include the peripherals header file in the -* user application. -******************************************************************************** -* History: -* 05/24/2006 : Version 1.1 -* 05/18/2006 : Version 1.0 -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH -* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS -* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT -* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT -* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION -* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -#ifndef __91x_LIB_H -#define __91x_LIB_H - -#include "91x_map.h" -#include "91x_conf.h" - -#ifdef _AHBAPB - #include "91x_ahbapb.h" -#endif /* _AHBAPB */ - -#ifdef _EMI - #include "91x_emi.h" -#endif /* _EMI */ - -#ifdef _DMA - #include "91x_dma.h" -#endif /* _DMA */ - -#ifdef _FMI - #include "91x_fmi.h" -#endif /* _FMI */ - -#ifdef _VIC - #include "91x_vic.h" -#endif /* _VIC */ - -#ifdef _WIU - #include "91x_wiu.h" -#endif /* _WIU */ - -#ifdef _TIM - #include "91x_tim.h" -#endif /* _TIM */ - -#ifdef _GPIO - #include "91x_gpio.h" -#endif /* _GPIO */ - -#ifdef _RTC - #include "91x_rtc.h" -#endif /* _RTC */ - -#ifdef _SCU - #include "91x_scu.h" -#endif /* _SCU */ - -#ifdef _UART - #include "91x_uart.h" -#endif /* _UART */ - -#ifdef _SSP - #include "91x_ssp.h" -#endif /* _SSP */ - -#ifdef _CAN - #include "91x_can.h" -#endif /* _CAN */ - -#ifdef _ADC - #include "91x_adc.h" -#endif /* _ADC */ - -#ifdef _WDG - #include "91x_wdg.h" -#endif /* _WDG */ - -#ifdef _I2C - #include "91x_i2c.h" -#endif /* _I2C */ - -#ifdef _WIU - #include "91x_wiu.h" -#endif - -#ifdef _MC - #include "91x_mc.h" -#endif - -#ifdef _ENET - #include "91x_enet.h" -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Module private variables --------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - - void debug( void ); - - -#endif /* __91x_LIB_H */ - -/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/ diff --git a/uc_str912/prj_test_lcd/include/91x_map.h b/uc_str912/prj_test_lcd/include/91x_map.h deleted file mode 100644 index 2e94a91..0000000 --- a/uc_str912/prj_test_lcd/include/91x_map.h +++ /dev/null @@ -1,878 +0,0 @@ -/******************** (C) COPYRIGHT 2006 STMicroelectronics ******************** -* File Name : 91x_map.h -* Author : MCD Application Team -* Date First Issued : 05/18/2006 : Version 1.0 -* Description : Peripherals registers definition and memory mapping. -******************************************************************************** -* History: -* 05/24/2006 : Version 1.1 -* 05/18/2006 : Version 1.0 -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH -* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS -* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT -* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT -* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION -* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion ------------------------------------ */ -#ifndef __91x_MAP_H -#define __91x_MAP_H - -#ifndef EXT - #define EXT extern -#endif /* EXT */ - -/* Includes ------------------------------------------------------------------*/ -#include "91x_conf.h" -#include "91x_type.h" - -/******************************************************************************/ -/* IP registers structures */ -/******************************************************************************/ - -/*------------------------------------ FMI -----------------------------------*/ - -typedef struct -{ - vu32 BBSR; /* Boot Bank Size Register */ - vu32 NBBSR; /* Non-Boot Bank Size Register */ - vu32 EMPTY1; - vu32 BBADR; /* Boot Bank Base Address Register */ - vu32 NBBADR; /* Non-Boot Bank Base Address Register */ - vu32 EMPTY2; - vu32 CR; /* Control Register */ - vu32 SR; /* Status Register */ - vu32 BCE5ADDR; /* BC Fifth Entry Target Address Register */ -} FMI_TypeDef; - -/*---------------------- Analog to Digital Convertor ------------------------*/ - -typedef struct -{ - vu16 CR; /* Control Register */ - vu16 EMPTY1; - vu16 CCR; /* Channel Configuration Register */ - vu16 EMPTY2; - vu16 HTR; /* Higher Threshold Register */ - vu16 EMPTY3; - vu16 LTR; /* Lower Threshold Register */ - vu16 EMPTY4; - vu16 CRR; /* Compare Result Register */ - vu16 EMPTY5; - vu16 DR0; /* Data Register for Channel 0 */ - vu16 EMPTY6; - vu16 DR1; /* Data Register for Channel 1 */ - vu16 EMPTY7; - vu16 DR2; /* Data Register for Channel 2 */ - vu16 EMPTY8; - vu16 DR3; /* Data Register for Channel 3 */ - vu16 EMPTY9; - vu16 DR4; /* Data Register for Channel 4 */ - vu16 EMPTY10; - vu16 DR5; /* Data Register for Channel 5 */ - vu16 EMPTY11; - vu16 DR6; /* Data Register for Channel 6 */ - vu16 EMPTY12; - vu16 DR7; /* Data Register for Channel 7 */ - vu16 EMPTY13; - vu16 PRS; /* Prescaler Value Register */ - vu16 EMPTY14; -} ADC_TypeDef; - -/*--------------------- AHB APB BRIDGE registers strcture --------------------*/ - -typedef struct -{ - vu32 BSR; /* Bridge Status Register */ - vu32 BCR; /* Bridge Configuration Register */ - vu32 PAER; /* Peripheral Address Error register */ -} AHBAPB_TypeDef; - -/*--------------- Controller Area Network Interface Register -----------------*/ - -typedef struct -{ - vu16 CRR; /* IFn Command request Register */ - vu16 EMPTY1; - vu16 CMR; /* IFn Command Mask Register */ - vu16 EMPTY2; - vu16 M1R; /* IFn Message Mask 1 Register */ - vu16 EMPTY3; - vu16 M2R; /* IFn Message Mask 2 Register */ - vu16 EMPTY4; - vu16 A1R; /* IFn Message Arbitration 1 Register */ - vu16 EMPTY5; - vu16 A2R; /* IFn Message Arbitration 2 Register */ - vu16 EMPTY6; - vu16 MCR; /* IFn Message Control Register */ - vu16 EMPTY7; - vu16 DA1R; /* IFn DATA A 1 Register */ - vu16 EMPTY8; - vu16 DA2R; /* IFn DATA A 2 Register */ - vu16 EMPTY9; - vu16 DB1R; /* IFn DATA B 1 Register */ - vu16 EMPTY10; - vu16 DB2R; /* IFn DATA B 2 Register */ - vu16 EMPTY11[27]; -} CAN_MsgObj_TypeDef; - -typedef struct -{ - vu16 CR; /* Control Register */ - vu16 EMPTY1; - vu16 SR; /* Status Register */ - vu16 EMPTY2; - vu16 ERR; /* Error counter Register */ - vu16 EMPTY3; - vu16 BTR; /* Bit Timing Register */ - vu16 EMPTY4; - vu16 IDR; /* Interrupt Identifier Register */ - vu16 EMPTY5; - vu16 TESTR; /* Test Register */ - vu16 EMPTY6; - vu16 BRPR; /* BRP Extension Register */ - vu16 EMPTY7[3]; - CAN_MsgObj_TypeDef sMsgObj[2]; - vu16 EMPTY8[16]; - vu16 TXR1R; /* Transmission request 1 Register */ - vu16 EMPTY9; - vu16 TXR2R; /* Transmission Request 2 Register */ - vu16 EMPTY10[13]; - vu16 ND1R; /* New Data 1 Register */ - vu16 EMPTY11; - vu16 ND2R; /* New Data 2 Register */ - vu16 EMPTY12[13]; - vu16 IP1R; /* Interrupt Pending 1 Register */ - vu16 EMPTY13; - vu16 IP2R; /* Interrupt Pending 2 Register */ - vu16 EMPTY14[13]; - vu16 MV1R; /* Message Valid 1 Register */ - vu16 EMPTY15; - vu16 MV2R; /* Message VAlid 2 Register */ - vu16 EMPTY16; -} CAN_TypeDef; - -/*----------------------- System Control Unit---------------------------------*/ - -typedef struct -{ - vu32 CLKCNTR; /* Clock Control Register */ - vu32 PLLCONF; /* PLL Configuration Register */ - vu32 SYSSTATUS; /* System Status Register */ - vu32 PWRMNG; /* Power Management Register */ - vu32 ITCMSK; /* Interrupt Mask Register */ - vu32 PCGRO; /* Peripheral Clock Gating Register 0 */ - vu32 PCGR1; /* Peripheral Clock Gating Register 1 */ - vu32 PRR0; /* Peripheral Reset Register 0 */ - vu32 PRR1; /* Peripheral Reset Register 1 */ - vu32 MGR0; /* Idle Mode Mask Gating Register 0 */ - vu32 MGR1; /* Idle Mode Mask Gating Register 1 */ - vu32 PECGR0; /* Peripheral Emulation Clock Gating Register 0 */ - vu32 PECGR1; /* Peripheral Emulation Clock Gating Register 1 */ - vu32 SCR0; /* System Configuration Register 0 */ - vu32 SCR1; /* System Configuration Register 1 */ - vu32 SCR2; /* System Configuration Register 2 */ - u32 EMPTY1; - vu32 GPIOOUT[8]; /* GPIO Output Registers */ - vu32 GPIOIN[8]; /* GPIO Input Registers */ - vu32 GPIOTYPE[10];/* GPIO Type Registers */ - vu32 GPIOEMI; /* GPIO EMI Selector Register */ - vu32 WKUPSEL; /* Wake-Up Selection Register */ - u32 EMPTY2[2]; - vu32 GPIOANA; /* GPIO Analag mode Register */ -} SCU_TypeDef; - -/*------------------------- DMA Channelx Registers ---------------------------*/ - -typedef struct -{ - vu32 SRC; /* Channelx Source Address Register */ - vu32 DES; /* Channelx Destination Address Register */ - vu32 LLI; /* Channelx Lincked List Item Register */ - vu32 CC; /* Channelx Contol Register */ - vu32 CCNF; /* Channelx Configuration Register */ -} DMA_Channel_TypeDef; - -/* x can be ,0,1,2,3,4,5,6 or 7. There are eight Channels AHB BUS Master */ - -/*----------------------------- DMA Controller -------------------------------*/ - -typedef struct -{ - vu32 ISR; /* Interrupt Status Register */ - vu32 TCISR; /* Terminal Count Interrupt Status Register */ - vu32 TCICR; /* Terminal CountInterrupt Clear Register */ - vu32 EISR; /* Error Interrupt Status Register */ - vu32 EICR; /* Error Interrupt Clear Register */ - vu32 TCRISR; /* Terminal Count Raw Interrupt Status Register */ - vu32 ERISR; /* Raw Error Interrupt Status Register */ - vu32 ENCSR; /* Enabled Channel Status Register */ - vu32 SBRR; /* Software Burst Request Register */ - vu32 SSRR; /* Software Single Request Register */ - vu32 SLBRR; /* Software Last Burst Request Register */ - vu32 SLSRR; /* Software Last Single Request Register */ - vu32 CNFR; /* Configuration Register */ - vu32 SYNR; /* Syncronization Register */ - } DMA_TypeDef; - -/*--------------------------------- TIM Timer --------------------------------*/ - -typedef struct -{ - vu16 IC1R; /* Input Capture 1 Register */ - vu16 EMPTY1; - vu16 IC2R; /* Input Capture 2 Register */ - vu16 EMPTY2; - vu16 OC1R; /* Output Compare 1 Register */ - vu16 EMPTY3; - vu16 OC2R; /* Output Compare 2 Register */ - vu16 EMPTY4; - vu16 CNTR; /* Counter Register */ - vu16 EMPTY5; - vu16 CR1; /* Control Register 1 */ - vu16 EMPTY6; - vu16 CR2; /* Control Register 2 */ - vu16 EMPTY7; - vu16 SR; /* Status Register */ - vu16 EMPTY8; -} TIM_TypeDef; - -/*---------------------------- EMI Bankx Registers ---------------------------*/ - -typedef struct -{ - vu32 ICR; /* Bankx Idle Cycle Control Register */ - vu32 RCR; /* Bankx Read Wait State Control Register */ - vu32 WCR; /* Bankx Write Wait State Control Register */ - vu32 OECR; /* Bankx Output Enable Assertion Delay Control Register */ - vu32 WECR; /* Bankx Write Enable Assertion Delay Control Register */ - vu32 BCR; /* Bankx Control Register */ - } EMI_Bank_TypeDef; - -/*---------------------------- Ethernet Controller ---------------------------*/ - -/* MAC Registers */ -typedef struct -{ - vu32 MCR; /* ENET Control Register */ - vu32 MAH; /* ENET Address High Register */ - vu32 MAL; /* ENET Address Low Register */ - vu32 MCHA; /* Multicast Address High Register */ - vu32 MCLA; /* Multicast Address Low Register */ - vu32 MIIA; /* MII Address Register */ - vu32 MIID; /* MII Data Register */ - vu32 MCF; /* ENET Control Frame Register */ - vu32 VL1; /* VLAN1 Register */ - vu32 VL2; /* VLAN2 register */ - vu32 MTS; /* ENET Transmission Status Register */ - vu32 MRS; /* ENET Reception Status Register */ -} ENET_MAC_TypeDef; - -/* DMA Registers */ -typedef struct -{ - vu32 SCR; /* DMA Status and Control Register */ - vu32 IER; /* DMA Interrupt Sources Enable Register */ - vu32 ISR; /* DMA Interrupt Status Register */ - vu32 CCR; /* Clock Control Relation : HCLK, PCLK and - ENET_CLK phase relations */ - vu32 RXSTR; /* Rx DMA start Register */ - vu32 RXCR; /* Rx DMA Control Register */ - vu32 RXSAR; /* Rx DMA Base Address Register */ - vu32 RXNDAR; /* Rx DMA Next Descriptor Address Register */ - vu32 RXCAR; /* Rx DMA Current Address Register */ - vu32 RXCTCR; /* Rx DMA Current Transfer Count Register */ - vu32 RXTOR; /* Rx DMA FIFO Time Out Register */ - vu32 RXSR; /* Rx DMA FIFO Status Register */ - vu32 TXSTR; /* Tx DMA start Register */ - vu32 TXCR; /* Tx DMA Control Register */ - vu32 TXSAR; /* Tx DMA Base Address Register */ - vu32 TXNDAR; /* Tx DMA Next Descriptor Address Register */ - vu32 TXCAR; /* Tx DMA Current Address Register */ - vu32 TXTCR; /* Tx DMA Current Transfer Count Register */ - vu32 TXTOR; /* Tx DMA FIFO Time Out Register */ - vu32 TXSR; /* Tx DMA FIFO Status Register */ -} ENET_DMA_TypeDef; - -/*------------------------------------- GPIO ---------------------------------*/ - -typedef struct -{ - vu8 DR[1021]; /* Data Register */ - vu32 DDR; /* Data Direction Register */ -} GPIO_TypeDef; - -/*-------------------------------- I2C interface -----------------------------*/ - -typedef struct -{ - vu8 CR; /* Control Register */ - vu8 EMPTY1[3]; - vu8 SR1; /* Status Register 1 */ - vu8 EMPTY2[3]; - vu8 SR2; /* Status Register 2 */ - vu8 EMPTY3[3]; - vu8 CCR; /* Clock Control Register */ - vu8 EMPTY4[3]; - vu8 OAR1; /* Own Address Register 1 */ - vu8 EMPTY5[3]; - vu8 OAR2; /* Own Address Register 2 */ - vu8 EMPTY6[3]; - vu8 DR; /* Data Register */ - vu8 EMPTY7[3]; - vu8 ECCR; /* Extended Clock Control Register */ - vu8 EMPTY8[3]; -} I2C_TypeDef; - -/*------------------------------------- VIC ----------------------------------*/ - -typedef struct -{ - vu32 ISR; /* IRQ Status Register */ - vu32 FSR; /* FIQ Status Register */ - vu32 RINTSR; /* Raw Interrupt Status Register */ - vu32 INTSR; /* Interrupt Select Register */ - vu32 INTER; /* Interrupt Enable Register */ - vu32 INTECR; /* Interrupt Enable Clear Register */ - vu32 SWINTR; /* Software Interrupt Register */ - vu32 SWINTCR; /* Software Interrupt clear Register */ - vu32 PER; /* Protection Enable Register */ - vu32 EMPTY1[3]; - vu32 VAR; /* Vector Address Register */ - vu32 DVAR; /* Default Vector Address Register */ - vu32 EMPTY2[50]; - vu32 VAiR[16]; /* Vector Address 0-15 Register */ - vu32 EMPTY3[48]; - vu32 VCiR[16]; /* Vector Control 0-15 Register */ -} VIC_TypeDef; - -/*-------------------------------- Motor Control -----------------------------*/ - -typedef struct -{ - vu16 TCPT; /* Tacho Capture Register */ - vu16 EMPTY1; - vu16 TCMP; /* Tacho Compare Register */ - vu16 EMPTY2; - vu16 IPR; /* Input Pending Register */ - vu16 EMPTY3; - vu16 TPRS; /* Tacho Prescaler Register */ - vu16 EMPTY4; - vu16 CPRS; /* PWM Counter Prescaler Register */ - vu16 EMPTY5; - vu16 REP; /* Repetition Counter Register */ - vu16 EMPTY6; - vu16 CMPW; /* Compare Phase W Preload Register */ - vu16 EMPTY7; - vu16 CMPV; /* Compare Phase V Preload Register */ - vu16 EMPTY8; - vu16 CMPU; /* Compare Phase U Preload Register */ - vu16 EMPTY9; - vu16 CMP0; /* Compare 0 Preload Register */ - vu16 EMPTY10; - vu16 PCR0; /* Peripheral Control Register 0 */ - vu16 EMPTY11; - vu16 PCR1; /* Peripheral Control Register 1 */ - vu16 EMPTY12; - vu16 PCR2; /* Peripheral Control Register 2 */ - vu16 EMPTY13; - vu16 PSR; /* Polarity Selection Register */ - vu16 EMPTY14; - vu16 OPR; /* Output Peripheral Register */ - vu16 EMPTY15; - vu16 IMR; /* Interrupt Mask Register */ - vu16 EMPTY16; - vu16 DTG; /* Dead Time Generator Register */ - vu16 EMPTY17; - vu16 ESC; /* Emergency Stop Clear Register */ - vu16 EMPTY18; -}MC_TypeDef; - -/*------------------------------------- RTC ----------------------------------*/ - -typedef struct -{ - vu32 TR; /* Time Register */ - vu32 DTR; /* Date Register */ - vu32 ATR; /* Alarm time Register */ - vu32 CR; /* Control Register */ - vu32 SR; /* Status Register */ - vu32 MILR; /* Millisec Register */ -}RTC_TypeDef; - -/*------------------------------------- SSP ----------------------------------*/ - -typedef struct -{ - vu16 CR0; /* Control Register 1 */ - vu16 EMPTY1; - vu16 CR1; /* Control Register 2 */ - vu16 EMPTY2; - vu16 DR; /* Data Register */ - vu16 EMPTY3; - vu16 SR; /* Status Register */ - vu16 EMPTY4; - vu16 PR; /* Clock Prescale Register */ - vu16 EMPTY5; - vu16 IMSCR; /* Interrupt Mask Set or Clear Register */ - vu16 EMPTY6; - vu16 RISR; /* Raw Interrupt Status Register */ - vu16 EMPTY7; - vu16 MISR; /* Masked Interrupt Status Register */ - vu16 EMPTY8; - vu16 ICR; /* Interrupt Clear Register */ - vu16 EMPTY9; - vu16 DMACR; /* DMA Control Register */ - vu16 EMPTY10; -}SSP_TypeDef; - -/*------------------------------------ UART ----------------------------------*/ - -typedef struct -{ - vu16 DR; /* Data Register */ - vu16 EMPTY1; - vu16 RSECR; /* Receive Status Register (read)/Error Clear Register (write) */ - vu16 EMPTY2[9]; - vu16 FR; /* Flag Register */ - vu16 EMPTY3[3]; - vu16 ILPR; /* IrDA Low-Power counter Register */ - vu16 EMPTY4; - vu16 IBRD; /* Integer Baud Rate Divisor Register */ - vu16 EMPTY5; - vu16 FBRD; /* Fractional Baud Rate Divisor Register */ - vu16 EMPTY6; - vu16 LCR; /* Line Control Register, High byte */ - vu16 EMPTY7; - vu16 CR; /* Control Register */ - vu16 EMPTY8; - vu16 IFLS; /* Interrupt FIFO Level Select Register */ - vu16 EMPTY9; - vu16 IMSC; /* Interrupt Mask Set/Clear Register */ - vu16 EMPTY10; - vu16 RIS; /* Raw Interrupt Status Register */ - vu16 EMPTY11; - vu16 MIS; /* Masked Interrupt Status Register */ - vu16 EMPTY12; - vu16 ICR; /* Interrupt Clear Register */ - vu16 EMPTY13; - vu16 DMACR; /* DMA Control Register */ - vu16 EMPTY14; -}UART_TypeDef; - -/*------------------------------- Wake-up System -----------------------------*/ - -typedef struct -{ - vu32 CTRL; /* Control Register */ - vu32 MR; /* Mask Register */ - vu32 TR; /* Trigger Register */ - vu32 PR; /* Pending Register */ - vu32 INTR; /* Software Interrupt Register */ -} WIU_TypeDef; - -/*------------------------------- WatchDog Timer -----------------------------*/ - -typedef struct -{ - vu16 CR; /* Control Register */ - vu16 EMPTY1; - vu16 PR; /* Presclar Register */ - vu16 EMPTY2; - vu16 VR; /* Pre-load Value Register */ - vu16 EMPTY3; - vu16 CNT; /* Counter Register */ - vu16 EMPTY4; - vu16 SR; /* Status Register */ - vu16 EMPTY5; - vu16 MR; /* Mask Register */ - vu16 EMPTY6; - vu16 KR; /* Key Register */ - vu16 EMPTY7; -} WDG_TypeDef; - -/******************************************************************************* -* Memory Mapping of STR91x * -*******************************************************************************/ - -#define AHB_APB_BRDG0_U (0x58000000) /* AHB/APB Bridge 0 UnBuffered Space */ -#define AHB_APB_BRDG0_B (0x48000000) /* AHB/APB Bridge 0 Buffered Space */ - -#define AHB_APB_BRDG1_U (0x5C000000) /* AHB/APB Bridge 1 UnBuffered Space */ -#define AHB_APB_BRDG1_B (0x4C000000) /* AHB/APB Bridge 1 Buffered Space */ - -#define AHB_EMI_U (0x74000000) /* EMI UnBuffered Space */ -#define AHB_EMI_B (0x64000000) /* EMI Buffered Space */ - -#define AHB_DMA_U (0x78000000) /* DMA UnBuffered Space */ -#define AHB_DMA_B (0x68000000) /* DMA Buffered Space */ - -#define AHB_ENET_MAC_U (0x7C000400) /* ENET_MAC UnBuffered Space */ -#define AHB_ENET_MAC_B (0x6C000000) /* ENET_MAC Buffered Space */ - -#define AHB_ENET_DMA_U (0x7C000000) /* ENET_DMA Unbuffered Space */ -#define AHB_ENET_DMA_B (0x6C000400) /* ENET_DMA Buffered Space */ - -#define AHB_VIC1_U (0xFC000000) /* Secondary VIC1 UnBuffered Space */ -#define AHB_VIC0_U (0xFFFFF000) /* Primary VIC0 UnBuffered Space */ - -#define AHB_FMI_U (0x54000000) /* FMI Unbuffered Space */ -#define AHB_FMI_B (0x44000000) /* FMI buffered Space */ - -/******************************************************************************* -* Addresses related to the VICs' peripherals * -*******************************************************************************/ - -#define VIC0_BASE (AHB_VIC0_U) -#define VIC1_BASE (AHB_VIC1_U) - -/******************************************************************************* -* Addresses related to the EMI banks * -*******************************************************************************/ - -#define AHB_EMIB3_OFST (0x00000040) /* Offset of EMI bank3 */ -#define AHB_EMIB2_OFST (0x00000020) /* Offset of EMI bank2 */ -#define AHB_EMIB1_OFST (0x00000000) /* Offset of EMI bank1 */ -#define AHB_EMIB0_OFST (0x000000E0) /* Offset of EMI bank0 */ - -/******************************************************************************* -* Addresses related to the DMA peripheral * -*******************************************************************************/ - -#define AHB_DMA_Channel0_OFST (0x00000100) /* Offset of Channel 0 */ -#define AHB_DMA_Channel1_OFST (0x00000120) /* Offset of Channel 1 */ -#define AHB_DMA_Channel2_OFST (0x00000140) /* Offset of Channel 2 */ -#define AHB_DMA_Channel3_OFST (0x00000160) /* Offset of Channel 3 */ -#define AHB_DMA_Channel4_OFST (0x00000180) /* Offset of Channel 4 */ -#define AHB_DMA_Channel5_OFST (0x000001A0) /* Offset of Channel 5 */ -#define AHB_DMA_Channel6_OFST (0x000001C0) /* Offset of Channel 6 */ -#define AHB_DMA_Channel7_OFST (0x000001E0) /* Offset of Channel 7 */ - -/******************************************************************************* -* Addresses related to the APB0 sub-system * -*******************************************************************************/ - -#define APB_WIU_OFST (0x00001000) /* Offset of WIU */ -#define APB_TIM0_OFST (0x00002000) /* Offset of TIM0 */ -#define APB_TIM1_OFST (0x00003000) /* Offset of TIM1 */ -#define APB_TIM2_OFST (0x00004000) /* Offset of TIM2 */ -#define APB_TIM3_OFST (0x00005000) /* Offset of TIM3 */ -#define APB_GPIO0_OFST (0x00006000) /* Offset of GPIO0 */ -#define APB_GPIO1_OFST (0x00007000) /* Offset of GPIO1 */ -#define APB_GPIO2_OFST (0x00008000) /* Offset of GPIO2 */ -#define APB_GPIO3_OFST (0x00009000) /* Offset of GPIO3 */ -#define APB_GPIO4_OFST (0x0000A000) /* Offset of GPIO4 */ -#define APB_GPIO5_OFST (0x0000B000) /* Offset of GPIO5 */ -#define APB_GPIO6_OFST (0x0000C000) /* Offset of GPIO6 */ -#define APB_GPIO7_OFST (0x0000D000) /* Offset of GPIO7 */ -#define APB_GPIO8_OFST (0x0000E000) /* Offset of GPIO8 */ -#define APB_GPIO9_OFST (0x0000F000) /* Offset of GPIO9 */ - -/******************************************************************************* -* Addresses related to the APB1 sub-system * -*******************************************************************************/ - -#define APB_RTC_OFST (0x00001000) /* Offset of RTC */ -#define APB_SCU_OFST (0x00002000) /* Offset of System Controller */ -#define APB_MC_OFST (0x00003000) /* Offset of Motor Control */ -#define APB_UART0_OFST (0x00004000) /* Offset of UART0 */ -#define APB_UART1_OFST (0x00005000) /* Offset of UART1 */ -#define APB_UART2_OFST (0x00006000) /* Offset of UART2 */ -#define APB_SSP0_OFST (0x00007000) /* Offset of SSP0 */ -#define APB_SSP1_OFST (0x00008000) /* Offset of SSPI */ -#define APB_CAN_OFST (0x00009000) /* Offset of CAN */ -#define APB_ADC_OFST (0x0000A000) /* Offset of ADC */ -#define APB_WDG_OFST (0x0000B000) /* Offset of WDG */ -#define APB_I2C0_OFST (0x0000C000) /* Offset of I2C0 */ -#define APB_I2C1_OFST (0x0000D000) /* Offset of I2C1 */ - -/*----------------------------------------------------------------------------*/ -/*----------------------------- Unbuffered Mode ------------------------------*/ -/*----------------------------------------------------------------------------*/ - -#ifndef Buffered - -/******************************************************************************* -* AHBAPB peripheral Unbuffered Base Address * -*******************************************************************************/ - -#define AHBAPB0_BASE (AHB_APB_BRDG0_U) -#define AHBAPB1_BASE (AHB_APB_BRDG1_U) - -/******************************************************************************* -* ENET peripheral Unbuffered Base Address * -*******************************************************************************/ - -#define ENET_MAC_BASE (AHB_ENET_MAC_U) -#define ENET_DMA_BASE (AHB_ENET_DMA_U) - -/******************************************************************************* -* DMA peripheral Unbuffered Base Address * -*******************************************************************************/ - -#define DMA_BASE (AHB_DMA_U) - -/******************************************************************************* -* EMI peripheral Unbuffered Base Address * -*******************************************************************************/ - -#define EMI_BASE (AHB_EMI_U) - -/******************************************************************************* -* FMI peripheral Unbuffered Base Address * -*******************************************************************************/ - -#define FMI_BASE (AHB_FMI_U) - - -#else /* Buffered */ - -/*----------------------------------------------------------------------------*/ -/*------------------------------ Buffered Mode -------------------------------*/ -/*----------------------------------------------------------------------------*/ - -/******************************************************************************* -* AHBAPB peripheral Buffered Base Address * -*******************************************************************************/ - -#define AHBAPB0_BASE (AHB_APB_BRDG0_B) -#define AHBAPB1_BASE (AHB_APB_BRDG1_B) - -/******************************************************************************* -* ENET peripheral Unbuffered Base Address * -*******************************************************************************/ - -#define ENET_MAC_BASE (AHB_ENET_MAC_B) -#define ENET_DMA_BASE (AHB_ENET_DMA_B) - -/******************************************************************************* -* DMA peripheral Buffered Base Address * -*******************************************************************************/ - -#define DMA_BASE (AHB_DMA_B) - -/******************************************************************************* -* EMI peripheral Buffered Base Address * -*******************************************************************************/ - -#define EMI_BASE (AHB_EMI_B) - -/******************************************************************************* -* FMI peripheral Buffered Base Address * -*******************************************************************************/ - -#define FMI_BASE (AHB_FMI_B) - -#endif /* Buffered */ - -/******************************************************************************* -* DMA channels Base Address * -*******************************************************************************/ -#define DMA_Channel0_BASE (DMA_BASE + AHB_DMA_Channel0_OFST) -#define DMA_Channel1_BASE (DMA_BASE + AHB_DMA_Channel1_OFST) -#define DMA_Channel2_BASE (DMA_BASE + AHB_DMA_Channel2_OFST) -#define DMA_Channel3_BASE (DMA_BASE + AHB_DMA_Channel3_OFST) -#define DMA_Channel4_BASE (DMA_BASE + AHB_DMA_Channel4_OFST) -#define DMA_Channel5_BASE (DMA_BASE + AHB_DMA_Channel5_OFST) -#define DMA_Channel6_BASE (DMA_BASE + AHB_DMA_Channel6_OFST) -#define DMA_Channel7_BASE (DMA_BASE + AHB_DMA_Channel7_OFST) - -/******************************************************************************* -* EMI Banks peripheral Base Address * -*******************************************************************************/ - -#define EMI_Bank0_BASE (EMI_BASE + AHB_EMIB0_OFST) -#define EMI_Bank1_BASE (EMI_BASE + AHB_EMIB1_OFST) -#define EMI_Bank2_BASE (EMI_BASE + AHB_EMIB2_OFST) -#define EMI_Bank3_BASE (EMI_BASE + AHB_EMIB3_OFST) - -/******************************************************************************* -* APB0 Peripherals' Base addresses * -*******************************************************************************/ - -#define WIU_BASE (AHBAPB0_BASE + APB_WIU_OFST) -#define TIM0_BASE (AHBAPB0_BASE + APB_TIM0_OFST) -#define TIM1_BASE (AHBAPB0_BASE + APB_TIM1_OFST) -#define TIM2_BASE (AHBAPB0_BASE + APB_TIM2_OFST) -#define TIM3_BASE (AHBAPB0_BASE + APB_TIM3_OFST) -#define GPIO0_BASE (AHBAPB0_BASE + APB_GPIO0_OFST) -#define GPIO1_BASE (AHBAPB0_BASE + APB_GPIO1_OFST) -#define GPIO2_BASE (AHBAPB0_BASE + APB_GPIO2_OFST) -#define GPIO3_BASE (AHBAPB0_BASE + APB_GPIO3_OFST) -#define GPIO4_BASE (AHBAPB0_BASE + APB_GPIO4_OFST) -#define GPIO5_BASE (AHBAPB0_BASE + APB_GPIO5_OFST) -#define GPIO6_BASE (AHBAPB0_BASE + APB_GPIO6_OFST) -#define GPIO7_BASE (AHBAPB0_BASE + APB_GPIO7_OFST) -#define GPIO8_BASE (AHBAPB0_BASE + APB_GPIO8_OFST) -#define GPIO9_BASE (AHBAPB0_BASE + APB_GPIO9_OFST) - -/******************************************************************************* -* APB1 Peripherals' Base addresses * -*******************************************************************************/ - -#define RTC_BASE (AHBAPB1_BASE + APB_RTC_OFST) -#define SCU_BASE (AHBAPB1_BASE + APB_SCU_OFST) -#define MC_BASE (AHBAPB1_BASE + APB_MC_OFST) -#define UART0_BASE (AHBAPB1_BASE + APB_UART0_OFST) -#define UART1_BASE (AHBAPB1_BASE + APB_UART1_OFST) -#define UART2_BASE (AHBAPB1_BASE + APB_UART2_OFST) -#define SSP0_BASE (AHBAPB1_BASE + APB_SSP0_OFST) -#define SSP1_BASE (AHBAPB1_BASE + APB_SSP1_OFST) -#define CAN_BASE (AHBAPB1_BASE + APB_CAN_OFST) -#define ADC_BASE (AHBAPB1_BASE + APB_ADC_OFST) -#define WDG_BASE (AHBAPB1_BASE + APB_WDG_OFST) -#define I2C0_BASE (AHBAPB1_BASE + APB_I2C0_OFST) -#define I2C1_BASE (AHBAPB1_BASE + APB_I2C1_OFST) - -/******************************************************************************* -* IPs' declaration * -*******************************************************************************/ - -/*------------------------------ Non Debug Mode ------------------------------*/ -#undef DEBUG -#ifndef DEBUG - -/*********************************** AHBAPB ***********************************/ - -#define AHBAPB0 ((AHBAPB_TypeDef *)AHBAPB0_BASE) -#define AHBAPB1 ((AHBAPB_TypeDef *)AHBAPB1_BASE) - -/************************************* EMI ************************************/ - -#define EMI ((EMI_TypeDef *)EMI_BASE) - -/************************************* DMA ************************************/ - -#define DMA ((DMA_TypeDef *)DMA_BASE) -#define DMA_Channel0 ((DMA_Channel_TypeDef *)DMA_Channel0_BASE) -#define DMA_Channel1 ((DMA_Channel_TypeDef *)DMA_Channel1_BASE) -#define DMA_Channel2 ((DMA_Channel_TypeDef *)DMA_Channel2_BASE) -#define DMA_Channel3 ((DMA_Channel_TypeDef *)DMA_Channel3_BASE) -#define DMA_Channel4 ((DMA_Channel_TypeDef *)DMA_Channel4_BASE) -#define DMA_Channel5 ((DMA_Channel_TypeDef *)DMA_Channel5_BASE) -#define DMA_Channel6 ((DMA_Channel_TypeDef *)DMA_Channel6_BASE) -#define DMA_Channel7 ((DMA_Channel_TypeDef *)DMA_Channel7_BASE) - -/************************************* EMI ************************************/ - -#define EMI_Bank0 ((EMI_Bank_TypeDef *)EMI_Bank0_BASE) -#define EMI_Bank1 ((EMI_Bank_TypeDef *)EMI_Bank1_BASE) -#define EMI_Bank2 ((EMI_Bank_TypeDef *)EMI_Bank2_BASE) -#define EMI_Bank3 ((EMI_Bank_TypeDef *)EMI_Bank3_BASE) - -/************************************* ENET_MAC ************************************/ - -#define ENET_MAC ((ENET_MAC_TypeDef *)ENET_MAC_BASE) - -/************************************* ENET_DMA ************************************/ - -#define ENET_DMA ((ENET_DMA_TypeDef *)ENET_DMA_BASE) - -/************************************* FMI ************************************/ - -#define FMI ((FMI_TypeDef *)FMI_BASE) - -/************************************* VIC ************************************/ - -#define VIC0 ((VIC_TypeDef *)VIC0_BASE) -#define VIC1 ((VIC_TypeDef *)VIC1_BASE) - -/******************************************************************************* -* APB0 Peripherals' * -*******************************************************************************/ -#define WIU ((WIU_TypeDef *)WIU_BASE) -#define TIM0 ((TIM_TypeDef *)TIM0_BASE) -#define TIM1 ((TIM_TypeDef *)TIM1_BASE) -#define TIM2 ((TIM_TypeDef *)TIM2_BASE) -#define TIM3 ((TIM_TypeDef *)TIM3_BASE) -#define GPIO0 ((GPIO_TypeDef *)GPIO0_BASE) -#define GPIO1 ((GPIO_TypeDef *)GPIO1_BASE) -#define GPIO2 ((GPIO_TypeDef *)GPIO2_BASE) -#define GPIO3 ((GPIO_TypeDef *)GPIO3_BASE) -#define GPIO4 ((GPIO_TypeDef *)GPIO4_BASE) -#define GPIO5 ((GPIO_TypeDef *)GPIO5_BASE) -#define GPIO6 ((GPIO_TypeDef *)GPIO6_BASE) -#define GPIO7 ((GPIO_TypeDef *)GPIO7_BASE) -#define GPIO8 ((GPIO_TypeDef *)GPIO8_BASE) -#define GPIO9 ((GPIO_TypeDef *)GPIO9_BASE) -/******************************************************************************* -* APB1 Peripherals' * -*******************************************************************************/ -#define RTC ((RTC_TypeDef *)RTC_BASE) -#define SCU ((SCU_TypeDef *)SCU_BASE) -#define MC ((MC_TypeDef *)MC_BASE) -#define UART0 ((UART_TypeDef *)UART0_BASE) -#define UART1 ((UART_TypeDef *)UART1_BASE) -#define UART2 ((UART_TypeDef *)UART2_BASE) -#define SSP0 ((SSP_TypeDef *)SSP0_BASE) -#define SSP1 ((SSP_TypeDef *)SSP1_BASE) -#define CAN ((CAN_TypeDef *)CAN_BASE) -#define ADC ((ADC_TypeDef *)ADC_BASE) -#define WDG ((WDG_TypeDef *)WDG_BASE) -#define I2C0 ((I2C_TypeDef *)I2C0_BASE) -#define I2C1 ((I2C_TypeDef *)I2C1_BASE) -#define ENET_MAC ((ENET_MAC_TypeDef *)ENET_MAC_BASE) -#define ENET_DMA ((ENET_DMA_TypeDef *)ENET_DMA_BASE) - -#else /* DEBUG */ - -/*-------------------------------- Debug Mode --------------------------------*/ - -EXT AHBAPB_TypeDef *AHBAPB0; -EXT AHBAPB_TypeDef *AHBAPB1; -EXT DMA_TypeDef *DMA; -EXT DMA_Channel_TypeDef *DMA_Channel0; -EXT DMA_Channel_TypeDef *DMA_Channel1; -EXT DMA_Channel_TypeDef *DMA_Channel2; -EXT DMA_Channel_TypeDef *DMA_Channel3; -EXT DMA_Channel_TypeDef *DMA_Channel4; -EXT DMA_Channel_TypeDef *DMA_Channel5; -EXT DMA_Channel_TypeDef *DMA_Channel6; -EXT DMA_Channel_TypeDef *DMA_Channel7; -EXT EMI_Bank_TypeDef *EMI_Bank0; -EXT EMI_Bank_TypeDef *EMI_Bank1; -EXT EMI_Bank_TypeDef *EMI_Bank2; -EXT EMI_Bank_TypeDef *EMI_Bank3; -EXT FMI_TypeDef *FMI; -EXT VIC_TypeDef *VIC0; -EXT VIC_TypeDef *VIC1; -EXT WIU_TypeDef *WIU; -EXT TIM_TypeDef *TIM0; -EXT TIM_TypeDef *TIM1; -EXT TIM_TypeDef *TIM2; -EXT TIM_TypeDef *TIM3; -EXT GPIO_TypeDef *GPIO0; -EXT GPIO_TypeDef *GPIO1; -EXT GPIO_TypeDef *GPIO2; -EXT GPIO_TypeDef *GPIO3; -EXT GPIO_TypeDef *GPIO4; -EXT GPIO_TypeDef *GPIO5; -EXT GPIO_TypeDef *GPIO6; -EXT GPIO_TypeDef *GPIO7; -EXT GPIO_TypeDef *GPIO8; -EXT GPIO_TypeDef *GPIO9; -EXT RTC_TypeDef *RTC; -EXT SCU_TypeDef *SCU; -EXT MC_TypeDef *MC; -EXT UART_TypeDef *UART0; -EXT UART_TypeDef *UART1; -EXT UART_TypeDef *UART2; -EXT SSP_TypeDef *SSP0; -EXT SSP_TypeDef *SSP1; -EXT CAN_TypeDef *CAN; -EXT ADC_TypeDef *ADC; -EXT WDG_TypeDef *WDG; -EXT I2C_TypeDef *I2C0; -EXT I2C_TypeDef *I2C1; -EXT ENET_MAC_TypeDef *ENET_MAC; -EXT ENET_DMA_TypeDef *ENET_DMA; - - -#endif /* DEBUG */ - -#endif /* __91x_MAP_H*/ - -/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/ - diff --git a/uc_str912/prj_test_lcd/include/91x_scu.h b/uc_str912/prj_test_lcd/include/91x_scu.h deleted file mode 100644 index b9d04f5..0000000 --- a/uc_str912/prj_test_lcd/include/91x_scu.h +++ /dev/null @@ -1,196 +0,0 @@ -/******************** (C) COPYRIGHT 2006 STMicroelectronics ******************** -* File Name : 91x_scu.h -* Author : MCD Application Team -* Date First Issued : 05/18/2006 : Version 1.0 -* Description : This file provides the SCU library software functions -* prototypes & definitions -******************************************************************************** -* History: -* 05/24/2006 : Version 1.1 -* 05/18/2006 : Version 1.0 -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH -* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS -* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT -* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT -* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION -* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __91x_SCU_H -#define __91x_SCU_H - -/* Includes ------------------------------------------------------------------*/ -#include "91x_map.h" - -/* Exported constants --------------------------------------------------------*/ - -/*MCLK_Source*/ -#define SCU_MCLK_PLL 0x0 -#define SCU_MCLK_RTC 0x1 -#define SCU_MCLK_OSC 0x2 - -/*RCLK_Divisor*/ -#define SCU_RCLK_Div1 0xFFFFFFE3 -#define SCU_RCLK_Div2 0x4 -#define SCU_RCLK_Div4 0x8 -#define SCU_RCLK_Div8 0xC -#define SCU_RCLK_Div16 0x10 -#define SCU_RCLK_Div1024 0x14 - -/*HCLK_Divisor*/ -#define SCU_HCLK_Div1 0xFFFFFF9F -#define SCU_HCLK_Div2 0x20 -#define SCU_HCLK_Div4 0x40 - -/*PCLK_Divisor*/ -#define SCU_PCLK_Div1 0xFFFFFE7F -#define SCU_PCLK_Div2 0x80 -#define SCU_PCLK_Div4 0x100 -#define SCU_PCLK_Div8 0x180 - -/*FMICLK_Divisor*/ -#define SCU_FMICLK_Div1 0xFFFEFFFF -#define SCU_FMICLK_Div2 0x10000 - -/*BRCLK_Divisor*/ -#define SCU_BRCLK_Div1 0xFFFFFDFF -#define SCU_BRCLK_Div2 0x200 - -/*TIMCLK_Source*/ -#define SCU_TIMCLK_EXT 0x1 -#define SCU_TIMCLK_INT 0x0 - -/*TIMx*/ -#define SCU_TIM01 0x0 -#define SCU_TIM23 0x1 - - -/*USBCLK_Source*/ -#define SCU_USBCLK_MCLK 0xFFFFF3FF -#define SCU_USBCLK_MCLK2 0x400 -#define SCU_USBCLK_EXT 0x800 - -/*SCU_EMIBCLK*/ -#define SCU_EMIBCLK_Div1 0xFFF9FFFF -#define SCU_EMIBCLK_Div2 0x20000 - -/*SCU_EMIMODE*/ -#define SCU_EMI_MUX 0xFFFFFFBF -#define SCU_EMI_DEMUX 0x40 - -/*SCU_EMIALE_LEN*/ -#define SCU_EMIALE_LEN1 0xFFFFFEFF -#define SCU_EMIALE_LEN2 0x100 - -/*SCU_EMIALE_POL*/ -#define SCU_EMIALE_POLLow 0xFFFFFF7F -#define SCU_EMIALE_POLHigh 0x80 - -/*UART_IrDA_Mode*/ -#define SCU_UARTMode_IrDA 0x1 -#define SCU_UARTMode_UART 0x0 - -/*APBPeriph*/ -#define __TIM01 0x1 -#define __TIM23 0x2 -#define __MC 0x4 -#define __UART0 0x8 -#define __UART1 0x10 -#define __UART2 0x20 -#define __I2C0 0x40 -#define __I2C1 0x80 -#define __SSP0 0x100 -#define __SSP1 0x200 -#define __CAN 0x400 -#define __ADC 0x800 -#define __WDG 0x1000 -#define __WIU 0x2000 -#define __GPIO0 0x4000 -#define __GPIO1 0x8000 -#define __GPIO2 0x10000 -#define __GPIO3 0x20000 -#define __GPIO4 0x40000 -#define __GPIO5 0x80000 -#define __GPIO6 0x100000 -#define __GPIO7 0x200000 -#define __GPIO8 0x400000 -#define __GPIO9 0x800000 -#define __RTC 0x1000000 - -/*AHBPeriph*/ -#define __FMI 0x1 -#define __FPQBC 0x2 -#define __SRAM 0x8 -#define __SRAM_ARBITER 0x10 -#define __VIC 0x20 -#define __EMI 0x40 -#define __EMI_MEM_CLK 0x80 -#define __DMA 0x100 -#define __USB 0x200 -#define __USB48M 0x400 -#define __ENET 0x800 -#define __PFQBC_AHB 0x1000 - -/*SCU_IT*/ -#define SCU_IT_LVD_RST 0x10 -#define SCU_IT_SRAM_ERROR 0x8 -#define SCU_IT_ACK_PFQBC 0x4 -#define SCU_IT_LOCK_LOST 0x2 -#define SCU_IT_LOCK 0x1 - -/*SCU_FLAG*/ -#define SCU_FLAG_SRAM_ERROR 0x20 -#define SCU_FLAG_ACK_PFQBC 0x10 -#define SCU_FLAG_LVD_RESET 0x8 -#define SCU_FLAG_WDG_RST 0x4 -#define SCU_FLAG_LOCK_LOST 0x2 -#define SCU_FLAG_LOCK 0x1 - - -/* Module private variables --------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ -ErrorStatus SCU_MCLKSourceConfig(u32 MCLK_Source); -ErrorStatus SCU_PLLFactorsConfig(u8 PLLN, u8 PLLM, u8 PLLP); -ErrorStatus SCU_PLLCmd(FunctionalState NewState); -void SCU_RCLKDivisorConfig(u32 RCLK_Divisor); -void SCU_HCLKDivisorConfig(u32 HCLK_Divisor); -void SCU_PCLKDivisorConfig(u32 PCLK_Divisor); -void SCU_APBPeriphClockConfig(u32 APBPeriph, FunctionalState NewState); -void SCU_AHBPeriphClockConfig(u32 AHBPeriph, FunctionalState NewState); -void SCU_APBPeriphReset(u32 APBPeriph, FunctionalState NewState); -void SCU_AHBPeriphReset(u32 AHBPeriph, FunctionalState NewState); -void SCU_APBPeriphIdleConfig(u32 APBPeriph, FunctionalState NewState); -void SCU_AHBPeriphIdleConfig(u32 AHBPeriph, FunctionalState NewState); -void SCU_APBPeriphDebugConfig(u32 APBPeriph, FunctionalState NewState); -void SCU_AHBPeriphDebugConfig(u32 AHBPeriph, FunctionalState NewState); -void SCU_BRCLKDivisorConfig(u32 BRCLK_Divisor); -void SCU_TIMCLKSourceConfig(u8 TIMx, u32 TIMCLK_Source); -void SCU_TIMPresConfig(u8 TIMx, u16 Prescaler); -void SCU_USBCLKConfig(u32 USBCLK_Source); -void SCU_PHYCLKConfig(FunctionalState NewState); -void SCU_FMICLKDivisorConfig(u32 FMICLK_Divisor); -void SCU_EMIBCLKDivisorConfig(u32 SCU_EMIBCLK); -void SCU_EMIModeConfig(u32 SCU_EMIMODE); -void SCU_EMIALEConfig(u32 SCU_EMIALE_LEN, u32 SCU_EMIALE_POL); -void SCU_ITConfig(u32 SCU_IT, FunctionalState NewState); -FlagStatus SCU_GetFlagStatus(u32 SCU_Flag); -void SCU_ClearFlag(u32 SCU_Flag); -u32 SCU_GetPLLFreqValue(void); -u32 SCU_GetMCLKFreqValue(void); -u32 SCU_GetRCLKFreqValue(void); -u32 SCU_GetHCLKFreqValue(void); -u32 SCU_GetPCLKFreqValue(void); -void SCU_WakeUpLineConfig(u8 EXTint); -void SCU_SpecIntRunModeConfig(FunctionalState NewState); -void SCU_EnterIdleMode(void); -void SCU_EnterSleepMode(void); -void SCU_UARTIrDASelect(UART_TypeDef * UARTx, u8 UART_IrDA_Mode); -void SCU_PFQBCCmd(FunctionalState NewState); - -#endif /*__91x_SCU_H*/ - -/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/ diff --git a/uc_str912/prj_test_lcd/include/91x_type.h b/uc_str912/prj_test_lcd/include/91x_type.h deleted file mode 100644 index 916d81c..0000000 --- a/uc_str912/prj_test_lcd/include/91x_type.h +++ /dev/null @@ -1,50 +0,0 @@ -/******************** (C) COPYRIGHT 2006 STMicroelectronics ******************** -* File Name : 91x_type.h -* Author : MCD Application Team -* Date First Issued : 05/18/2006 : Version 1.0 -* Description : It contains common types and constants used in all the -* peripherals' drivers. -******************************************************************************** -* History: -* 05/24/2006 : Version 1.1 -* 05/18/2006 : Version 1.0 -********************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT -* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT -* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION -* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*********************************************************************************/ - -#ifndef __91x_type_H -#define __91x_type_H - - typedef long long u64; - typedef unsigned long u32; - typedef unsigned short u16; - typedef unsigned char u8; - - typedef signed long s32; - typedef signed short s16; - typedef signed char s8; - - typedef volatile unsigned long vu32; - typedef volatile unsigned short vu16; - typedef volatile unsigned char vu8; - - typedef volatile signed long vs32; - typedef volatile signed short vs16; - typedef volatile signed char vs8; - -typedef enum { FALSE = 0, TRUE = !FALSE } bool; - -typedef enum { RESET = 0, SET = !RESET } FlagStatus, ITStatus; - -typedef enum { DISABLE = 0, ENABLE = !DISABLE} FunctionalState; - -typedef enum { ERROR = 0, SUCCESS = !ERROR} ErrorStatus; - -#endif /* __91x_type_H */ - -/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/ diff --git a/uc_str912/prj_test_lcd/include/char_code.h b/uc_str912/prj_test_lcd/include/char_code.h deleted file mode 100644 index 51775e3..0000000 --- a/uc_str912/prj_test_lcd/include/char_code.h +++ /dev/null @@ -1,79 +0,0 @@ -#ifndef char_code -#define char_code - -#define A 65 -#define B 66 -#define C 67 -#define D 68 -#define E 69 -#define F 70 -#define G 71 -#define H 72 -#define I 73 -#define J 74 -#define K 75 -#define L 76 -#define M 77 -#define N 78 -#define O 79 -#define P 80 -#define Q 81 -#define R 82 -#define S 83 -#define T 84 -#define U 85 -#define V 86 -#define W 87 -#define X 88 -#define Y 89 -#define Z 90 - -#define a 97 -#define b 98 -#define c 99 -#define d 100 -#define e 101 -#define f 102 -#define g 103 -#define h 104 -#define i 105 -#define j 106 -#define k 107 -#define l 108 -#define m 109 -#define n 110 -#define o 111 -#define p 112 -#define q 113 -#define r 114 -#define s 115 -#define t 116 -#define u 117 -#define v 118 -#define w 119 -#define x 120 -#define y 121 -#define z 122 - -/* -#define . 46 -#define , 44 -#define - 45 -#define ( 40 -#define ) 41 -#define [ 91 -#define ] 93 -#define { 123 -#define } 125 -#define : 58 -#define ; 59 -#define ! 33 -#define % 37 -#define * 42 -#define + 43 -#define = 61 -*/ - -#define space 32 - -#endif diff --git a/uc_str912/prj_test_lcd/include/lcd_lib_91x.h b/uc_str912/prj_test_lcd/include/lcd_lib_91x.h deleted file mode 100644 index bdc4fdb..0000000 --- a/uc_str912/prj_test_lcd/include/lcd_lib_91x.h +++ /dev/null @@ -1,63 +0,0 @@ -/******************** (C) COPYRIGHT 2007 PROPOX ******************************** -* File Name : lcd_lib_91x.h -* Author : PROPOX Team -* Date First Issued : 09/24/2007 : Version 1.0 -* Description : This file provides all the 2x16 LCD functions. -******************************************************************************** -* History: -******************************************************************************** -* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, PROPOX SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR -* CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Define to prevent recursive inclusion ------------------------------------ */ -#ifndef _lcd_lib_91x_H -#define _lcd_lib_91x_H - -/* Includes ------------------------------------------------------------------*/ -#include "91x_lib.h" -#include "91x_gpio.h" - -/* Private Definision */ -#define D7_set GPIO_WriteBit(GPIO8, GPIO_Pin_3, Bit_SET) -#define D6_set GPIO_WriteBit(GPIO8, GPIO_Pin_2, Bit_SET) -#define D5_set GPIO_WriteBit(GPIO8, GPIO_Pin_1, Bit_SET) -#define D4_set GPIO_WriteBit(GPIO8, GPIO_Pin_0, Bit_SET) - -#define D7_reset GPIO_WriteBit(GPIO8, GPIO_Pin_3, Bit_RESET) -#define D6_reset GPIO_WriteBit(GPIO8, GPIO_Pin_2, Bit_RESET) -#define D5_reset GPIO_WriteBit(GPIO8, GPIO_Pin_1, Bit_RESET) -#define D4_reset GPIO_WriteBit(GPIO8, GPIO_Pin_0, Bit_RESET) - -#define RS_set GPIO_WriteBit(GPIO8, GPIO_Pin_4, Bit_SET) -#define E_set GPIO_WriteBit(GPIO8, GPIO_Pin_5, Bit_SET) - -#define RS_reset GPIO_WriteBit(GPIO8, GPIO_Pin_4, Bit_RESET) -#define E_reset GPIO_WriteBit(GPIO8, GPIO_Pin_5, Bit_RESET) - -void delay(int time); -void LCDinit(void); -void LCDsendChar(u8 ch); -void LCDsendCommand(u8 cmd); -void LCDclr(void); -void LCDhome(void); -void LCDstring(u8* data, u8 nBytes); -void LCDGotoXY(u8 row, u8 column); -void LCDshiftLeft(u8 right); -void LCDshiftRight(u8 left); -void LCDcursorOn(void); -void LCDcursorOnBlink(void); -void LCDcursorOFF(void); -void LCDblank(void); -void LCDvisible(void); -void LCDcursorLeft(u8 left); -void LCDcursorRight(u8 right); - -#endif /* _lcd_lib_91x_H */ - - -/******************* (C) COPYRIGHT 2007 PROPOX *****END OF FILE****/ diff --git a/uc_str912/prj_test_lcd/include/vectors.h b/uc_str912/prj_test_lcd/include/vectors.h deleted file mode 100644 index d48e61f..0000000 --- a/uc_str912/prj_test_lcd/include/vectors.h +++ /dev/null @@ -1,67 +0,0 @@ -/*********************************************************************************** -* Copyright 2005 Anglia Design -* This demo code and associated components are provided as is and has no warranty, -* implied or otherwise. You are free to use/modify any of the provided -* code at your own risk in your applications with the expressed limitation -* of liability (see below) -* -* LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY -* LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR -* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER -* THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. -* -* Author : Spencer Oliver -* Web : www.anglia-designs.com -* -***********************************************************************************/ - -#ifndef _VECTOR_H -#define _VECTOR_H - -#ifdef __cplusplus -extern "C" { -#endif - -void Undefined_Handler(void); -void FIQ_Handler(void); -void SWI_Handler(void); -void Prefetch_Handler(void); -void Abort_Handler(void); -void WDG_IRQHandler(void); -void SW_IRQHandler(void); -void ARMRX_IRQHandler(void); -void ARMTX_IRQHandler(void); -void TIM0_IRQHandler(void); -void TIM1_IRQHandler(void); -void TIM2_IRQHandler(void); -void TIM3_IRQHandler(void); -void USBHP_IRQHandler(void); -void USBLP_IRQHandler(void); -void SCU_IRQHandler(void); -void ENET_IRQHandler(void); -void DMA_IRQHandler(void); -void CAN_IRQHandler(void); -void MC_IRQHandler(void); -void ADC_IRQHandler(void); -void UART0_IRQHandler(void); -void UART1_IRQHandler(void); -void UART2_IRQHandler(void); -void I2C0_IRQHandler(void); -void I2C1_IRQHandler(void); -void SSP0_IRQHandler(void); -void SSP1_IRQHandler(void); -void LVD_IRQHandler(void); -void RTC_IRQHandler(void); -void WIU_IRQHandler(void); -void EXTIT0_IRQHandler(void); -void EXTIT1_IRQHandler(void); -void EXTIT2_IRQHandler(void); -void EXTIT3_IRQHandler(void); -void USBWU_IRQHandler(void); -void PFQBC_IRQHandler(void); - -#ifdef __cplusplus -} -#endif - -#endif //_VECTOR_H -- cgit v1.1