From 8679e4f91dcae05aef40f96629f33f0f4161f14a Mon Sep 17 00:00:00 2001 From: Bert Lange Date: Fri, 11 Jul 2014 14:13:10 +0200 Subject: add: performance values for Lattice MachXO2 --- zpu/docs/zpu_arch.html | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/zpu/docs/zpu_arch.html b/zpu/docs/zpu_arch.html index 15b9ccf..62acdfa 100644 --- a/zpu/docs/zpu_arch.html +++ b/zpu/docs/zpu_arch.html @@ -1061,10 +1061,11 @@ For now if you are starting a design, zpu4 or zealot are probably the safest. z

Performance Summary

-
TODO fill in performance table for Altera and Lattice. +TODO fill in performance table for Altera.

Tests are done with the Zealot SoC-System and Xilinx ISE 12.2 with standard settings. + For the MachXO2 device Lattice Diamond 3.1 with Synplify Pro I-2013.09L was used.

@@ -1073,7 +1074,7 @@ Tests are done with the Zealot - + @@ -1115,12 +1116,12 @@ maxAddrBit=16 175 fmax @@ -1159,12 +1160,12 @@ maxAddrBit=16 125 fmax -- cgit v1.1

Spartan-3E

Spartan-6

Virtex-5

Cyclone-3

MachXO2

DMIPS

-
-? LUT
-? REG
-? MULT18x18
-? M4K
-? fmax
+
+886 LUT4
+459 REG
+
+4   EBR
+75  fmax
 

0.5

-
-? LUT
-? REG
-? MULT18x18
-? M4K
-? fmax
+
+2429 LUT4
+755  REG
+
+4    EBR
+65   fmax
 

2.6