From 6f3db230ca9d2e32df61dbd6137ea963de630629 Mon Sep 17 00:00:00 2001
From: oharboe ZPU
- UART to ARM7 TX NOTE!
ZPU side ZPU
- UART to ARM7 RX NOTE!
ZPU side Bit
[31:1] Not used Bit
- [0] UART RX interrupt enable
@@ -1066,7 +1067,7 @@ while developing the ZPU.
@@ -1160,7 +1161,7 @@ while developing the ZPU.
0 Interrupt disable
1 Interrupt
@@ -1182,7 +1183,7 @@ while developing the ZPU.
Bit
[31:1] Not used Bit
- [0] UART RX interrupt pending (Read)
0 No interrupt pending
1 Interrupt
@@ -1455,6 +1456,25 @@ Achieving above 50-100 DMIPS with the current ZPU architecture is probably
a non-starter and a more conventional RISC design makes more sense here.
The unique advantages of the ZPU is size in terms of HDL & code size.
+
+
+The point is that characters(bytes) are sent to/from the ZPU
+via some terminal.
+
+The ZPU defines in the memory map a UART / debug channel. This
+should be implemented by some suitable debug channel for
+the device in which the ZPU is implemented.
+
+www.opencores.org has several UART implementations. This is one
+of the simpler ones:
+
+
+http://www.opencores.org/projects.cgi/web/uart/overview
+
Debug channel / UART
+All self respecting embedded projects should have a debug channel
+to print stuff to. Typically this is a standard RS232 or UART, but
+it can also be something more exotic like a DCC JTAG channel.
+About zpu_core.vhd
The zpu_core.vhd has a single port memory interface. All data, code and IO is
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