From 3c919f795b78bacdb9b3b7396ac5761f7457224a Mon Sep 17 00:00:00 2001 From: oharboe Date: Mon, 18 Aug 2008 07:25:24 +0000 Subject: wip --- zpu/docs/zpu_arch.html | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/zpu/docs/zpu_arch.html b/zpu/docs/zpu_arch.html index ce24bdd..ccbd0df 100644 --- a/zpu/docs/zpu_arch.html +++ b/zpu/docs/zpu_arch.html @@ -1316,19 +1316,20 @@ and to open up for innovation in the HDL implementation.
  1. Reduce minimum code size footprint
      -
    1. Modify GCC compiler to be able to emit function calls instead of instructions. -E.g instead of issuing MULT, generate function call. This reduces code size overhead -for applications that do not use MULT since the microcode does not need to be in place.
    2. Add single entry for unknown instructions. PC and unsupported instruction is pushed onto stack before jumping to unkonwn instruction vector. This makes it possible -to write denser microcode for missing instructions. +to write denser microcode for missing instructions. For emulated opcodes that are +not in use, the microcode can more easily be disabled. Determining +that e.g. MULT is not used, can be a bit tricky, but disabling it is easy.
    3. Single entry for *all* unknown instructions does not limit emulation to the EMULATE instructions today, but instructions such as OR, LOADSP, STORESP, ADDSP, etc. can also be emulated. This opens up for further reduction in logic usage.
    4. The single entry for all unknown instructions will make it easier to -write a compact custom crt0.s to fit an instruction subset. +write a compact custom crt0.s to fit an instruction subset.
    5. The interrupt is basically an unknown instruction that is injected into the execution stream. +
    6. Possibly modify the java simulator to support the single entry for unknown +instructions.
  2. Add floating point add and mult. FADD & FMULT. Option to generate the instructions from the compiler. @@ -1339,6 +1340,10 @@ single entry point for unknown instructions?
  3. Add support to Zylin Embedded CDT for downloading fully functional ZPU toolchain. The goal is to allow new users to write and simulate simple ZPU programs in in less than an hour. +
  4. Strip away unused instructions from GCC and add options to GCC for not +emitting more advanced instructions. This will e.g. convert MULT/DIV into +function calls to libgcc and thus make it easier to determine that +microcode is not needed.

Next generation ZPU HDL work

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