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Raptor Engineering's fork of the Zylin ZPU
Raptor Engineering, LLC
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zealot
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Author
Age
Files
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*
minor fix: reduce simulation warnings at 0 ps
Bert Lange
2011-10-28
4
-8
/
+8
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*
add: Spartan3 reference design for zealot
Bert Lange
2011-10-28
11
-0
/
+1200
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*
beautify: break long comment lines
Bert Lange
2011-10-28
3
-7
/
+48
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*
add: GPIO module to zealot SoC
Bert Lange
2011-10-25
33
-2220
/
+2590
|
*
fix: zealot/zpu_small - load, see patch from Alvaro
Bert Lange
2011-10-25
1
-0
/
+1
|
*
add: one more ZPU reference design for zealot
Bert Lange
2011-10-22
11
-0
/
+1393
|
*
minor fix: to satisfy some synthesis tools
Bert Lange
2011-10-15
1
-0
/
+2
|
*
add: ZPU reference designs for zealot
Bert Lange
2011-10-13
21
-0
/
+2853
|
*
change: prettier logifle output (for zealot)
Bert Lange
2011-10-13
1
-3
/
+8
|
*
small ZPU
oharboe
2008-09-23
1
-0
/
+136
|
*
* zpu/hdl/zealot: added small ZPU core, testbenches and FPGA implementation
oharboe
2008-09-21
8
-279
/
+8673
|
*
2008-09-08 Salvador Eduardo Tropea <salvador@inti.gov.ar>
oharboe
2008-09-08
19
-0
/
+11265
* zpu/hdl/zealot: a complete ZPU implementation cleaned up and with a UART.