Commit message (Collapse) | Author | Age | Files | Lines | |
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* | minor fix: reduce simulation warnings at 0 ps | Bert Lange | 2011-10-28 | 1 | -1/+1 |
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* | add: Spartan3 reference design for zealot | Bert Lange | 2011-10-28 | 11 | -0/+1200 |
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* | beautify: break long comment lines | Bert Lange | 2011-10-28 | 3 | -7/+48 |
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* | add: GPIO module to zealot SoC | Bert Lange | 2011-10-25 | 26 | -2187/+2342 |
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* | add: one more ZPU reference design for zealot | Bert Lange | 2011-10-22 | 11 | -0/+1393 |
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* | add: ZPU reference designs for zealot | Bert Lange | 2011-10-13 | 21 | -0/+2853 |
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* | * zpu/hdl/zealot: added small ZPU core, testbenches and FPGA implementation | oharboe | 2008-09-21 | 2 | -0/+232 |
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* | 2008-09-08 Salvador Eduardo Tropea <salvador@inti.gov.ar> | oharboe | 2008-09-08 | 2 | -0/+230 |
* zpu/hdl/zealot: a complete ZPU implementation cleaned up and with a UART. |