| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | minor fix: reduce simulation warnings at 0 ps | Bert Lange | 2011-10-28 | 2 | -3/+3 |
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| * | add: GPIO module to zealot SoC | Bert Lange | 2011-10-25 | 2 | -15/+163 |
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| * | minor fix: to satisfy some synthesis tools | Bert Lange | 2011-10-15 | 1 | -0/+2 |
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| * | change: prettier logifle output (for zealot) | Bert Lange | 2011-10-13 | 1 | -3/+8 |
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| * | 2008-09-08 Salvador Eduardo Tropea <salvador@inti.gov.ar> | oharboe | 2008-09-08 | 7 | -0/+1407 |
| * zpu/hdl/zealot: a complete ZPU implementation cleaned up and with a UART. | |||||
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index : zpu | |
| Raptor Engineering's fork of the Zylin ZPU | Raptor Engineering, LLC |
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