diff options
Diffstat (limited to 'zpu/sw/ecos/repository/hal/zylin/arch')
12 files changed, 2075 insertions, 0 deletions
diff --git a/zpu/sw/ecos/repository/hal/zylin/arch/current/ChangeLog b/zpu/sw/ecos/repository/hal/zylin/arch/current/ChangeLog new file mode 100644 index 0000000..6403c63 --- /dev/null +++ b/zpu/sw/ecos/repository/hal/zylin/arch/current/ChangeLog @@ -0,0 +1,39 @@ +2004-11-05 Øyvind Harboe <oyvind.harboe@zylin.com> + + * First cut of ZYLIN support + + +//=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//=========================================================================== diff --git a/zpu/sw/ecos/repository/hal/zylin/arch/current/cdl/hal_zylin.cdl b/zpu/sw/ecos/repository/hal/zylin/arch/current/cdl/hal_zylin.cdl new file mode 100644 index 0000000..cecc879 --- /dev/null +++ b/zpu/sw/ecos/repository/hal/zylin/arch/current/cdl/hal_zylin.cdl @@ -0,0 +1,108 @@ +# ==================================================================== +# +# hal_zylin.cdl +# +# ZYLIN architectural HAL package configuration data +# +# ==================================================================== +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +# ==================================================================== +######DESCRIPTIONBEGIN#### +# +# Author(s): bartv +# Original data: gthomas +# Contributors: +# Date: 1999-06-13 +# +#####DESCRIPTIONEND#### +# +# ==================================================================== +cdl_package CYGPKG_HAL_ZYLIN { + display "ZYLIN architecture" + parent CYGPKG_HAL + hardware + include_dir cyg/hal + requires !CYGDBG_KERNEL_DEBUG_GDB_THREAD_SUPPORT + define_header hal_zylin.h + description " + The ZYLIN architecture HAL package provides generic + support for this processor architecture. It is also + necessary to select a specific target platform HAL + package." + + compile hal_misc.c context.S vectors.c + + # The "-o file" is a workaround for CR100958 - without it the + # output file would end up in the source directory under CygWin. + # n.b. grep does not behave itself under win32 + make -priority 1 { + zylin.inc : <PACKAGE>/src/hal_mk_defs.c + $(CC) $(CFLAGS) $(INCLUDE_PATH) -Wp,-MD,zylin.tmp -o hal_mk_defs.tmp -S $< + fgrep .equ hal_mk_defs.tmp | sed s/#// > $@ + @echo $@ ": \\" > $(notdir $@).deps + @tail -n +2 zylin.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm zylin.tmp hal_mk_defs.tmp + } + + make { + <PREFIX>/lib/vectors.o : <PACKAGE>/src/vectors.c + $(CC) -Wp,-MD,vectors.tmp $(INCLUDE_PATH) $(CFLAGS) -c -o $@ $< + @echo $@ ": \\" > $(notdir $@).deps + @tail -n +2 vectors.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm vectors.tmp + } + + + make { + <PREFIX>/lib/target.ld: <PACKAGE>/src/zylin.ld + $(CC) -E -P -Wp,-MD,target.tmp -xc $(INCLUDE_PATH) $(CFLAGS) -o $@ $< + @echo $@ ": \\" > $(notdir $@).deps + @tail -n +2 target.tmp >> $(notdir $@).deps + @echo >> $(notdir $@).deps + @rm target.tmp + } + + + cdl_option CYGBLD_LINKER_SCRIPT { + display "Linker script" + flavor data + no_define + calculated { "src/zylin.ld" } + } + +} + +# EOF hal_zylin.cdl diff --git a/zpu/sw/ecos/repository/hal/zylin/arch/current/include/arch.inc b/zpu/sw/ecos/repository/hal/zylin/arch/current/include/arch.inc new file mode 100644 index 0000000..a30819e --- /dev/null +++ b/zpu/sw/ecos/repository/hal/zylin/arch/current/include/arch.inc @@ -0,0 +1,79 @@ +##============================================================================= +## +## arch.inc +## +## ZYLIN architecture assembler header file +## +##============================================================================= +#####ECOSGPLCOPYRIGHTBEGIN#### +## ------------------------------------------- +## This file is part of eCos, the Embedded Configurable Operating System. +## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +## +## eCos is free software; you can redistribute it and/or modify it under +## the terms of the GNU General Public License as published by the Free +## Software Foundation; either version 2 or (at your option) any later version. +## +## eCos is distributed in the hope that it will be useful, but WITHOUT ANY +## WARRANTY; without even the implied warranty of MERCHANTABILITY or +## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +## for more details. +## +## You should have received a copy of the GNU General Public License along +## with eCos; if not, write to the Free Software Foundation, Inc., +## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +## +## As a special exception, if other files instantiate templates or use macros +## or inline functions from this file, or you compile this file and link it +## with other works to produce a work based on this file, this file does not +## by itself cause the resulting work to be covered by the GNU General Public +## License. However the source code for this file must still be made available +## in accordance with section (3) of the GNU General Public License. +## +## This exception does not invalidate any other reasons why a work based on +## this file might be covered by the GNU General Public License. +## +## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +## at http://sources.redhat.com/ecos/ecos-license/ +## ------------------------------------------- +#####ECOSGPLCOPYRIGHTEND#### +##============================================================================= +#######DESCRIPTIONBEGIN#### +## +## Author(s): jskov +## Contributors:jskov +## Date: 2000-11-15 +## Purpose: ZYLIN definitions. +## Description: This file contains various definitions and macros that are +## useful for writing assembly code for the ZYLIN +## It also includes the variant/platform assembly header file. +## Usage: +## #include <cyg/hal/arch.inc> +## ... +## +## +######DESCRIPTIONEND#### +## +##============================================================================= + +#include <cyg/hal/basetype.h> + +##----------------------------------------------------------------------------- +## ZYLIN entry definitions. This allows _ prefixing to change by modifying +## the CYG_LABEL_DEFN macro. + +#define FUNC_START(name) \ + .type CYG_LABEL_DEFN(name),@function; \ + .globl CYG_LABEL_DEFN(name); \ +CYG_LABEL_DEFN(name): + +#define FUNC_END(name) \ + .globl CYG_LABEL_DEFN(name); \ +CYG_LABEL_DEFN(name): + +#define SYM_DEF(name) \ + .globl CYG_LABEL_DEFN(name); \ +CYG_LABEL_DEFN(name): + +#------------------------------------------------------------------------------ +# end of arch.inc diff --git a/zpu/sw/ecos/repository/hal/zylin/arch/current/include/basetype.h b/zpu/sw/ecos/repository/hal/zylin/arch/current/include/basetype.h new file mode 100644 index 0000000..6f2c2c7 --- /dev/null +++ b/zpu/sw/ecos/repository/hal/zylin/arch/current/include/basetype.h @@ -0,0 +1,83 @@ +#ifndef CYGONCE_HAL_BASETYPE_H
+#define CYGONCE_HAL_BASETYPE_H
+
+//=============================================================================
+//
+// basetype.h
+//
+// Standard types for this architecture.
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s): nickg, gthomas
+// Contributors: nickg, gthomas
+// Date: 1998-09-11
+// Purpose: Define architecture base types.
+// Usage: Included by "cyg_type.h", do not use directly
+
+//
+//####DESCRIPTIONEND####
+//
+
+//-----------------------------------------------------------------------------
+// Characterize the architecture
+
+#define CYG_BYTEORDER CYG_MSBFIRST // Big endian
+#define CYG_DOUBLE_BYTEORDER CYG_MSBFIRST // Big? endian
+
+//-----------------------------------------------------------------------------
+// ZYLIN does not usually use labels with underscores.
+
+#define CYG_LABEL_NAME(_name_) _name_
+#define CYG_LABEL_DEFN(_name_) _name_
+
+//-----------------------------------------------------------------------------
+// Override the alignment definitions from cyg_type.h. ZYLIN only allows 4
+// byte alignment whereas the default is 8 byte.
+
+#define CYGARC_ALIGNMENT 4
+#define CYGARC_P2ALIGNMENT 2
+
+//-----------------------------------------------------------------------------
+// Define the standard variable sizes
+
+// The ZYLIN architecture uses the default definitions of the base types,
+// so we do not need to define any here.
+
+//-----------------------------------------------------------------------------
+#endif // CYGONCE_HAL_BASETYPE_H
+// End of basetype.h
diff --git a/zpu/sw/ecos/repository/hal/zylin/arch/current/include/hal_arch.h b/zpu/sw/ecos/repository/hal/zylin/arch/current/include/hal_arch.h new file mode 100644 index 0000000..cd61277 --- /dev/null +++ b/zpu/sw/ecos/repository/hal/zylin/arch/current/include/hal_arch.h @@ -0,0 +1,255 @@ +#ifndef CYGONCE_HAL_ARCH_H
+#define CYGONCE_HAL_ARCH_H
+
+//==========================================================================
+//
+// hal_arch.h
+//
+// Architecture specific abstractions
+//
+//==========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s): nickg, gthomas
+// Contributors: nickg, gthomas
+// Date: 1999-02-20
+// Purpose: Define architecture abstractions
+// Usage: #include <cyg/hal/hal_arch.h>
+
+//
+//####DESCRIPTIONEND####
+//
+//==========================================================================
+
+#include <pkgconf/hal.h> // To decide on stack usage
+#include <cyg/infra/cyg_type.h>
+#include <cyg/hal/plf_io.h>
+#ifdef CYGBLD_HAL_ZYLIN_PLF_ARCH_H
+#include <cyg/hal/plf_arch.h>
+#endif
+
+#ifdef CYGBLD_HAL_ZYLIN_VAR_ARCH_H
+#include <cyg/hal/var_arch.h>
+#endif
+
+
+// It seems that r0-r3,r12 are considered scratch by function calls
+
+typedef struct
+{
+ cyg_uint32 reg[8];
+ cyg_uint32 interrupt;
+ cyg_uint32 pc; // must be last...
+} HAL_SavedRegisters;
+
+//-------------------------------------------------------------------------
+// Exception handling function.
+// This function is defined by the kernel according to this prototype. It is
+// invoked from the HAL to deal with any CPU exceptions that the HAL does
+// not want to deal with itself. It usually invokes the kernel's exception
+// delivery mechanism.
+
+externC void cyg_hal_deliver_exception( CYG_WORD code, CYG_ADDRWORD data );
+
+//-------------------------------------------------------------------------
+// Bit manipulation macros
+
+externC int hal_lsbindex(int);
+externC int hal_msbindex(int);
+
+#define HAL_LSBIT_INDEX(index, mask) index = hal_lsbindex(mask)
+#define HAL_MSBIT_INDEX(index, mask) index = hal_msbindex(mask)
+
+//-------------------------------------------------------------------------
+// Context Initialization
+// Initialize the context of a thread.
+// Arguments:
+// _sparg_ name of variable containing current sp, will be changed to new sp
+// _thread_ thread object address, passed as argument to entry point
+// _entry_ entry point address.
+// _id_ bit pattern used in initializing registers, for debugging.
+
+#define HAL_THREAD_INIT_CONTEXT( _sparg_, _thread_, _entry_, _id_ ) \
+ CYG_MACRO_START \
+ cyg_uint32 *_sp_=(cyg_uint32 *)(((CYG_WORD)_sparg_) &~3); \
+ *--_sp_=(CYG_ADDRWORD)_thread_; \
+ *--_sp_=(CYG_ADDRWORD)0xffffffff; /* dummy return address */ \
+ *--_sp_=(cyg_uint32)(_entry_); /* PC = [initial] entry point */ \
+ *--_sp_= 0; /* interrupt mask */ \
+ *--_sp_= (_id_)|7; \
+ *--_sp_= (_id_)|6; \
+ *--_sp_= (_id_)|5; \
+ *--_sp_= (_id_)|4; \
+ *--_sp_= (_id_)|3; \
+ *--_sp_= (_id_)|2; \
+ *--_sp_= (_id_)|1; \
+ *--_sp_=(_id_)|0; \
+ _sparg_ = (CYG_ADDRWORD)_sp_; \
+ CYG_MACRO_END
+
+//--------------------------------------------------------------------------
+// Context switch macros.
+// The arguments are pointers to locations where the stack pointer
+// of the current thread is to be stored, and from where the sp of the
+// next thread is to be fetched.
+
+externC void hal_thread_switch_context( CYG_ADDRESS to, CYG_ADDRESS from );
+externC void hal_thread_load_context( CYG_ADDRESS to )
+ __attribute__ ((noreturn));
+
+#define HAL_THREAD_SWITCH_CONTEXT(_fspptr_,_tspptr_) \
+ hal_thread_switch_context((CYG_ADDRESS)_tspptr_, \
+ (CYG_ADDRESS)_fspptr_);
+
+#define HAL_THREAD_LOAD_CONTEXT(_tspptr_) \
+ hal_thread_load_context( (CYG_ADDRESS)_tspptr_ );
+
+//--------------------------------------------------------------------------
+// Execution reorder barrier.
+// When optimizing the compiler can reorder code. In multithreaded systems
+// where the order of actions is vital, this can sometimes cause problems.
+// This macro may be inserted into places where reordering should not happen.
+
+#define HAL_REORDER_BARRIER() asm volatile ( "" : : : "memory" )
+
+//--------------------------------------------------------------------------
+// Breakpoint support
+// HAL_BREAKPOINT() is a code sequence that will cause a breakpoint to happen
+// if executed.
+// HAL_BREAKINST is the value of the breakpoint instruction and
+// HAL_BREAKINST_SIZE is its size in bytes.
+
+#define _stringify1(__arg) #__arg
+#define _stringify(__arg) _stringify1(__arg)
+
+#define HAL_BREAKINST_ZYLIN 0
+#define HAL_BREAKINST_ZYLIN_SIZE 1
+
+
+#define HAL_BREAKPOINT(_label_) \
+asm volatile (" .globl " #_label_ ";" \
+ #_label_":" \
+ " .byte " _stringify(HAL_BREAKINST_ZYLIN) \
+ );
+
+//#define HAL_BREAKINST {0xFE, 0xDE, 0xFF, 0xE7}
+#define HAL_BREAKINST HAL_BREAKINST_ZYLIN
+#define HAL_BREAKINST_SIZE HAL_BREAKINST_ZYLIN_SIZE
+#define HAL_BREAKINST_TYPE cyg_uint8
+
+extern cyg_uint32 __zylin_breakinst;
+#define HAL_BREAKINST_ADDR(x) (void*)&__zylin_breakinst)
+
+
+// Translate a stack pointer as saved by the thread context macros above into
+// a pointer to a HAL_SavedRegisters structure.
+#define HAL_THREAD_GET_SAVED_REGISTERS( _sp_, _regs_ ) \
+ (_regs_) = (HAL_SavedRegisters *)(_sp_)
+
+
+
+//--------------------------------------------------------------------------
+// HAL setjmp
+
+#define CYGARC_JMP_BUF_SIZE 16 // Actually 11, but some room left over
+
+typedef cyg_uint32 hal_jmp_buf[CYGARC_JMP_BUF_SIZE];
+
+externC int hal_setjmp(hal_jmp_buf env);
+externC void hal_longjmp(hal_jmp_buf env, int val);
+
+
+//--------------------------------------------------------------------------
+// Idle thread code.
+// This macro is called in the idle thread loop, and gives the HAL the
+// chance to insert code. Typical idle thread behaviour might be to halt the
+// processor. Here we only supply a default fallback if the variant/platform
+// doesn't define anything.
+
+#ifndef HAL_IDLE_THREAD_ACTION
+#define HAL_IDLE_THREAD_ACTION(_count_) CYG_EMPTY_STATEMENT
+#endif
+
+//---------------------------------------------------------------------------
+
+// Minimal and sensible stack sizes: the intention is that applications
+// will use these to provide a stack size in the first instance prior to
+// proper analysis. Idle thread stack should be this big.
+
+// THESE ARE NOT INTENDED TO BE MICROMETRICALLY ACCURATE FIGURES.
+// THEY ARE HOWEVER ENOUGH TO START PROGRAMMING.
+// YOU MUST MAKE YOUR STACKS LARGER IF YOU HAVE LARGE "AUTO" VARIABLES!
+
+// This is not a config option because it should not be adjusted except
+// under "enough rope" sort of disclaimers.
+
+// A minimal, optimized stack frame, rounded up - no autos
+#define CYGNUM_HAL_STACK_FRAME_SIZE (4 * 80)
+
+// Stack needed for a context switch: this is implicit in the estimate for
+// interrupts so not explicitly used below:
+#define CYGNUM_HAL_STACK_CONTEXT_SIZE (4 * 80)
+
+// Interrupt + call to ISR, interrupt_end() and the DSR
+#define CYGNUM_HAL_STACK_INTERRUPT_SIZE \
+ ((4 * 80) + 2 * CYGNUM_HAL_STACK_FRAME_SIZE)
+
+// Space for the maximum number of nested interrupts, plus room to call functions
+#define CYGNUM_HAL_MAX_INTERRUPT_NESTING 16
+
+#if 0
+#define CYGNUM_HAL_STACK_SIZE_MINIMUM
+ (CYGNUM_HAL_MAX_INTERRUPT_NESTING * CYGNUM_HAL_STACK_INTERRUPT_SIZE + \
+ 2 * CYGNUM_HAL_STACK_FRAME_SIZE)
+
+#define CYGNUM_HAL_STACK_SIZE_TYPICAL \
+ (CYGNUM_HAL_STACK_SIZE_MINIMUM + \
+ 16 * CYGNUM_HAL_STACK_FRAME_SIZE)
+#else
+#define CYGNUM_HAL_STACK_SIZE_MINIMUM 16384 // KLUDGE!!! until interrupt stacks can be added
+
+#define CYGNUM_HAL_STACK_SIZE_TYPICAL 32768 // KLUDGE!!! until interrupt stacks can be added
+
+#endif
+
+//--------------------------------------------------------------------------
+// Macros for switching context between two eCos instances (jump from
+// code in ROM to code in RAM or vice versa).
+#define CYGARC_HAL_SAVE_GP()
+#define CYGARC_HAL_RESTORE_GP()
+
+#endif // CYGONCE_HAL_ARCH_H
+// End of hal_arch.h
diff --git a/zpu/sw/ecos/repository/hal/zylin/arch/current/include/hal_intr.h b/zpu/sw/ecos/repository/hal/zylin/arch/current/include/hal_intr.h new file mode 100644 index 0000000..6ec6070 --- /dev/null +++ b/zpu/sw/ecos/repository/hal/zylin/arch/current/include/hal_intr.h @@ -0,0 +1,261 @@ +#ifndef CYGONCE_HAL_INTR_H
+#define CYGONCE_HAL_INTR_H
+
+//==========================================================================
+//
+// hal_intr.h
+//
+// HAL Interrupt and clock support
+//
+//==========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s): nickg, gthomas
+// Contributors: nickg, gthomas,
+// jlzylinour
+// Date: 1999-02-20
+// Purpose: Define Interrupt support
+// Description: The macros defined here provide the HAL APIs for handling
+// interrupts and the clock.
+//
+// Usage: #include <cyg/hal/hal_intr.h>
+// ...
+//
+//
+//####DESCRIPTIONEND####
+//
+//==========================================================================
+
+#include <pkgconf/hal.h>
+
+#include <cyg/infra/cyg_type.h>
+
+// This is to allow a variant to decide that there is no platform-specific
+// interrupts file; and that in turn can be overridden by a platform that
+// refines the variant's ideas.
+#ifdef CYGBLD_HAL_PLF_INTS_H
+# include CYGBLD_HAL_PLF_INTS_H // should include variant data as required
+#else
+# ifdef CYGBLD_HAL_VAR_INTS_H
+# include CYGBLD_HAL_VAR_INTS_H
+# else
+# include <cyg/hal/hal_platform_ints.h> // default less-complex platforms
+# endif
+#endif
+
+// Spurious interrupt (no interrupt source could be found)
+#define CYGNUM_HAL_INTERRUPT_NONE -1
+
+//--------------------------------------------------------------------------
+// ZYLIN exception vectors.
+
+// These vectors correspond to VSRs. These values are the ones to use for
+// HAL_VSR_GET/SET
+
+#define CYGNUM_HAL_VECTOR_RESET 0
+#define CYGNUM_HAL_VECTOR_UNDEF_INSTRUCTION 1
+#define CYGNUM_HAL_VECTOR_MISC 2
+#define CYGNUM_HAL_VECTOR_IRQ 3
+#define CYGNUM_HAL_VECTOR_MEMORY 4
+
+#define CYGNUM_HAL_VSR_MIN 0
+#define CYGNUM_HAL_VSR_MAX 4
+#define CYGNUM_HAL_VSR_COUNT 5
+
+// Exception vectors. These are the values used when passed out to an
+// external exception handler using cyg_hal_deliver_exception()
+
+#define CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION \
+ CYGNUM_HAL_VECTOR_UNDEF_INSTRUCTION
+#define CYGNUM_HAL_EXCEPTION_INTERRUPT \
+ CYGNUM_HAL_VECTOR_SOFTWARE_INTERRUPT
+#define CYGNUM_HAL_EXCEPTION_CODE_ACCESS CYGNUM_HAL_VECTOR_MEMORY
+#define CYGNUM_HAL_EXCEPTION_DATA_ACCESS CYGNUM_HAL_VECTOR_MEMORY
+
+#define CYGNUM_HAL_EXCEPTION_MIN CYGNUM_HAL_VSR_MIN
+#define CYGNUM_HAL_EXCEPTION_MAX CYGNUM_HAL_VSR_MAX
+#define CYGNUM_HAL_EXCEPTION_COUNT (CYGNUM_HAL_EXCEPTION_MAX - \
+ CYGNUM_HAL_EXCEPTION_MIN + 1)
+
+//--------------------------------------------------------------------------
+// Static data used by HAL
+
+// ISR tables
+
+externC CYG_ADDRESS hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
+externC CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
+externC CYG_ADDRESS hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];
+
+// VSR table
+externC CYG_ADDRESS hal_vsr_table[CYGNUM_HAL_VSR_COUNT];
+
+//--------------------------------------------------------------------------
+// Default ISR
+// The #define is used to test whether this routine exists, and to allow
+// code outside the HAL to call it.
+
+externC cyg_uint32 hal_default_isr(cyg_uint32 vector, CYG_ADDRWORD data);
+
+#define HAL_DEFAULT_ISR hal_default_isr
+
+//--------------------------------------------------------------------------
+// Interrupt state storage
+
+typedef cyg_uint32 CYG_INTERRUPT_STATE;
+
+//--------------------------------------------------------------------------
+// Interrupt control macros
+
+externC cyg_uint32 zpu_disable_interrupts();
+externC void zpu_enable_interrupts();
+externC void zpu_restore_interrupts(cyg_uint32);
+externC cyg_uint32 zpu_query_interrupts();
+
+#define HAL_DISABLE_INTERRUPTS(_old_) {_old_=zpu_disable_interrupts();}
+#define HAL_ENABLE_INTERRUPTS() zpu_enable_interrupts()
+#define HAL_RESTORE_INTERRUPTS(_old_) { zpu_restore_interrupts(_old_); }
+#define HAL_QUERY_INTERRUPTS(_old_) { _old_=zpu_query_interrupts(); }
+
+
+//--------------------------------------------------------------------------
+// Vector translation.
+
+#ifndef HAL_TRANSLATE_VECTOR
+#define HAL_TRANSLATE_VECTOR(_vector_,_index_) \
+ (_index_) = (_vector_)
+#endif
+
+//--------------------------------------------------------------------------
+// Interrupt and VSR attachment macros
+
+#define HAL_INTERRUPT_IN_USE( _vector_, _state_) \
+ CYG_MACRO_START \
+ cyg_uint32 _index_; \
+ HAL_TRANSLATE_VECTOR ((_vector_), _index_); \
+ \
+ if( hal_interrupt_handlers[_index_] == (CYG_ADDRESS)hal_default_isr ) \
+ (_state_) = 0; \
+ else \
+ (_state_) = 1; \
+ CYG_MACRO_END
+
+#define HAL_INTERRUPT_ATTACH( _vector_, _isr_, _data_, _object_ ) \
+ CYG_MACRO_START \
+ if( hal_interrupt_handlers[_vector_] == (CYG_ADDRESS)hal_default_isr ) \
+ { \
+ hal_interrupt_handlers[_vector_] = (CYG_ADDRESS)_isr_; \
+ hal_interrupt_data[_vector_] = (CYG_ADDRWORD) _data_; \
+ hal_interrupt_objects[_vector_] = (CYG_ADDRESS)_object_; \
+ } \
+ CYG_MACRO_END
+
+#define HAL_INTERRUPT_DETACH( _vector_, _isr_ ) \
+ CYG_MACRO_START \
+ if( hal_interrupt_handlers[_vector_] == (CYG_ADDRESS)_isr_ ) \
+ { \
+ hal_interrupt_handlers[_vector_] = (CYG_ADDRESS)hal_default_isr; \
+ hal_interrupt_data[_vector_] = 0; \
+ hal_interrupt_objects[_vector_] = 0; \
+ } \
+ CYG_MACRO_END
+
+#define HAL_VSR_GET( _vector_, _pvsr_ ) \
+ *(CYG_ADDRESS *)(_pvsr_) = hal_vsr_table[_vector_];
+
+
+#define HAL_VSR_SET( _vector_, _vsr_, _poldvsr_ ) \
+ CYG_MACRO_START \
+ if( _poldvsr_ != NULL ) \
+ *(CYG_ADDRESS *)_poldvsr_ = hal_vsr_table[_vector_]; \
+ hal_vsr_table[_vector_] = (CYG_ADDRESS)_vsr_; \
+ CYG_MACRO_END
+
+//--------------------------------------------------------------------------
+// Interrupt controller access
+
+externC void hal_interrupt_mask(int);
+externC void hal_interrupt_unmask(int);
+externC void hal_interrupt_acknowledge(int);
+externC void hal_interrupt_configure(int, int, int);
+externC void hal_interrupt_set_level(int, int);
+
+#define HAL_INTERRUPT_MASK( _vector_ ) \
+ hal_interrupt_mask( _vector_ )
+#define HAL_INTERRUPT_UNMASK( _vector_ ) \
+ hal_interrupt_unmask( _vector_ )
+#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) \
+ hal_interrupt_acknowledge( _vector_ )
+#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) \
+ hal_interrupt_configure( _vector_, _level_, _up_ )
+#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) \
+ hal_interrupt_set_level( _vector_, _level_ )
+
+//--------------------------------------------------------------------------
+// Clock control
+
+externC void hal_clock_initialize(cyg_uint32);
+externC void hal_clock_read(cyg_uint32 *);
+externC void hal_clock_reset(cyg_uint32, cyg_uint32);
+
+#define HAL_CLOCK_INITIALIZE( _period_ ) hal_clock_initialize( _period_ )
+#define HAL_CLOCK_RESET( _vec_, _period_ ) hal_clock_reset( _vec_, _period_ )
+#define HAL_CLOCK_READ( _pvalue_ ) hal_clock_read( _pvalue_ )
+#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY
+# ifndef HAL_CLOCK_LATENCY
+# define HAL_CLOCK_LATENCY( _pvalue_ ) HAL_CLOCK_READ( (cyg_uint32 *)_pvalue_ )
+# endif
+#endif
+
+
+#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
+externC void hal_interrupt_stack_call_pending_DSRs(void);
+#define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS() \
+ hal_interrupt_stack_call_pending_DSRs()
+
+// these are offered solely for stack usage testing
+// if they are not defined, then there is no interrupt stack.
+#define HAL_INTERRUPT_STACK_BASE cyg_interrupt_stack_base
+#define HAL_INTERRUPT_STACK_TOP cyg_interrupt_stack
+// use them to declare these extern however you want:
+// extern char HAL_INTERRUPT_STACK_BASE[];
+// extern char HAL_INTERRUPT_STACK_TOP[];
+// is recommended
+#endif
+
+
+//--------------------------------------------------------------------------
+#endif // ifndef CYGONCE_HAL_INTR_H
+// End of hal_intr.h
diff --git a/zpu/sw/ecos/repository/hal/zylin/arch/current/include/hal_io.h b/zpu/sw/ecos/repository/hal/zylin/arch/current/include/hal_io.h new file mode 100644 index 0000000..64ad695 --- /dev/null +++ b/zpu/sw/ecos/repository/hal/zylin/arch/current/include/hal_io.h @@ -0,0 +1,305 @@ +#ifndef CYGONCE_HAL_IO_H
+#define CYGONCE_HAL_IO_H
+
+//=============================================================================
+//
+// hal_io.h
+//
+// HAL device IO register support.
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s): nickg, gthomas
+// Contributors: Fabrice Gautier
+// Date: 1998-09-11
+// Purpose: Define IO register support
+// Description: The macros defined here provide the HAL APIs for handling
+// device IO control registers.
+//
+// Usage:
+// #include <cyg/hal/hal_io.h>
+// ...
+//
+//
+//####DESCRIPTIONEND####
+//
+//=============================================================================
+
+#include <pkgconf/system.h>
+#include <cyg/infra/cyg_type.h>
+
+#include <cyg/hal/basetype.h>
+
+//-----------------------------------------------------------------------------
+// Include plf_io.h for platforms. Either via var_io.h or directly.
+#ifdef CYGBLD_HAL_ZYLIN_VAR_IO_H
+#include <cyg/hal/var_io.h>
+#else
+#include <cyg/hal/plf_io.h>
+#endif
+
+
+//-----------------------------------------------------------------------------
+// IO Register address.
+// This type is for recording the address of an IO register.
+
+typedef volatile CYG_ADDRWORD HAL_IO_REGISTER;
+
+//-----------------------------------------------------------------------------
+// HAL IO macros.
+#ifndef HAL_IO_MACROS_DEFINED
+
+//-----------------------------------------------------------------------------
+// BYTE Register access.
+// Individual and vectorized access to 8 bit registers.
+
+// Little-endian version or big-endian version that doesn't need address munging
+#if (CYG_BYTEORDER == CYG_LSBFIRST) || defined(HAL_IO_MACROS_NO_ADDRESS_MUNGING)
+
+#define HAL_READ_UINT8( _register_, _value_ ) \
+ ((_value_) = *((volatile CYG_BYTE *)(_register_)))
+
+#define HAL_WRITE_UINT8( _register_, _value_ ) \
+ (*((volatile CYG_BYTE *)(_register_)) = (_value_))
+
+#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
+ CYG_MACRO_START \
+ cyg_count32 _i_,_j_; \
+ for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
+ (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_j_]; \
+ CYG_MACRO_END
+
+#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
+ CYG_MACRO_START \
+ cyg_count32 _i_,_j_; \
+ for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
+ ((volatile CYG_BYTE *)(_register_))[_j_] = (_buf_)[_i_]; \
+ CYG_MACRO_END
+
+#define HAL_READ_UINT8_STRING( _register_, _buf_, _count_ ) \
+ CYG_MACRO_START \
+ cyg_count32 _i_; \
+ for( _i_ = 0; _i_ < (_count_); _i_++) \
+ (_buf_)[_i_] = ((volatile CYG_BYTE *)(_register_))[_i_]; \
+ CYG_MACRO_END
+
+#define HAL_WRITE_UINT8_STRING( _register_, _buf_, _count_ ) \
+ CYG_MACRO_START \
+ cyg_count32 _i_; \
+ for( _i_ = 0; _i_ < (_count_); _i_++) \
+ ((volatile CYG_BYTE *)(_register_)) = (_buf_)[_i_]; \
+ CYG_MACRO_END
+
+#else // Big-endian version
+
+#define HAL_READ_UINT8( _register_, _value_ ) \
+ ((_value_) = *((volatile CYG_BYTE *)((CYG_ADDRWORD)(_register_)^3)))
+
+#define HAL_WRITE_UINT8( _register_, _value_ ) \
+ (*((volatile CYG_BYTE *)((CYG_ADDRWORD)(_register_)^3)) = (_value_))
+
+#define HAL_READ_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
+ CYG_MACRO_START \
+ cyg_count32 _i_,_j_; \
+ volatile CYG_BYTE* _r_ = ((CYG_ADDRWORD)(_register_)^3); \
+ for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
+ (_buf_)[_i_] = _r_[_j_]; \
+ CYG_MACRO_END
+
+#define HAL_WRITE_UINT8_VECTOR( _register_, _buf_, _count_, _step_ ) \
+ CYG_MACRO_START \
+ cyg_count32 _i_,_j_; \
+ volatile CYG_BYTE* _r_ = ((CYG_ADDRWORD)(_register_)^3); \
+ for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
+ _r_[_j_] = (_buf_)[_i_]; \
+ CYG_MACRO_END
+
+#define HAL_READ_UINT8_STRING( _register_, _buf_, _count_ ) \
+ CYG_MACRO_START \
+ cyg_count32 _i_; \
+ volatile CYG_BYTE* _r_ = ((CYG_ADDRWORD)(_register_)^3); \
+ for( _i_ = 0; _i_ < (_count_); _i_++; \
+ (_buf_)[_i_] = _r_[_i_]; \
+ CYG_MACRO_END
+
+#define HAL_WRITE_UINT8_STRING( _register_, _buf_, _count_ ) \
+ CYG_MACRO_START \
+ cyg_count32 _i_; \
+ volatile CYG_BYTE* _r_ = ((CYG_ADDRWORD)(_register_)^3); \
+ for( _i_ = 0; _i_ < (_count_); _i_++) \
+ _r_[_i_] = (_buf_)[_i_]; \
+ CYG_MACRO_END
+
+#endif // Big-endian
+
+//-----------------------------------------------------------------------------
+// 16 bit access.
+// Individual and vectorized access to 16 bit registers.
+
+// Little-endian version or big-endian version that doesn't need address munging
+#if (CYG_BYTEORDER == CYG_LSBFIRST) || defined(HAL_IO_MACROS_NO_ADDRESS_MUNGING)
+
+#define HAL_READ_UINT16( _register_, _value_ ) \
+ ((_value_) = *((volatile CYG_WORD16 *)(_register_)))
+
+#define HAL_WRITE_UINT16( _register_, _value_ ) \
+ (*((volatile CYG_WORD16 *)(_register_)) = (_value_))
+
+#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
+ CYG_MACRO_START \
+ cyg_count32 _i_,_j_; \
+ for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
+ (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_j_]; \
+ CYG_MACRO_END
+
+#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
+ CYG_MACRO_START \
+ cyg_count32 _i_,_j_; \
+ for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
+ ((volatile CYG_WORD16 *)(_register_))[_j_] = (_buf_)[_i_]; \
+ CYG_MACRO_END
+
+#define HAL_READ_UINT16_STRING( _register_, _buf_, _count_) \
+ CYG_MACRO_START \
+ cyg_count32 _i_; \
+ for( _i_ = 0; _i_ < (_count_); _i_++) \
+ (_buf_)[_i_] = ((volatile CYG_WORD16 *)(_register_))[_i_]; \
+ CYG_MACRO_END
+
+#define HAL_WRITE_UINT16_STRING( _register_, _buf_, _count_) \
+ CYG_MACRO_START \
+ cyg_count32 _i_; \
+ for( _i_ = 0; _i_ < (_count_); _i_++) \
+ ((volatile CYG_WORD16 *)(_register_))[_i_] = (_buf_)[_i_]; \
+ CYG_MACRO_END
+
+
+#else // Big-endian version
+
+#define HAL_READ_UINT16( _register_, _value_ ) \
+ ((_value_) = *((volatile CYG_WORD16 *)((CYG_ADDRWORD)(_register_)^3)))
+
+#define HAL_WRITE_UINT16( _register_, _value_ ) \
+ (*((volatile CYG_WORD16 *)((CYG_ADDRWORD)(_register_)^3)) = (_value_))
+
+#define HAL_READ_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
+ CYG_MACRO_START \
+ cyg_count32 _i_,_j_; \
+ volatile CYG_WORD16* _r_ = ((CYG_ADDRWORD)(_register_)^3); \
+ for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
+ (_buf_)[_i_] = _r_[_j_]; \
+ CYG_MACRO_END
+
+#define HAL_WRITE_UINT16_VECTOR( _register_, _buf_, _count_, _step_ ) \
+ CYG_MACRO_START \
+ cyg_count32 _i_,_j_; \
+ volatile CYG_WORD16* _r_ = ((CYG_ADDRWORD)(_register_)^3); \
+ for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
+ _r_[_j_] = (_buf_)[_i_]; \
+ CYG_MACRO_END
+
+#define HAL_READ_UINT16_STRING( _register_, _buf_, _count_) \
+ CYG_MACRO_START \
+ cyg_count32 _i_; \
+ volatile CYG_WORD16* _r_ = ((CYG_ADDRWORD)(_register_)^3); \
+ for( _i_ = 0 = 0; _i_ < (_count_); _i_++) \
+ (_buf_)[_i_] = _r_[_i_]; \
+ CYG_MACRO_END
+
+#define HAL_WRITE_UINT16_STRING( _register_, _buf_, _count_) \
+ CYG_MACRO_START \
+ cyg_count32 _i_; \
+ volatile CYG_WORD16* _r_ = ((CYG_ADDRWORD)(_register_)^3); \
+ for( _i_ = 0 = 0; _i_ < (_count_); _i_++) \
+ _r_[_i_] = (_buf_)[_i_]; \
+ CYG_MACRO_END
+
+
+#endif // Big-endian
+
+//-----------------------------------------------------------------------------
+// 32 bit access.
+// Individual and vectorized access to 32 bit registers.
+
+// Note: same macros for little- and big-endian systems.
+
+#define HAL_READ_UINT32( _register_, _value_ ) \
+ ((_value_) = *((volatile CYG_WORD32 *)(_register_)))
+
+#define HAL_WRITE_UINT32( _register_, _value_ ) \
+ (*((volatile CYG_WORD32 *)(_register_)) = (_value_))
+
+#define HAL_READ_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
+ CYG_MACRO_START \
+ cyg_count32 _i_,_j_; \
+ for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
+ (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_j_]; \
+ CYG_MACRO_END
+
+#define HAL_WRITE_UINT32_VECTOR( _register_, _buf_, _count_, _step_ ) \
+ CYG_MACRO_START \
+ cyg_count32 _i_,_j_; \
+ for( _i_ = 0, _j_ = 0; _i_ < (_count_); _i_++, _j_ += (_step_)) \
+ ((volatile CYG_WORD32 *)(_register_))[_j_] = (_buf_)[_i_]; \
+ CYG_MACRO_END
+
+#define HAL_READ_UINT32_STRING( _register_, _buf_, _count_) \
+ CYG_MACRO_START \
+ cyg_count32 _i_; \
+ for( _i_ = 0; _i_ < (_count_); _i_++) \
+ (_buf_)[_i_] = ((volatile CYG_WORD32 *)(_register_))[_i_]; \
+ CYG_MACRO_END
+
+#define HAL_WRITE_UINT32_STRING( _register_, _buf_, _count_) \
+ CYG_MACRO_START \
+ cyg_count32 _i_; \
+ for( _i_ = 0; _i_ < (_count_); _i_++) \
+ ((volatile CYG_WORD32 *)(_register_))[_i_] = (_buf_)[_i_]; \
+ CYG_MACRO_END
+
+
+#define HAL_IO_MACROS_DEFINED
+
+#endif // !HAL_IO_MACROS_DEFINED
+
+// Enforce a flow "barrier" to prevent optimizing compiler from reordering
+// operations.
+#define HAL_IO_BARRIER()
+
+//-----------------------------------------------------------------------------
+#endif // ifndef CYGONCE_HAL_IO_H
+// End of hal_io.h
diff --git a/zpu/sw/ecos/repository/hal/zylin/arch/current/src/context.S b/zpu/sw/ecos/repository/hal/zylin/arch/current/src/context.S new file mode 100644 index 0000000..6b0b833 --- /dev/null +++ b/zpu/sw/ecos/repository/hal/zylin/arch/current/src/context.S @@ -0,0 +1,324 @@ +// #=========================================================================== +// # +// # context.S +// # +// # ZYLIN context switch code +// # +// #=========================================================================== +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +// #=========================================================================== +// ######DESCRIPTIONBEGIN#### +// # +// # Author(s): nickg, gthomas +// # Contributors: nickg, gthomas +// # Date: 1998-09-15 +// # Purpose: ZYLIN context switch code +// # Description: This file contains implementations of the thread context +// # switch routines. It also contains the longjmp() and setjmp() +// # routines. +// # +// #####DESCRIPTIONEND#### +// # +// #=========================================================================== + +#include <pkgconf/hal.h> +#ifdef CYGPKG_KERNEL // no CDL yet +#include <pkgconf/kernel.h> +#else +# undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT +# undef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK +#endif + + + + +#include "zylin.inc" + + .text + + +;; By using a macro, we get multiple breakpoint sites + .macro LOAD_STATE + popsp + ; stack pointer now points to beginning of HAL_SavedRegisters + ; we now pop the state of the CPU + + ; this will restore r0-r3 + im 0 + store + im 4 + store + im 8 + store + im 12 + store + im 16 + store + im 20 + store + im 24 + store + im 28 + store + + ;; restore interrupts + im INTERRUPT_MASK + load + store + + + .endm + + +// ---------------------------------------------------------------------------- +// hal_thread_switch_context +// Switch thread contexts + + + .globl hal_thread_switch_context +hal_thread_switch_context: + + ;; save interrupt state + im INTERRUPT_MASK + load + load + + ; store current state on stack + im 28 + load + im 24 + load + im 20 + load + im 16 + load + im 12 + load + im 8 + load + im 4 + load + im 0 + load + + + ;; store pointer to SP in "from" pointer + pushsp + pushsp + im 8+8*4+4+4 + add + load + store + + ;; put pointer to '*to' on stack + pushsp + im 4+8*4+4 + add + load + load + + LOAD_STATE + + poppc ; voila! jump to saved pc + + + + +// ---------------------------------------------------------------------------- +// hal_thread_load_context +// Load thread context + + .globl hal_thread_load_context +hal_thread_load_context: + pushsp + im 4 + add + load + load ; pointer to HAL_SavedRegisters on stack + +load_state_internal: + LOAD_STATE + + poppc ; voila! jump to saved pc + +// ---------------------------------------------------------------------------- +// HAL longjmp, setjmp implementations + + .globl hal_setjmp +hal_setjmp: + .byte 0 + + + .globl hal_longjmp + hal_longjmp: + .byte 0 + +// ---------------------------------------------------------------------------- +// end of context.S + +#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK + + ; push 1 onto stack if we're already switched, 0 otherwise + .macro check_thread_stack + pushsp ; 0xda68 + im __interrupt_stack ; 0x241a + lessthan ; => 1 + im __interrupt_stack_base + pushsp + lessthan + or + + .endm + + ; push 1 onto stack if we're already switched, 0 otherwise + .macro switch_stack + pushsp + im __interrupt_stack-4 + store ; saved stack pointer on interrupt stack. + + im __interrupt_stack-4 + popsp + ; we're now on the interrupt stack + + .endm + + .macro switch_stack_back + ; return to thread stack + popsp + .endm + +_zpu_invoke_zpu_interrupt_stack: + im hal_IRQ_handler + call + im 0 + load ; return value - source + + im _zpu_interrupt_stack + call + im 0 + load ; return value - result + + ; we've got source and ISR result args on the stack + im _zpu_interrupt_thread + call + storesp 0 ; destroy args + storesp 0 + + poppc + + +// switch to interrupt stack, invoke interrupt handler, switch back to original stack, enable interrupts + .globl _zpu_interrupt +_zpu_interrupt: + ; disable interrupts, we don't nest + im 1 + nop + im INTERRUPT_MASK + load + store + + ; if we're interrupting the DSRs then + ; we're already on the interrupt stack + check_thread_stack + + impcrel _already_switched + eqbranch + +_zpu_interrupt_switch_stack: + switch_stack + + im _zpu_invoke_zpu_interrupt_stack + call + + switch_stack_back + + im .already_switched2 + poppc + +_already_switched: + im _zpu_invoke_zpu_interrupt_stack + call + +.already_switched2: + ; turn on interrupts and run on thread stack. + im 0 + nop + im INTERRUPT_MASK + load + store ; unmask interrupts + + ; we're now running on thread stack + + im _zpu_interrupt_thread + call + + poppc + + .globl hal_interrupt_stack_call_pending_DSRs +hal_interrupt_stack_call_pending_DSRs: + ; the scheduler is not running, so only interrupts + ; could have switched stacks at this point and + ; since we're running, interrupts are not + switch_stack + + im cyg_interrupt_call_pending_DSRs + call + + switch_stack_back + + ; back on thread stack + poppc + + + + +// Runtime stack used during all interrupt processing +#ifndef CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE +#define CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE 4096 +#endif + .bss + .balign 4,0 + .global cyg_interrupt_stack_base +cyg_interrupt_stack_base: +__interrupt_stack_base: + .rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE + .byte 0 + .endr + .balign 4,0 + .global cyg_interrupt_stack +cyg_interrupt_stack: +__interrupt_stack: +#endif + + diff --git a/zpu/sw/ecos/repository/hal/zylin/arch/current/src/hal_misc.c b/zpu/sw/ecos/repository/hal/zylin/arch/current/src/hal_misc.c new file mode 100644 index 0000000..eea2465 --- /dev/null +++ b/zpu/sw/ecos/repository/hal/zylin/arch/current/src/hal_misc.c @@ -0,0 +1,177 @@ +/*==========================================================================
+//
+// hal_misc.c
+//
+// HAL miscellaneous functions
+//
+//==========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s): nickg, gthomas
+// Contributors: nickg, gthomas
+// Date: 1999-02-20
+// Purpose: HAL miscellaneous functions
+// Description: This file contains miscellaneous functions provided by the
+// HAL.
+//
+//####DESCRIPTIONEND####
+//
+//=========================================================================*/
+
+#include <pkgconf/hal.h>
+#include <pkgconf/hal_zylin.h>
+#ifdef CYGPKG_KERNEL
+#include <pkgconf/kernel.h>
+#endif
+#ifdef CYGPKG_CYGMON
+#include <pkgconf/cygmon.h>
+#endif
+
+#include <cyg/infra/cyg_type.h>
+#include <cyg/infra/cyg_trac.h> // tracing macros
+#include <cyg/infra/cyg_ass.h> // assertion macros
+
+#include <cyg/hal/hal_arch.h> // HAL header
+#include <cyg/hal/hal_intr.h> // HAL header
+
+#include <cyg/hal/var_io.h>
+#include <cyg/hal/hal_io.h>
+
+externC void diag_printf(const char *fmt, ...);
+
+/*------------------------------------------------------------------------*/
+/* First level C exception handler. */
+
+
+/*------------------------------------------------------------------------*/
+/* C++ support - run initial constructors */
+
+#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
+cyg_bool cyg_hal_stop_constructors;
+#endif
+
+typedef void (*pfunc) (void);
+extern pfunc __CTOR_LIST__[];
+extern pfunc __CTOR_END__[];
+
+void
+cyg_hal_invoke_constructors (void)
+{
+#ifdef CYGSEM_HAL_STOP_CONSTRUCTORS_ON_FLAG
+ static pfunc *p = &__CTOR_END__[-1];
+
+ cyg_hal_stop_constructors = 0;
+ for (; p >= __CTOR_LIST__; p--) {
+ (*p) ();
+ if (cyg_hal_stop_constructors) {
+ p--;
+ break;
+ }
+ }
+#else
+ pfunc *p;
+
+ for (p = &__CTOR_END__[-1]; p >= __CTOR_LIST__; p--)
+ (*p) ();
+#endif
+}
+
+
+/*-------------------------------------------------------------------------*/
+/* Misc functions */
+
+int
+hal_lsbindex(int mask)
+{
+ int i;
+ for (i = 0; i < 32; i++) {
+ if (mask & (1<<i)) return (i);
+ }
+ return (-1);
+}
+
+int
+hal_msbindex(int mask)
+{
+ int i;
+ for (i = 31; i >= 0; i--) {
+ if (mask & (1<<i)) return (i);
+ }
+ return (-1);
+}
+
+/*------------------------------------------------------------------------*/
+/* Architecture default ISR */
+
+externC cyg_uint32
+hal_arch_default_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data)
+{
+ CYG_TRACE1(true, "Interrupt: %d", vector);
+
+ CYG_FAIL("Spurious Interrupt!!!");
+ return 0;
+}
+
+extern volatile int *INTERRUPT_MASK;
+
+cyg_uint32 zpu_disable_interrupts()
+{
+ /* NOTE! We disable interrupts before flipping the cached state */
+ cyg_uint32 t=*INTERRUPT_MASK;
+ *INTERRUPT_MASK=1;
+ return t;
+}
+
+void zpu_enable_interrupts()
+{
+ *INTERRUPT_MASK=0;
+}
+
+void zpu_restore_interrupts(cyg_uint32 t)
+{
+ if (t==0)
+ zpu_enable_interrupts();
+ else
+ zpu_disable_interrupts();
+}
+
+externC cyg_uint32 zpu_query_interrupts()
+{
+ return *INTERRUPT_MASK;
+}
+
+/*------------------------------------------------------------------------*/
+// EOF hal_misc.c
diff --git a/zpu/sw/ecos/repository/hal/zylin/arch/current/src/hal_mk_defs.c b/zpu/sw/ecos/repository/hal/zylin/arch/current/src/hal_mk_defs.c new file mode 100644 index 0000000..734ce65 --- /dev/null +++ b/zpu/sw/ecos/repository/hal/zylin/arch/current/src/hal_mk_defs.c @@ -0,0 +1,102 @@ +/*==========================================================================
+//
+// hal_mk_defs.c
+//
+// HAL (architecture) "make defs" program
+//
+//==========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s): gthomas
+// Contributors: gthomas
+// Date: 1999-02-20
+// Purpose: ZYLIN architecture dependent definition generator
+// Description: This file contains code that can be compiled by the target
+// compiler and used to generate machine specific definitions
+// suitable for use in assembly code.
+//
+//####DESCRIPTIONEND####
+//
+//========================================================================*/
+
+#include <pkgconf/hal.h>
+
+#include <cyg/hal/hal_arch.h> // HAL header
+#include <cyg/hal/hal_intr.h> // HAL header
+#ifdef CYGPKG_KERNEL
+# include <pkgconf/kernel.h>
+# include <cyg/kernel/instrmnt.h>
+#endif
+#include <cyg/hal/hal_if.h>
+
+/*
+ * This program is used to generate definitions needed by
+ * assembly language modules.
+ *
+ * This technique was first used in the OSF Mach kernel code:
+ * generate asm statements containing #defines,
+ * compile this file to assembler, and then extract the
+ * #defines from the assembly-language output.
+ */
+
+#define DEFINE(sym, val) \
+ asm volatile("\n\t.equ\t" #sym ",%0" : : "i" (val))
+
+int
+main(void)
+{
+ DEFINE(CYGNUM_HAL_ISR_COUNT, CYGNUM_HAL_ISR_COUNT);
+ DEFINE(CYGNUM_HAL_VSR_COUNT, CYGNUM_HAL_VSR_COUNT);
+ DEFINE(CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION,
+ CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION);
+ DEFINE(CYGNUM_HAL_EXCEPTION_CODE_ACCESS,
+ CYGNUM_HAL_EXCEPTION_CODE_ACCESS);
+ DEFINE(CYGNUM_HAL_EXCEPTION_DATA_ACCESS,
+ CYGNUM_HAL_EXCEPTION_DATA_ACCESS);
+ DEFINE(CYGNUM_HAL_VECTOR_IRQ, CYGNUM_HAL_VECTOR_IRQ);
+#ifdef CYGPKG_KERNEL
+ DEFINE(RAISE_INTR, CYG_INSTRUMENT_CLASS_INTR|CYG_INSTRUMENT_EVENT_INTR_RAISE);
+#endif
+#if defined(CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT)
+ DEFINE(CYGNUM_CALL_IF_TABLE_SIZE, CYGNUM_CALL_IF_TABLE_SIZE);
+#endif
+ DEFINE(CYGNUM_HAL_INTERRUPT_NONE, CYGNUM_HAL_INTERRUPT_NONE);
+ return 0;
+}
+
+
+/*------------------------------------------------------------------------*/
+// EOF hal_mk_defs.c
diff --git a/zpu/sw/ecos/repository/hal/zylin/arch/current/src/vectors.c b/zpu/sw/ecos/repository/hal/zylin/arch/current/src/vectors.c new file mode 100644 index 0000000..b254a85 --- /dev/null +++ b/zpu/sw/ecos/repository/hal/zylin/arch/current/src/vectors.c @@ -0,0 +1,116 @@ +#include <pkgconf/hal.h>
+#include <pkgconf/hal_zylin.h>
+#ifdef CYGPKG_KERNEL
+#include <pkgconf/kernel.h>
+#endif
+#ifdef CYGPKG_CYGMON
+#include <pkgconf/cygmon.h>
+#endif
+
+#include <cyg/infra/cyg_type.h>
+#include <cyg/infra/cyg_trac.h> // tracing macros
+#include <cyg/infra/cyg_ass.h> // assertion macros
+
+#include <cyg/hal/hal_arch.h> // HAL header
+#include <cyg/hal/hal_intr.h> // HAL header
+#include <string.h>
+#include <cyg/hal/hal_arch.h> // Register state info
+
+extern char __bss_start[];
+extern char __bss_end[];
+
+externC void cyg_hal_invoke_constructors (void);
+externC void cyg_start (void);
+externC void hal_hardware_init (void);
+externC void _initIO();
+
+void _premain(void)
+{
+ // clear BSS
+ memset(__bss_start, 0, __bss_end-__bss_start);
+
+ _initIO();
+
+ hal_hardware_init();
+
+ cyg_hal_invoke_constructors();
+
+ cyg_start();
+
+ __asm("breakpoint"); // stop debugger/sim here for now
+// for (;;); // hang forever
+}
+
+CYG_ADDRWORD hal_vsr_table[CYGNUM_HAL_VSR_COUNT];
+CYG_ADDRWORD hal_interrupt_handlers[CYGNUM_HAL_ISR_COUNT];
+CYG_ADDRWORD hal_interrupt_data[CYGNUM_HAL_ISR_COUNT];
+CYG_ADDRWORD hal_interrupt_objects[CYGNUM_HAL_ISR_COUNT];
+
+externC cyg_ucount32 cyg_scheduler_sched_lock;
+externC cyg_uint32 hal_IRQ_handler();
+
+externC void interrupt_end(
+ cyg_uint32 isr_ret,
+ CYG_ADDRWORD intr,
+ HAL_SavedRegisters *ctx
+ );
+
+
+#ifndef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
+
+
+void _zpu_interrupt(void)
+{
+ cyg_uint32 source;
+#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
+ cyg_scheduler_sched_lock++;
+#endif
+ /* we don't support reentrant interrupts, so we disable interrupts here. */
+ cyg_uint32 t;
+ HAL_DISABLE_INTERRUPTS(t);
+
+ source=hal_IRQ_handler();
+ if (source!=CYGNUM_HAL_INTERRUPT_NONE)
+ {
+
+ cyg_uint32 result;
+
+ result=((cyg_uint32 (*)(cyg_uint32, CYG_ADDRWORD))hal_interrupt_handlers[source])(source, hal_interrupt_data[source]);
+ /* restore interrupts again. */
+ HAL_ENABLE_INTERRUPTS();
+ /* Interrupts must be enabled here as the scheduler is invoked here. */
+ interrupt_end(result, hal_interrupt_objects[source], NULL);
+ } else
+ {
+ /* restore interrupts again. */
+ HAL_ENABLE_INTERRUPTS();
+ }
+}
+#else
+/* low-level interrupt handling routine */
+cyg_uint32 _zpu_interrupt_stack(cyg_uint32 source)
+{
+#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
+ cyg_scheduler_sched_lock++;
+#endif
+ /* we don't support reentrant interrupts, so we disable interrupts here. */
+ cyg_uint32 t;
+ HAL_DISABLE_INTERRUPTS(t);
+
+ cyg_uint32 result=0;
+ if (source!=CYGNUM_HAL_INTERRUPT_NONE)
+ {
+ cyg_uint32 result;
+ result=((cyg_uint32 (*)(cyg_uint32, CYG_ADDRWORD))hal_interrupt_handlers[source])(source, hal_interrupt_data[source]);
+ }
+ return result;
+}
+void _zpu_interrupt_thread(cyg_uint32 source, cyg_uint32 result)
+{
+ if (source!=CYGNUM_HAL_INTERRUPT_NONE)
+ {
+ /* Interrupts must be enabled here as the scheduler is invoked here. */
+ interrupt_end(result, hal_interrupt_objects[source], NULL);
+ }
+}
+#endif
diff --git a/zpu/sw/ecos/repository/hal/zylin/arch/current/src/zylin.ld b/zpu/sw/ecos/repository/hal/zylin/arch/current/src/zylin.ld new file mode 100644 index 0000000..eef2cd7 --- /dev/null +++ b/zpu/sw/ecos/repository/hal/zylin/arch/current/src/zylin.ld @@ -0,0 +1,226 @@ +//============================================================================= +// +// MLT linker script for ZYLIN +// +//============================================================================= +//####ECOSGPLCOPYRIGHTBEGIN#### +// ------------------------------------------- +// This file is part of eCos, the Embedded Configurable Operating System. +// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. +// +// eCos is free software; you can redistribute it and/or modify it under +// the terms of the GNU General Public License as published by the Free +// Software Foundation; either version 2 or (at your option) any later version. +// +// eCos is distributed in the hope that it will be useful, but WITHOUT ANY +// WARRANTY; without even the implied warranty of MERCHANTABILITY or +// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +// for more details. +// +// You should have received a copy of the GNU General Public License along +// with eCos; if not, write to the Free Software Foundation, Inc., +// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. +// +// As a special exception, if other files instantiate templates or use macros +// or inline functions from this file, or you compile this file and link it +// with other works to produce a work based on this file, this file does not +// by itself cause the resulting work to be covered by the GNU General Public +// License. However the source code for this file must still be made available +// in accordance with section (3) of the GNU General Public License. +// +// This exception does not invalidate any other reasons why a work based on +// this file might be covered by the GNU General Public License. +// +// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc. +// at http://sources.redhat.com/ecos/ecos-license/ +// ------------------------------------------- +//####ECOSGPLCOPYRIGHTEND#### +//============================================================================= + +#include <pkgconf/system.h> + +STARTUP(crt0.o) +ENTRY(_start) +INPUT(crt_io.o) +INPUT(extras.o) +INPUT(vectors.o) +GROUP(libtarget.a libgcc.a libsupc++.a) + +// Keep RODATA in separate sections. +#define MERGE_IN_RODATA + +#define ALIGN_LMA 4 +#define FOLLOWING(_section_) AT ((LOADADDR (_section_) + SIZEOF (_section_) + ALIGN_LMA - 1) & ~ (ALIGN_LMA - 1)) +#define LMA_EQ_VMA +#define FORCE_OUTPUT . = . + +#define SECTIONS_BEGIN + +#define SECTION_fixed_vectors(_region_, _vma_, _lma_) \ + .fixed_vectors _vma_ : _lma_ \ + { FORCE_OUTPUT; KEEP (*(.fixed_vectors)) } \ + > _region_ + +#define SECTION_rom_vectors(_region_, _vma_, _lma_) \ + .rom_vectors _vma_ : _lma_ \ + { __rom_vectors_vma = ABSOLUTE(.); \ + FORCE_OUTPUT; KEEP (*(.vectors)) } \ + > _region_ \ + __rom_vectors_lma = LOADADDR(.rom_vectors); + +#define SECTION_text(_region_, _vma_, _lma_) \ + .text _vma_ : _lma_ \ + { _stext = ABSOLUTE(.); \ + PROVIDE (__stext = ABSOLUTE(.)); \ + *(.text*) *(.gnu.warning) *(.gnu.linkonce.t.*) *(.init) \ + *(.glue_7) *(.glue_7t) \ + } > _region_ \ + _etext = .; PROVIDE (__etext = .); + +#define SECTION_fini(_region_, _vma_, _lma_) \ + .fini _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fini) } \ + > _region_ + +#define SECTION_rodata(_region_, _vma_, _lma_) \ + .rodata _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata*) *(.gnu.linkonce.r.*) } \ + > _region_ + +#define SECTION_rodata1(_region_, _vma_, _lma_) \ + .rodata1 _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.rodata1) } \ + > _region_ + +#define SECTION_fixup(_region_, _vma_, _lma_) \ + .fixup _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.fixup) } \ + > _region_ + +#define SECTION_gcc_except_table(_region_, _vma_, _lma_) \ + .gcc_except_table _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.gcc_except_table) } \ + > _region_ + +#define SECTION_eh_frame(_region_, _vma_, _lma_) \ + .eh_frame _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; __EH_FRAME_BEGIN__ = .; \ + KEEP(*(.eh_frame)) \ + __FRAME_END__ = .; \ + . = . + 8; \ + } > _region_ = 0 + +#define SECTION_RELOCS(_region_, _vma_, _lma_) \ + .rel.text : \ + { \ + *(.rel.text) \ + *(.rel.text.*) \ + *(.rel.gnu.linkonce.t*) \ + } > _region_ \ + .rela.text : \ + { \ + *(.rela.text) \ + *(.rela.text.*) \ + *(.rela.gnu.linkonce.t*) \ + } > _region_ \ + .rel.data : \ + { \ + *(.rel.data) \ + *(.rel.data.*) \ + *(.rel.gnu.linkonce.d*) \ + } > _region_ \ + .rela.data : \ + { \ + *(.rela.data) \ + *(.rela.data.*) \ + *(.rela.gnu.linkonce.d*) \ + } > _region_ \ + .rel.rodata : \ + { \ + *(.rel.rodata) \ + *(.rel.rodata.*) \ + *(.rel.gnu.linkonce.r*) \ + } > _region_ \ + .rela.rodata : \ + { \ + *(.rela.rodata) \ + *(.rela.rodata.*) \ + *(.rela.gnu.linkonce.r*) \ + } > _region_ \ + .rel.got : { *(.rel.got) } > _region_ \ + .rela.got : { *(.rela.got) } > _region_ \ + .rel.ctors : { *(.rel.ctors) } > _region_ \ + .rela.ctors : { *(.rela.ctors) } > _region_ \ + .rel.dtors : { *(.rel.dtors) } > _region_ \ + .rela.dtors : { *(.rela.dtors) } > _region_ \ + .rel.init : { *(.rel.init) } > _region_ \ + .rela.init : { *(.rela.init) } > _region_ \ + .rel.fini : { *(.rel.fini) } > _region_ \ + .rela.fini : { *(.rela.fini) } > _region_ \ + .rel.bss : { *(.rel.bss) } > _region_ \ + .rela.bss : { *(.rela.bss) } > _region_ \ + .rel.plt : { *(.rel.plt) } > _region_ \ + .rela.plt : { *(.rela.plt) } > _region_ \ + .rel.dyn : { *(.rel.dyn) } > _region_ + +#define SECTION_got(_region_, _vma_, _lma_) \ + .got _vma_ : _lma_ \ + { \ + FORCE_OUTPUT; *(.got.plt) *(.got) \ + _GOT1_START_ = ABSOLUTE (.); *(.got1) _GOT1_END_ = ABSOLUTE (.); \ + _GOT2_START_ = ABSOLUTE (.); *(.got2) _GOT2_END_ = ABSOLUTE (.); \ + } > _region_ + +#define SECTION_mmu_tables(_region_, _vma_, _lma_) \ + .mmu_tables _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.mmu_tables) } \ + > _region_ + +#define SECTION_sram(_region_, _vma_, _lma_) \ + .sram _vma_ : _lma_ \ + { FORCE_OUTPUT; *(.sram*) } \ + > _region_ + +#define SECTION_data(_region_, _vma_, _lma_) \ + .data _vma_ : _lma_ \ + { __ram_data_start = ABSOLUTE (.); \ + *(.data*) *(.data1) *(.gnu.linkonce.d.*) MERGE_IN_RODATA \ + . = ALIGN (4); \ + KEEP(*( SORT (.ecos.table.*))) ; \ + . = ALIGN (4); \ + __CTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.ctors*))) __CTOR_END__ = ABSOLUTE (.); \ + __DTOR_LIST__ = ABSOLUTE (.); KEEP (*(SORT (.dtors*))) __DTOR_END__ = ABSOLUTE (.); \ + *(.dynamic) *(.sdata*) *(.gnu.linkonce.s.*) \ + . = ALIGN (4); *(.2ram.*) } \ + > _region_ \ + __rom_data_start = LOADADDR (.data); \ + __ram_data_end = .; PROVIDE (__ram_data_end = .); _edata = .; PROVIDE (edata = .); \ + PROVIDE (__rom_data_end = LOADADDR (.data) + SIZEOF(.data)); + +#define SECTION_bss(_region_, _vma_, _lma_) \ + .bss _vma_ : _lma_ \ + { __bss_start = ABSOLUTE (.); \ + *(.scommon) *(.dynsbss) *(.sbss*) *(.gnu.linkonce.sb.*) \ + *(.dynbss) *(.bss*) *(.gnu.linkonce.b.*) *(COMMON) \ + __bss_end = ABSOLUTE (.); } \ + > _region_ + +// Some versions of gcc define "zpu" which causes problems with .note.arm.ident +#undef zpu +#define SECTIONS_END . = ALIGN(4); _end = .; PROVIDE (end = .); \ + /* Debug information */ \ + .debug_aranges 0 : { *(.debug_aranges) } \ + .debug_pubnames 0 : { *(.debug_pubnames) } \ + .debug_info 0 : { *(.debug_info) } \ + .debug_abbrev 0 : { *(.debug_abbrev) } \ + .debug_line 0 : { *(.debug_line) } \ + .debug_frame 0 : { *(.debug_frame) } \ + .debug_str 0 : { *(.debug_str) } \ + .debug_loc 0 : { *(.debug_loc) } \ + .debug_macinfo 0 : { *(.debug_macinfo) } \ + .note.gnu.zpu.ident 0 : { KEEP (*(.note.gnu.zpu.ident)) } + + +#include <pkgconf/hal_zylin.h> +#include CYGHWR_MEMORY_LAYOUT_LDI |
