summaryrefslogtreecommitdiffstats
path: root/zpu/hdl/zpu4/dummyfpgalib/ddrsdram/simscripts/ddr_tb.do
diff options
context:
space:
mode:
Diffstat (limited to 'zpu/hdl/zpu4/dummyfpgalib/ddrsdram/simscripts/ddr_tb.do')
-rw-r--r--zpu/hdl/zpu4/dummyfpgalib/ddrsdram/simscripts/ddr_tb.do17
1 files changed, 17 insertions, 0 deletions
diff --git a/zpu/hdl/zpu4/dummyfpgalib/ddrsdram/simscripts/ddr_tb.do b/zpu/hdl/zpu4/dummyfpgalib/ddrsdram/simscripts/ddr_tb.do
new file mode 100644
index 0000000..d2c22cf
--- /dev/null
+++ b/zpu/hdl/zpu4/dummyfpgalib/ddrsdram/simscripts/ddr_tb.do
@@ -0,0 +1,17 @@
+vlib zylin
+vcom -93 -explicit -work zylin ../ddrsdram/src/ddr_pkg.vhd
+vcom -93 -explicit -work zylin ../ddrsdram/src/ddr_top.vhd
+vcom -93 -explicit -work zylin ../ddrsdram/src/mt46v16m16.vhd
+vcom -93 -explicit -work zylin ../ddrsdram/src/ddr_tb.vhd
+vlib work
+vsim -t 1ps zylin.ddr_tb
+view wave
+view signals
+radix hex
+add wave *
+add wave sim:/ddr_tb/ddr_ctrl/*
+force -freeze sim:/ddr_tb/areset 1 0
+run 10 ns
+force -freeze sim:/ddr_tb/areset 0 0
+when sim:/ddr_tb/break_out stop
+run 10 ms \ No newline at end of file
OpenPOWER on IntegriCloud