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-rw-r--r--zpu/hdl/zealot/devices/phi_io.vhdl4
-rw-r--r--zpu/hdl/zealot/devices/timer.vhdl2
-rw-r--r--zpu/hdl/zealot/fpga/altium-livedesign-xc3s1000/top.vhd2
-rw-r--r--zpu/hdl/zealot/zpu_small.vhdl8
4 files changed, 8 insertions, 8 deletions
diff --git a/zpu/hdl/zealot/devices/phi_io.vhdl b/zpu/hdl/zealot/devices/phi_io.vhdl
index 71e881c..6e40d1d 100644
--- a/zpu/hdl/zealot/devices/phi_io.vhdl
+++ b/zpu/hdl/zealot/devices/phi_io.vhdl
@@ -135,7 +135,7 @@ begin
data_o => timer_read);
busy_o <= we_i or re_i;
- is_timer <= '1' when addr_i=CNT_1 or addr_i=CNT_2 else '0'; -- 0x80A0014/8
+ is_timer <= '1' when to_01(addr_i)=CNT_1 or to_01(addr_i)=CNT_2 else '0'; -- 0x80A0014/8
timer_we <= we_i and is_timer;
----------
@@ -186,7 +186,7 @@ begin
port_out => gpio_out, -- : std_logic_vector(31 downto 0);
port_dir => gpio_dir -- : std_logic_vector(31 downto 0);
);
- is_gpio <= '1' when addr_i = IO_DATA or addr_i = IO_DIR else '0'; -- 0x80A0004/8
+ is_gpio <= '1' when to_01(addr_i) = IO_DATA or to_01(addr_i) = IO_DIR else '0'; -- 0x80A0004/8
gpio_we <= we_i and is_gpio;
diff --git a/zpu/hdl/zealot/devices/timer.vhdl b/zpu/hdl/zealot/devices/timer.vhdl
index f485e4d..389868c 100644
--- a/zpu/hdl/zealot/devices/timer.vhdl
+++ b/zpu/hdl/zealot/devices/timer.vhdl
@@ -85,7 +85,7 @@ begin
end if; -- rising_edge(clk_i)
end process do_timer;
- data_o <= cnt_smp(31 downto 0) when addr_i="0" else
+ data_o <= cnt_smp(31 downto 0) when to_01(addr_i)="0" else
cnt_smp(63 downto 32);
end architecture Behave; -- Entity: Timer
diff --git a/zpu/hdl/zealot/fpga/altium-livedesign-xc3s1000/top.vhd b/zpu/hdl/zealot/fpga/altium-livedesign-xc3s1000/top.vhd
index fbca62b..4a93c4f 100644
--- a/zpu/hdl/zealot/fpga/altium-livedesign-xc3s1000/top.vhd
+++ b/zpu/hdl/zealot/fpga/altium-livedesign-xc3s1000/top.vhd
@@ -102,7 +102,7 @@ architecture rtl of top is
---------------------------
-- constant declarations
- constant zpu_flavour : zpu_type := zpu_small; -- choose your flavour HERE
+ constant zpu_flavour : zpu_type := zpu_medium; -- choose your flavour HERE
-- modify frequency here
constant clk_multiply : positive := 3; -- 9 for small, 3 for medium
constant clk_divide : positive := 2; -- 5 for small, 2 for medium
diff --git a/zpu/hdl/zealot/zpu_small.vhdl b/zpu/hdl/zealot/zpu_small.vhdl
index 2e5f464..056b924 100644
--- a/zpu/hdl/zealot/zpu_small.vhdl
+++ b/zpu/hdl/zealot/zpu_small.vhdl
@@ -148,13 +148,13 @@ begin
-- Select the addressed byte inside the fetched word
case (to_integer(pc_r(BYTE_BITS-1 downto 0))) is
when 0 =>
- topcode:=b_i(31 downto 24);
+ topcode := to_01( b_i(31 downto 24));
when 1 =>
- topcode:=b_i(23 downto 16);
+ topcode := to_01( b_i(23 downto 16));
when 2 =>
- topcode:=b_i(15 downto 8);
+ topcode := to_01( b_i(15 downto 8));
when others => -- 3
- topcode:=b_i(7 downto 0);
+ topcode := to_01( b_i(7 downto 0));
end case;
opcode <= topcode;
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