diff options
Diffstat (limited to 'zpu/hdl/zealot/fpga/xilinx-sp601-xc6slx16/synthesis_config/top.ut')
-rw-r--r-- | zpu/hdl/zealot/fpga/xilinx-sp601-xc6slx16/synthesis_config/top.ut | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/zpu/hdl/zealot/fpga/xilinx-sp601-xc6slx16/synthesis_config/top.ut b/zpu/hdl/zealot/fpga/xilinx-sp601-xc6slx16/synthesis_config/top.ut new file mode 100644 index 0000000..ea9319f --- /dev/null +++ b/zpu/hdl/zealot/fpga/xilinx-sp601-xc6slx16/synthesis_config/top.ut @@ -0,0 +1,30 @@ +-w +-g DebugBitstream:No +-g Binary:no +-g CRC:Enable +-g Reset_on_err:No +-g ConfigRate:2 +-g ProgPin:PullUp +-g TckPin:PullUp +-g TdiPin:PullUp +-g TdoPin:PullUp +-g TmsPin:PullUp +-g UnusedPin:PullDown +-g UserID:0xFFFFFFFF +-g ExtMasterCclk_en:No +-g SPI_buswidth:1 +-g TIMER_CFG:0xFFFF +-g multipin_wakeup:No +-g StartUpClk:CClk +-g DONE_cycle:4 +-g GTS_cycle:5 +-g GWE_cycle:6 +-g LCK_cycle:NoWait +-g Security:None +-g DonePipe:No +-g DriveDone:No +-g en_sw_gsr:No +-g drive_awake:No +-g sw_clk:Startupclk +-g sw_gwe_cycle:5 +-g sw_gts_cycle:4 |