summaryrefslogtreecommitdiffstats
path: root/zpu/hdl/zealot/fpga/xilinx-sp601-xc6slx16/synthesis.sh
diff options
context:
space:
mode:
Diffstat (limited to 'zpu/hdl/zealot/fpga/xilinx-sp601-xc6slx16/synthesis.sh')
-rwxr-xr-xzpu/hdl/zealot/fpga/xilinx-sp601-xc6slx16/synthesis.sh36
1 files changed, 36 insertions, 0 deletions
diff --git a/zpu/hdl/zealot/fpga/xilinx-sp601-xc6slx16/synthesis.sh b/zpu/hdl/zealot/fpga/xilinx-sp601-xc6slx16/synthesis.sh
new file mode 100755
index 0000000..2f89415
--- /dev/null
+++ b/zpu/hdl/zealot/fpga/xilinx-sp601-xc6slx16/synthesis.sh
@@ -0,0 +1,36 @@
+#!/bin/sh
+
+# need project files:
+# top.xst
+# top.prj
+# top.ut
+
+# need Xilinx tools:
+# xst
+# ngdbuild
+# map
+# par
+# trce
+# bitgen
+
+echo "########################"
+echo "generate build directory"
+echo "########################"
+mkdir build
+cd build
+mkdir tmp
+
+echo "###############"
+echo "start processes"
+echo "###############"
+xst -ifn "../synthesis_config/top.xst" -ofn "top.syr"
+ngdbuild -dd _ngo -nt timestamp -uc ../synthesis_config/xilinx-sp601-xc6slx16.ucf -p xc6slx16-csg324-2 top.ngc top.ngd
+map -p xc6slx16-csg324-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -global_opt off -mt off -ir off -pr off -lc off -power off -o top_map.ncd top.ngd top.pcf
+par -ol high -mt off top_map.ncd -w top.ncd top.pcf
+trce -v 3 -s 2 -n 3 -fastpaths -xml top.twx top.ncd -o top.twr top.pcf
+bitgen -f ../synthesis_config/top.ut top.ncd
+
+echo "###########"
+echo "get bitfile"
+echo "###########"
+cp top.bit ..
OpenPOWER on IntegriCloud