5 files changed, 168 insertions, 0 deletions
diff --git a/uc_str912/openocd/amontec.sh b/uc_str912/openocd/amontec.sh
new file mode 100644
index 0000000..c49c229
--- /dev/null
+++ b/uc_str912/openocd/amontec.sh
@@ -0,0 +1,3 @@
+#!/bin/sh
+openocd -f openocd_amontec.cfg 
+#--debug 3
diff --git a/uc_str912/openocd/openocd_amontec.cfg b/uc_str912/openocd/openocd_amontec.cfg
new file mode 100644
index 0000000..16e806c
--- /dev/null
+++ b/uc_str912/openocd/openocd_amontec.cfg
@@ -0,0 +1,26 @@
+source [find interface/jtagkey-tiny.cfg]
+
+#avoid warning bei detection
+set BSTAPID 0x2457f041   
+source str912.cfg
+
+# at 25 MHz JTAG should run with 4166 kHz
+#   16 = 450 bytes/sec
+#   32 = 870 bytes/sec 
+#   64 = 1   kbyte/sec   c bleibt nicht stehen
+#  127 = 2  kbyte/sec    c bleibt nicht stehen
+#  250 = 4  kbyte/sec
+#  500 = 5  kbyte/sec
+# 1000 = 7  kbyte/sec
+# 2000 = 8  kbyte/sec
+# 3000 = 8  kbyte/sec
+
+#jtag_rclk 4166 # enable later
+
+# gdb_breakpoint_override hard # geht
+# gdb_flash_program enable  # geht nicht
+# gdb_memory_map enable     # geht nicht
+# gdb_report_data_abort     # geht nicht
+
+arm7_9 dcc_downloads enable
+arm7_9 fast_memory_access enable
diff --git a/uc_str912/openocd/openocd_segger.cfg b/uc_str912/openocd/openocd_segger.cfg
new file mode 100644
index 0000000..3a1fc14
--- /dev/null
+++ b/uc_str912/openocd/openocd_segger.cfg
@@ -0,0 +1,6 @@
+#gdb_memory_map enable    # fehler bei openocd start
+#gdb_flash_program enable # fehler bei openocd start
+source [find interface/jlink.cfg]
+# avoid warning bei detection
+set BSTAPID 0x2457f041   
+source str912.cfg
diff --git a/uc_str912/openocd/segger.sh b/uc_str912/openocd/segger.sh
new file mode 100644
index 0000000..47cf43d
--- /dev/null
+++ b/uc_str912/openocd/segger.sh
@@ -0,0 +1,2 @@
+#!/bin/sh
+openocd -f openocd_segger.cfg
diff --git a/uc_str912/openocd/str912.cfg b/uc_str912/openocd/str912.cfg
new file mode 100644
index 0000000..108ae9c
--- /dev/null
+++ b/uc_str912/openocd/str912.cfg
@@ -0,0 +1,131 @@
+# script for str9
+
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
+   set  _CHIPNAME str912
+}
+
+if { [info exists ENDIAN] } {
+   set  _ENDIAN $ENDIAN
+} else {
+   set  _ENDIAN little
+}
+
+# jtag speed. We need to stick to 16kHz until we've finished reset.
+jtag_rclk 16
+
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config trst_and_srst
+#reset_config trst_only
+
+if { [info exists FLASHTAPID ] } {
+   set _FLASHTAPID $FLASHTAPID
+} else {
+   set _FLASHTAPID 0x04570041
+}
+jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x25966041
+}
+jtag newtap $_CHIPNAME cpu   -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+
+if { [info exists BSTAPID ] } {
+   set _BSTAPID $BSTAPID
+} else {
+   set _BSTAPID 0x1457f041
+}
+jtag newtap $_CHIPNAME bs    -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
+
+$_TARGETNAME configure -event reset-start { jtag_rclk 16 }
+
+$_TARGETNAME configure -event reset-init {
+	# We can increase speed now that we know the target is halted.
+	jtag_rclk 2000
+
+	# -- Enable 96K RAM
+	# PFQBC enabled / DTCM & AHB wait-states disabled
+	mww 0x5C002034 0x0191
+
+    flash banks
+    flash probe 0
+
+    #str9x flash_config <bank> <bbsize> <nbsize> <bbstart> <nbstart>
+    str9x flash_config    0         4       2        0x0     0x80000
+
+    #nbsize register = 0 : means  8kBytes (written in the STR9 flash programming manual)
+    #nbsize register = 2 : means 32kBytes (written in the STR9 flash programming manual)
+    #bbsize register = 4 : means 512kBytes (written in the STR9 flash programming manual)
+
+
+	flash protect 0 0 7 off
+    flash protect_check 0
+#   flash info 0
+
+	flash protect 1 0 3 off
+    flash protect_check 1
+#   flash info 1
+
+    flash auto_erase on
+}
+
+#$_TARGETNAME configure -work-area-phys 0x04000000 -work-area-size 16384 -work-area-backup 0
+$_TARGETNAME configure -work-area-phys 0x04000000 -work-area-size 0x18000 -work-area-backup 0
+
+#flash bank str9x <base> <size> 0 0 <target#> <variant>
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME str9x 0x00000000 0x00080000 0 0 $_TARGETNAME
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME str9x 0x00080000 0x00008000 0 0 $_TARGETNAME
+
+
+
+
+$_TARGETNAME configure -event debug-halted {
+	puts "Running debug halted script for EBx00 Board"
+}
+
+
+$_TARGETNAME configure -event gdb-attach {
+	puts "Running gdb-attach script for EBx00 Board"
+}
+
+
+$_TARGETNAME configure -event gdb-detach {
+	puts "Running gdb-detach script for EBx00 Board"
+}
+
+
+$_TARGETNAME configure -event gdb-flash-erase-start {
+	puts "Running gdb-flash-erase-start script for EBx00 Board"
+}
+
+
+$_TARGETNAME configure -event gdb-flash-erase-end {
+	puts "Running gdb-flash-erase-end script for EBx00 Board"
+}
+
+
+$_TARGETNAME configure -event gdb-start {
+	puts "Running gdb_start script for EBx00 Board"
+}
+
+
+
+$_TARGETNAME configure -event gdb-end {
+	puts "Running gdb_halted script for EBx00 Board"
+}
+
+
+# For more information about the configuration files, take a look at:
+# openocd.texi