diff options
Diffstat (limited to 'uc_str912/openocd/str912.cfg')
-rw-r--r-- | uc_str912/openocd/str912.cfg | 131 |
1 files changed, 131 insertions, 0 deletions
diff --git a/uc_str912/openocd/str912.cfg b/uc_str912/openocd/str912.cfg new file mode 100644 index 0000000..108ae9c --- /dev/null +++ b/uc_str912/openocd/str912.cfg @@ -0,0 +1,131 @@ +# script for str9 + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME str912 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +# jtag speed. We need to stick to 16kHz until we've finished reset. +jtag_rclk 16 + +jtag_nsrst_delay 100 +jtag_ntrst_delay 100 + +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config trst_and_srst +#reset_config trst_only + +if { [info exists FLASHTAPID ] } { + set _FLASHTAPID $FLASHTAPID +} else { + set _FLASHTAPID 0x04570041 +} +jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x25966041 +} +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + + +if { [info exists BSTAPID ] } { + set _BSTAPID $BSTAPID +} else { + set _BSTAPID 0x1457f041 +} +jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e + +$_TARGETNAME configure -event reset-start { jtag_rclk 16 } + +$_TARGETNAME configure -event reset-init { + # We can increase speed now that we know the target is halted. + jtag_rclk 2000 + + # -- Enable 96K RAM + # PFQBC enabled / DTCM & AHB wait-states disabled + mww 0x5C002034 0x0191 + + flash banks + flash probe 0 + + #str9x flash_config <bank> <bbsize> <nbsize> <bbstart> <nbstart> + str9x flash_config 0 4 2 0x0 0x80000 + + #nbsize register = 0 : means 8kBytes (written in the STR9 flash programming manual) + #nbsize register = 2 : means 32kBytes (written in the STR9 flash programming manual) + #bbsize register = 4 : means 512kBytes (written in the STR9 flash programming manual) + + + flash protect 0 0 7 off + flash protect_check 0 +# flash info 0 + + flash protect 1 0 3 off + flash protect_check 1 +# flash info 1 + + flash auto_erase on +} + +#$_TARGETNAME configure -work-area-phys 0x04000000 -work-area-size 16384 -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x04000000 -work-area-size 0x18000 -work-area-backup 0 + +#flash bank str9x <base> <size> 0 0 <target#> <variant> +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME str9x 0x00000000 0x00080000 0 0 $_TARGETNAME +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME str9x 0x00080000 0x00008000 0 0 $_TARGETNAME + + + + +$_TARGETNAME configure -event debug-halted { + puts "Running debug halted script for EBx00 Board" +} + + +$_TARGETNAME configure -event gdb-attach { + puts "Running gdb-attach script for EBx00 Board" +} + + +$_TARGETNAME configure -event gdb-detach { + puts "Running gdb-detach script for EBx00 Board" +} + + +$_TARGETNAME configure -event gdb-flash-erase-start { + puts "Running gdb-flash-erase-start script for EBx00 Board" +} + + +$_TARGETNAME configure -event gdb-flash-erase-end { + puts "Running gdb-flash-erase-end script for EBx00 Board" +} + + +$_TARGETNAME configure -event gdb-start { + puts "Running gdb_start script for EBx00 Board" +} + + + +$_TARGETNAME configure -event gdb-end { + puts "Running gdb_halted script for EBx00 Board" +} + + +# For more information about the configuration files, take a look at: +# openocd.texi |