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authorBert Lange <b.lange@hzdr.de>2014-07-11 14:13:10 +0200
committerBert Lange <b.lange@hzdr.de>2014-07-11 14:13:10 +0200
commit8679e4f91dcae05aef40f96629f33f0f4161f14a (patch)
treeb28fd7b5ad4879bafd44b4a61cef1300f7862afc /zpu
parentb1bba840534b2e9a6f79564b006843b0e268e475 (diff)
downloadzpu-8679e4f91dcae05aef40f96629f33f0f4161f14a.zip
zpu-8679e4f91dcae05aef40f96629f33f0f4161f14a.tar.gz
add: performance values for Lattice MachXO2
Diffstat (limited to 'zpu')
-rw-r--r--zpu/docs/zpu_arch.html29
1 files changed, 15 insertions, 14 deletions
diff --git a/zpu/docs/zpu_arch.html b/zpu/docs/zpu_arch.html
index 15b9ccf..62acdfa 100644
--- a/zpu/docs/zpu_arch.html
+++ b/zpu/docs/zpu_arch.html
@@ -1061,10 +1061,11 @@ For now if you are starting a design, zpu4 or zealot are probably the safest. z
<a name="performance"/>
<h2>Performance Summary</h2>
-<a href="#todo">TODO</a> fill in performance table for Altera and Lattice.
+<a href="#todo">TODO</a> fill in performance table for Altera.
<p>
Tests are done with the <a href="#zealot">Zealot</a>
SoC-System and Xilinx ISE 12.2 with standard settings.
+ For the MachXO2 device Lattice Diamond 3.1 with Synplify Pro I-2013.09L was used.
<p>
<TABLE WIDTH=604 BORDER=1 BORDERCOLOR="#000000" CELLPADDING=7 CELLSPACING=0 STYLE="page-break-after: avoid">
<TR VALIGN=TOP>
@@ -1073,7 +1074,7 @@ Tests are done with the <a href="#zealot">Zealot</a>
<TD WIDTH=85> <P><B>Spartan-3E</B></P> </TD>
<TD WIDTH=85> <P><B>Spartan-6</B></P> </TD>
<TD WIDTH=85> <P><B>Virtex-5</B></P> </TD>
- <TD WIDTH=85> <P><B>Cyclone-3</B></P> </TD>
+ <TD WIDTH=85> <P><B>MachXO2</B></P> </TD>
<TD WIDTH=85> <P><B>DMIPS</B></P> </TD>
</TR>
@@ -1115,12 +1116,12 @@ maxAddrBit=16
175 fmax
</PRE> </TD>
<TD WIDTH=85> <PRE>
-<!-- Cyclone -->
-? LUT
-? REG
-? MULT18x18
-? M4K
-? fmax
+<!-- MachXO2 -->
+886 LUT4
+459 REG
+
+4 EBR
+75 fmax
</PRE> </TD>
<TD WIDTH=85> <!-- DMIPS --> <P>0.5</P> </TD>
</TR>
@@ -1159,12 +1160,12 @@ maxAddrBit=16
125 fmax
</PRE> </TD>
<TD WIDTH=85> <PRE>
-<!-- Cyclone -->
-? LUT
-? REG
-? MULT18x18
-? M4K
-? fmax
+<!-- MachXO2 -->
+2429 LUT4
+755 REG
+
+4 EBR
+65 fmax
</PRE> </TD>
<TD WIDTH=85><!-- DMIPS --><P>2.6</P> </TD>
</TR>
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