* Small ZPU now supports interrupts

	* added simulation example demonstrating interrupts

11 files changed, 2255 insertions, 16669 deletions

diff --git a/zpu/hdl/zpu4/core/zpu_core_small.vhd b/zpu/hdl/zpu4/core/zpu_core_small.vhd
index 9cda01c..03526bd 100644
--- a/zpu/hdl/zpu4/core/zpu_core_small.vhd
+++ b/zpu/hdl/zpu4/core/zpu_core_small.vhd
@@ -81,7 +81,9 @@ State_FetchNext,
 State_AddSP,

 State_ReadIODone,

 State_Decode,

-State_Resync

+State_Resync,

+State_Interrupt

+

 );

 

 type DecodedOpcodeType is

@@ -103,7 +105,8 @@ Decoded_Load,
 Decoded_Not,

 Decoded_Flip,

 Decoded_Store,

-Decoded_PopSP

+Decoded_PopSP,

+Decoded_Interrupt

 );

 

 

@@ -125,11 +128,15 @@ signal memBAddr_stdlogic  : std_logic_vector(AddrBitBRAM_range);
 signal memBWrite_stdlogic : std_logic_vector(memBWrite'range);

 signal memBRead_stdlogic  : std_logic_vector(memBRead'range);

 

--- debug
-subtype index is integer range 0 to 3;
-signal tOpcode_sel : index;
-
-
+subtype index is integer range 0 to 3;

+

+signal tOpcode_sel : index;

+

+

+signal inInterrupt : std_logic;

+

+

+

 begin

 	traceFileGenerate:

    if Generate_Trace generate

@@ -146,8 +153,13 @@ begin
         );

 	end generate;

 

-	--<JK> not used in this design
-	mem_writeMask <= (others => '1');
+

+

+    -- not used in this design

+

+    mem_writeMask <= (others => '1');

+

+

 

 	memAAddr_stdlogic  <= std_logic_vector(memAAddr(AddrBitBRAM_range));

 	memAWrite_stdlogic <= std_logic_vector(memAWrite);

@@ -167,23 +179,31 @@ begin
 	memARead <= unsigned(memARead_stdlogic);

 	memBRead <= unsigned(memBRead_stdlogic);

 

-tOpcode_sel <= to_integer(pc(minAddrBit-1 downto 0));
+

+

+	tOpcode_sel <= to_integer(pc(minAddrBit-1 downto 0));

+

 

 

 	decodeControl:

-	process(memBRead, pc,tOpcode_sel)
+	process(memBRead, pc,tOpcode_sel)

 		variable tOpcode : std_logic_vector(OpCode_Size-1 downto 0);

 	begin

-		--<JK> not worked with synopsys
-		--<JK> tOpcode := std_logic_vector(memBRead((wordBytes-1-to_integer(pc(minAddrBit-1 downto 0))+1)*8-1 downto (wordBytes-1-to_integer(pc(minAddrBit-1 downto 0)))*8));
-		--<JK> use full case
-		case (tOpcode_sel) is
-			when 0 => tOpcode := std_logic_vector(memBRead(31 downto 24));
-			when 1 => tOpcode := std_logic_vector(memBRead(23 downto 16));
-			when 2 => tOpcode := std_logic_vector(memBRead(15 downto 8));
-			when 3 => tOpcode := std_logic_vector(memBRead(7 downto 0));
-			when others => tOpcode := std_logic_vector(memBRead(7 downto 0));
-		end case;
+

+        -- simplify opcode selection a bit so it passes more synthesizers

+        case (tOpcode_sel) is

+

+            when 0 => tOpcode := std_logic_vector(memBRead(31 downto 24));

+

+            when 1 => tOpcode := std_logic_vector(memBRead(23 downto 16));

+

+            when 2 => tOpcode := std_logic_vector(memBRead(15 downto 8));

+

+            when 3 => tOpcode := std_logic_vector(memBRead(7 downto 0));

+

+            when others => tOpcode := std_logic_vector(memBRead(7 downto 0));

+        end case;

+

 		sampledOpcode <= tOpcode;

 

 		if (tOpcode(7 downto 7)=OpCode_Im) then

@@ -246,13 +266,12 @@ tOpcode_sel <= to_integer(pc(minAddrBit-1 downto 0));
 			out_mem_readEnable <= '0';

 			memAWrite <= (others => '0');

 			memBWrite <= (others => '0');

-			-- avoid Latch in synopsys
-			-- mem_writeMask <= (others => '1');
+			inInterrupt <= '0';

 		elsif (clk'event and clk = '1') then

 			memAWriteEnable <= '0';

 			memBWriteEnable <= '0';

 			-- This saves ca. 100 LUT's, by explicitly declaring that the

-			-- memAWrite can be left at whatever value if memAWriteEnable is

+            -- memAWrite can be left at whatever value if memAWriteEnable is

 			-- not set.

 			memAWrite <= (others => DontCareValue);

 			memBWrite <= (others => DontCareValue);

@@ -270,6 +289,9 @@ tOpcode_sel <= to_integer(pc(minAddrBit-1 downto 0));
 			

 			decodedOpcode <= sampledDecodedOpcode;

 			opcode <= sampledOpcode;

+			if interrupt='0' then

+				inInterrupt <= '0'; -- no longer in an interrupt

+			end if;

 

 			case state is

 				when State_Execute =>

@@ -295,6 +317,14 @@ tOpcode_sel <= to_integer(pc(minAddrBit-1 downto 0));
 	

 					idim_flag <= '0';

 					case decodedOpcode is

+						when Decoded_Interrupt =>

+							sp <= sp - 1;

+							memAAddr <= sp - 1;

+							memAWriteEnable <= '1';

+							memAWrite <= (others => DontCareValue);

+							memAWrite(maxAddrBit downto 0) <= pc;

+							pc <= to_unsigned(32, maxAddrBit+1); -- interrupt address

+			  				report "ZPU jumped to interrupt!" severity note;

 						when Decoded_Im =>

 							idim_flag <= '1';

 							memAWriteEnable <= '1';

@@ -422,6 +452,11 @@ tOpcode_sel <= to_integer(pc(minAddrBit-1 downto 0));
 					memBAddr <= sp + 1;

 					state <= State_Decode;

 				when State_Decode =>

+					if interrupt='1' and inInterrupt='0' and idim_flag='0' then

+						-- We got an interrupt, execute interrupt instead of next instruction

+						inInterrupt <= '1';

+						decodedOpcode <= Decoded_Interrupt;

+					end if;

 					-- during the State_Execute cycle we'll be fetching SP+1

 					memAAddr <= sp;

 					memBAddr <= sp + 1;

diff --git a/zpu/hdl/zpu4/core/zpu_core_small_wip.vhd b/zpu/hdl/zpu4/core/zpu_core_small_wip.vhd
deleted file mode 100644
index a169103..0000000
--- a/zpu/hdl/zpu4/core/zpu_core_small_wip.vhd
+++ /dev/null
@@ -1,498 +0,0 @@
--- Company: ZPU3

--- Engineer: Øyvind Harboe

-

-library IEEE;

-use IEEE.STD_LOGIC_1164.ALL;

-use ieee.numeric_std.all;

-

-library work;

-use work.zpu_config.all;

-use work.zpupkg.all;

-

-

-entity zpu_core is

-    Port ( clk : in std_logic;

-	 		  areset : in std_logic;

-	 		  enable : in std_logic; 

-	 		  in_mem_busy : in std_logic; 

-	 		  mem_read : in std_logic_vector(wordSize-1 downto 0);

-	 		  mem_write : out std_logic_vector(wordSize-1 downto 0);			  

-	 		  out_mem_addr : out std_logic_vector(maxAddrBitIncIO downto 0);

-			  out_mem_writeEnable : out std_logic; 

-			  out_mem_readEnable : out std_logic;

-	 		  mem_writeMask: out std_logic_vector(wordBytes-1 downto 0);

-	 		  interrupt : in std_logic;

-	 		  break : out std_logic);

-end zpu_core;

-

-architecture behave of zpu_core is

-

-signal		readIO : std_logic;

-

-

-

-signal memAWriteEnable : std_logic;

-signal memAAddr : unsigned(maxAddrBit downto minAddrBit);

-signal memAWrite : unsigned(wordSize-1 downto 0);

-signal memARead : unsigned(wordSize-1 downto 0);

-signal memBWriteEnable : std_logic;

-signal memBAddr : unsigned(maxAddrBit downto minAddrBit);

-signal memBWrite : unsigned(wordSize-1 downto 0);

-signal memBRead : unsigned(wordSize-1 downto 0);

-

-

-

-signal	pc				: unsigned(maxAddrBit downto 0);

-signal	sp				: unsigned(maxAddrBit downto minAddrBit);

-

-signal	idim_flag			: std_logic;

-

---signal	storeToStack		: std_logic;

---signal	fetchNextInstruction		: std_logic;

---signal	extraCycle			: std_logic;

-signal	busy 				: std_logic;

---signal	fetching			: std_logic;

-

-signal	begin_inst			: std_logic;

-

-

-

-signal trace_opcode		: std_logic_vector(7 downto 0);

-signal	trace_pc				: std_logic_vector(maxAddrBitIncIO downto 0);

-signal	trace_sp				: std_logic_vector(maxAddrBitIncIO downto minAddrBit);

-signal	trace_topOfStack				: std_logic_vector(wordSize-1 downto 0);

-signal	trace_topOfStackB				: std_logic_vector(wordSize-1 downto 0);

-

--- state machine.

-type State_Type is

-(

-State_Fetch,

-State_WriteIODone,

-State_Execute,

-State_StoreToStack,

-State_Add,

-State_Or,

-State_And,

-State_Store,

-State_ReadIO,

-State_WriteIO,

-State_Load,

-State_FetchNext,

-State_AddSP,

-State_ReadIODone,

-State_Decode,

-State_Resync,

-State_Interrupt

-

-);

-

-type DecodedOpcodeType is

-(

-Decoded_Nop,

-Decoded_Im,

-Decoded_ImShift,

-Decoded_LoadSP,

-Decoded_StoreSP	,

-Decoded_AddSP,

-Decoded_Emulate,

-Decoded_Break,

-Decoded_PushSP,

-Decoded_PopPC,

-Decoded_Add,

-Decoded_Or,

-Decoded_And,

-Decoded_Load,

-Decoded_Not,

-Decoded_Flip,

-Decoded_Store,

-Decoded_PopSP

-);

-

-

-

-signal sampledOpcode : std_logic_vector(OpCode_Size-1 downto 0);

-signal opcode : std_logic_vector(OpCode_Size-1 downto 0);

-

-signal decodedOpcode : DecodedOpcodeType;

-signal sampledDecodedOpcode : DecodedOpcodeType;

-

-

-signal state : State_Type;

-

-subtype AddrBitBRAM_range is natural range maxAddrBitBRAM downto minAddrBit;

-signal memAAddr_stdlogic  : std_logic_vector(AddrBitBRAM_range);

-signal memAWrite_stdlogic : std_logic_vector(memAWrite'range);

-signal memARead_stdlogic  : std_logic_vector(memARead'range);

-signal memBAddr_stdlogic  : std_logic_vector(AddrBitBRAM_range);

-signal memBWrite_stdlogic : std_logic_vector(memBWrite'range);

-signal memBRead_stdlogic  : std_logic_vector(memBRead'range);

-

-subtype index is integer range 0 to 3;

-

-signal tOpcode_sel : index;

-

-

-signal inInterrupt : std_logic;

-

-

-

-begin

-	traceFileGenerate:

-   if Generate_Trace generate

-	trace_file: trace port map (

-       	clk => clk,

-       	begin_inst => begin_inst,

-       	pc => trace_pc,

-		opcode => trace_opcode,

-		sp => trace_sp,

-		memA => trace_topOfStack,

-		memB => trace_topOfStackB,

-		busy => busy,

-		intsp => (others => 'U')

-        );

-	end generate;

-

-

-

-    -- not used in this design

-

-    mem_writeMask <= (others => '1');

-

-

-

-	memAAddr_stdlogic  <= std_logic_vector(memAAddr(AddrBitBRAM_range));

-	memAWrite_stdlogic <= std_logic_vector(memAWrite);

-	memBAddr_stdlogic  <= std_logic_vector(memBAddr(AddrBitBRAM_range));

-	memBWrite_stdlogic <= std_logic_vector(memBWrite);

-	memory: dualport_ram port map (

-       	clk => clk,

-	memAWriteEnable => memAWriteEnable,

-	memAAddr => memAAddr_stdlogic,

-	memAWrite => memAWrite_stdlogic,

-	memARead => memARead_stdlogic,

-	memBWriteEnable => memBWriteEnable,

-	memBAddr => memBAddr_stdlogic,

-	memBWrite => memBWrite_stdlogic,

-	memBRead => memBRead_stdlogic

-        );

-	memARead <= unsigned(memARead_stdlogic);

-	memBRead <= unsigned(memBRead_stdlogic);

-

-

-

-	tOpcode_sel <= to_integer(pc(minAddrBit-1 downto 0));

-

-

-

-	decodeControl:

-	process(memBRead, pc,tOpcode_sel)

-		variable tOpcode : std_logic_vector(OpCode_Size-1 downto 0);

-	begin

-

-        -- simplify opcode selection a bit so it passes more synthesizers

-        case (tOpcode_sel) is

-

-            when 0 => tOpcode := std_logic_vector(memBRead(31 downto 24));

-

-            when 1 => tOpcode := std_logic_vector(memBRead(23 downto 16));

-

-            when 2 => tOpcode := std_logic_vector(memBRead(15 downto 8));

-

-            when 3 => tOpcode := std_logic_vector(memBRead(7 downto 0));

-

-            when others => tOpcode := std_logic_vector(memBRead(7 downto 0));

-        end case;

-

-		sampledOpcode <= tOpcode;

-

-		if (tOpcode(7 downto 7)=OpCode_Im) then

-			sampledDecodedOpcode<=Decoded_Im;

-		elsif (tOpcode(7 downto 5)=OpCode_StoreSP) then

-			sampledDecodedOpcode<=Decoded_StoreSP;

-		elsif (tOpcode(7 downto 5)=OpCode_LoadSP) then

-			sampledDecodedOpcode<=Decoded_LoadSP;

-		elsif (tOpcode(7 downto 5)=OpCode_Emulate) then

-			sampledDecodedOpcode<=Decoded_Emulate;

-		elsif (tOpcode(7 downto 4)=OpCode_AddSP) then

-			sampledDecodedOpcode<=Decoded_AddSP;

-		else

-			case tOpcode(3 downto 0) is

-				when OpCode_Break =>

-					sampledDecodedOpcode<=Decoded_Break;

-				when OpCode_PushSP =>

-					sampledDecodedOpcode<=Decoded_PushSP;

-				when OpCode_PopPC =>

-					sampledDecodedOpcode<=Decoded_PopPC;

-				when OpCode_Add =>

-					sampledDecodedOpcode<=Decoded_Add;

-				when OpCode_Or =>

-					sampledDecodedOpcode<=Decoded_Or;

-				when OpCode_And =>

-					sampledDecodedOpcode<=Decoded_And;

-				when OpCode_Load =>

-					sampledDecodedOpcode<=Decoded_Load;

-				when OpCode_Not =>

-					sampledDecodedOpcode<=Decoded_Not;

-				when OpCode_Flip =>

-					sampledDecodedOpcode<=Decoded_Flip;

-				when OpCode_Store =>

-					sampledDecodedOpcode<=Decoded_Store;

-				when OpCode_PopSP =>

-					sampledDecodedOpcode<=Decoded_PopSP;

-				when others =>

-					sampledDecodedOpcode<=Decoded_Nop;

-			end case;

-		end if;

-	end process;

-

-

-	opcodeControl:

-	process(clk, areset)

-		variable spOffset : unsigned(4 downto 0);

-	begin

-		if areset = '1' then

-			state <= State_Resync;

-			break <= '0';

-			sp <= unsigned(spStart(maxAddrBit downto minAddrBit));

-			pc <= (others => '0');

-			idim_flag <= '0';

-			begin_inst <= '0';

-			memAAddr <= (others => '0');

-			memBAddr <= (others => '0');

-			memAWriteEnable <= '0';

-			memBWriteEnable <= '0';

-			out_mem_writeEnable <= '0';

-			out_mem_readEnable <= '0';

-			memAWrite <= (others => '0');

-			memBWrite <= (others => '0');

-			inInterrupt <= '0';

-		elsif (clk'event and clk = '1') then

-			memAWriteEnable <= '0';

-			memBWriteEnable <= '0';

-			-- This saves ca. 100 LUT's, by explicitly declaring that the

-            -- memAWrite can be left at whatever value if memAWriteEnable is

-			-- not set.

-			memAWrite <= (others => DontCareValue);

-			memBWrite <= (others => DontCareValue);

---			out_mem_addr <= (others => DontCareValue);

---			mem_write <= (others => DontCareValue);

-			spOffset := (others => DontCareValue);

-			memAAddr <= (others => DontCareValue);

-			memBAddr <= (others => DontCareValue);

-			

-			out_mem_writeEnable <= '0';

-			out_mem_readEnable <= '0';

-			begin_inst <= '0';

-			out_mem_addr <= std_logic_vector(memARead(maxAddrBitIncIO downto 0));

-			mem_write <= std_logic_vector(memBRead);

-			

-			decodedOpcode <= sampledDecodedOpcode;

-			opcode <= sampledOpcode;

-			if interrupt='0' then

-				inInterrupt <= '0'; -- no longer in an interrupt

-			end if;

-

-			case state is

-				when State_Execute =>

-					state <= State_Fetch;

-					-- at this point:

-					-- memBRead contains opcode word

-					-- memARead contains top of stack

-					pc <= pc + 1;

-	

-					-- trace

-					begin_inst <= '1';

-					trace_pc <= (others => '0');

-					trace_pc(maxAddrBit downto 0) <= std_logic_vector(pc);

-					trace_opcode <= opcode;

-					trace_sp <= (others => '0');

-					trace_sp(maxAddrBit downto minAddrBit) <= std_logic_vector(sp);

-					trace_topOfStack <= std_logic_vector(memARead);

-					trace_topOfStackB <= std_logic_vector(memBRead);

-

-					-- during the next cycle we'll be reading the next opcode	

-					spOffset(4):=not opcode(4);

-					spOffset(3 downto 0) := unsigned(opcode(3 downto 0));

-	

-					idim_flag <= '0';

-					case decodedOpcode is

-						when Decoded_Interrupt =>

-							sp <= sp - 1;

-							memAAddr <= sp - 1;

-							memAWriteEnable <= '1';

-							memAWrite <= (others => DontCareValue);

-							memAWrite(maxAddrBitIncIO downto 0) <= pc;

-							pc <= conv_std_logic_vector(32, maxAddrBitIncIo+1); -- interrupt address

-			  				report "ZPU jumped to interrupt!" severity note;

-						when Decoded_Im =>

-							idim_flag <= '1';

-							memAWriteEnable <= '1';

-							if (idim_flag='0') then

-								sp <= sp - 1;

-								memAAddr <= sp-1;

-								for i in wordSize-1 downto 7 loop

-									memAWrite(i) <= opcode(6);

-								end loop;

-								memAWrite(6 downto 0) <= unsigned(opcode(6 downto 0));

-							else

-								memAAddr <= sp;

-								memAWrite(wordSize-1 downto 7) <= memARead(wordSize-8 downto 0);

-								memAWrite(6 downto 0) <= unsigned(opcode(6 downto 0));

-							end if;

-						when Decoded_StoreSP =>

-							memBWriteEnable <= '1';

-							memBAddr <= sp+spOffset;

-							memBWrite <= memARead;

-							sp <= sp + 1;

-							state <= State_Resync;

-						when Decoded_LoadSP =>

-							sp <= sp - 1;

-							memAAddr <= sp+spOffset;

-						when Decoded_Emulate =>

-							sp <= sp - 1;

-							memAWriteEnable <= '1';

-							memAAddr <= sp - 1;

-							memAWrite <= (others => DontCareValue);

-							memAWrite(maxAddrBit downto 0) <= pc + 1;

-							-- The emulate address is:

-							--        98 7654 3210

-							-- 0000 00aa aaa0 0000

-							pc <= (others => '0');

-							pc(9 downto 5) <= unsigned(opcode(4 downto 0));

-						when Decoded_AddSP =>

-							memAAddr <= sp;

-							memBAddr <= sp+spOffset;

-							state <= State_AddSP;

-						when Decoded_Break =>

-							report "Break instruction encountered" severity failure;

-							break <= '1';

-						when Decoded_PushSP =>

-							memAWriteEnable <= '1';

-							memAAddr <= sp - 1;

-							sp <= sp - 1;

-							memAWrite <= (others => DontCareValue);

-							memAWrite(maxAddrBit downto minAddrBit) <= sp;

-						when Decoded_PopPC =>

-							pc <= memARead(maxAddrBit downto 0);

-							sp <= sp + 1;

-							state <= State_Resync;

-						when Decoded_Add =>

-							sp <= sp + 1;

-							state <= State_Add;

-						when Decoded_Or =>

-							sp <= sp + 1;

-							state <= State_Or;

-						when Decoded_And =>

-							sp <= sp + 1;

-							state <= State_And;

-						when Decoded_Load =>

-							if (memARead(ioBit)='1') then

-								out_mem_addr <= std_logic_vector(memARead(maxAddrBitIncIO downto 0));

-								out_mem_readEnable <= '1';

-								state <= State_ReadIO;

-							else 

-								memAAddr <= memARead(maxAddrBit downto minAddrBit);

-							end if;

-						when Decoded_Not =>

-							memAAddr <= sp(maxAddrBit downto minAddrBit);

-							memAWriteEnable <= '1';

-							memAWrite <= not memARead;

-						when Decoded_Flip =>

-							memAAddr <= sp(maxAddrBit downto minAddrBit);

-							memAWriteEnable <= '1';

-							for i in 0 to wordSize-1 loop

-								memAWrite(i) <= memARead(wordSize-1-i);

-				  			end loop;

-						when Decoded_Store =>

-							memBAddr <= sp + 1;

-							sp <= sp + 1;

-							if (memARead(ioBit)='1') then

-								state <= State_WriteIO;

-							else

-								state <= State_Store;

-							end if;

-						when Decoded_PopSP =>

-							sp <= memARead(maxAddrBit downto minAddrBit);

-							state <= State_Resync;

-						when Decoded_Nop =>	

-							memAAddr <= sp;

-						when others =>	

-							null; 

-					end case;

-				when State_ReadIO =>

-					if (in_mem_busy = '0') then

-						state <= State_Fetch;

-						memAWriteEnable <= '1';

-						memAWrite <= unsigned(mem_read);

-					end if;

-				when State_WriteIO =>

-					sp <= sp + 1;

-					out_mem_writeEnable <= '1';

-					out_mem_addr <= std_logic_vector(memARead(maxAddrBitIncIO downto 0));

-					mem_write <= std_logic_vector(memBRead);

-					state <= State_WriteIODone;

-				when State_WriteIODone =>

-					if (in_mem_busy = '0') then

-						state <= State_Resync;

-					end if;

-				when State_Fetch =>

-					-- We need to resync. During the *next* cycle

-					-- we'll fetch the opcode @ pc and thus it will

-					-- be available for State_Execute the cycle after

-					-- next

-					memBAddr <= pc(maxAddrBit downto minAddrBit);

-					state <= State_FetchNext;

-				when State_FetchNext =>

-					-- at this point memARead contains the value that is either

-					-- from the top of stack or should be copied to the top of the stack

-					memAWriteEnable <= '1';

-					memAWrite <= memARead; 

-					memAAddr <= sp;

-					memBAddr <= sp + 1;

-					state <= State_Decode;

-				when State_Decode =>

-					if interrupt='1' and inInterrupt='0' and idim_flag='0' then

-						-- We got an interrupt, execute interrupt instead of next instruction

-						inInterrupt <= '1';

-						decodedOpcode <= Decoded_Interrupt;

-					end if;

-					-- during the State_Execute cycle we'll be fetching SP+1

-					memAAddr <= sp;

-					memBAddr <= sp + 1;

-					state <= State_Execute;

-				when State_Store =>

-					sp <= sp + 1;

-					memAWriteEnable <= '1';

-					memAAddr <= memARead(maxAddrBit downto minAddrBit);

-					memAWrite <= memBRead;

-					state <= State_Resync;

-				when State_AddSP =>

-					state <= State_Add;

-				when State_Add =>

-					memAAddr <= sp;

-					memAWriteEnable <= '1';

-					memAWrite <= memARead + memBRead;

-					state <= State_Fetch;

-				when State_Or =>

-					memAAddr <= sp;

-					memAWriteEnable <= '1';

-					memAWrite <= memARead or memBRead;

-					state <= State_Fetch;

-				when State_Resync =>

-					memAAddr <= sp;

-					state <= State_Fetch;

-				when State_And =>

-					memAAddr <= sp;

-					memAWriteEnable <= '1';

-					memAWrite <= memARead and memBRead;

-					state <= State_Fetch;

-				when others =>

-					null;

-			end case;

-			

-		end if;

-	end process;

-

-

-

-end behave;

diff --git a/zpu/hdl/zpu4/src/bram.vhd b/zpu/hdl/zpu4/src/bram.vhd
deleted file mode 100644
index 435f3f4..0000000
--- a/zpu/hdl/zpu4/src/bram.vhd
+++ /dev/null
@@ -1,3807 +0,0 @@
-library ieee;

-use ieee.std_logic_1164.all;

-use ieee.std_logic_unsigned.all;

-

-

-library zylin;

-use zylin.zpu_config.all;

-use zylin.zpupkg.all;

-

-entity dram is

-port (clk : in std_logic;

-		areset : in std_logic;

-		mem_writeEnable : in std_logic;

-		mem_readEnable : in std_logic;

-		mem_addr : in std_logic_vector(maxAddrBit downto 0);

-		mem_write : in std_logic_vector(wordSize-1 downto 0);

-		mem_read : out std_logic_vector(wordSize-1 downto 0);

-		mem_busy : out std_logic;

-		mem_writeMask : in std_logic_vector(wordBytes-1 downto 0));

-end dram;

-

-architecture dram_arch of dram is

-

-type ram_type is array(0 to ((2**(maxAddrBit+1))/4)-1) of std_logic_vector(wordSize-1 downto 0);

-

-shared variable ram : ram_type :=

-(

-0 => x"800b0b0b",

-1 => x"0b0b8070",

-2 => x"0b0b80e5",

-3 => x"d00c3a0b",

-4 => x"0b0bbed7",

-5 => x"04000000",

-6 => x"00000000",

-7 => x"00000000",

-8 => x"80088408",

-9 => x"88080b0b",

-10 => x"0bbfa72d",

-11 => x"880c840c",

-12 => x"800c0400",

-13 => x"00000000",

-14 => x"00000000",

-15 => x"00000000",

-16 => x"71fd0608",

-17 => x"72830609",

-18 => x"81058205",

-19 => x"832b2a83",

-20 => x"ffff0652",

-21 => x"0b0b0400",

-22 => x"00000000",

-23 => x"00000000",

-24 => x"71fd0608",

-25 => x"83ffff73",

-26 => x"83060981",

-27 => x"05820583",

-28 => x"2b2b0906",

-29 => x"7383ffff",

-30 => x"0b0b0b0b",

-31 => x"83a70400",

-32 => x"72098105",

-33 => x"72057373",

-34 => x"09060906",

-35 => x"73097306",

-36 => x"070a8106",

-37 => x"530b0b51",

-38 => x"04000000",

-39 => x"00000000",

-40 => x"72722473",

-41 => x"732e0753",

-42 => x"0b0b5104",

-43 => x"00000000",

-44 => x"00000000",

-45 => x"00000000",

-46 => x"00000000",

-47 => x"00000000",

-48 => x"71737109",

-49 => x"71068106",

-50 => x"30720a10",

-51 => x"0a720a10",

-52 => x"0a31050a",

-53 => x"81065151",

-54 => x"530b0b51",

-55 => x"04000000",

-56 => x"72722673",

-57 => x"732e0753",

-58 => x"0b0b5104",

-59 => x"00000000",

-60 => x"00000000",

-61 => x"00000000",

-62 => x"00000000",

-63 => x"00000000",

-64 => x"00000000",

-65 => x"00000000",

-66 => x"00000000",

-67 => x"00000000",

-68 => x"00000000",

-69 => x"00000000",

-70 => x"00000000",

-71 => x"00000000",

-72 => x"0b0b0b88",

-73 => x"c6040000",

-74 => x"00000000",

-75 => x"00000000",

-76 => x"00000000",

-77 => x"00000000",

-78 => x"00000000",

-79 => x"00000000",

-80 => x"720a722b",

-81 => x"0a530b0b",

-82 => x"51040000",

-83 => x"00000000",

-84 => x"00000000",

-85 => x"00000000",

-86 => x"00000000",

-87 => x"00000000",

-88 => x"72729f06",

-89 => x"0981050b",

-90 => x"0b0b88a7",

-91 => x"05040000",

-92 => x"00000000",

-93 => x"00000000",

-94 => x"00000000",

-95 => x"00000000",

-96 => x"72722aff",

-97 => x"739f062a",

-98 => x"0974090a",

-99 => x"8106ff05",

-100 => x"0607530b",

-101 => x"0b510400",

-102 => x"00000000",

-103 => x"00000000",

-104 => x"7171530b",

-105 => x"0b510406",

-106 => x"73830609",

-107 => x"81058205",

-108 => x"832b0b2b",

-109 => x"0772fc06",

-110 => x"0c515104",

-111 => x"00000000",

-112 => x"72098105",

-113 => x"72050970",

-114 => x"81050906",

-115 => x"0a810653",

-116 => x"0b0b5104",

-117 => x"00000000",

-118 => x"00000000",

-119 => x"00000000",

-120 => x"72098105",

-121 => x"72050970",

-122 => x"81050906",

-123 => x"0a098106",

-124 => x"530b0b51",

-125 => x"04000000",

-126 => x"00000000",

-127 => x"00000000",

-128 => x"71098105",

-129 => x"520b0b04",

-130 => x"00000000",

-131 => x"00000000",

-132 => x"00000000",

-133 => x"00000000",

-134 => x"00000000",

-135 => x"00000000",

-136 => x"72720981",

-137 => x"0505530b",

-138 => x"0b510400",

-139 => x"00000000",

-140 => x"00000000",

-141 => x"00000000",

-142 => x"00000000",

-143 => x"00000000",

-144 => x"72097206",

-145 => x"73730906",

-146 => x"07530b0b",

-147 => x"51040000",

-148 => x"00000000",

-149 => x"00000000",

-150 => x"00000000",

-151 => x"00000000",

-152 => x"71fc0608",

-153 => x"72830609",

-154 => x"81058305",

-155 => x"1010102a",

-156 => x"81ff0652",

-157 => x"0b0b0400",

-158 => x"00000000",

-159 => x"00000000",

-160 => x"71fc0608",

-161 => x"0b0b80e5",

-162 => x"bc738306",

-163 => x"10100508",

-164 => x"060b0b0b",

-165 => x"88ac0400",

-166 => x"00000000",

-167 => x"00000000",

-168 => x"80088408",

-169 => x"88087575",

-170 => x"0b0b0ba3",

-171 => x"fa2d5050",

-172 => x"80085688",

-173 => x"0c840c80",

-174 => x"0c510400",

-175 => x"00000000",

-176 => x"80088408",

-177 => x"88087575",

-178 => x"0b0b0ba4",

-179 => x"ca2d5050",

-180 => x"80085688",

-181 => x"0c840c80",

-182 => x"0c510400",

-183 => x"00000000",

-184 => x"72097081",

-185 => x"0509060a",

-186 => x"8106ff05",

-187 => x"70540b0b",

-188 => x"71067309",

-189 => x"727405ff",

-190 => x"05060751",

-191 => x"51510400",

-192 => x"72097081",

-193 => x"0509060a",

-194 => x"098106ff",

-195 => x"0570540b",

-196 => x"0b710673",

-197 => x"09727405",

-198 => x"ff050607",

-199 => x"51515104",

-200 => x"05ff0504",

-201 => x"00000000",

-202 => x"00000000",

-203 => x"00000000",

-204 => x"00000000",

-205 => x"00000000",

-206 => x"00000000",

-207 => x"00000000",

-208 => x"810b0b0b",

-209 => x"80e5cc0c",

-210 => x"51040000",

-211 => x"00000000",

-212 => x"00000000",

-213 => x"00000000",

-214 => x"00000000",

-215 => x"00000000",

-216 => x"71810552",

-217 => x"0b0b0400",

-218 => x"00000000",

-219 => x"00000000",

-220 => x"00000000",

-221 => x"00000000",

-222 => x"00000000",

-223 => x"00000000",

-224 => x"00000000",

-225 => x"00000000",

-226 => x"00000000",

-227 => x"00000000",

-228 => x"00000000",

-229 => x"00000000",

-230 => x"00000000",

-231 => x"00000000",

-232 => x"02840572",

-233 => x"10100552",

-234 => x"0b0b0400",

-235 => x"00000000",

-236 => x"00000000",

-237 => x"00000000",

-238 => x"00000000",

-239 => x"00000000",

-240 => x"00000000",

-241 => x"00000000",

-242 => x"00000000",

-243 => x"00000000",

-244 => x"00000000",

-245 => x"00000000",

-246 => x"00000000",

-247 => x"00000000",

-248 => x"717105ff",

-249 => x"0571530b",

-250 => x"0b510400",

-251 => x"00000000",

-252 => x"00000000",

-253 => x"00000000",

-254 => x"00000000",

-255 => x"00000000",

-256 => x"84803f80",

-257 => x"cef23f04",

-258 => x"10101010",

-259 => x"10101010",

-260 => x"10101010",

-261 => x"10101010",

-262 => x"10101010",

-263 => x"10101010",

-264 => x"10101010",

-265 => x"10101053",

-266 => x"0b0b5104",

-267 => x"7381ff06",

-268 => x"73830609",

-269 => x"81058305",

-270 => x"1010102b",

-271 => x"0772fc06",

-272 => x"0c515104",

-273 => x"3c047272",

-274 => x"80728106",

-275 => x"ff050972",

-276 => x"06057110",

-277 => x"520b0b72",

-278 => x"0a100a53",

-279 => x"0b0b72e9",

-280 => x"38515153",

-281 => x"0b0b5104",

-282 => x"70700b0b",

-283 => x"80f5c008",

-284 => x"520b0b84",

-285 => x"0b720508",

-286 => x"70810651",

-287 => x"510b0b70",

-288 => x"f2387108",

-289 => x"81ff0680",

-290 => x"0c505004",

-291 => x"70700b0b",

-292 => x"80f5c008",

-293 => x"520b0b84",

-294 => x"0b720508",

-295 => x"700a100a",

-296 => x"70810651",

-297 => x"51510b0b",

-298 => x"70ed3873",

-299 => x"720c5050",

-300 => x"0480e5cc",

-301 => x"08802ea8",

-302 => x"38838080",

-303 => x"0b0b0b80",

-304 => x"f5c00c82",

-305 => x"a0800b0b",

-306 => x"0b80f5c4",

-307 => x"0c829080",

-308 => x"0b80f5d4",

-309 => x"0c0b0b80",

-310 => x"f5c80b80",

-311 => x"f5d80c04",

-312 => x"f8808080",

-313 => x"a40b0b0b",

-314 => x"80f5c00c",

-315 => x"f8808082",

-316 => x"800b0b0b",

-317 => x"80f5c40c",

-318 => x"f8808084",

-319 => x"800b80f5",

-320 => x"d40cf880",

-321 => x"8080940b",

-322 => x"80f5d80c",

-323 => x"f8808080",

-324 => x"9c0b80f5",

-325 => x"d00cf880",

-326 => x"8080a00b",

-327 => x"80f5dc0c",

-328 => x"04f23d0d",

-329 => x"600b0b80",

-330 => x"f5c40856",

-331 => x"5d82750c",

-332 => x"8059805a",

-333 => x"800b8f3d",

-334 => x"71101017",

-335 => x"70085957",

-336 => x"5d5b8076",

-337 => x"81ff067c",

-338 => x"832b5658",

-339 => x"520b0b0b",

-340 => x"76530b0b",

-341 => x"7b5198c6",

-342 => x"3f7d7f7a",

-343 => x"72077c72",

-344 => x"07717160",

-345 => x"8105415f",

-346 => x"5d5b5957",

-347 => x"557a8724",

-348 => x"80c1380b",

-349 => x"0b80f5c4",

-350 => x"087b1010",

-351 => x"71057008",

-352 => x"58515580",

-353 => x"7681ff06",

-354 => x"7c832b56",

-355 => x"58520b0b",

-356 => x"0b76530b",

-357 => x"0b7b5198",

-358 => x"853f7d7f",

-359 => x"7a72077c",

-360 => x"72077171",

-361 => x"60810541",

-362 => x"5f5d5b59",

-363 => x"5755877b",

-364 => x"25c13876",

-365 => x"7d0c7784",

-366 => x"1e0c7c80",

-367 => x"0c903d0d",

-368 => x"04707080",

-369 => x"f5cc3351",

-370 => x"0b0b70b2",

-371 => x"3880e5d8",

-372 => x"08700852",

-373 => x"0b0b520b",

-374 => x"0b0b7080",

-375 => x"2e9a3884",

-376 => x"720580e5",

-377 => x"d80c702d",

-378 => x"80e5d808",

-379 => x"7008520b",

-380 => x"0b520b0b",

-381 => x"0b70e838",

-382 => x"810b80f5",

-383 => x"cc345050",

-384 => x"0404700b",

-385 => x"0b80f5bc",

-386 => x"08802e8e",

-387 => x"380b0b0b",

-388 => x"0b800b80",

-389 => x"2e098106",

-390 => x"83385004",

-391 => x"0b0b80f5",

-392 => x"bc510b0b",

-393 => x"0bf3d93f",

-394 => x"50040470",

-395 => x"70028f05",

-396 => x"33520b0b",

-397 => x"0b0b718a",

-398 => x"2e893871",

-399 => x"51fccd3f",

-400 => x"5050048d",

-401 => x"51fcc53f",

-402 => x"7151fcc0",

-403 => x"3f505004",

-404 => x"cd3d0db6",

-405 => x"3d707084",

-406 => x"05520b0b",

-407 => x"088cab5d",

-408 => x"56a63d5f",

-409 => x"5d807570",

-410 => x"81055733",

-411 => x"765c5559",

-412 => x"0b730b79",

-413 => x"2e80ca38",

-414 => x"8f3d5c73",

-415 => x"a52e0981",

-416 => x"0680cf38",

-417 => x"79708105",

-418 => x"5b33540b",

-419 => x"0b7380e4",

-420 => x"2e81c838",

-421 => x"7380e424",

-422 => x"80d13873",

-423 => x"80e32ea8",

-424 => x"3880520b",

-425 => x"0ba5517a",

-426 => x"2d80520b",

-427 => x"0b73517a",

-428 => x"2d821959",

-429 => x"79708105",

-430 => x"5b33540b",

-431 => x"0b73ffbb",

-432 => x"3878800c",

-433 => x"b53d0d04",

-434 => x"7c841e83",

-435 => x"72053356",

-436 => x"5e578052",

-437 => x"0b0b7351",

-438 => x"7a2d8119",

-439 => x"7a708105",

-440 => x"5c335559",

-441 => x"0b73ff93",

-442 => x"38d73973",

-443 => x"80f32e09",

-444 => x"8106ffad",

-445 => x"387c841e",

-446 => x"7108595e",

-447 => x"56807733",

-448 => x"56560b74",

-449 => x"0b762e8d",

-450 => x"38811670",

-451 => x"1870335a",

-452 => x"555677f5",

-453 => x"38ff1655",

-454 => x"807625ff",

-455 => x"97387670",

-456 => x"81055833",

-457 => x"5880520b",

-458 => x"0b77517a",

-459 => x"2d811975",

-460 => x"ff175757",

-461 => x"59807625",

-462 => x"fefa3876",

-463 => x"70810558",

-464 => x"33588052",

-465 => x"0b0b7751",

-466 => x"7a2d8119",

-467 => x"75ff1757",

-468 => x"57590b75",

-469 => x"8024c738",

-470 => x"feda397c",

-471 => x"841e7108",

-472 => x"70719f2c",

-473 => x"59530b0b",

-474 => x"595e5680",

-475 => x"7524818d",

-476 => x"38757e7d",

-477 => x"58595580",

-478 => x"57740b77",

-479 => x"2e098106",

-480 => x"bc38b07c",

-481 => x"3402b905",

-482 => x"567b0b76",

-483 => x"2e9938ff",

-484 => x"16560b0b",

-485 => x"75337870",

-486 => x"81055a34",

-487 => x"8117577b",

-488 => x"762e0981",

-489 => x"06e93880",

-490 => x"7834767e",

-491 => x"ff720557",

-492 => x"58560b0b",

-493 => x"758024fe",

-494 => x"e538fdf8",

-495 => x"398a7536",

-496 => x"0b0b80d7",

-497 => x"b005540b",

-498 => x"0b733376",

-499 => x"70810558",

-500 => x"348a7535",

-501 => x"550b0b74",

-502 => x"802effad",

-503 => x"388a7536",

-504 => x"0b0b80d7",

-505 => x"b005540b",

-506 => x"0b733376",

-507 => x"70810558",

-508 => x"348a7535",

-509 => x"550b0b74",

-510 => x"c438ff8d",

-511 => x"3974520b",

-512 => x"0b76530b",

-513 => x"0bb53dff",

-514 => x"b8055192",

-515 => x"dc3fa43d",

-516 => x"0856fedd",

-517 => x"397080c1",

-518 => x"0b81c48c",

-519 => x"34800b81",

-520 => x"c5e40c70",

-521 => x"800c5004",

-522 => x"7070800b",

-523 => x"81c48c33",

-524 => x"520b0b52",

-525 => x"0b0b0b70",

-526 => x"80c12e98",

-527 => x"387181c5",

-528 => x"e4080781",

-529 => x"c5e40c80",

-530 => x"c20b81c4",

-531 => x"90347080",

-532 => x"0c505004",

-533 => x"810b81c5",

-534 => x"e4080781",

-535 => x"c5e40c80",

-536 => x"c20b81c4",

-537 => x"90347080",

-538 => x"0c505004",

-539 => x"70707070",

-540 => x"7570088a",

-541 => x"05530b0b",

-542 => x"530b0b81",

-543 => x"c48c3351",

-544 => x"0b0b7080",

-545 => x"c12e8c38",

-546 => x"73f13870",

-547 => x"800c5050",

-548 => x"505004ff",

-549 => x"72057081",

-550 => x"c4880831",

-551 => x"740c800c",

-552 => x"50505050",

-553 => x"04fc3d0d",

-554 => x"81c49408",

-555 => x"550b0b74",

-556 => x"802e8e38",

-557 => x"76750871",

-558 => x"0c81c494",

-559 => x"0856540b",

-560 => x"0b8c1553",

-561 => x"0b0b81c4",

-562 => x"8808520b",

-563 => x"0b8a518e",

-564 => x"e93f7380",

-565 => x"0c863d0d",

-566 => x"04fb3d0d",

-567 => x"77700856",

-568 => x"56b0530b",

-569 => x"0b81c494",

-570 => x"08520b0b",

-571 => x"7451a1ff",

-572 => x"3f850b8c",

-573 => x"170c850b",

-574 => x"8c160c75",

-575 => x"08750c81",

-576 => x"c4940854",

-577 => x"0b0b7380",

-578 => x"2e8c3873",

-579 => x"08750c81",

-580 => x"c4940854",

-581 => x"0b0b8c14",

-582 => x"530b0b81",

-583 => x"c4880852",

-584 => x"0b0b8a51",

-585 => x"8e943f84",

-586 => x"1508b738",

-587 => x"860b8c16",

-588 => x"0c881552",

-589 => x"0b0b8816",

-590 => x"08518d96",

-591 => x"3f81c494",

-592 => x"08700876",

-593 => x"0c540b0b",

-594 => x"8c157054",

-595 => x"0b0b540b",

-596 => x"0b8a520b",

-597 => x"0b730851",

-598 => x"8de03f73",

-599 => x"800c873d",

-600 => x"0d047508",

-601 => x"540b0bb0",

-602 => x"530b0b73",

-603 => x"520b0b75",

-604 => x"51a0fc3f",

-605 => x"73800c87",

-606 => x"3d0d04e1",

-607 => x"3d0db051",

-608 => x"93833f80",

-609 => x"0881c484",

-610 => x"0cb05192",

-611 => x"f83f8008",

-612 => x"81c4940c",

-613 => x"81c48408",

-614 => x"80080c80",

-615 => x"0b800884",

-616 => x"050c820b",

-617 => x"80088805",

-618 => x"0ca80b80",

-619 => x"088c050c",

-620 => x"9f530b0b",

-621 => x"0b0b80d7",

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-3054 => x"20202020",

-3055 => x"2025640a",

-3056 => x"00000000",

-3057 => x"5374725f",

-3058 => x"315f4c6f",

-3059 => x"633a2020",

-3060 => x"20202020",

-3061 => x"20202020",

-3062 => x"2025730a",

-3063 => x"00000000",

-3064 => x"20202020",

-3065 => x"20202020",

-3066 => x"73686f75",

-3067 => x"6c642062",

-3068 => x"653a2020",

-3069 => x"20444852",

-3070 => x"5953544f",

-3071 => x"4e452050",

-3072 => x"524f4752",

-3073 => x"414d2c20",

-3074 => x"31275354",

-3075 => x"20535452",

-3076 => x"494e470a",

-3077 => x"00000000",

-3078 => x"5374725f",

-3079 => x"325f4c6f",

-3080 => x"633a2020",

-3081 => x"20202020",

-3082 => x"20202020",

-3083 => x"2025730a",

-3084 => x"00000000",

-3085 => x"20202020",

-3086 => x"20202020",

-3087 => x"73686f75",

-3088 => x"6c642062",

-3089 => x"653a2020",

-3090 => x"20444852",

-3091 => x"5953544f",

-3092 => x"4e452050",

-3093 => x"524f4752",

-3094 => x"414d2c20",

-3095 => x"32274e44",

-3096 => x"20535452",

-3097 => x"494e470a",

-3098 => x"00000000",

-3099 => x"55736572",

-3100 => x"2074696d",

-3101 => x"653a2025",

-3102 => x"640a0000",

-3103 => x"4d696372",

-3104 => x"6f736563",

-3105 => x"6f6e6473",

-3106 => x"20666f72",

-3107 => x"206f6e65",

-3108 => x"2072756e",

-3109 => x"20746872",

-3110 => x"6f756768",

-3111 => x"20446872",

-3112 => x"7973746f",

-3113 => x"6e653a20",

-3114 => x"00000000",

-3115 => x"2564200a",

-3116 => x"00000000",

-3117 => x"44687279",

-3118 => x"73746f6e",

-3119 => x"65732070",

-3120 => x"65722053",

-3121 => x"65636f6e",

-3122 => x"643a2020",

-3123 => x"20202020",

-3124 => x"20202020",

-3125 => x"20202020",

-3126 => x"20202020",

-3127 => x"20202020",

-3128 => x"00000000",

-3129 => x"56415820",

-3130 => x"4d495053",

-3131 => x"20726174",

-3132 => x"696e6720",

-3133 => x"2a203130",

-3134 => x"3030203d",

-3135 => x"20256420",

-3136 => x"0a000000",

-3137 => x"50726f67",

-3138 => x"72616d20",

-3139 => x"636f6d70",

-3140 => x"696c6564",

-3141 => x"20776974",

-3142 => x"686f7574",

-3143 => x"20277265",

-3144 => x"67697374",

-3145 => x"65722720",

-3146 => x"61747472",

-3147 => x"69627574",

-3148 => x"650a0000",

-3149 => x"4d656173",

-3150 => x"75726564",

-3151 => x"2074696d",

-3152 => x"6520746f",

-3153 => x"6f20736d",

-3154 => x"616c6c20",

-3155 => x"746f206f",

-3156 => x"62746169",

-3157 => x"6e206d65",

-3158 => x"616e696e",

-3159 => x"6766756c",

-3160 => x"20726573",

-3161 => x"756c7473",

-3162 => x"0a000000",

-3163 => x"506c6561",

-3164 => x"73652069",

-3165 => x"6e637265",

-3166 => x"61736520",

-3167 => x"6e756d62",

-3168 => x"6572206f",

-3169 => x"66207275",

-3170 => x"6e730a00",

-3171 => x"44485259",

-3172 => x"53544f4e",

-3173 => x"45205052",

-3174 => x"4f475241",

-3175 => x"4d2c2033",

-3176 => x"27524420",

-3177 => x"53545249",

-3178 => x"4e470000",

-3179 => x"43000000",

-3180 => x"64756d6d",

-3181 => x"792e6578",

-3182 => x"65000000",

-3183 => x"00010202",

-3184 => x"03030303",

-3185 => x"04040404",

-3186 => x"04040404",

-3187 => x"05050505",

-3188 => x"05050505",

-3189 => x"05050505",

-3190 => x"05050505",

-3191 => x"06060606",

-3192 => x"06060606",

-3193 => x"06060606",

-3194 => x"06060606",

-3195 => x"06060606",

-3196 => x"06060606",

-3197 => x"06060606",

-3198 => x"06060606",

-3199 => x"07070707",

-3200 => x"07070707",

-3201 => x"07070707",

-3202 => x"07070707",

-3203 => x"07070707",

-3204 => x"07070707",

-3205 => x"07070707",

-3206 => x"07070707",

-3207 => x"07070707",

-3208 => x"07070707",

-3209 => x"07070707",

-3210 => x"07070707",

-3211 => x"07070707",

-3212 => x"07070707",

-3213 => x"07070707",

-3214 => x"07070707",

-3215 => x"08080808",

-3216 => x"08080808",

-3217 => x"08080808",

-3218 => x"08080808",

-3219 => x"08080808",

-3220 => x"08080808",

-3221 => x"08080808",

-3222 => x"08080808",

-3223 => x"08080808",

-3224 => x"08080808",

-3225 => x"08080808",

-3226 => x"08080808",

-3227 => x"08080808",

-3228 => x"08080808",

-3229 => x"08080808",

-3230 => x"08080808",

-3231 => x"08080808",

-3232 => x"08080808",

-3233 => x"08080808",

-3234 => x"08080808",

-3235 => x"08080808",

-3236 => x"08080808",

-3237 => x"08080808",

-3238 => x"08080808",

-3239 => x"08080808",

-3240 => x"08080808",

-3241 => x"08080808",

-3242 => x"08080808",

-3243 => x"08080808",

-3244 => x"08080808",

-3245 => x"08080808",

-3246 => x"08080808",

-3247 => x"00ffffff",

-3248 => x"ff00ffff",

-3249 => x"ffff00ff",

-3250 => x"ffffff00",

-3251 => x"00000000",

-3252 => x"00000000",

-3253 => x"00000000",

-3254 => x"00003ab8",

-3255 => x"000186a0", -- iterations

-3256 => x"00000000",

-3257 => x"00000000",

-3258 => x"00000000",

-3259 => x"00000000",

-3260 => x"00000000",

-3261 => x"00000000",

-3262 => x"00000000",

-3263 => x"00000000",

-3264 => x"00000000",

-3265 => x"00000000",

-3266 => x"00000000",

-3267 => x"00000000",

-3268 => x"00000000",

-3269 => x"ffffffff",

-3270 => x"00000000",

-3271 => x"00020000",

-3272 => x"00000000",

-3273 => x"00000000",

-3274 => x"00003320",

-3275 => x"00003320",

-3276 => x"00003328",

-3277 => x"00003328",

-3278 => x"00003330",

-3279 => x"00003330",

-3280 => x"00003338",

-3281 => x"00003338",

-3282 => x"00003340",

-3283 => x"00003340",

-3284 => x"00003348",

-3285 => x"00003348",

-3286 => x"00003350",

-3287 => x"00003350",

-3288 => x"00003358",

-3289 => x"00003358",

-3290 => x"00003360",

-3291 => x"00003360",

-3292 => x"00003368",

-3293 => x"00003368",

-3294 => x"00003370",

-3295 => x"00003370",

-3296 => x"00003378",

-3297 => x"00003378",

-3298 => x"00003380",

-3299 => x"00003380",

-3300 => x"00003388",

-3301 => x"00003388",

-3302 => x"00003390",

-3303 => x"00003390",

-3304 => x"00003398",

-3305 => x"00003398",

-3306 => x"000033a0",

-3307 => x"000033a0",

-3308 => x"000033a8",

-3309 => x"000033a8",

-3310 => x"000033b0",

-3311 => x"000033b0",

-3312 => x"000033b8",

-3313 => x"000033b8",

-3314 => x"000033c0",

-3315 => x"000033c0",

-3316 => x"000033c8",

-3317 => x"000033c8",

-3318 => x"000033d0",

-3319 => x"000033d0",

-3320 => x"000033d8",

-3321 => x"000033d8",

-3322 => x"000033e0",

-3323 => x"000033e0",

-3324 => x"000033e8",

-3325 => x"000033e8",

-3326 => x"000033f0",

-3327 => x"000033f0",

-3328 => x"000033f8",

-3329 => x"000033f8",

-3330 => x"00003400",

-3331 => x"00003400",

-3332 => x"00003408",

-3333 => x"00003408",

-3334 => x"00003410",

-3335 => x"00003410",

-3336 => x"00003418",

-3337 => x"00003418",

-3338 => x"00003420",

-3339 => x"00003420",

-3340 => x"00003428",

-3341 => x"00003428",

-3342 => x"00003430",

-3343 => x"00003430",

-3344 => x"00003438",

-3345 => x"00003438",

-3346 => x"00003440",

-3347 => x"00003440",

-3348 => x"00003448",

-3349 => x"00003448",

-3350 => x"00003450",

-3351 => x"00003450",

-3352 => x"00003458",

-3353 => x"00003458",

-3354 => x"00003460",

-3355 => x"00003460",

-3356 => x"00003468",

-3357 => x"00003468",

-3358 => x"00003470",

-3359 => x"00003470",

-3360 => x"00003478",

-3361 => x"00003478",

-3362 => x"00003480",

-3363 => x"00003480",

-3364 => x"00003488",

-3365 => x"00003488",

-3366 => x"00003490",

-3367 => x"00003490",

-3368 => x"00003498",

-3369 => x"00003498",

-3370 => x"000034a0",

-3371 => x"000034a0",

-3372 => x"000034a8",

-3373 => x"000034a8",

-3374 => x"000034b0",

-3375 => x"000034b0",

-3376 => x"000034b8",

-3377 => x"000034b8",

-3378 => x"000034c0",

-3379 => x"000034c0",

-3380 => x"000034c8",

-3381 => x"000034c8",

-3382 => x"000034d0",

-3383 => x"000034d0",

-3384 => x"000034d8",

-3385 => x"000034d8",

-3386 => x"000034e0",

-3387 => x"000034e0",

-3388 => x"000034e8",

-3389 => x"000034e8",

-3390 => x"000034f0",

-3391 => x"000034f0",

-3392 => x"000034f8",

-3393 => x"000034f8",

-3394 => x"00003500",

-3395 => x"00003500",

-3396 => x"00003508",

-3397 => x"00003508",

-3398 => x"00003510",

-3399 => x"00003510",

-3400 => x"00003518",

-3401 => x"00003518",

-3402 => x"00003520",

-3403 => x"00003520",

-3404 => x"00003528",

-3405 => x"00003528",

-3406 => x"00003530",

-3407 => x"00003530",

-3408 => x"00003538",

-3409 => x"00003538",

-3410 => x"00003540",

-3411 => x"00003540",

-3412 => x"00003548",

-3413 => x"00003548",

-3414 => x"00003550",

-3415 => x"00003550",

-3416 => x"00003558",

-3417 => x"00003558",

-3418 => x"00003560",

-3419 => x"00003560",

-3420 => x"00003568",

-3421 => x"00003568",

-3422 => x"00003570",

-3423 => x"00003570",

-3424 => x"00003578",

-3425 => x"00003578",

-3426 => x"00003580",

-3427 => x"00003580",

-3428 => x"00003588",

-3429 => x"00003588",

-3430 => x"00003590",

-3431 => x"00003590",

-3432 => x"00003598",

-3433 => x"00003598",

-3434 => x"000035a0",

-3435 => x"000035a0",

-3436 => x"000035a8",

-3437 => x"000035a8",

-3438 => x"000035b0",

-3439 => x"000035b0",

-3440 => x"000035b8",

-3441 => x"000035b8",

-3442 => x"000035c0",

-3443 => x"000035c0",

-3444 => x"000035c8",

-3445 => x"000035c8",

-3446 => x"000035d0",

-3447 => x"000035d0",

-3448 => x"000035d8",

-3449 => x"000035d8",

-3450 => x"000035e0",

-3451 => x"000035e0",

-3452 => x"000035e8",

-3453 => x"000035e8",

-3454 => x"000035f0",

-3455 => x"000035f0",

-3456 => x"000035f8",

-3457 => x"000035f8",

-3458 => x"00003600",

-3459 => x"00003600",

-3460 => x"00003608",

-3461 => x"00003608",

-3462 => x"00003610",

-3463 => x"00003610",

-3464 => x"00003618",

-3465 => x"00003618",

-3466 => x"00003620",

-3467 => x"00003620",

-3468 => x"00003628",

-3469 => x"00003628",

-3470 => x"00003630",

-3471 => x"00003630",

-3472 => x"00003638",

-3473 => x"00003638",

-3474 => x"00003640",

-3475 => x"00003640",

-3476 => x"00003648",

-3477 => x"00003648",

-3478 => x"00003650",

-3479 => x"00003650",

-3480 => x"00003658",

-3481 => x"00003658",

-3482 => x"00003660",

-3483 => x"00003660",

-3484 => x"00003668",

-3485 => x"00003668",

-3486 => x"00003670",

-3487 => x"00003670",

-3488 => x"00003678",

-3489 => x"00003678",

-3490 => x"00003680",

-3491 => x"00003680",

-3492 => x"00003688",

-3493 => x"00003688",

-3494 => x"00003690",

-3495 => x"00003690",

-3496 => x"00003698",

-3497 => x"00003698",

-3498 => x"000036a0",

-3499 => x"000036a0",

-3500 => x"000036a8",

-3501 => x"000036a8",

-3502 => x"000036b0",

-3503 => x"000036b0",

-3504 => x"000036b8",

-3505 => x"000036b8",

-3506 => x"000036c0",

-3507 => x"000036c0",

-3508 => x"000036c8",

-3509 => x"000036c8",

-3510 => x"000036d0",

-3511 => x"000036d0",

-3512 => x"000036d8",

-3513 => x"000036d8",

-3514 => x"000036e0",

-3515 => x"000036e0",

-3516 => x"000036e8",

-3517 => x"000036e8",

-3518 => x"000036f0",

-3519 => x"000036f0",

-3520 => x"000036f8",

-3521 => x"000036f8",

-3522 => x"00003700",

-3523 => x"00003700",

-3524 => x"00003708",

-3525 => x"00003708",

-3526 => x"00003710",

-3527 => x"00003710",

-3528 => x"00003718",

-3529 => x"00003718",

-3530 => x"0000372c",

-3531 => x"00000000",

-3532 => x"00003994",

-3533 => x"000039f0",

-3534 => x"00003a4c",

-3535 => x"00000000",

-3536 => x"00000000",

-3537 => x"00000000",

-3538 => x"00000000",

-3539 => x"00000000",

-3540 => x"00000000",

-3541 => x"00000000",

-3542 => x"00000000",

-3543 => x"00000000",

-3544 => x"000031ac",

-3545 => x"00000000",

-3546 => x"00000000",

-3547 => x"00000000",

-3548 => x"00000000",

-3549 => x"00000000",

-3550 => x"00000000",

-3551 => x"00000000",

-3552 => x"00000000",

-3553 => x"00000000",

-3554 => x"00000000",

-3555 => x"00000000",

-3556 => x"00000000",

-3557 => x"00000000",

-3558 => x"00000000",

-3559 => x"00000000",

-3560 => x"00000000",

-3561 => x"00000000",

-3562 => x"00000000",

-3563 => x"00000000",

-3564 => x"00000000",

-3565 => x"00000000",

-3566 => x"00000000",

-3567 => x"00000000",

-3568 => x"00000000",

-3569 => x"00000000",

-3570 => x"00000000",

-3571 => x"00000000",

-3572 => x"00000000",

-3573 => x"00000001",

-3574 => x"330eabcd",

-3575 => x"1234e66d",

-3576 => x"deec0005",

-3577 => x"000b0000",

-3578 => x"00000000",

-3579 => x"00000000",

-3580 => x"00000000",

-3581 => x"00000000",

-3582 => x"00000000",

-3583 => x"00000000",

-3584 => x"00000000",

-3585 => x"00000000",

-3586 => x"00000000",

-3587 => x"00000000",

-3588 => x"00000000",

-3589 => x"00000000",

-3590 => x"00000000",

-3591 => x"00000000",

-3592 => x"00000000",

-3593 => x"00000000",

-3594 => x"00000000",

-3595 => x"00000000",

-3596 => x"00000000",

-3597 => x"00000000",

-3598 => x"00000000",

-3599 => x"00000000",

-3600 => x"00000000",

-3601 => x"00000000",

-3602 => x"00000000",

-3603 => x"00000000",

-3604 => x"00000000",

-3605 => x"00000000",

-3606 => x"00000000",

-3607 => x"00000000",

-3608 => x"00000000",

-3609 => x"00000000",

-3610 => x"00000000",

-3611 => x"00000000",

-3612 => x"00000000",

-3613 => x"00000000",

-3614 => x"00000000",

-3615 => x"00000000",

-3616 => x"00000000",

-3617 => x"00000000",

-3618 => x"00000000",

-3619 => x"00000000",

-3620 => x"00000000",

-3621 => x"00000000",

-3622 => x"00000000",

-3623 => x"00000000",

-3624 => x"00000000",

-3625 => x"00000000",

-3626 => x"00000000",

-3627 => x"00000000",

-3628 => x"00000000",

-3629 => x"00000000",

-3630 => x"00000000",

-3631 => x"00000000",

-3632 => x"00000000",

-3633 => x"00000000",

-3634 => x"00000000",

-3635 => x"00000000",

-3636 => x"00000000",

-3637 => x"00000000",

-3638 => x"00000000",

-3639 => x"00000000",

-3640 => x"00000000",

-3641 => x"00000000",

-3642 => x"00000000",

-3643 => x"00000000",

-3644 => x"00000000",

-3645 => x"00000000",

-3646 => x"00000000",

-3647 => x"00000000",

-3648 => x"00000000",

-3649 => x"00000000",

-3650 => x"00000000",

-3651 => x"00000000",

-3652 => x"00000000",

-3653 => x"00000000",

-3654 => x"00000000",

-3655 => x"00000000",

-3656 => x"00000000",

-3657 => x"00000000",

-3658 => x"00000000",

-3659 => x"00000000",

-3660 => x"00000000",

-3661 => x"00000000",

-3662 => x"00000000",

-3663 => x"00000000",

-3664 => x"00000000",

-3665 => x"00000000",

-3666 => x"00000000",

-3667 => x"00000000",

-3668 => x"00000000",

-3669 => x"00000000",

-3670 => x"00000000",

-3671 => x"00000000",

-3672 => x"00000000",

-3673 => x"00000000",

-3674 => x"00000000",

-3675 => x"00000000",

-3676 => x"00000000",

-3677 => x"00000000",

-3678 => x"00000000",

-3679 => x"00000000",

-3680 => x"00000000",

-3681 => x"00000000",

-3682 => x"00000000",

-3683 => x"00000000",

-3684 => x"00000000",

-3685 => x"00000000",

-3686 => x"00000000",

-3687 => x"00000000",

-3688 => x"00000000",

-3689 => x"00000000",

-3690 => x"00000000",

-3691 => x"00000000",

-3692 => x"00000000",

-3693 => x"00000000",

-3694 => x"00000000",

-3695 => x"00000000",

-3696 => x"00000000",

-3697 => x"00000000",

-3698 => x"00000000",

-3699 => x"00000000",

-3700 => x"00000000",

-3701 => x"00000000",

-3702 => x"00000000",

-3703 => x"00000000",

-3704 => x"00000000",

-3705 => x"00000000",

-3706 => x"00000000",

-3707 => x"00000000",

-3708 => x"00000000",

-3709 => x"00000000",

-3710 => x"00000000",

-3711 => x"00000000",

-3712 => x"00000000",

-3713 => x"00000000",

-3714 => x"00000000",

-3715 => x"00000000",

-3716 => x"00000000",

-3717 => x"00000000",

-3718 => x"00000000",

-3719 => x"00000000",

-3720 => x"00000000",

-3721 => x"00000000",

-3722 => x"00000000",

-3723 => x"00000000",

-3724 => x"00000000",

-3725 => x"00000000",

-3726 => x"00000000",

-3727 => x"00000000",

-3728 => x"00000000",

-3729 => x"00000000",

-3730 => x"00000000",

-3731 => x"00000000",

-3732 => x"00000000",

-3733 => x"00000000",

-3734 => x"00000000",

-3735 => x"00000000",

-3736 => x"00000000",

-3737 => x"00000000",

-3738 => x"00000000",

-3739 => x"00000000",

-3740 => x"00000000",

-3741 => x"00000000",

-3742 => x"00000000",

-3743 => x"00000000",

-3744 => x"00000000",

-3745 => x"00000000",

-3746 => x"00000000",

-3747 => x"00000000",

-3748 => x"00000000",

-3749 => x"00000000",

-3750 => x"00000000",

-3751 => x"00000000",

-3752 => x"00000000",

-3753 => x"00000000",

-3754 => x"000031b0",

-3755 => x"ffffffff",

-3756 => x"00000000",

-3757 => x"ffffffff",

-3758 => x"00000000",

-	others => x"00000000"

-);

-

-begin

-

-mem_busy <= '0';

-

-process (clk)

-begin

-	if (clk'event and clk = '1') then

-		if (mem_writeEnable = '1') then

-			ram(conv_integer(mem_addr)) := mem_write;

-		end if;

-		mem_read <= ram(conv_integer(mem_addr));

-	end if;

-end process;

-

-

-

-

-end dram_arch;

diff --git a/zpu/hdl/zpu4/src/bram_dmips.vhd b/zpu/hdl/zpu4/src/bram_dmips.vhd
deleted file mode 100644
index 1d62d21..0000000
--- a/zpu/hdl/zpu4/src/bram_dmips.vhd
+++ /dev/null
@@ -1,3717 +0,0 @@
-library ieee;

-use ieee.std_logic_1164.all;

-use ieee.numeric_std.all;

-

-

-library work;

-use work.zpu_config.all;

-use work.zpupkg.all;

-

-entity dualport_ram is

-port (clk : in std_logic;

-	memAWriteEnable : in std_logic;

-	memAAddr : in std_logic_vector(maxAddrBitBRAM downto minAddrBit);

-	memAWrite : in std_logic_vector(wordSize-1 downto 0);

-	memARead : out std_logic_vector(wordSize-1 downto 0);

-	memBWriteEnable : in std_logic;

-	memBAddr : in std_logic_vector(maxAddrBitBRAM downto minAddrBit);

-	memBWrite : in std_logic_vector(wordSize-1 downto 0);

-	memBRead : out std_logic_vector(wordSize-1 downto 0));

-end dualport_ram;

-

-architecture dualport_ram_arch of dualport_ram is

-

-

-type ram_type is array(natural range 0 to ((2**(maxAddrBitBRAM+1))/4)-1) of std_logic_vector(wordSize-1 downto 0);

-

-shared variable ram : ram_type :=

-(

-0 => x"0b0b0b0b",

-1 => x"80700b0b",

-2 => x"80e2a40c",

-3 => x"3a0b0b80",

-4 => x"c6fc0400",

-5 => x"00000000",

-6 => x"00000000",

-7 => x"00000000",

-8 => x"80088408",

-9 => x"88080b0b",

-10 => x"80c7c32d",

-11 => x"880c840c",

-12 => x"800c0400",

-13 => x"00000000",

-14 => x"00000000",

-15 => x"00000000",

-16 => x"71fd0608",

-17 => x"72830609",

-18 => x"81058205",

-19 => x"832b2a83",

-20 => x"ffff0652",

-21 => x"04000000",

-22 => x"00000000",

-23 => x"00000000",

-24 => x"71fd0608",

-25 => x"83ffff73",

-26 => x"83060981",

-27 => x"05820583",

-28 => x"2b2b0906",

-29 => x"7383ffff",

-30 => x"0b0b0b0b",

-31 => x"83a70400",

-32 => x"72098105",

-33 => x"72057373",

-34 => x"09060906",

-35 => x"73097306",

-36 => x"070a8106",

-37 => x"53510400",

-38 => x"00000000",

-39 => x"00000000",

-40 => x"72722473",

-41 => x"732e0753",

-42 => x"51040000",

-43 => x"00000000",

-44 => x"00000000",

-45 => x"00000000",

-46 => x"00000000",

-47 => x"00000000",

-48 => x"71737109",

-49 => x"71068106",

-50 => x"30720a10",

-51 => x"0a720a10",

-52 => x"0a31050a",

-53 => x"81065151",

-54 => x"53510400",

-55 => x"00000000",

-56 => x"72722673",

-57 => x"732e0753",

-58 => x"51040000",

-59 => x"00000000",

-60 => x"00000000",

-61 => x"00000000",

-62 => x"00000000",

-63 => x"00000000",

-64 => x"00000000",

-65 => x"00000000",

-66 => x"00000000",

-67 => x"00000000",

-68 => x"00000000",

-69 => x"00000000",

-70 => x"00000000",

-71 => x"00000000",

-72 => x"0b0b0b88",

-73 => x"c4040000",

-74 => x"00000000",

-75 => x"00000000",

-76 => x"00000000",

-77 => x"00000000",

-78 => x"00000000",

-79 => x"00000000",

-80 => x"720a722b",

-81 => x"0a535104",

-82 => x"00000000",

-83 => x"00000000",

-84 => x"00000000",

-85 => x"00000000",

-86 => x"00000000",

-87 => x"00000000",

-88 => x"72729f06",

-89 => x"0981050b",

-90 => x"0b0b88a7",

-91 => x"05040000",

-92 => x"00000000",

-93 => x"00000000",

-94 => x"00000000",

-95 => x"00000000",

-96 => x"72722aff",

-97 => x"739f062a",

-98 => x"0974090a",

-99 => x"8106ff05",

-100 => x"06075351",

-101 => x"04000000",

-102 => x"00000000",

-103 => x"00000000",

-104 => x"71715351",

-105 => x"020d0406",

-106 => x"73830609",

-107 => x"81058205",

-108 => x"832b0b2b",

-109 => x"0772fc06",

-110 => x"0c515104",

-111 => x"00000000",

-112 => x"72098105",

-113 => x"72050970",

-114 => x"81050906",

-115 => x"0a810653",

-116 => x"51040000",

-117 => x"00000000",

-118 => x"00000000",

-119 => x"00000000",

-120 => x"72098105",

-121 => x"72050970",

-122 => x"81050906",

-123 => x"0a098106",

-124 => x"53510400",

-125 => x"00000000",

-126 => x"00000000",

-127 => x"00000000",

-128 => x"71098105",

-129 => x"52040000",

-130 => x"00000000",

-131 => x"00000000",

-132 => x"00000000",

-133 => x"00000000",

-134 => x"00000000",

-135 => x"00000000",

-136 => x"72720981",

-137 => x"05055351",

-138 => x"04000000",

-139 => x"00000000",

-140 => x"00000000",

-141 => x"00000000",

-142 => x"00000000",

-143 => x"00000000",

-144 => x"72097206",

-145 => x"73730906",

-146 => x"07535104",

-147 => x"00000000",

-148 => x"00000000",

-149 => x"00000000",

-150 => x"00000000",

-151 => x"00000000",

-152 => x"71fc0608",

-153 => x"72830609",

-154 => x"81058305",

-155 => x"1010102a",

-156 => x"81ff0652",

-157 => x"04000000",

-158 => x"00000000",

-159 => x"00000000",

-160 => x"71fc0608",

-161 => x"0b0b80e2",

-162 => x"90738306",

-163 => x"10100508",

-164 => x"060b0b0b",

-165 => x"88aa0400",

-166 => x"00000000",

-167 => x"00000000",

-168 => x"80088408",

-169 => x"88087575",

-170 => x"0b0b0baf",

-171 => x"ac2d5050",

-172 => x"80085688",

-173 => x"0c840c80",

-174 => x"0c510400",

-175 => x"00000000",

-176 => x"80088408",

-177 => x"88087575",

-178 => x"0b0b0baf",

-179 => x"f02d5050",

-180 => x"80085688",

-181 => x"0c840c80",

-182 => x"0c510400",

-183 => x"00000000",

-184 => x"72097081",

-185 => x"0509060a",

-186 => x"8106ff05",

-187 => x"70547106",

-188 => x"73097274",

-189 => x"05ff0506",

-190 => x"07515151",

-191 => x"04000000",

-192 => x"72097081",

-193 => x"0509060a",

-194 => x"098106ff",

-195 => x"05705471",

-196 => x"06730972",

-197 => x"7405ff05",

-198 => x"06075151",

-199 => x"51040000",

-200 => x"05ff0504",

-201 => x"00000000",

-202 => x"00000000",

-203 => x"00000000",

-204 => x"00000000",

-205 => x"00000000",

-206 => x"00000000",

-207 => x"00000000",

-208 => x"810b0b0b",

-209 => x"80e2a00c",

-210 => x"51040000",

-211 => x"00000000",

-212 => x"00000000",

-213 => x"00000000",

-214 => x"00000000",

-215 => x"00000000",

-216 => x"71810552",

-217 => x"04000000",

-218 => x"00000000",

-219 => x"00000000",

-220 => x"00000000",

-221 => x"00000000",

-222 => x"00000000",

-223 => x"00000000",

-224 => x"00000000",

-225 => x"00000000",

-226 => x"00000000",

-227 => x"00000000",

-228 => x"00000000",

-229 => x"00000000",

-230 => x"00000000",

-231 => x"00000000",

-232 => x"02840572",

-233 => x"10100552",

-234 => x"04000000",

-235 => x"00000000",

-236 => x"00000000",

-237 => x"00000000",

-238 => x"00000000",

-239 => x"00000000",

-240 => x"00000000",

-241 => x"00000000",

-242 => x"00000000",

-243 => x"00000000",

-244 => x"00000000",

-245 => x"00000000",

-246 => x"00000000",

-247 => x"00000000",

-248 => x"717105ff",

-249 => x"05715351",

-250 => x"020d0400",

-251 => x"00000000",

-252 => x"00000000",

-253 => x"00000000",

-254 => x"00000000",

-255 => x"00000000",

-256 => x"83d93f80",

-257 => x"cbcf3f04",

-258 => x"10101010",

-259 => x"10101010",

-260 => x"10101010",

-261 => x"10101010",

-262 => x"10101010",

-263 => x"10101010",

-264 => x"10101010",

-265 => x"10101053",

-266 => x"51047381",

-267 => x"ff067383",

-268 => x"06098105",

-269 => x"83051010",

-270 => x"102b0772",

-271 => x"fc060c51",

-272 => x"51043c04",

-273 => x"72728072",

-274 => x"8106ff05",

-275 => x"09720605",

-276 => x"71105272",

-277 => x"0a100a53",

-278 => x"72ed3851",

-279 => x"51535104",

-280 => x"ff3d0d0b",

-281 => x"0b80f294",

-282 => x"08528412",

-283 => x"08708106",

-284 => x"515170f6",

-285 => x"38710881",

-286 => x"ff06800c",

-287 => x"833d0d04",

-288 => x"ff3d0d0b",

-289 => x"0b80f294",

-290 => x"08528412",

-291 => x"08700a10",

-292 => x"0a708106",

-293 => x"51515170",

-294 => x"f1387372",

-295 => x"0c833d0d",

-296 => x"0480e2a0",

-297 => x"08802ea8",

-298 => x"38838080",

-299 => x"0b0b0b80",

-300 => x"f2940c82",

-301 => x"a0800b0b",

-302 => x"0b80f298",

-303 => x"0c829080",

-304 => x"0b80f2a8",

-305 => x"0c0b0b80",

-306 => x"f29c0b80",

-307 => x"f2ac0c04",

-308 => x"f8808080",

-309 => x"a40b0b0b",

-310 => x"80f2940c",

-311 => x"f8808082",

-312 => x"800b0b0b",

-313 => x"80f2980c",

-314 => x"f8808084",

-315 => x"800b80f2",

-316 => x"a80cf880",

-317 => x"8080940b",

-318 => x"80f2ac0c",

-319 => x"f8808080",

-320 => x"9c0b80f2",

-321 => x"a40cf880",

-322 => x"8080a00b",

-323 => x"80f2b00c",

-324 => x"04f23d0d",

-325 => x"600b0b80",

-326 => x"f2980856",

-327 => x"5d82750c",

-328 => x"8059805a",

-329 => x"800b8f3d",

-330 => x"71101017",

-331 => x"70085957",

-332 => x"5d5b8076",

-333 => x"81ff067c",

-334 => x"832b5658",

-335 => x"5276537b",

-336 => x"519af33f",

-337 => x"7d7f7a72",

-338 => x"077c7207",

-339 => x"71716081",

-340 => x"05415f5d",

-341 => x"5b595755",

-342 => x"7a8724bb",

-343 => x"380b0b80",

-344 => x"f298087b",

-345 => x"10101170",

-346 => x"08585155",

-347 => x"807681ff",

-348 => x"067c832b",

-349 => x"56585276",

-350 => x"537b519a",

-351 => x"b93f7d7f",

-352 => x"7a72077c",

-353 => x"72077171",

-354 => x"60810541",

-355 => x"5f5d5b59",

-356 => x"5755877b",

-357 => x"25c73876",

-358 => x"7d0c7784",

-359 => x"1e0c7c80",

-360 => x"0c903d0d",

-361 => x"04ff3d0d",

-362 => x"80f2a033",

-363 => x"5170a738",

-364 => x"80e2ac08",

-365 => x"70085252",

-366 => x"70802e94",

-367 => x"38841280",

-368 => x"e2ac0c70",

-369 => x"2d80e2ac",

-370 => x"08700852",

-371 => x"5270ee38",

-372 => x"810b80f2",

-373 => x"a034833d",

-374 => x"0d040480",

-375 => x"3d0d0b0b",

-376 => x"80f29008",

-377 => x"802e8e38",

-378 => x"0b0b0b0b",

-379 => x"800b802e",

-380 => x"09810685",

-381 => x"38823d0d",

-382 => x"040b0b80",

-383 => x"f290510b",

-384 => x"0b0bf3fc",

-385 => x"3f823d0d",

-386 => x"0404ff3d",

-387 => x"0d028f05",

-388 => x"3352718a",

-389 => x"2e8a3871",

-390 => x"51fce53f",

-391 => x"833d0d04",

-392 => x"8d51fcdc",

-393 => x"3f7151fc",

-394 => x"d73f833d",

-395 => x"0d04ce3d",

-396 => x"0db53d70",

-397 => x"70840552",

-398 => x"088c8a5c",

-399 => x"56a53d5e",

-400 => x"5c807570",

-401 => x"81055733",

-402 => x"765b5558",

-403 => x"73782e80",

-404 => x"c1388e3d",

-405 => x"5b73a52e",

-406 => x"09810680",

-407 => x"c5387870",

-408 => x"81055a33",

-409 => x"547380e4",

-410 => x"2e81b638",

-411 => x"7380e424",

-412 => x"80c63873",

-413 => x"80e32ea1",

-414 => x"388052a5",

-415 => x"51792d80",

-416 => x"52735179",

-417 => x"2d821858",

-418 => x"78708105",

-419 => x"5a335473",

-420 => x"c4387780",

-421 => x"0cb43d0d",

-422 => x"047b841d",

-423 => x"83123356",

-424 => x"5d578052",

-425 => x"7351792d",

-426 => x"81187970",

-427 => x"81055b33",

-428 => x"555873ff",

-429 => x"a038db39",

-430 => x"7380f32e",

-431 => x"098106ff",

-432 => x"b8387b84",

-433 => x"1d710859",

-434 => x"5d568077",

-435 => x"33555673",

-436 => x"762e8d38",

-437 => x"81167018",

-438 => x"70335755",

-439 => x"5674f538",

-440 => x"ff165580",

-441 => x"7625ffa0",

-442 => x"38767081",

-443 => x"05583354",

-444 => x"80527351",

-445 => x"792d8118",

-446 => x"75ff1757",

-447 => x"57588076",

-448 => x"25ff8538",

-449 => x"76708105",

-450 => x"58335480",

-451 => x"52735179",

-452 => x"2d811875",

-453 => x"ff175757",

-454 => x"58758024",

-455 => x"cc38fee8",

-456 => x"397b841d",

-457 => x"71087071",

-458 => x"9f2c5953",

-459 => x"595d5680",

-460 => x"75248195",

-461 => x"38757d7c",

-462 => x"58565480",

-463 => x"5773772e",

-464 => x"098106b6",

-465 => x"38b07b34",

-466 => x"02b50556",

-467 => x"7a762e97",

-468 => x"38ff1656",

-469 => x"75337570",

-470 => x"81055734",

-471 => x"8117577a",

-472 => x"762e0981",

-473 => x"06eb3880",

-474 => x"7534767d",

-475 => x"ff125758",

-476 => x"56758024",

-477 => x"fef338fe",

-478 => x"8f398a52",

-479 => x"7351a0f0",

-480 => x"3f80080b",

-481 => x"0b80d484",

-482 => x"05337670",

-483 => x"81055834",

-484 => x"8a527351",

-485 => x"a0963f80",

-486 => x"08548008",

-487 => x"802effac",

-488 => x"388a5273",

-489 => x"51a0c93f",

-490 => x"80080b0b",

-491 => x"80d48405",

-492 => x"33767081",

-493 => x"0558348a",

-494 => x"5273519f",

-495 => x"ef3f8008",

-496 => x"548008ff",

-497 => x"b538ff84",

-498 => x"39745276",

-499 => x"53b43dff",

-500 => x"b8055195",

-501 => x"b63fa33d",

-502 => x"0856fed9",

-503 => x"39803d0d",

-504 => x"80c10b81",

-505 => x"c0f43480",

-506 => x"0b81c2d0",

-507 => x"0c70800c",

-508 => x"823d0d04",

-509 => x"ff3d0d80",

-510 => x"0b81c0f4",

-511 => x"33525270",

-512 => x"80c12e99",

-513 => x"387181c2",

-514 => x"d0080781",

-515 => x"c2d00c80",

-516 => x"c20b81c0",

-517 => x"f8347080",

-518 => x"0c833d0d",

-519 => x"04810b81",

-520 => x"c2d00807",

-521 => x"81c2d00c",

-522 => x"80c20b81",

-523 => x"c0f83470",

-524 => x"800c833d",

-525 => x"0d04fd3d",

-526 => x"0d757008",

-527 => x"8a055353",

-528 => x"81c0f433",

-529 => x"517080c1",

-530 => x"2e8b3873",

-531 => x"f3387080",

-532 => x"0c853d0d",

-533 => x"04ff1270",

-534 => x"81c0f008",

-535 => x"31740c80",

-536 => x"0c853d0d",

-537 => x"04fc3d0d",

-538 => x"81c0fc08",

-539 => x"5574802e",

-540 => x"8c387675",

-541 => x"08710c81",

-542 => x"c0fc0856",

-543 => x"548c1553",

-544 => x"81c0f008",

-545 => x"528a5190",

-546 => x"f03f7380",

-547 => x"0c863d0d",

-548 => x"04fb3d0d",

-549 => x"77700856",

-550 => x"56b05381",

-551 => x"c0fc0852",

-552 => x"7451acb4",

-553 => x"3f850b8c",

-554 => x"170c850b",

-555 => x"8c160c75",

-556 => x"08750c81",

-557 => x"c0fc0854",

-558 => x"73802e8a",

-559 => x"38730875",

-560 => x"0c81c0fc",

-561 => x"08548c14",

-562 => x"5381c0f0",

-563 => x"08528a51",

-564 => x"90a73f84",

-565 => x"1508ad38",

-566 => x"860b8c16",

-567 => x"0c881552",

-568 => x"88160851",

-569 => x"8fb33f81",

-570 => x"c0fc0870",

-571 => x"08760c54",

-572 => x"8c157054",

-573 => x"548a5273",

-574 => x"08518ffd",

-575 => x"3f73800c",

-576 => x"873d0d04",

-577 => x"750854b0",

-578 => x"53735275",

-579 => x"51abc93f",

-580 => x"73800c87",

-581 => x"3d0d04d9",

-582 => x"3d0db051",

-583 => x"9eeb3f80",

-584 => x"0881c0ec",

-585 => x"0cb0519e",

-586 => x"e03f8008",

-587 => x"81c0fc0c",

-588 => x"81c0ec08",

-589 => x"80080c80",

-590 => x"0b800884",

-591 => x"050c820b",

-592 => x"80088805",

-593 => x"0ca80b80",

-594 => x"088c050c",

-595 => x"9f530b0b",

-596 => x"80d49052",

-597 => x"80089005",

-598 => x"51aafd3f",

-599 => x"a13d5e9f",

-600 => x"530b0b80",

-601 => x"d4b0527d",

-602 => x"51aaed3f",

-603 => x"8a0b80ff",

-604 => x"b00c0b0b",

-605 => x"80ded451",

-606 => x"f9b43f0b",

-607 => x"0b80d4d0",

-608 => x"51f9ab3f",

-609 => x"0b0b80de",

-610 => x"d451f9a2",

-611 => x"3f80e2b4",

-612 => x"08802e8a",

-613 => x"cf380b0b",

-614 => x"80d58051",

-615 => x"f9903f0b",

-616 => x"0b80ded4",

-617 => x"51f9873f",

-618 => x"80e2b008",

-619 => x"520b0b80",

-620 => x"d5ac51f8",

-621 => x"f93f80f2",

-622 => x"cc51bbf8",

-623 => x"3f810b9a",

-624 => x"3d5e5b80",

-625 => x"0b80e2b0",

-626 => x"082582d6",

-627 => x"38903d5f",

-628 => x"80c10b81",

-629 => x"c0f43481",

-630 => x"0b81c2d0",

-631 => x"0c80c20b",

-632 => x"81c0f834",

-633 => x"8240835a",

-634 => x"9f530b0b",

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-3115 => x"08080808",

-3116 => x"08080808",

-3117 => x"08080808",

-3118 => x"08080808",

-3119 => x"08080808",

-3120 => x"08080808",

-3121 => x"08080808",

-3122 => x"08080808",

-3123 => x"08080808",

-3124 => x"08080808",

-3125 => x"08080808",

-3126 => x"08080808",

-3127 => x"08080808",

-3128 => x"08080808",

-3129 => x"08080808",

-3130 => x"08080808",

-3131 => x"08080808",

-3132 => x"08080808",

-3133 => x"08080808",

-3134 => x"08080808",

-3135 => x"08080808",

-3136 => x"43000000",

-3137 => x"64756d6d",

-3138 => x"792e6578",

-3139 => x"65000000",

-3140 => x"00ffffff",

-3141 => x"ff00ffff",

-3142 => x"ffff00ff",

-3143 => x"ffffff00",

-3144 => x"00000000",

-3145 => x"00000000",

-3146 => x"00000000",

-3147 => x"0000390c",

-3148 => x"000004d2", -- iterations 0x4d2=1234 

-3149 => x"00000000",

-3150 => x"00000000",

-3151 => x"00000000",

-3152 => x"00000000",

-3153 => x"00000000",

-3154 => x"00000000",

-3155 => x"00000000",

-3156 => x"00000000",

-3157 => x"00000000",

-3158 => x"00000000",

-3159 => x"00000000",

-3160 => x"00000000",

-3161 => x"00000000",

-3162 => x"ffffffff",

-3163 => x"00000000",

-3164 => x"00020000",

-3165 => x"00000000",

-3166 => x"00000000",

-3167 => x"00003174",

-3168 => x"00003174",

-3169 => x"0000317c",

-3170 => x"0000317c",

-3171 => x"00003184",

-3172 => x"00003184",

-3173 => x"0000318c",

-3174 => x"0000318c",

-3175 => x"00003194",

-3176 => x"00003194",

-3177 => x"0000319c",

-3178 => x"0000319c",

-3179 => x"000031a4",

-3180 => x"000031a4",

-3181 => x"000031ac",

-3182 => x"000031ac",

-3183 => x"000031b4",

-3184 => x"000031b4",

-3185 => x"000031bc",

-3186 => x"000031bc",

-3187 => x"000031c4",

-3188 => x"000031c4",

-3189 => x"000031cc",

-3190 => x"000031cc",

-3191 => x"000031d4",

-3192 => x"000031d4",

-3193 => x"000031dc",

-3194 => x"000031dc",

-3195 => x"000031e4",

-3196 => x"000031e4",

-3197 => x"000031ec",

-3198 => x"000031ec",

-3199 => x"000031f4",

-3200 => x"000031f4",

-3201 => x"000031fc",

-3202 => x"000031fc",

-3203 => x"00003204",

-3204 => x"00003204",

-3205 => x"0000320c",

-3206 => x"0000320c",

-3207 => x"00003214",

-3208 => x"00003214",

-3209 => x"0000321c",

-3210 => x"0000321c",

-3211 => x"00003224",

-3212 => x"00003224",

-3213 => x"0000322c",

-3214 => x"0000322c",

-3215 => x"00003234",

-3216 => x"00003234",

-3217 => x"0000323c",

-3218 => x"0000323c",

-3219 => x"00003244",

-3220 => x"00003244",

-3221 => x"0000324c",

-3222 => x"0000324c",

-3223 => x"00003254",

-3224 => x"00003254",

-3225 => x"0000325c",

-3226 => x"0000325c",

-3227 => x"00003264",

-3228 => x"00003264",

-3229 => x"0000326c",

-3230 => x"0000326c",

-3231 => x"00003274",

-3232 => x"00003274",

-3233 => x"0000327c",

-3234 => x"0000327c",

-3235 => x"00003284",

-3236 => x"00003284",

-3237 => x"0000328c",

-3238 => x"0000328c",

-3239 => x"00003294",

-3240 => x"00003294",

-3241 => x"0000329c",

-3242 => x"0000329c",

-3243 => x"000032a4",

-3244 => x"000032a4",

-3245 => x"000032ac",

-3246 => x"000032ac",

-3247 => x"000032b4",

-3248 => x"000032b4",

-3249 => x"000032bc",

-3250 => x"000032bc",

-3251 => x"000032c4",

-3252 => x"000032c4",

-3253 => x"000032cc",

-3254 => x"000032cc",

-3255 => x"000032d4",

-3256 => x"000032d4",

-3257 => x"000032dc",

-3258 => x"000032dc",

-3259 => x"000032e4",

-3260 => x"000032e4",

-3261 => x"000032ec",

-3262 => x"000032ec",

-3263 => x"000032f4",

-3264 => x"000032f4",

-3265 => x"000032fc",

-3266 => x"000032fc",

-3267 => x"00003304",

-3268 => x"00003304",

-3269 => x"0000330c",

-3270 => x"0000330c",

-3271 => x"00003314",

-3272 => x"00003314",

-3273 => x"0000331c",

-3274 => x"0000331c",

-3275 => x"00003324",

-3276 => x"00003324",

-3277 => x"0000332c",

-3278 => x"0000332c",

-3279 => x"00003334",

-3280 => x"00003334",

-3281 => x"0000333c",

-3282 => x"0000333c",

-3283 => x"00003344",

-3284 => x"00003344",

-3285 => x"0000334c",

-3286 => x"0000334c",

-3287 => x"00003354",

-3288 => x"00003354",

-3289 => x"0000335c",

-3290 => x"0000335c",

-3291 => x"00003364",

-3292 => x"00003364",

-3293 => x"0000336c",

-3294 => x"0000336c",

-3295 => x"00003374",

-3296 => x"00003374",

-3297 => x"0000337c",

-3298 => x"0000337c",

-3299 => x"00003384",

-3300 => x"00003384",

-3301 => x"0000338c",

-3302 => x"0000338c",

-3303 => x"00003394",

-3304 => x"00003394",

-3305 => x"0000339c",

-3306 => x"0000339c",

-3307 => x"000033a4",

-3308 => x"000033a4",

-3309 => x"000033ac",

-3310 => x"000033ac",

-3311 => x"000033b4",

-3312 => x"000033b4",

-3313 => x"000033bc",

-3314 => x"000033bc",

-3315 => x"000033c4",

-3316 => x"000033c4",

-3317 => x"000033cc",

-3318 => x"000033cc",

-3319 => x"000033d4",

-3320 => x"000033d4",

-3321 => x"000033dc",

-3322 => x"000033dc",

-3323 => x"000033e4",

-3324 => x"000033e4",

-3325 => x"000033ec",

-3326 => x"000033ec",

-3327 => x"000033f4",

-3328 => x"000033f4",

-3329 => x"000033fc",

-3330 => x"000033fc",

-3331 => x"00003404",

-3332 => x"00003404",

-3333 => x"0000340c",

-3334 => x"0000340c",

-3335 => x"00003414",

-3336 => x"00003414",

-3337 => x"0000341c",

-3338 => x"0000341c",

-3339 => x"00003424",

-3340 => x"00003424",

-3341 => x"0000342c",

-3342 => x"0000342c",

-3343 => x"00003434",

-3344 => x"00003434",

-3345 => x"0000343c",

-3346 => x"0000343c",

-3347 => x"00003444",

-3348 => x"00003444",

-3349 => x"0000344c",

-3350 => x"0000344c",

-3351 => x"00003454",

-3352 => x"00003454",

-3353 => x"0000345c",

-3354 => x"0000345c",

-3355 => x"00003464",

-3356 => x"00003464",

-3357 => x"0000346c",

-3358 => x"0000346c",

-3359 => x"00003474",

-3360 => x"00003474",

-3361 => x"0000347c",

-3362 => x"0000347c",

-3363 => x"00003484",

-3364 => x"00003484",

-3365 => x"0000348c",

-3366 => x"0000348c",

-3367 => x"00003494",

-3368 => x"00003494",

-3369 => x"0000349c",

-3370 => x"0000349c",

-3371 => x"000034a4",

-3372 => x"000034a4",

-3373 => x"000034ac",

-3374 => x"000034ac",

-3375 => x"000034b4",

-3376 => x"000034b4",

-3377 => x"000034bc",

-3378 => x"000034bc",

-3379 => x"000034c4",

-3380 => x"000034c4",

-3381 => x"000034cc",

-3382 => x"000034cc",

-3383 => x"000034d4",

-3384 => x"000034d4",

-3385 => x"000034dc",

-3386 => x"000034dc",

-3387 => x"000034e4",

-3388 => x"000034e4",

-3389 => x"000034ec",

-3390 => x"000034ec",

-3391 => x"000034f4",

-3392 => x"000034f4",

-3393 => x"000034fc",

-3394 => x"000034fc",

-3395 => x"00003504",

-3396 => x"00003504",

-3397 => x"0000350c",

-3398 => x"0000350c",

-3399 => x"00003514",

-3400 => x"00003514",

-3401 => x"0000351c",

-3402 => x"0000351c",

-3403 => x"00003524",

-3404 => x"00003524",

-3405 => x"0000352c",

-3406 => x"0000352c",

-3407 => x"00003534",

-3408 => x"00003534",

-3409 => x"0000353c",

-3410 => x"0000353c",

-3411 => x"00003544",

-3412 => x"00003544",

-3413 => x"0000354c",

-3414 => x"0000354c",

-3415 => x"00003554",

-3416 => x"00003554",

-3417 => x"0000355c",

-3418 => x"0000355c",

-3419 => x"00003564",

-3420 => x"00003564",

-3421 => x"0000356c",

-3422 => x"0000356c",

-3423 => x"00003580",

-3424 => x"00000000",

-3425 => x"000037e8",

-3426 => x"00003844",

-3427 => x"000038a0",

-3428 => x"00000000",

-3429 => x"00000000",

-3430 => x"00000000",

-3431 => x"00000000",

-3432 => x"00000000",

-3433 => x"00000000",

-3434 => x"00000000",

-3435 => x"00000000",

-3436 => x"00000000",

-3437 => x"00003100",

-3438 => x"00000000",

-3439 => x"00000000",

-3440 => x"00000000",

-3441 => x"00000000",

-3442 => x"00000000",

-3443 => x"00000000",

-3444 => x"00000000",

-3445 => x"00000000",

-3446 => x"00000000",

-3447 => x"00000000",

-3448 => x"00000000",

-3449 => x"00000000",

-3450 => x"00000000",

-3451 => x"00000000",

-3452 => x"00000000",

-3453 => x"00000000",

-3454 => x"00000000",

-3455 => x"00000000",

-3456 => x"00000000",

-3457 => x"00000000",

-3458 => x"00000000",

-3459 => x"00000000",

-3460 => x"00000000",

-3461 => x"00000000",

-3462 => x"00000000",

-3463 => x"00000000",

-3464 => x"00000000",

-3465 => x"00000000",

-3466 => x"00000001",

-3467 => x"330eabcd",

-3468 => x"1234e66d",

-3469 => x"deec0005",

-3470 => x"000b0000",

-3471 => x"00000000",

-3472 => x"00000000",

-3473 => x"00000000",

-3474 => x"00000000",

-3475 => x"00000000",

-3476 => x"00000000",

-3477 => x"00000000",

-3478 => x"00000000",

-3479 => x"00000000",

-3480 => x"00000000",

-3481 => x"00000000",

-3482 => x"00000000",

-3483 => x"00000000",

-3484 => x"00000000",

-3485 => x"00000000",

-3486 => x"00000000",

-3487 => x"00000000",

-3488 => x"00000000",

-3489 => x"00000000",

-3490 => x"00000000",

-3491 => x"00000000",

-3492 => x"00000000",

-3493 => x"00000000",

-3494 => x"00000000",

-3495 => x"00000000",

-3496 => x"00000000",

-3497 => x"00000000",

-3498 => x"00000000",

-3499 => x"00000000",

-3500 => x"00000000",

-3501 => x"00000000",

-3502 => x"00000000",

-3503 => x"00000000",

-3504 => x"00000000",

-3505 => x"00000000",

-3506 => x"00000000",

-3507 => x"00000000",

-3508 => x"00000000",

-3509 => x"00000000",

-3510 => x"00000000",

-3511 => x"00000000",

-3512 => x"00000000",

-3513 => x"00000000",

-3514 => x"00000000",

-3515 => x"00000000",

-3516 => x"00000000",

-3517 => x"00000000",

-3518 => x"00000000",

-3519 => x"00000000",

-3520 => x"00000000",

-3521 => x"00000000",

-3522 => x"00000000",

-3523 => x"00000000",

-3524 => x"00000000",

-3525 => x"00000000",

-3526 => x"00000000",

-3527 => x"00000000",

-3528 => x"00000000",

-3529 => x"00000000",

-3530 => x"00000000",

-3531 => x"00000000",

-3532 => x"00000000",

-3533 => x"00000000",

-3534 => x"00000000",

-3535 => x"00000000",

-3536 => x"00000000",

-3537 => x"00000000",

-3538 => x"00000000",

-3539 => x"00000000",

-3540 => x"00000000",

-3541 => x"00000000",

-3542 => x"00000000",

-3543 => x"00000000",

-3544 => x"00000000",

-3545 => x"00000000",

-3546 => x"00000000",

-3547 => x"00000000",

-3548 => x"00000000",

-3549 => x"00000000",

-3550 => x"00000000",

-3551 => x"00000000",

-3552 => x"00000000",

-3553 => x"00000000",

-3554 => x"00000000",

-3555 => x"00000000",

-3556 => x"00000000",

-3557 => x"00000000",

-3558 => x"00000000",

-3559 => x"00000000",

-3560 => x"00000000",

-3561 => x"00000000",

-3562 => x"00000000",

-3563 => x"00000000",

-3564 => x"00000000",

-3565 => x"00000000",

-3566 => x"00000000",

-3567 => x"00000000",

-3568 => x"00000000",

-3569 => x"00000000",

-3570 => x"00000000",

-3571 => x"00000000",

-3572 => x"00000000",

-3573 => x"00000000",

-3574 => x"00000000",

-3575 => x"00000000",

-3576 => x"00000000",

-3577 => x"00000000",

-3578 => x"00000000",

-3579 => x"00000000",

-3580 => x"00000000",

-3581 => x"00000000",

-3582 => x"00000000",

-3583 => x"00000000",

-3584 => x"00000000",

-3585 => x"00000000",

-3586 => x"00000000",

-3587 => x"00000000",

-3588 => x"00000000",

-3589 => x"00000000",

-3590 => x"00000000",

-3591 => x"00000000",

-3592 => x"00000000",

-3593 => x"00000000",

-3594 => x"00000000",

-3595 => x"00000000",

-3596 => x"00000000",

-3597 => x"00000000",

-3598 => x"00000000",

-3599 => x"00000000",

-3600 => x"00000000",

-3601 => x"00000000",

-3602 => x"00000000",

-3603 => x"00000000",

-3604 => x"00000000",

-3605 => x"00000000",

-3606 => x"00000000",

-3607 => x"00000000",

-3608 => x"00000000",

-3609 => x"00000000",

-3610 => x"00000000",

-3611 => x"00000000",

-3612 => x"00000000",

-3613 => x"00000000",

-3614 => x"00000000",

-3615 => x"00000000",

-3616 => x"00000000",

-3617 => x"00000000",

-3618 => x"00000000",

-3619 => x"00000000",

-3620 => x"00000000",

-3621 => x"00000000",

-3622 => x"00000000",

-3623 => x"00000000",

-3624 => x"00000000",

-3625 => x"00000000",

-3626 => x"00000000",

-3627 => x"00000000",

-3628 => x"00000000",

-3629 => x"00000000",

-3630 => x"00000000",

-3631 => x"00000000",

-3632 => x"00000000",

-3633 => x"00000000",

-3634 => x"00000000",

-3635 => x"00000000",

-3636 => x"00000000",

-3637 => x"00000000",

-3638 => x"00000000",

-3639 => x"00000000",

-3640 => x"00000000",

-3641 => x"00000000",

-3642 => x"00000000",

-3643 => x"00000000",

-3644 => x"00000000",

-3645 => x"00000000",

-3646 => x"00000000",

-3647 => x"00003104",

-3648 => x"ffffffff",

-3649 => x"00000000",

-3650 => x"ffffffff",

-3651 => x"00000000",

-	others => x"00000000"

-);

-

-begin

-

-process (clk)

-begin

-	if (clk'event and clk = '1') then

-		if (memAWriteEnable = '1') and (memBWriteEnable = '1') and (memAAddr=memBAddr) and (memAWrite/=memBWrite) then

-			report "write collision" severity failure;

-		end if;

-	

-		if (memAWriteEnable = '1') then

-			ram(to_integer(unsigned(memAAddr))) := memAWrite;

-			memARead <= memAWrite;

-		else

-			memARead <= ram(to_integer(unsigned(memAAddr)));

-		end if;

-	end if;

-end process;

-

-process (clk)

-begin

-	if (clk'event and clk = '1') then

-		if (memBWriteEnable = '1') then

-			ram(to_integer(unsigned(memBAddr))) := memBWrite;

-			memBRead <= memBWrite;

-		else

-			memBRead <= ram(to_integer(unsigned(memBAddr)));

-		end if;

-	end if;

-end process;

-

-

-

-

-end dualport_ram_arch;

diff --git a/zpu/hdl/zpu4/src/dram_dmips.vhd b/zpu/hdl/zpu4/src/dram_dmips.vhd
deleted file mode 100644
index a9fd59e..0000000
--- a/zpu/hdl/zpu4/src/dram_dmips.vhd
+++ /dev/null
@@ -1,3308 +0,0 @@
-library ieee;

-use ieee.std_logic_1164.all;

-use ieee.numeric_std.all;

-

-

-library work;

-use work.zpu_config.all;

-use work.zpupkg.all;

-

-entity dram is

-port (clk : in std_logic;

-areset : std_logic;

-		mem_writeEnable : in std_logic;

-		mem_readEnable : in std_logic;

-		mem_addr : in std_logic_vector(maxAddrBit downto 0);

-		mem_write : in std_logic_vector(wordSize-1 downto 0);

-		mem_read : out std_logic_vector(wordSize-1 downto 0);

-		mem_busy : out std_logic;

-		mem_writeMask : in std_logic_vector(wordBytes-1 downto 0));

-end dram;

-

-architecture dram_arch of dram is

-

-

-type ram_type is array(natural range 0 to ((2**(maxAddrBitDRAM+1))/4)-1) of std_logic_vector(wordSize-1 downto 0);

-

-shared variable ram : ram_type :=

-(

-0 => x"0b0b0b0b",

-1 => x"82700b0b",

-2 => x"80d5f40c",

-3 => x"3a0b0b80",

-4 => x"c4fb0400",

-5 => x"00000000",

-6 => x"00000000",

-7 => x"00000000",

-8 => x"80088408",

-9 => x"88080b0b",

-10 => x"80c5c22d",

-11 => x"880c840c",

-12 => x"800c0400",

-13 => x"00000000",

-14 => x"00000000",

-15 => x"00000000",

-16 => x"71fd0608",

-17 => x"72830609",

-18 => x"81058205",

-19 => x"832b2a83",

-20 => x"ffff0652",

-21 => x"04000000",

-22 => x"00000000",

-23 => x"00000000",

-24 => x"71fd0608",

-25 => x"83ffff73",

-26 => x"83060981",

-27 => x"05820583",

-28 => x"2b2b0906",

-29 => x"7383ffff",

-30 => x"0b0b0b0b",

-31 => x"83a70400",

-32 => x"72098105",

-33 => x"72057373",

-34 => x"09060906",

-35 => x"73097306",

-36 => x"070a8106",

-37 => x"53510400",

-38 => x"00000000",

-39 => x"00000000",

-40 => x"72722473",

-41 => x"732e0753",

-42 => x"51040000",

-43 => x"00000000",

-44 => x"00000000",

-45 => x"00000000",

-46 => x"00000000",

-47 => x"00000000",

-48 => x"71737109",

-49 => x"71068106",

-50 => x"30720a10",

-51 => x"0a720a10",

-52 => x"0a31050a",

-53 => x"81065151",

-54 => x"53510400",

-55 => x"00000000",

-56 => x"72722673",

-57 => x"732e0753",

-58 => x"51040000",

-59 => x"00000000",

-60 => x"00000000",

-61 => x"00000000",

-62 => x"00000000",

-63 => x"00000000",

-64 => x"00000000",

-65 => x"00000000",

-66 => x"00000000",

-67 => x"00000000",

-68 => x"00000000",

-69 => x"00000000",

-70 => x"00000000",

-71 => x"00000000",

-72 => x"0b0b0b88",

-73 => x"c3040000",

-74 => x"00000000",

-75 => x"00000000",

-76 => x"00000000",

-77 => x"00000000",

-78 => x"00000000",

-79 => x"00000000",

-80 => x"720a722b",

-81 => x"0a535104",

-82 => x"00000000",

-83 => x"00000000",

-84 => x"00000000",

-85 => x"00000000",

-86 => x"00000000",

-87 => x"00000000",

-88 => x"72729f06",

-89 => x"0981050b",

-90 => x"0b0b88a6",

-91 => x"05040000",

-92 => x"00000000",

-93 => x"00000000",

-94 => x"00000000",

-95 => x"00000000",

-96 => x"72722aff",

-97 => x"739f062a",

-98 => x"0974090a",

-99 => x"8106ff05",

-100 => x"06075351",

-101 => x"04000000",

-102 => x"00000000",

-103 => x"00000000",

-104 => x"71715351",

-105 => x"020d0406",

-106 => x"73830609",

-107 => x"81058205",

-108 => x"832b0b2b",

-109 => x"0772fc06",

-110 => x"0c515104",

-111 => x"00000000",

-112 => x"72098105",

-113 => x"72050970",

-114 => x"81050906",

-115 => x"0a810653",

-116 => x"51040000",

-117 => x"00000000",

-118 => x"00000000",

-119 => x"00000000",

-120 => x"72098105",

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-2660 => x"506c6561",

-2661 => x"73652069",

-2662 => x"6e637265",

-2663 => x"61736520",

-2664 => x"6e756d62",

-2665 => x"6572206f",

-2666 => x"66207275",

-2667 => x"6e730a00",

-2668 => x"44485259",

-2669 => x"53544f4e",

-2670 => x"45205052",

-2671 => x"4f475241",

-2672 => x"4d2c2033",

-2673 => x"27524420",

-2674 => x"53545249",

-2675 => x"4e470000",

-2676 => x"00010202",

-2677 => x"03030303",

-2678 => x"04040404",

-2679 => x"04040404",

-2680 => x"05050505",

-2681 => x"05050505",

-2682 => x"05050505",

-2683 => x"05050505",

-2684 => x"06060606",

-2685 => x"06060606",

-2686 => x"06060606",

-2687 => x"06060606",

-2688 => x"06060606",

-2689 => x"06060606",

-2690 => x"06060606",

-2691 => x"06060606",

-2692 => x"07070707",

-2693 => x"07070707",

-2694 => x"07070707",

-2695 => x"07070707",

-2696 => x"07070707",

-2697 => x"07070707",

-2698 => x"07070707",

-2699 => x"07070707",

-2700 => x"07070707",

-2701 => x"07070707",

-2702 => x"07070707",

-2703 => x"07070707",

-2704 => x"07070707",

-2705 => x"07070707",

-2706 => x"07070707",

-2707 => x"07070707",

-2708 => x"08080808",

-2709 => x"08080808",

-2710 => x"08080808",

-2711 => x"08080808",

-2712 => x"08080808",

-2713 => x"08080808",

-2714 => x"08080808",

-2715 => x"08080808",

-2716 => x"08080808",

-2717 => x"08080808",

-2718 => x"08080808",

-2719 => x"08080808",

-2720 => x"08080808",

-2721 => x"08080808",

-2722 => x"08080808",

-2723 => x"08080808",

-2724 => x"08080808",

-2725 => x"08080808",

-2726 => x"08080808",

-2727 => x"08080808",

-2728 => x"08080808",

-2729 => x"08080808",

-2730 => x"08080808",

-2731 => x"08080808",

-2732 => x"08080808",

-2733 => x"08080808",

-2734 => x"08080808",

-2735 => x"08080808",

-2736 => x"08080808",

-2737 => x"08080808",

-2738 => x"08080808",

-2739 => x"08080808",

-2740 => x"43000000",

-2741 => x"64756d6d",

-2742 => x"792e6578",

-2743 => x"65000000",

-2744 => x"00ffffff",

-2745 => x"ff00ffff",

-2746 => x"ffff00ff",

-2747 => x"ffffff00",

-2748 => x"00000000",

-2749 => x"00000000",

-2750 => x"00000000",

-2751 => x"000032dc",

-2752 => x"0000c350",

-2753 => x"00000000",

-2754 => x"00000000",

-2755 => x"00000000",

-2756 => x"00000000",

-2757 => x"00000000",

-2758 => x"00000000",

-2759 => x"00000000",

-2760 => x"00000000",

-2761 => x"00000000",

-2762 => x"00000000",

-2763 => x"00000000",

-2764 => x"00000000",

-2765 => x"00000000",

-2766 => x"ffffffff",

-2767 => x"00000000",

-2768 => x"00020000",

-2769 => x"00000000",

-2770 => x"00000000",

-2771 => x"00002b44",

-2772 => x"00002b44",

-2773 => x"00002b4c",

-2774 => x"00002b4c",

-2775 => x"00002b54",

-2776 => x"00002b54",

-2777 => x"00002b5c",

-2778 => x"00002b5c",

-2779 => x"00002b64",

-2780 => x"00002b64",

-2781 => x"00002b6c",

-2782 => x"00002b6c",

-2783 => x"00002b74",

-2784 => x"00002b74",

-2785 => x"00002b7c",

-2786 => x"00002b7c",

-2787 => x"00002b84",

-2788 => x"00002b84",

-2789 => x"00002b8c",

-2790 => x"00002b8c",

-2791 => x"00002b94",

-2792 => x"00002b94",

-2793 => x"00002b9c",

-2794 => x"00002b9c",

-2795 => x"00002ba4",

-2796 => x"00002ba4",

-2797 => x"00002bac",

-2798 => x"00002bac",

-2799 => x"00002bb4",

-2800 => x"00002bb4",

-2801 => x"00002bbc",

-2802 => x"00002bbc",

-2803 => x"00002bc4",

-2804 => x"00002bc4",

-2805 => x"00002bcc",

-2806 => x"00002bcc",

-2807 => x"00002bd4",

-2808 => x"00002bd4",

-2809 => x"00002bdc",

-2810 => x"00002bdc",

-2811 => x"00002be4",

-2812 => x"00002be4",

-2813 => x"00002bec",

-2814 => x"00002bec",

-2815 => x"00002bf4",

-2816 => x"00002bf4",

-2817 => x"00002bfc",

-2818 => x"00002bfc",

-2819 => x"00002c04",

-2820 => x"00002c04",

-2821 => x"00002c0c",

-2822 => x"00002c0c",

-2823 => x"00002c14",

-2824 => x"00002c14",

-2825 => x"00002c1c",

-2826 => x"00002c1c",

-2827 => x"00002c24",

-2828 => x"00002c24",

-2829 => x"00002c2c",

-2830 => x"00002c2c",

-2831 => x"00002c34",

-2832 => x"00002c34",

-2833 => x"00002c3c",

-2834 => x"00002c3c",

-2835 => x"00002c44",

-2836 => x"00002c44",

-2837 => x"00002c4c",

-2838 => x"00002c4c",

-2839 => x"00002c54",

-2840 => x"00002c54",

-2841 => x"00002c5c",

-2842 => x"00002c5c",

-2843 => x"00002c64",

-2844 => x"00002c64",

-2845 => x"00002c6c",

-2846 => x"00002c6c",

-2847 => x"00002c74",

-2848 => x"00002c74",

-2849 => x"00002c7c",

-2850 => x"00002c7c",

-2851 => x"00002c84",

-2852 => x"00002c84",

-2853 => x"00002c8c",

-2854 => x"00002c8c",

-2855 => x"00002c94",

-2856 => x"00002c94",

-2857 => x"00002c9c",

-2858 => x"00002c9c",

-2859 => x"00002ca4",

-2860 => x"00002ca4",

-2861 => x"00002cac",

-2862 => x"00002cac",

-2863 => x"00002cb4",

-2864 => x"00002cb4",

-2865 => x"00002cbc",

-2866 => x"00002cbc",

-2867 => x"00002cc4",

-2868 => x"00002cc4",

-2869 => x"00002ccc",

-2870 => x"00002ccc",

-2871 => x"00002cd4",

-2872 => x"00002cd4",

-2873 => x"00002cdc",

-2874 => x"00002cdc",

-2875 => x"00002ce4",

-2876 => x"00002ce4",

-2877 => x"00002cec",

-2878 => x"00002cec",

-2879 => x"00002cf4",

-2880 => x"00002cf4",

-2881 => x"00002cfc",

-2882 => x"00002cfc",

-2883 => x"00002d04",

-2884 => x"00002d04",

-2885 => x"00002d0c",

-2886 => x"00002d0c",

-2887 => x"00002d14",

-2888 => x"00002d14",

-2889 => x"00002d1c",

-2890 => x"00002d1c",

-2891 => x"00002d24",

-2892 => x"00002d24",

-2893 => x"00002d2c",

-2894 => x"00002d2c",

-2895 => x"00002d34",

-2896 => x"00002d34",

-2897 => x"00002d3c",

-2898 => x"00002d3c",

-2899 => x"00002d44",

-2900 => x"00002d44",

-2901 => x"00002d4c",

-2902 => x"00002d4c",

-2903 => x"00002d54",

-2904 => x"00002d54",

-2905 => x"00002d5c",

-2906 => x"00002d5c",

-2907 => x"00002d64",

-2908 => x"00002d64",

-2909 => x"00002d6c",

-2910 => x"00002d6c",

-2911 => x"00002d74",

-2912 => x"00002d74",

-2913 => x"00002d7c",

-2914 => x"00002d7c",

-2915 => x"00002d84",

-2916 => x"00002d84",

-2917 => x"00002d8c",

-2918 => x"00002d8c",

-2919 => x"00002d94",

-2920 => x"00002d94",

-2921 => x"00002d9c",

-2922 => x"00002d9c",

-2923 => x"00002da4",

-2924 => x"00002da4",

-2925 => x"00002dac",

-2926 => x"00002dac",

-2927 => x"00002db4",

-2928 => x"00002db4",

-2929 => x"00002dbc",

-2930 => x"00002dbc",

-2931 => x"00002dc4",

-2932 => x"00002dc4",

-2933 => x"00002dcc",

-2934 => x"00002dcc",

-2935 => x"00002dd4",

-2936 => x"00002dd4",

-2937 => x"00002ddc",

-2938 => x"00002ddc",

-2939 => x"00002de4",

-2940 => x"00002de4",

-2941 => x"00002dec",

-2942 => x"00002dec",

-2943 => x"00002df4",

-2944 => x"00002df4",

-2945 => x"00002dfc",

-2946 => x"00002dfc",

-2947 => x"00002e04",

-2948 => x"00002e04",

-2949 => x"00002e0c",

-2950 => x"00002e0c",

-2951 => x"00002e14",

-2952 => x"00002e14",

-2953 => x"00002e1c",

-2954 => x"00002e1c",

-2955 => x"00002e24",

-2956 => x"00002e24",

-2957 => x"00002e2c",

-2958 => x"00002e2c",

-2959 => x"00002e34",

-2960 => x"00002e34",

-2961 => x"00002e3c",

-2962 => x"00002e3c",

-2963 => x"00002e44",

-2964 => x"00002e44",

-2965 => x"00002e4c",

-2966 => x"00002e4c",

-2967 => x"00002e54",

-2968 => x"00002e54",

-2969 => x"00002e5c",

-2970 => x"00002e5c",

-2971 => x"00002e64",

-2972 => x"00002e64",

-2973 => x"00002e6c",

-2974 => x"00002e6c",

-2975 => x"00002e74",

-2976 => x"00002e74",

-2977 => x"00002e7c",

-2978 => x"00002e7c",

-2979 => x"00002e84",

-2980 => x"00002e84",

-2981 => x"00002e8c",

-2982 => x"00002e8c",

-2983 => x"00002e94",

-2984 => x"00002e94",

-2985 => x"00002e9c",

-2986 => x"00002e9c",

-2987 => x"00002ea4",

-2988 => x"00002ea4",

-2989 => x"00002eac",

-2990 => x"00002eac",

-2991 => x"00002eb4",

-2992 => x"00002eb4",

-2993 => x"00002ebc",

-2994 => x"00002ebc",

-2995 => x"00002ec4",

-2996 => x"00002ec4",

-2997 => x"00002ecc",

-2998 => x"00002ecc",

-2999 => x"00002ed4",

-3000 => x"00002ed4",

-3001 => x"00002edc",

-3002 => x"00002edc",

-3003 => x"00002ee4",

-3004 => x"00002ee4",

-3005 => x"00002eec",

-3006 => x"00002eec",

-3007 => x"00002ef4",

-3008 => x"00002ef4",

-3009 => x"00002efc",

-3010 => x"00002efc",

-3011 => x"00002f04",

-3012 => x"00002f04",

-3013 => x"00002f0c",

-3014 => x"00002f0c",

-3015 => x"00002f14",

-3016 => x"00002f14",

-3017 => x"00002f1c",

-3018 => x"00002f1c",

-3019 => x"00002f24",

-3020 => x"00002f24",

-3021 => x"00002f2c",

-3022 => x"00002f2c",

-3023 => x"00002f34",

-3024 => x"00002f34",

-3025 => x"00002f3c",

-3026 => x"00002f3c",

-3027 => x"00002f50",

-3028 => x"00000000",

-3029 => x"000031b8",

-3030 => x"00003214",

-3031 => x"00003270",

-3032 => x"00000000",

-3033 => x"00000000",

-3034 => x"00000000",

-3035 => x"00000000",

-3036 => x"00000000",

-3037 => x"00000000",

-3038 => x"00000000",

-3039 => x"00000000",

-3040 => x"00000000",

-3041 => x"00002ad0",

-3042 => x"00000000",

-3043 => x"00000000",

-3044 => x"00000000",

-3045 => x"00000000",

-3046 => x"00000000",

-3047 => x"00000000",

-3048 => x"00000000",

-3049 => x"00000000",

-3050 => x"00000000",

-3051 => x"00000000",

-3052 => x"00000000",

-3053 => x"00000000",

-3054 => x"00000000",

-3055 => x"00000000",

-3056 => x"00000000",

-3057 => x"00000000",

-3058 => x"00000000",

-3059 => x"00000000",

-3060 => x"00000000",

-3061 => x"00000000",

-3062 => x"00000000",

-3063 => x"00000000",

-3064 => x"00000000",

-3065 => x"00000000",

-3066 => x"00000000",

-3067 => x"00000000",

-3068 => x"00000000",

-3069 => x"00000000",

-3070 => x"00000001",

-3071 => x"330eabcd",

-3072 => x"1234e66d",

-3073 => x"deec0005",

-3074 => x"000b0000",

-3075 => x"00000000",

-3076 => x"00000000",

-3077 => x"00000000",

-3078 => x"00000000",

-3079 => x"00000000",

-3080 => x"00000000",

-3081 => x"00000000",

-3082 => x"00000000",

-3083 => x"00000000",

-3084 => x"00000000",

-3085 => x"00000000",

-3086 => x"00000000",

-3087 => x"00000000",

-3088 => x"00000000",

-3089 => x"00000000",

-3090 => x"00000000",

-3091 => x"00000000",

-3092 => x"00000000",

-3093 => x"00000000",

-3094 => x"00000000",

-3095 => x"00000000",

-3096 => x"00000000",

-3097 => x"00000000",

-3098 => x"00000000",

-3099 => x"00000000",

-3100 => x"00000000",

-3101 => x"00000000",

-3102 => x"00000000",

-3103 => x"00000000",

-3104 => x"00000000",

-3105 => x"00000000",

-3106 => x"00000000",

-3107 => x"00000000",

-3108 => x"00000000",

-3109 => x"00000000",

-3110 => x"00000000",

-3111 => x"00000000",

-3112 => x"00000000",

-3113 => x"00000000",

-3114 => x"00000000",

-3115 => x"00000000",

-3116 => x"00000000",

-3117 => x"00000000",

-3118 => x"00000000",

-3119 => x"00000000",

-3120 => x"00000000",

-3121 => x"00000000",

-3122 => x"00000000",

-3123 => x"00000000",

-3124 => x"00000000",

-3125 => x"00000000",

-3126 => x"00000000",

-3127 => x"00000000",

-3128 => x"00000000",

-3129 => x"00000000",

-3130 => x"00000000",

-3131 => x"00000000",

-3132 => x"00000000",

-3133 => x"00000000",

-3134 => x"00000000",

-3135 => x"00000000",

-3136 => x"00000000",

-3137 => x"00000000",

-3138 => x"00000000",

-3139 => x"00000000",

-3140 => x"00000000",

-3141 => x"00000000",

-3142 => x"00000000",

-3143 => x"00000000",

-3144 => x"00000000",

-3145 => x"00000000",

-3146 => x"00000000",

-3147 => x"00000000",

-3148 => x"00000000",

-3149 => x"00000000",

-3150 => x"00000000",

-3151 => x"00000000",

-3152 => x"00000000",

-3153 => x"00000000",

-3154 => x"00000000",

-3155 => x"00000000",

-3156 => x"00000000",

-3157 => x"00000000",

-3158 => x"00000000",

-3159 => x"00000000",

-3160 => x"00000000",

-3161 => x"00000000",

-3162 => x"00000000",

-3163 => x"00000000",

-3164 => x"00000000",

-3165 => x"00000000",

-3166 => x"00000000",

-3167 => x"00000000",

-3168 => x"00000000",

-3169 => x"00000000",

-3170 => x"00000000",

-3171 => x"00000000",

-3172 => x"00000000",

-3173 => x"00000000",

-3174 => x"00000000",

-3175 => x"00000000",

-3176 => x"00000000",

-3177 => x"00000000",

-3178 => x"00000000",

-3179 => x"00000000",

-3180 => x"00000000",

-3181 => x"00000000",

-3182 => x"00000000",

-3183 => x"00000000",

-3184 => x"00000000",

-3185 => x"00000000",

-3186 => x"00000000",

-3187 => x"00000000",

-3188 => x"00000000",

-3189 => x"00000000",

-3190 => x"00000000",

-3191 => x"00000000",

-3192 => x"00000000",

-3193 => x"00000000",

-3194 => x"00000000",

-3195 => x"00000000",

-3196 => x"00000000",

-3197 => x"00000000",

-3198 => x"00000000",

-3199 => x"00000000",

-3200 => x"00000000",

-3201 => x"00000000",

-3202 => x"00000000",

-3203 => x"00000000",

-3204 => x"00000000",

-3205 => x"00000000",

-3206 => x"00000000",

-3207 => x"00000000",

-3208 => x"00000000",

-3209 => x"00000000",

-3210 => x"00000000",

-3211 => x"00000000",

-3212 => x"00000000",

-3213 => x"00000000",

-3214 => x"00000000",

-3215 => x"00000000",

-3216 => x"00000000",

-3217 => x"00000000",

-3218 => x"00000000",

-3219 => x"00000000",

-3220 => x"00000000",

-3221 => x"00000000",

-3222 => x"00000000",

-3223 => x"00000000",

-3224 => x"00000000",

-3225 => x"00000000",

-3226 => x"00000000",

-3227 => x"00000000",

-3228 => x"00000000",

-3229 => x"00000000",

-3230 => x"00000000",

-3231 => x"00000000",

-3232 => x"00000000",

-3233 => x"00000000",

-3234 => x"00000000",

-3235 => x"00000000",

-3236 => x"00000000",

-3237 => x"00000000",

-3238 => x"00000000",

-3239 => x"00000000",

-3240 => x"00000000",

-3241 => x"00000000",

-3242 => x"00000000",

-3243 => x"00000000",

-3244 => x"00000000",

-3245 => x"00000000",

-3246 => x"00000000",

-3247 => x"00000000",

-3248 => x"00000000",

-3249 => x"00000000",

-3250 => x"00000000",

-3251 => x"00002ad4",

-3252 => x"ffffffff",

-3253 => x"00000000",

-3254 => x"ffffffff",

-3255 => x"00000000",

-	others => x"00000000"

-);

-

-begin

-

-mem_busy<=mem_readEnable; -- we're done on the cycle after we serve the read request

-

-process (clk, areset)

-begin

-		if areset = '1' then

-		elsif (clk'event and clk = '1') then

-			if (mem_writeEnable = '1') then

-				ram(to_integer(unsigned(mem_addr(maxAddrBit downto minAddrBit)))) := mem_write;

-			end if;

-		if (mem_readEnable = '1') then

-			mem_read <= ram(to_integer(unsigned(mem_addr(maxAddrBit downto minAddrBit))));

-		end if;

-	end if;

-end process;

-

-

-

-

-end dram_arch;

diff --git a/zpu/hdl/zpu4/src/dram_hello.vhd b/zpu/hdl/zpu4/src/dram_hello.vhd
deleted file mode 100644
index 4f02cca..0000000
--- a/zpu/hdl/zpu4/src/dram_hello.vhd
+++ /dev/null
@@ -1,3107 +0,0 @@
-library ieee;

-use ieee.std_logic_1164.all;

-use ieee.numeric_std.all;

-

-

-library work;

-use work.zpu_config.all;

-use work.zpupkg.all;

-

-entity dram is

-port (clk : in std_logic;

-areset : std_logic;

-		mem_writeEnable : in std_logic;

-		mem_readEnable : in std_logic;

-		mem_addr : in std_logic_vector(maxAddrBit downto 0);

-		mem_write : in std_logic_vector(wordSize-1 downto 0);

-		mem_read : out std_logic_vector(wordSize-1 downto 0);

-		mem_busy : out std_logic;

-		mem_writeMask : in std_logic_vector(wordBytes-1 downto 0));

-end dram;

-

-architecture dram_arch of dram is

-

-

-type ram_type is array(natural range 0 to ((2**(maxAddrBitDRAM+1))/4)-1) of std_logic_vector(wordSize-1 downto 0);

-

-shared variable ram : ram_type :=

-(

-0 => x"0b0b0b0b",

-1 => x"82700b0b",

-2 => x"80cfd80c",

-3 => x"3a0b0b80",

-4 => x"c6d00400",

-5 => x"00000000",

-6 => x"00000000",

-7 => x"00000000",

-8 => x"80088408",

-9 => x"88080b0b",

-10 => x"80c7972d",

-11 => x"880c840c",

-12 => x"800c0400",

-13 => x"00000000",

-14 => x"00000000",

-15 => x"00000000",

-16 => x"71fd0608",

-17 => x"72830609",

-18 => x"81058205",

-19 => x"832b2a83",

-20 => x"ffff0652",

-21 => x"04000000",

-22 => x"00000000",

-23 => x"00000000",

-24 => x"71fd0608",

-25 => x"83ffff73",

-26 => x"83060981",

-27 => x"05820583",

-28 => x"2b2b0906",

-29 => x"7383ffff",

-30 => x"0b0b0b0b",

-31 => x"83a70400",

-32 => x"72098105",

-33 => x"72057373",

-34 => x"09060906",

-35 => x"73097306",

-36 => x"070a8106",

-37 => x"53510400",

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-2616 => x"00000000",

-2617 => x"00000000",

-2618 => x"00000000",

-2619 => x"00000000",

-2620 => x"00000000",

-2621 => x"00000000",

-2622 => x"00000000",

-2623 => x"00000000",

-2624 => x"00000000",

-2625 => x"00000000",

-2626 => x"00000000",

-2627 => x"00000000",

-2628 => x"00000000",

-2629 => x"00000000",

-2630 => x"00000000",

-2631 => x"00000000",

-2632 => x"00000000",

-2633 => x"00000000",

-2634 => x"00000000",

-2635 => x"00000000",

-2636 => x"00000000",

-2637 => x"00000000",

-2638 => x"00000000",

-2639 => x"00000000",

-2640 => x"00000000",

-2641 => x"00000000",

-2642 => x"00000000",

-2643 => x"00000000",

-2644 => x"00000000",

-2645 => x"00000000",

-2646 => x"00000000",

-2647 => x"00000000",

-2648 => x"00000000",

-2649 => x"00000000",

-2650 => x"00000000",

-2651 => x"00000000",

-2652 => x"00000000",

-2653 => x"00000000",

-2654 => x"00000000",

-2655 => x"00000000",

-2656 => x"00000000",

-2657 => x"00000000",

-2658 => x"00000000",

-2659 => x"00000000",

-2660 => x"00000000",

-2661 => x"00000000",

-2662 => x"00000000",

-2663 => x"00000000",

-2664 => x"00000000",

-2665 => x"00000000",

-2666 => x"00000000",

-2667 => x"00000000",

-2668 => x"00000000",

-2669 => x"00000000",

-2670 => x"00000000",

-2671 => x"00000000",

-2672 => x"00000000",

-2673 => x"00000000",

-2674 => x"00000000",

-2675 => x"00000000",

-2676 => x"00000000",

-2677 => x"00000000",

-2678 => x"00000000",

-2679 => x"00000000",

-2680 => x"00000000",

-2681 => x"00000000",

-2682 => x"00000000",

-2683 => x"00000000",

-2684 => x"00000000",

-2685 => x"00000000",

-2686 => x"00000000",

-2687 => x"00000000",

-2688 => x"00000000",

-2689 => x"00000000",

-2690 => x"00000000",

-2691 => x"00000000",

-2692 => x"00000000",

-2693 => x"00000000",

-2694 => x"00000000",

-2695 => x"00000000",

-2696 => x"00000000",

-2697 => x"00000000",

-2698 => x"00000000",

-2699 => x"00000000",

-2700 => x"00000000",

-2701 => x"00000000",

-2702 => x"00000000",

-2703 => x"00000000",

-2704 => x"00000000",

-2705 => x"00000000",

-2706 => x"00000000",

-2707 => x"00000000",

-2708 => x"00000000",

-2709 => x"00000000",

-2710 => x"00000000",

-2711 => x"00000000",

-2712 => x"00000000",

-2713 => x"00000000",

-2714 => x"00000000",

-2715 => x"00000000",

-2716 => x"00000000",

-2717 => x"00000000",

-2718 => x"00000000",

-2719 => x"00000000",

-2720 => x"00000000",

-2721 => x"00000000",

-2722 => x"00000000",

-2723 => x"00000000",

-2724 => x"00000000",

-2725 => x"00000000",

-2726 => x"00000000",

-2727 => x"00000000",

-2728 => x"00000000",

-2729 => x"00000000",

-2730 => x"00000000",

-2731 => x"00000000",

-2732 => x"00000000",

-2733 => x"00000000",

-2734 => x"00000000",

-2735 => x"00000000",

-2736 => x"00000000",

-2737 => x"00000000",

-2738 => x"00000000",

-2739 => x"00000000",

-2740 => x"00000000",

-2741 => x"00000000",

-2742 => x"00000000",

-2743 => x"00000000",

-2744 => x"00000000",

-2745 => x"00000000",

-2746 => x"00000000",

-2747 => x"00000000",

-2748 => x"00000000",

-2749 => x"00000000",

-2750 => x"00000000",

-2751 => x"00000000",

-2752 => x"00000000",

-2753 => x"00000000",

-2754 => x"00000000",

-2755 => x"00000000",

-2756 => x"00000000",

-2757 => x"00000000",

-2758 => x"00000000",

-2759 => x"00000000",

-2760 => x"00000000",

-2761 => x"00000000",

-2762 => x"00000000",

-2763 => x"00000000",

-2764 => x"00000000",

-2765 => x"00000000",

-2766 => x"00000000",

-2767 => x"00000000",

-2768 => x"00000000",

-2769 => x"00000000",

-2770 => x"00000000",

-2771 => x"00000000",

-2772 => x"00000000",

-2773 => x"00000000",

-2774 => x"00000000",

-2775 => x"00000000",

-2776 => x"00000000",

-2777 => x"00000000",

-2778 => x"00000000",

-2779 => x"00000000",

-2780 => x"00000000",

-2781 => x"00000000",

-2782 => x"00000000",

-2783 => x"00000000",

-2784 => x"00000000",

-2785 => x"00000000",

-2786 => x"00000000",

-2787 => x"00000000",

-2788 => x"00000000",

-2789 => x"ffffffff",

-2790 => x"00000000",

-2791 => x"00020000",

-2792 => x"00000000",

-2793 => x"00000000",

-2794 => x"00002ba0",

-2795 => x"00002ba0",

-2796 => x"00002ba8",

-2797 => x"00002ba8",

-2798 => x"00002bb0",

-2799 => x"00002bb0",

-2800 => x"00002bb8",

-2801 => x"00002bb8",

-2802 => x"00002bc0",

-2803 => x"00002bc0",

-2804 => x"00002bc8",

-2805 => x"00002bc8",

-2806 => x"00002bd0",

-2807 => x"00002bd0",

-2808 => x"00002bd8",

-2809 => x"00002bd8",

-2810 => x"00002be0",

-2811 => x"00002be0",

-2812 => x"00002be8",

-2813 => x"00002be8",

-2814 => x"00002bf0",

-2815 => x"00002bf0",

-2816 => x"00002bf8",

-2817 => x"00002bf8",

-2818 => x"00002c00",

-2819 => x"00002c00",

-2820 => x"00002c08",

-2821 => x"00002c08",

-2822 => x"00002c10",

-2823 => x"00002c10",

-2824 => x"00002c18",

-2825 => x"00002c18",

-2826 => x"00002c20",

-2827 => x"00002c20",

-2828 => x"00002c28",

-2829 => x"00002c28",

-2830 => x"00002c30",

-2831 => x"00002c30",

-2832 => x"00002c38",

-2833 => x"00002c38",

-2834 => x"00002c40",

-2835 => x"00002c40",

-2836 => x"00002c48",

-2837 => x"00002c48",

-2838 => x"00002c50",

-2839 => x"00002c50",

-2840 => x"00002c58",

-2841 => x"00002c58",

-2842 => x"00002c60",

-2843 => x"00002c60",

-2844 => x"00002c68",

-2845 => x"00002c68",

-2846 => x"00002c70",

-2847 => x"00002c70",

-2848 => x"00002c78",

-2849 => x"00002c78",

-2850 => x"00002c80",

-2851 => x"00002c80",

-2852 => x"00002c88",

-2853 => x"00002c88",

-2854 => x"00002c90",

-2855 => x"00002c90",

-2856 => x"00002c98",

-2857 => x"00002c98",

-2858 => x"00002ca0",

-2859 => x"00002ca0",

-2860 => x"00002ca8",

-2861 => x"00002ca8",

-2862 => x"00002cb0",

-2863 => x"00002cb0",

-2864 => x"00002cb8",

-2865 => x"00002cb8",

-2866 => x"00002cc0",

-2867 => x"00002cc0",

-2868 => x"00002cc8",

-2869 => x"00002cc8",

-2870 => x"00002cd0",

-2871 => x"00002cd0",

-2872 => x"00002cd8",

-2873 => x"00002cd8",

-2874 => x"00002ce0",

-2875 => x"00002ce0",

-2876 => x"00002ce8",

-2877 => x"00002ce8",

-2878 => x"00002cf0",

-2879 => x"00002cf0",

-2880 => x"00002cf8",

-2881 => x"00002cf8",

-2882 => x"00002d00",

-2883 => x"00002d00",

-2884 => x"00002d08",

-2885 => x"00002d08",

-2886 => x"00002d10",

-2887 => x"00002d10",

-2888 => x"00002d18",

-2889 => x"00002d18",

-2890 => x"00002d20",

-2891 => x"00002d20",

-2892 => x"00002d28",

-2893 => x"00002d28",

-2894 => x"00002d30",

-2895 => x"00002d30",

-2896 => x"00002d38",

-2897 => x"00002d38",

-2898 => x"00002d40",

-2899 => x"00002d40",

-2900 => x"00002d48",

-2901 => x"00002d48",

-2902 => x"00002d50",

-2903 => x"00002d50",

-2904 => x"00002d58",

-2905 => x"00002d58",

-2906 => x"00002d60",

-2907 => x"00002d60",

-2908 => x"00002d68",

-2909 => x"00002d68",

-2910 => x"00002d70",

-2911 => x"00002d70",

-2912 => x"00002d78",

-2913 => x"00002d78",

-2914 => x"00002d80",

-2915 => x"00002d80",

-2916 => x"00002d88",

-2917 => x"00002d88",

-2918 => x"00002d90",

-2919 => x"00002d90",

-2920 => x"00002d98",

-2921 => x"00002d98",

-2922 => x"00002da0",

-2923 => x"00002da0",

-2924 => x"00002da8",

-2925 => x"00002da8",

-2926 => x"00002db0",

-2927 => x"00002db0",

-2928 => x"00002db8",

-2929 => x"00002db8",

-2930 => x"00002dc0",

-2931 => x"00002dc0",

-2932 => x"00002dc8",

-2933 => x"00002dc8",

-2934 => x"00002dd0",

-2935 => x"00002dd0",

-2936 => x"00002dd8",

-2937 => x"00002dd8",

-2938 => x"00002de0",

-2939 => x"00002de0",

-2940 => x"00002de8",

-2941 => x"00002de8",

-2942 => x"00002df0",

-2943 => x"00002df0",

-2944 => x"00002df8",

-2945 => x"00002df8",

-2946 => x"00002e00",

-2947 => x"00002e00",

-2948 => x"00002e08",

-2949 => x"00002e08",

-2950 => x"00002e10",

-2951 => x"00002e10",

-2952 => x"00002e18",

-2953 => x"00002e18",

-2954 => x"00002e20",

-2955 => x"00002e20",

-2956 => x"00002e28",

-2957 => x"00002e28",

-2958 => x"00002e30",

-2959 => x"00002e30",

-2960 => x"00002e38",

-2961 => x"00002e38",

-2962 => x"00002e40",

-2963 => x"00002e40",

-2964 => x"00002e48",

-2965 => x"00002e48",

-2966 => x"00002e50",

-2967 => x"00002e50",

-2968 => x"00002e58",

-2969 => x"00002e58",

-2970 => x"00002e60",

-2971 => x"00002e60",

-2972 => x"00002e68",

-2973 => x"00002e68",

-2974 => x"00002e70",

-2975 => x"00002e70",

-2976 => x"00002e78",

-2977 => x"00002e78",

-2978 => x"00002e80",

-2979 => x"00002e80",

-2980 => x"00002e88",

-2981 => x"00002e88",

-2982 => x"00002e90",

-2983 => x"00002e90",

-2984 => x"00002e98",

-2985 => x"00002e98",

-2986 => x"00002ea0",

-2987 => x"00002ea0",

-2988 => x"00002ea8",

-2989 => x"00002ea8",

-2990 => x"00002eb0",

-2991 => x"00002eb0",

-2992 => x"00002eb8",

-2993 => x"00002eb8",

-2994 => x"00002ec0",

-2995 => x"00002ec0",

-2996 => x"00002ec8",

-2997 => x"00002ec8",

-2998 => x"00002ed0",

-2999 => x"00002ed0",

-3000 => x"00002ed8",

-3001 => x"00002ed8",

-3002 => x"00002ee0",

-3003 => x"00002ee0",

-3004 => x"00002ee8",

-3005 => x"00002ee8",

-3006 => x"00002ef0",

-3007 => x"00002ef0",

-3008 => x"00002ef8",

-3009 => x"00002ef8",

-3010 => x"00002f00",

-3011 => x"00002f00",

-3012 => x"00002f08",

-3013 => x"00002f08",

-3014 => x"00002f10",

-3015 => x"00002f10",

-3016 => x"00002f18",

-3017 => x"00002f18",

-3018 => x"00002f20",

-3019 => x"00002f20",

-3020 => x"00002f28",

-3021 => x"00002f28",

-3022 => x"00002f30",

-3023 => x"00002f30",

-3024 => x"00002f38",

-3025 => x"00002f38",

-3026 => x"00002f40",

-3027 => x"00002f40",

-3028 => x"00002f48",

-3029 => x"00002f48",

-3030 => x"00002f50",

-3031 => x"00002f50",

-3032 => x"00002f58",

-3033 => x"00002f58",

-3034 => x"00002f60",

-3035 => x"00002f60",

-3036 => x"00002f68",

-3037 => x"00002f68",

-3038 => x"00002f70",

-3039 => x"00002f70",

-3040 => x"00002f78",

-3041 => x"00002f78",

-3042 => x"00002f80",

-3043 => x"00002f80",

-3044 => x"00002f88",

-3045 => x"00002f88",

-3046 => x"00002f90",

-3047 => x"00002f90",

-3048 => x"00002f98",

-3049 => x"00002f98",

-3050 => x"000027b8",

-3051 => x"ffffffff",

-3052 => x"00000000",

-3053 => x"ffffffff",

-3054 => x"00000000",

-	others => x"00000000"

-);

-

-begin

-

-mem_busy<=mem_readEnable; -- we're done on the cycle after we serve the read request

-

-process (clk, areset)

-begin

-		if areset = '1' then

-		elsif (clk'event and clk = '1') then

-			if (mem_writeEnable = '1') then

-				ram(to_integer(unsigned(mem_addr(maxAddrBit downto minAddrBit)))) := mem_write;

-			end if;

-		if (mem_readEnable = '1') then

-			mem_read <= ram(to_integer(unsigned(mem_addr(maxAddrBit downto minAddrBit))));

-		end if;

-	end if;

-end process;

-

-

-

-

-end dram_arch;

diff --git a/zpu/hdl/zpu4/src/zpu_config_trace.vhd b/zpu/hdl/zpu4/src/zpu_config_trace.vhd
deleted file mode 100644
index d765d9a..0000000
--- a/zpu/hdl/zpu4/src/zpu_config_trace.vhd
+++ /dev/null
@@ -1,17 +0,0 @@
-library ieee;

-use ieee.std_logic_1164.all;

-

-package zpu_config is

-

-	constant	Generate_Trace		: boolean := true;

-	constant 	wordPower			: integer := 5;

-	-- during simulation, set this to '0' to get matching trace.txt 

-	constant	DontCareValue		: std_logic := '0';

-	-- Clock frequency in MHz.

-	constant	ZPU_Frequency		: std_logic_vector(7 downto 0) := x"64";

-	constant 	maxAddrBitIncIO		: integer := 27;

-	constant 	maxAddrBitDRAM		: integer := 16;

-	constant 	maxAddrBitBRAM		: integer := 16;

-	constant 	spStart				: std_logic_vector(maxAddrBitIncIO downto 0) := x"001fff8"; 	

-	

-end zpu_config;

diff --git a/zpu/hdl/zpu4/test/interrupt/int.bin b/zpu/hdl/zpu4/test/interrupt/int.bin
index 94cbe31..282f53b 100644
--- a/zpu/hdl/zpu4/test/interrupt/int.bin
+++ b/zpu/hdl/zpu4/test/interrupt/int.bin
diff --git a/zpu/hdl/zpu4/test/interrupt/int.c b/zpu/hdl/zpu4/test/interrupt/int.c
index 1b6ec01..6ab28f7 100644
--- a/zpu/hdl/zpu4/test/interrupt/int.c
+++ b/zpu/hdl/zpu4/test/interrupt/int.c
@@ -4,11 +4,15 @@
 #include <stdio.h>

 

 

-int counter;

+volatile int counter;

 

 /* Example of single, fixed interval non-maskable, nested interrupt. The interrupt signal is

  * held high for enough cycles to guarantee that it will be noticed, i.e. longer than

  * any io access + 4 cycles roughly.

+ * 

+ * Any non-trivial interrupt controller would have support for

+ * acknowledging interrupts(i.e. keep interrupts asserted until

+ * software acknowledges them via memory mapped IO).

  */

 void  _zpu_interrupt(void)

 {

@@ -29,6 +33,7 @@ int main(int argc, char **argv)
 		} else

 		{

 			puts("Got interrupt\n");

+			t=counter;

 		}

 	}

     

diff --git a/zpu/hdl/zpu4/test/interrupt/int.elf b/zpu/hdl/zpu4/test/interrupt/int.elf
index a550987..346d148 100644
--- a/zpu/hdl/zpu4/test/interrupt/int.elf
+++ b/zpu/hdl/zpu4/test/interrupt/int.elf
diff --git a/zpu/hdl/zpu4/test/interrupt/int.ram b/zpu/hdl/zpu4/test/interrupt/int.ram
index bcb424a..6751ec2 100644
--- a/zpu/hdl/zpu4/test/interrupt/int.ram
+++ b/zpu/hdl/zpu4/test/interrupt/int.ram
@@ -2,7 +2,7 @@
 1 => x"82700b0b",

 2 => x"80cfe00c",

 3 => x"3a0b0b80",

-4 => x"c6e10400",

+4 => x"c6e00400",

 5 => x"00000000",

 6 => x"00000000",

 7 => x"00000000",

@@ -169,7 +169,7 @@
 168 => x"80088408",

 169 => x"88087575",

 170 => x"0b0b0b8b",

-171 => x"ac2d5050",

+171 => x"ab2d5050",

 172 => x"80085688",

 173 => x"0c840c80",

 174 => x"0c510400",

@@ -177,7 +177,7 @@
 176 => x"80088408",

 177 => x"88087575",

 178 => x"0b0b0b8b",

-179 => x"f02d5050",

+179 => x"ef2d5050",

 180 => x"80085688",

 181 => x"0c840c80",

 182 => x"0c510400",

@@ -255,7 +255,7 @@
 254 => x"00000000",

 255 => x"00000000",

 256 => x"82c53f80",

-257 => x"c6e73f04",

+257 => x"c6e63f04",

 258 => x"10101010",

 259 => x"10101010",

 260 => x"10101010",

@@ -346,2192 +346,2192 @@
 345 => x"dfc4510b",

 346 => x"0b0bf594",

 347 => x"3f500404",

-348 => x"80dfe008",

-349 => x"810580df",

-350 => x"e00c04fe",

-351 => x"3d0d80df",

-352 => x"e0087054",

-353 => x"5272722e",

-354 => x"953880cf",

-355 => x"9c5182bb",

-356 => x"3f80dfe0",

-357 => x"08527272",

-358 => x"2e098106",

-359 => x"ed3880cf",

-360 => x"ac5182a7",

-361 => x"3f80dfe0",

-362 => x"0852eb39",

-363 => x"fb3d0d77",

-364 => x"79555580",

-365 => x"56757524",

-366 => x"ab388074",

-367 => x"249d3880",

-368 => x"53735274",

-369 => x"5180e13f",

-370 => x"80085475",

-371 => x"802e8538",

-372 => x"80083054",

-373 => x"73800c87",

-374 => x"3d0d0473",

-375 => x"30768132",

-376 => x"5754dc39",

-377 => x"74305581",

-378 => x"56738025",

-379 => x"d238ec39",

-380 => x"fa3d0d78",

-381 => x"7a575580",

-382 => x"57767524",

-383 => x"a438759f",

-384 => x"2c548153",

-385 => x"75743274",

-386 => x"31527451",

-387 => x"9b3f8008",

-388 => x"5476802e",

-389 => x"85388008",

-390 => x"30547380",

-391 => x"0c883d0d",

-392 => x"04743055",

-393 => x"8157d739",

-394 => x"fc3d0d76",

-395 => x"78535481",

-396 => x"53807473",

-397 => x"26525572",

-398 => x"802e9838",

-399 => x"70802eab",

-400 => x"38807224",

-401 => x"a6387110",

-402 => x"73107572",

-403 => x"26535452",

-404 => x"72ea3873",

-405 => x"51788338",

-406 => x"74517080",

-407 => x"0c863d0d",

-408 => x"04720a10",

-409 => x"0a720a10",

-410 => x"0a535372",

-411 => x"802ee438",

-412 => x"717426ed",

-413 => x"38737231",

-414 => x"75740774",

-415 => x"0a100a74",

-416 => x"0a100a55",

-417 => x"555654e3",

-418 => x"39f73d0d",

-419 => x"7c705253",

-420 => x"80fd3f72",

-421 => x"54800855",

-422 => x"0b0b80cf",

-423 => x"b8568157",

-424 => x"80088105",

-425 => x"5a8b3de4",

-426 => x"11595382",

-427 => x"59f41352",

-428 => x"7b881108",

-429 => x"525381b4",

-430 => x"3f800830",

-431 => x"70800807",

-432 => x"9f2c8a07",

-433 => x"800c538b",

-434 => x"3d0d04f6",

-435 => x"3d0d7c80",

-436 => x"cfec0871",

-437 => x"535553b7",

-438 => x"3f725580",

-439 => x"08560b0b",

-440 => x"80cfb857",

-441 => x"81588008",

-442 => x"81055b8c",

-443 => x"3de4115a",

-444 => x"53825af4",

-445 => x"13528814",

-446 => x"085180f0",

-447 => x"3f800830",

-448 => x"70800807",

-449 => x"9f2c8a07",

-450 => x"800c548c",

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