* zpu/hdl/example_ghdl/ghdl_import.sh, zpu/hdl/example_ghdl/ghdl_make.sh,

	  zpu/hdl/example_ghdl/ghdl_options.sh, zpu/hdl/example_ghdl/README: GHDL example
	* zpu/hdl/zpu4/src/dmipssmalltrace_ghdl.sh: testcase for GHDL
	* zpu/hdl/zpu4/src/dmipstrace_ghdl.sh: testcase for GHDL
	* zpu/hdl/zpu4/src/simzpu_medium_ghdl.sh: testcase for GHDL
	* zpu/hdl/example/helloworld.vhd, zpu/hdl/zpu4/src/bram_dmips.vhd,
	  zpu/hdl/zpu4/src/dmipssmalltrace_ghdl.sh, zpu/hdl/zpu4/src/dram_dmips.vhd,
	  zpu/hdl/zpu4/src/dram_hello.vhd, zpu/hdl/zpu4/src/io.vhd,
	  zpu/hdl/zpu4/src/sim_fpga_top.vhd, zpu/hdl/zpu4/src/sim_small_fpga_top.vhd,
	  zpu/hdl/zpu4/src/timer.vhd, zpu/hdl/zpu4/src/trace.vhd,
	  zpu/hdl/zpu4/src/zpu_config_trace.vhd, zpu/hdl/zpu4/src/zpu_core_small.vhd,
	  zpu/hdl/zpu4/src/zpu_core.vhd, zpu/hdl/zpu4/src/zpupkg.vhd: conversion to numeric_std

1 files changed, 3 insertions, 3 deletions

diff --git a/zpu/hdl/zpu4/src/timer.vhd b/zpu/hdl/zpu4/src/timer.vhd
index 60c8fe2..be1dbb8 100644
--- a/zpu/hdl/zpu4/src/timer.vhd
+++ b/zpu/hdl/zpu4/src/timer.vhd
@@ -1,6 +1,6 @@
 library ieee;

 use ieee.std_logic_1164.all;

-use IEEE.STD_LOGIC_UNSIGNED.ALL;

+use ieee.numeric_std.all;

  

 entity timer is

   port(

@@ -19,7 +19,7 @@ signal	sample	: std_logic;
 signal	reset		: std_logic;

 

 

-signal	cnt		: std_logic_vector(63 downto 0);

+signal	cnt		: unsigned(63 downto 0);

 signal	cnt_smp	: std_logic_vector(63 downto 0);

 

 begin

@@ -36,7 +36,7 @@ begin
 			cnt <= cnt + 1;

 			if sample = '1' then

 --				report "sampling" severity failure;

-				cnt_smp <= cnt;

+				cnt_smp <= std_logic_vector(cnt);

 			end if;

 		end if;

 	end process;