summaryrefslogtreecommitdiffstats
path: root/zpu/hdl/zpu4/core/zpu_core_small.vhd
diff options
context:
space:
mode:
authoroharboe <oharboe>2008-08-26 19:13:29 +0000
committeroharboe <oharboe>2008-08-26 19:13:29 +0000
commit76c3ea4351ea2f30ad948249e16d0253949f4f4e (patch)
treeb464e1f854afab4337043d0ca011a1f15fd9a507 /zpu/hdl/zpu4/core/zpu_core_small.vhd
parent1de92a77fd154c79d210df2e957ade2a0965243f (diff)
downloadzpu-76c3ea4351ea2f30ad948249e16d0253949f4f4e.zip
zpu-76c3ea4351ea2f30ad948249e16d0253949f4f4e.tar.gz
some more comments about dual port ram
Diffstat (limited to 'zpu/hdl/zpu4/core/zpu_core_small.vhd')
-rw-r--r--zpu/hdl/zpu4/core/zpu_core_small.vhd21
1 files changed, 21 insertions, 0 deletions
diff --git a/zpu/hdl/zpu4/core/zpu_core_small.vhd b/zpu/hdl/zpu4/core/zpu_core_small.vhd
index 9946fb3..5587189 100644
--- a/zpu/hdl/zpu4/core/zpu_core_small.vhd
+++ b/zpu/hdl/zpu4/core/zpu_core_small.vhd
@@ -195,6 +195,27 @@ begin
memAWrite_stdlogic <= std_logic_vector(memAWrite);
memBAddr_stdlogic <= std_logic_vector(memBAddr(AddrBitBRAM_range));
memBWrite_stdlogic <= std_logic_vector(memBWrite);
+
+
+ -- dualport_ram must be defined by the application.
+ --
+ -- How this can be implemented is highly dependent on the FPGA
+ -- and synthesis technology used.
+ --
+ -- sometimes it can be instantiated as in the
+ -- zpu/example/helloworld.vhd, using inference,
+ -- but oftentimes it must be instantiated directly
+ -- portmapping to part specific FPGA resources
+ --
+ --
+ -- DANGER!!!!!! If inference fails, then synthesis will try
+ -- to implement the memory using basic logic resources. This
+ -- will almost certainly cause the compiler to get "stuck"
+ -- since synthesising such a huge number of basic logic resources
+ -- will take more or less forever.
+ --
+ -- So: if your compiler gets "stuck" then inference is not
+ -- the way to go.
memory: dualport_ram port map (
clk => clk,
memAWriteEnable => memAWriteEnable,
OpenPOWER on IntegriCloud