summaryrefslogtreecommitdiffstats
path: root/zpu/hdl/zealot/fpga/digilent-starter-xc3s500e/clean_up.sh
diff options
context:
space:
mode:
authorBert Lange <b.lange@hzdr.de>2011-10-13 12:37:49 +0200
committerBert Lange <b.lange@hzdr.de>2011-10-13 12:37:49 +0200
commit0bf783475d6610a14f71884737aeae33246bb9be (patch)
tree8545a4d2e76761131f4945db6eeca7b563f7161e /zpu/hdl/zealot/fpga/digilent-starter-xc3s500e/clean_up.sh
parentbf4405c61a9c010a8e888da678436a282b9551a3 (diff)
downloadzpu-0bf783475d6610a14f71884737aeae33246bb9be.zip
zpu-0bf783475d6610a14f71884737aeae33246bb9be.tar.gz
add: ZPU reference designs for zealot
Diffstat (limited to 'zpu/hdl/zealot/fpga/digilent-starter-xc3s500e/clean_up.sh')
-rwxr-xr-xzpu/hdl/zealot/fpga/digilent-starter-xc3s500e/clean_up.sh16
1 files changed, 16 insertions, 0 deletions
diff --git a/zpu/hdl/zealot/fpga/digilent-starter-xc3s500e/clean_up.sh b/zpu/hdl/zealot/fpga/digilent-starter-xc3s500e/clean_up.sh
new file mode 100755
index 0000000..3855f16
--- /dev/null
+++ b/zpu/hdl/zealot/fpga/digilent-starter-xc3s500e/clean_up.sh
@@ -0,0 +1,16 @@
+#!/bin/sh
+
+# ise build stuff
+rm -rf build
+rm -f top.bit
+
+# modelsim compile stuff
+rm -rf work
+rm -rf zpu
+
+# modelsim simulation stuff
+rm -f vsim.wlf
+rm -f transcript
+rm -f zpu_trace.log
+rm -f zpu_med1_io.log
+rm -f zpu_small1_io.log
OpenPOWER on IntegriCloud