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author | Øyvind Harboe <oyvind.harboe@zylin.com> | 2011-03-01 20:52:55 +0100 |
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committer | Øyvind Harboe <oyvind.harboe@zylin.com> | 2011-03-01 20:52:55 +0100 |
commit | 04772b6a0bbe7017f5f7b44cfa203c3f7efbff64 (patch) | |
tree | c6bd96afc27bce5b46895b037ec71b211d509465 /zpu/hdl/wishbone/zpu_system.vhd | |
parent | b103d820a57859fc4aad48f50029e12cc1db7611 (diff) | |
download | zpu-04772b6a0bbe7017f5f7b44cfa203c3f7efbff64.zip zpu-04772b6a0bbe7017f5f7b44cfa203c3f7efbff64.tar.gz |
whitespace fixes: use fromdos on all .vhd files
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Diffstat (limited to 'zpu/hdl/wishbone/zpu_system.vhd')
-rw-r--r-- | zpu/hdl/wishbone/zpu_system.vhd | 208 |
1 files changed, 104 insertions, 104 deletions
diff --git a/zpu/hdl/wishbone/zpu_system.vhd b/zpu/hdl/wishbone/zpu_system.vhd index 5b95a80..07c5bdc 100644 --- a/zpu/hdl/wishbone/zpu_system.vhd +++ b/zpu/hdl/wishbone/zpu_system.vhd @@ -1,104 +1,104 @@ --- ZPU
---
--- Copyright 2004-2008 oharboe - Øyvind Harboe - oyvind.harboe@zylin.com
---
--- The FreeBSD license
---
--- Redistribution and use in source and binary forms, with or without
--- modification, are permitted provided that the following conditions
--- are met:
---
--- 1. Redistributions of source code must retain the above copyright
--- notice, this list of conditions and the following disclaimer.
--- 2. Redistributions in binary form must reproduce the above
--- copyright notice, this list of conditions and the following
--- disclaimer in the documentation and/or other materials
--- provided with the distribution.
---
--- THIS SOFTWARE IS PROVIDED BY THE ZPU PROJECT ``AS IS'' AND ANY
--- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
--- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
--- PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
--- ZPU PROJECT OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
--- INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
--- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
--- OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
--- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
--- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
--- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
--- ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
---
--- The views and conclusions contained in the software and documentation
--- are those of the authors and should not be interpreted as representing
--- official policies, either expressed or implied, of the ZPU Project.
-
-library IEEE;
-use IEEE.STD_LOGIC_1164.all;
-use IEEE.STD_LOGIC_UNSIGNED.all;
-
-library work;
-use work.wishbone_pkg.all;
-use work.zpupkg.all;
-use work.zpu_config.all;
-
-entity zpu_system is
- generic(
- simulate : boolean := false);
- port ( areset : in std_logic;
- cpu_clk : in std_logic;
-
- -- ZPU Control signals
- enable : in std_logic;
- interrupt : in std_logic;
-
- zpu_status : out std_logic_vector(63 downto 0);
-
- -- wishbone interfaces
- zpu_wb_i : in wishbone_bus_out;
- zpu_wb_o : out wishbone_bus_in);
-end zpu_system;
-
-architecture behave of zpu_system is
-
-signal mem_req : std_logic;
-signal mem_we : std_logic;
-signal mem_ack : std_logic;
-signal mem_read : std_logic_vector(wordSize-1 downto 0);
-signal mem_write : std_logic_vector(wordSize-1 downto 0);
-signal out_mem_addr : std_logic_vector(maxAddrBitIncIO downto 0);
-signal mem_writeMask : std_logic_vector(wordBytes-1 downto 0);
-
-
-begin
-
- my_zpu_core:
- zpu_core port map (
- clk => cpu_clk,
- areset => areset,
- enable => enable,
- mem_req => mem_req,
- mem_we => mem_we,
- mem_ack => mem_ack,
- mem_read => mem_read,
- mem_write => mem_write,
- out_mem_addr => out_mem_addr,
- mem_writeMask => mem_writeMask,
- interrupt => interrupt,
- zpu_status => zpu_status,
- break => open);
-
- my_zpu_wb_bridge:
- zpu_wb_bridge port map (
- clk => cpu_clk,
- areset => areset,
- mem_req => mem_req,
- mem_we => mem_we,
- mem_ack => mem_ack,
- mem_read => mem_read,
- mem_write => mem_write,
- out_mem_addr => out_mem_addr,
- mem_writeMask => mem_writeMask,
- zpu_wb_i => zpu_wb_i,
- zpu_wb_o => zpu_wb_o);
-
-end behave;
+-- ZPU +-- +-- Copyright 2004-2008 oharboe - Øyvind Harboe - oyvind.harboe@zylin.com +-- +-- The FreeBSD license +-- +-- Redistribution and use in source and binary forms, with or without +-- modification, are permitted provided that the following conditions +-- are met: +-- +-- 1. Redistributions of source code must retain the above copyright +-- notice, this list of conditions and the following disclaimer. +-- 2. Redistributions in binary form must reproduce the above +-- copyright notice, this list of conditions and the following +-- disclaimer in the documentation and/or other materials +-- provided with the distribution. +-- +-- THIS SOFTWARE IS PROVIDED BY THE ZPU PROJECT ``AS IS'' AND ANY +-- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, +-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A +-- PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +-- ZPU PROJECT OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +-- INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +-- OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +-- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +-- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +-- ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +-- +-- The views and conclusions contained in the software and documentation +-- are those of the authors and should not be interpreted as representing +-- official policies, either expressed or implied, of the ZPU Project. + +library IEEE; +use IEEE.STD_LOGIC_1164.all; +use IEEE.STD_LOGIC_UNSIGNED.all; + +library work; +use work.wishbone_pkg.all; +use work.zpupkg.all; +use work.zpu_config.all; + +entity zpu_system is + generic( + simulate : boolean := false); + port ( areset : in std_logic; + cpu_clk : in std_logic; + + -- ZPU Control signals + enable : in std_logic; + interrupt : in std_logic; + + zpu_status : out std_logic_vector(63 downto 0); + + -- wishbone interfaces + zpu_wb_i : in wishbone_bus_out; + zpu_wb_o : out wishbone_bus_in); +end zpu_system; + +architecture behave of zpu_system is + +signal mem_req : std_logic; +signal mem_we : std_logic; +signal mem_ack : std_logic; +signal mem_read : std_logic_vector(wordSize-1 downto 0); +signal mem_write : std_logic_vector(wordSize-1 downto 0); +signal out_mem_addr : std_logic_vector(maxAddrBitIncIO downto 0); +signal mem_writeMask : std_logic_vector(wordBytes-1 downto 0); + + +begin + + my_zpu_core: + zpu_core port map ( + clk => cpu_clk, + areset => areset, + enable => enable, + mem_req => mem_req, + mem_we => mem_we, + mem_ack => mem_ack, + mem_read => mem_read, + mem_write => mem_write, + out_mem_addr => out_mem_addr, + mem_writeMask => mem_writeMask, + interrupt => interrupt, + zpu_status => zpu_status, + break => open); + + my_zpu_wb_bridge: + zpu_wb_bridge port map ( + clk => cpu_clk, + areset => areset, + mem_req => mem_req, + mem_we => mem_we, + mem_ack => mem_ack, + mem_read => mem_read, + mem_write => mem_write, + out_mem_addr => out_mem_addr, + mem_writeMask => mem_writeMask, + zpu_wb_i => zpu_wb_i, + zpu_wb_o => zpu_wb_o); + +end behave; |