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authoroharboe <oharboe>2008-05-04 20:44:27 +0000
committeroharboe <oharboe>2008-05-04 20:44:27 +0000
commitb93ac48f3c323a11a97a39338897c521780a16b9 (patch)
tree5c5bc256a988334970f821be5b7f18159f6bd519 /zpu/hdl/example_ghdl
parent1362bd4ace3ce962ed744a153e5f969154bb6682 (diff)
downloadzpu-b93ac48f3c323a11a97a39338897c521780a16b9.zip
zpu-b93ac48f3c323a11a97a39338897c521780a16b9.tar.gz
* moved ZPU core files to seperate folder
* deleted some obsolete files
Diffstat (limited to 'zpu/hdl/example_ghdl')
-rw-r--r--zpu/hdl/example_ghdl/dmipssmalltrace_ghdl.sh26
-rw-r--r--zpu/hdl/example_ghdl/dmipstrace_ghdl.sh25
-rw-r--r--zpu/hdl/example_ghdl/simzpu_medium_ghdl.sh25
3 files changed, 76 insertions, 0 deletions
diff --git a/zpu/hdl/example_ghdl/dmipssmalltrace_ghdl.sh b/zpu/hdl/example_ghdl/dmipssmalltrace_ghdl.sh
new file mode 100644
index 0000000..5e43b64
--- /dev/null
+++ b/zpu/hdl/example_ghdl/dmipssmalltrace_ghdl.sh
@@ -0,0 +1,26 @@
+#!/bin/sh
+
+UNISIM_DIR="'location of GHDL objects for unisim library'/unisim_v93"
+IMPORT_OPTIONS="--std=93 --ieee=synopsys --workdir=work -P${UNISIM_DIR}"
+MAKE_OPTIONS="${IMPORT_OPTIONS} -Wl,-s -fexplicit --syn-binding"
+
+if test ! -e work; then
+ echo "Building work library..."
+ mkdir work
+ ghdl -i ${IMPORT_OPTIONS} zpu_config_trace.vhd
+ ghdl -i ${IMPORT_OPTIONS} zpupkg.vhd
+ ghdl -i ${IMPORT_OPTIONS} txt_util.vhd
+ ghdl -i ${IMPORT_OPTIONS} sim_fpga_top.vhd
+ ghdl -i ${IMPORT_OPTIONS} zpu_core_small.vhd
+ ghdl -i ${IMPORT_OPTIONS} bram_dmips.vhd
+ ghdl -i ${IMPORT_OPTIONS} dram_dmips.vhd
+ ghdl -i ${IMPORT_OPTIONS} timer.vhd
+ ghdl -i ${IMPORT_OPTIONS} io.vhd
+ ghdl -i ${IMPORT_OPTIONS} trace.vhd
+fi
+
+echo "Compiling design..."
+if ghdl -m ${MAKE_OPTIONS} fpga_top; then
+ echo "Compilation finished, start simulation with"
+ echo " ./fpga_top --stop-time=1ms"
+fi
diff --git a/zpu/hdl/example_ghdl/dmipstrace_ghdl.sh b/zpu/hdl/example_ghdl/dmipstrace_ghdl.sh
new file mode 100644
index 0000000..3be392f
--- /dev/null
+++ b/zpu/hdl/example_ghdl/dmipstrace_ghdl.sh
@@ -0,0 +1,25 @@
+#!/bin/sh
+
+UNISIM_DIR="'location of GHDL objects for unisim library'/unisim_v93"
+IMPORT_OPTIONS="--std=93 --ieee=synopsys --workdir=work -P${UNISIM_DIR}"
+MAKE_OPTIONS="${IMPORT_OPTIONS} -Wl,-s -fexplicit --syn-binding"
+
+if test ! -e work; then
+ echo "Building work library..."
+ mkdir work
+ ghdl -i ${IMPORT_OPTIONS} zpu_config_trace.vhd
+ ghdl -i ${IMPORT_OPTIONS} zpupkg.vhd
+ ghdl -i ${IMPORT_OPTIONS} txt_util.vhd
+ ghdl -i ${IMPORT_OPTIONS} sim_fpga_top.vhd
+ ghdl -i ${IMPORT_OPTIONS} zpu_core.vhd
+ ghdl -i ${IMPORT_OPTIONS} dram_dmips.vhd
+ ghdl -i ${IMPORT_OPTIONS} timer.vhd
+ ghdl -i ${IMPORT_OPTIONS} io.vhd
+ ghdl -i ${IMPORT_OPTIONS} trace.vhd
+fi
+
+echo "Compiling design..."
+if ghdl -m ${MAKE_OPTIONS} fpga_top; then
+ echo "Compilation finished, start simulation with"
+ echo " ./fpga_top --stop-time=2500us"
+fi
diff --git a/zpu/hdl/example_ghdl/simzpu_medium_ghdl.sh b/zpu/hdl/example_ghdl/simzpu_medium_ghdl.sh
new file mode 100644
index 0000000..7a7f3df
--- /dev/null
+++ b/zpu/hdl/example_ghdl/simzpu_medium_ghdl.sh
@@ -0,0 +1,25 @@
+#!/bin/sh
+
+UNISIM_DIR="'location of GHDL objects for unisim library'/unisim_v93"
+IMPORT_OPTIONS="--std=93 --ieee=synopsys --workdir=work -P${UNISIM_DIR}"
+MAKE_OPTIONS="${IMPORT_OPTIONS} -Wl,-s -fexplicit --syn-binding"
+
+if test ! -e work; then
+ echo "Building work library..."
+ mkdir work
+ ghdl -i ${IMPORT_OPTIONS} zpu_config_trace.vhd
+ ghdl -i ${IMPORT_OPTIONS} zpupkg.vhd
+ ghdl -i ${IMPORT_OPTIONS} txt_util.vhd
+ ghdl -i ${IMPORT_OPTIONS} sim_fpga_top.vhd
+ ghdl -i ${IMPORT_OPTIONS} zpu_core.vhd
+ ghdl -i ${IMPORT_OPTIONS} dram_hello.vhd
+ ghdl -i ${IMPORT_OPTIONS} timer.vhd
+ ghdl -i ${IMPORT_OPTIONS} io.vhd
+ ghdl -i ${IMPORT_OPTIONS} trace.vhd
+fi
+
+echo "Compiling design..."
+if ghdl -m ${MAKE_OPTIONS} fpga_top; then
+ echo "Compilation finished, start simulation with"
+ echo " ./fpga_top --stop-time=1ms"
+fi
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