diff options
| author | oharboe <oharboe> | 2008-06-18 17:04:44 +0000 |
|---|---|---|
| committer | oharboe <oharboe> | 2008-06-18 17:04:44 +0000 |
| commit | 8c213415fe0ddc1f9eae0b96e023eb89f89d1c47 (patch) | |
| tree | b2ec69cc0eccf470256898f5c7d51b2a49f9376d /zpu/hdl/example_ghdl/simzpu_medium_ghdl.sh | |
| parent | 0711a2b4fc2dec8bf65e5821095bed895976b83a (diff) | |
| download | zpu-8c213415fe0ddc1f9eae0b96e023eb89f89d1c47.zip zpu-8c213415fe0ddc1f9eae0b96e023eb89f89d1c47.tar.gz | |
I'm also attaching another patch which removes unisim/roc dependency
(it was used just to pulse the areset) and fixes paths for building
the ghdl examples out of the box. I guess this is the easiest way to
get zpu running on linux with minimum effort.
You should check if the areset change doesn't break modelsim. It feels
much simpler this way and seems to work the same, i might be missing
something.
Diffstat (limited to 'zpu/hdl/example_ghdl/simzpu_medium_ghdl.sh')
| -rw-r--r-- | zpu/hdl/example_ghdl/simzpu_medium_ghdl.sh | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/zpu/hdl/example_ghdl/simzpu_medium_ghdl.sh b/zpu/hdl/example_ghdl/simzpu_medium_ghdl.sh index 7a7f3df..8ba5078 100644 --- a/zpu/hdl/example_ghdl/simzpu_medium_ghdl.sh +++ b/zpu/hdl/example_ghdl/simzpu_medium_ghdl.sh @@ -1,21 +1,20 @@ #!/bin/sh
-UNISIM_DIR="'location of GHDL objects for unisim library'/unisim_v93"
-IMPORT_OPTIONS="--std=93 --ieee=synopsys --workdir=work -P${UNISIM_DIR}"
+IMPORT_OPTIONS="--std=93 --ieee=synopsys --workdir=work"
MAKE_OPTIONS="${IMPORT_OPTIONS} -Wl,-s -fexplicit --syn-binding"
if test ! -e work; then
echo "Building work library..."
mkdir work
- ghdl -i ${IMPORT_OPTIONS} zpu_config_trace.vhd
- ghdl -i ${IMPORT_OPTIONS} zpupkg.vhd
- ghdl -i ${IMPORT_OPTIONS} txt_util.vhd
- ghdl -i ${IMPORT_OPTIONS} sim_fpga_top.vhd
- ghdl -i ${IMPORT_OPTIONS} zpu_core.vhd
- ghdl -i ${IMPORT_OPTIONS} dram_hello.vhd
- ghdl -i ${IMPORT_OPTIONS} timer.vhd
- ghdl -i ${IMPORT_OPTIONS} io.vhd
- ghdl -i ${IMPORT_OPTIONS} trace.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/example_medium/zpu_config_trace.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/core/zpupkg.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/src/txt_util.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/example_medium/sim_fpga_top.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/core/zpu_core.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/example_medium/dram_hello.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/src/timer.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/src/io.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/src/trace.vhd
fi
echo "Compiling design..."
|
