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author | Bert Lange <b.lange@hzdr.de> | 2015-04-15 13:36:55 +0200 |
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committer | Bert Lange <b.lange@hzdr.de> | 2015-04-15 13:36:55 +0200 |
commit | a1c964908b51599bf624bd2d253419c7e629f195 (patch) | |
tree | 06125d59e83b7dde82d1bb57bc0e09ca83451b98 /zpu/hdl/example_ghdl/dmipssmalltrace_ghdl.sh | |
parent | bbfe29a15f11548eb7c9fa71dcb4d2d18c164a53 (diff) | |
parent | 8679e4f91dcae05aef40f96629f33f0f4161f14a (diff) | |
download | zpu-a1c964908b51599bf624bd2d253419c7e629f195.zip zpu-a1c964908b51599bf624bd2d253419c7e629f195.tar.gz |
Merge branch 'master' of https://github.com/zylin/zpu
Diffstat (limited to 'zpu/hdl/example_ghdl/dmipssmalltrace_ghdl.sh')
-rw-r--r-- | zpu/hdl/example_ghdl/dmipssmalltrace_ghdl.sh | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/zpu/hdl/example_ghdl/dmipssmalltrace_ghdl.sh b/zpu/hdl/example_ghdl/dmipssmalltrace_ghdl.sh new file mode 100644 index 0000000..b3be1a6 --- /dev/null +++ b/zpu/hdl/example_ghdl/dmipssmalltrace_ghdl.sh @@ -0,0 +1,24 @@ +#!/bin/sh
+
+IMPORT_OPTIONS="--std=93 --ieee=synopsys --workdir=work"
+MAKE_OPTIONS="${IMPORT_OPTIONS} -Wl,-s -fexplicit --syn-binding"
+
+if test ! -e work; then
+ echo "Building work library..."
+ mkdir work
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/example/zpu_config.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/core/zpupkg.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/src/txt_util.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/example/sim_small_fpga_top.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/core/zpu_core_small.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/example/bram_dmips.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/src/timer.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/src/io.vhd
+ ghdl -i ${IMPORT_OPTIONS} ../../hdl/zpu4/src/trace.vhd
+fi
+
+echo "Compiling design..."
+if ghdl -m ${MAKE_OPTIONS} fpga_top; then
+ echo "Compilation finished, start simulation with"
+ echo " ./fpga_top --stop-time=1ms"
+fi
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